nvidia-nccl-cu13 2.28.3__py3-none-manylinux_2_18_aarch64.whl

nvidia/nccl/include/nccl_device/ptr.h

@@ -0,0 +1,61 @@
+/*************************************************************************
+ * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See LICENSE.txt for license information
+ ************************************************************************/
+
+#ifndef _NCCL_DEVICE_PTR_H_
+#define _NCCL_DEVICE_PTR_H_
+#include "core.h"
+#include <stdint.h>
+
+#if __cplusplus
+template<typename T>
+struct ncclSymPtr {
+  using ElementType = T;
+  ncclWindow_t window;
+  size_t offset;
+
+  NCCL_HOST_DEVICE_INLINE constexpr ncclSymPtr(ncclWindow_t window=nullptr, size_t offset=0);
+
+  template<typename U>
+  NCCL_HOST_DEVICE_INLINE operator ncclSymPtr<U>() const;
+
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator+=(int d);
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator+=(unsigned int d);
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator+=(long d);
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator+=(unsigned long d);
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator+=(long long d);
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator+=(unsigned long long d);
+
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator-=(int d);
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator-=(unsigned int d);
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator-=(long d);
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator-=(unsigned long d);
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator-=(long long d);
+  NCCL_HOST_DEVICE_INLINE ncclSymPtr<T>& operator-=(unsigned long long d);
+
+  #if __CUDACC__
+  NCCL_DEVICE_INLINE T* localPtr() const;
+  NCCL_DEVICE_INLINE T* lsaPtr(int peer) const;
+  NCCL_DEVICE_INLINE T* peerPtr(int peer) const;
+  NCCL_DEVICE_INLINE T* peerPtr(ncclTeam team, int peer) const;
+  NCCL_DEVICE_INLINE T* multimemPtr(ncclMultimemHandle mmHandle) const;
+  NCCL_DEVICE_INLINE T* lsaMultimemPtr(ncclDevComm const&) const;
+  #endif
+};
+
+template<typename T, typename Int>
+NCCL_HOST_DEVICE_INLINE ncclSymPtr<T> operator+(ncclSymPtr<T> p, Int d);
+template<typename T, typename Int>
+NCCL_HOST_DEVICE_INLINE ncclSymPtr<T> operator-(ncclSymPtr<T> p, Int d);
+template<typename T>
+NCCL_HOST_DEVICE_INLINE ptrdiff_t operator-(ncclSymPtr<T> a, ncclSymPtr<T> b);
+
+template<typename T, typename Int>
+NCCL_HOST_DEVICE_INLINE ncclSymPtr<T> operator==(ncclSymPtr<T> a, ncclSymPtr<T> b);
+template<typename T, typename Int>
+NCCL_HOST_DEVICE_INLINE ncclSymPtr<T> operator!=(ncclSymPtr<T> a, ncclSymPtr<T> b);
+#endif
+
+#endif

nvidia/nccl/include/nccl_device/utility.h

@@ -0,0 +1,352 @@
+/*************************************************************************
+ * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See LICENSE.txt for license information
+ ************************************************************************/
+
+#ifndef _NCCL_DEVICE_UTILITY_H_
+#define _NCCL_DEVICE_UTILITY_H_
+
+#if __CUDACC__
+  #define NCCL_DEVICE_INLINE __device__ __forceinline__
+  #define NCCL_HOST_DEVICE_INLINE __host__ __device__ __forceinline__
+#else
+  #ifndef __host__
+    #define __host__
+  #endif
+  #define NCCL_DEVICE_INLINE
+  #define NCCL_HOST_DEVICE_INLINE inline __attribute__((always_inline))
+#endif
+
+#if __cplusplus
+#define NCCL_EXTERN_C extern "C"
+#else
+#define NCCL_EXTERN_C
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#if __CUDACC__
+#include <cuda/atomic>
+#endif
+
+#if __cplusplus
+namespace nccl {
+namespace utility {
+
+template<typename T>
+T&& declval() noexcept {
+  static_assert(sizeof(T)!=sizeof(T), "You can't evaluate declval.");
+}
+
+template<typename X, typename Y, typename Z = decltype(X()+Y())>
+NCCL_HOST_DEVICE_INLINE constexpr Z divUp(X x, Y y) {
+  return (x+y-1)/y;
+}
+
+template<typename X, typename Y, typename Z = decltype(X()+Y())>
+NCCL_HOST_DEVICE_INLINE constexpr Z roundUp(X x, Y y) {
+  return (x+y-1) - (x+y-1)%y;
+}
+template<typename X, typename Y, typename Z = decltype(X()+Y())>
+NCCL_HOST_DEVICE_INLINE constexpr Z roundDown(X x, Y y) {
+  return x - x%y;
+}
+
+// assumes second argument is a power of 2
+template<typename X, typename Y, typename Z = decltype(X()+Y())>
+NCCL_HOST_DEVICE_INLINE constexpr Z alignUp(X x, Y a) {
+  return (x + a-1) & -Z(a);
+}
+template<typename T>
+NCCL_HOST_DEVICE_INLINE T* alignUp(T* x, size_t a) {
+  static_assert(sizeof(T) == 1, "Only single byte types allowed.");
+  return reinterpret_cast<T*>((reinterpret_cast<uintptr_t>(x) + a-1) & -uintptr_t(a));
+}
+template<typename T>
+NCCL_HOST_DEVICE_INLINE void* alignUp(void const* x, size_t a) {
+  return reinterpret_cast<void*>((reinterpret_cast<uintptr_t>(x) + a-1) & -uintptr_t(a));
+}
+
+// assumes second argument is a power of 2
+template<typename X, typename Y, typename Z = decltype(X()+int())>
+NCCL_HOST_DEVICE_INLINE constexpr Z alignDown(X x, Y a) {
+  return x & -Z(a);
+}
+template<typename T>
+NCCL_HOST_DEVICE_INLINE T* alignDown(T* x, size_t a) {
+  static_assert(sizeof(T) == 1, "Only single byte types allowed.");
+  return reinterpret_cast<T*>(reinterpret_cast<uintptr_t>(x) & -uintptr_t(a));
+}
+template<typename T>
+NCCL_HOST_DEVICE_INLINE void* alignDown(void const* x, size_t a) {
+  return reinterpret_cast<void*>(reinterpret_cast<uintptr_t>(x) & -uintptr_t(a));
+}
+
+template<typename T>
+NCCL_HOST_DEVICE_INLINE T add4G(T base, int delta4G) {
+  union { uint32_t u32[2]; T tmp; };
+  tmp = base;
+  u32[1] += delta4G;
+  return tmp;
+}
+
+
+template<typename Int>
+NCCL_HOST_DEVICE_INLINE constexpr bool isPow2(Int x) {
+  return (x & (x-1)) == 0;
+}
+
+// Produce the reciprocal of x for use in idivByRcp
+NCCL_HOST_DEVICE_INLINE constexpr uint32_t idivRcp32(uint32_t x) {
+  return uint32_t(-1)/x + isPow2(x);
+}
+NCCL_HOST_DEVICE_INLINE constexpr uint64_t idivRcp64(uint64_t x) {
+  return uint64_t(-1)/x + isPow2(x);
+}
+
+NCCL_HOST_DEVICE_INLINE uint32_t mul32hi(uint32_t a, uint32_t b) {
+#if __CUDA_ARCH__
+  return __umulhi(a, b);
+#else
+  return uint64_t(a)*b >> 32;
+#endif
+}
+NCCL_HOST_DEVICE_INLINE uint64_t mul64hi(uint64_t a, uint64_t b) {
+#if __CUDA_ARCH__
+  return __umul64hi(a, b);
+#else
+  return (uint64_t)(((unsigned __int128)a)*b >> 64);
+#endif
+}
+
+// Produce the reciprocal of x*y given their respective reciprocals. This incurs
+// no integer division on device.
+NCCL_HOST_DEVICE_INLINE uint32_t imulRcp32(uint32_t x, uint32_t xrcp, uint32_t y, uint32_t yrcp) {
+  if (xrcp == 0) return yrcp;
+  if (yrcp == 0) return xrcp;
+  uint32_t rcp = mul32hi(xrcp, yrcp);
+  uint32_t rem = -x*y*rcp;
+  if (x*y <= rem) rcp += 1;
+  return rcp;
+}
+NCCL_HOST_DEVICE_INLINE uint64_t imulRcp64(uint64_t x, uint64_t xrcp, uint64_t y, uint64_t yrcp) {
+  if (xrcp == 0) return yrcp;
+  if (yrcp == 0) return xrcp;
+  uint64_t rcp = mul64hi(xrcp, yrcp);
+  uint64_t rem = -x*y*rcp;
+  if (x*y <= rem) rcp += 1;
+  return rcp;
+}
+
+// Fast unsigned integer division where divisor has precomputed reciprocal.
+// idivFast(x, y, idivRcp(y)) == x/y
+NCCL_HOST_DEVICE_INLINE void idivmodFast32(uint32_t *quo, uint32_t *rem, uint32_t x, uint32_t y, uint32_t yrcp) {
+  uint32_t q = yrcp == 0 ? x : mul32hi(x, yrcp);
+  uint32_t r = x - y*q;
+  if (r >= y) { q += 1; r -= y; }
+  *quo = q;
+  *rem = r;
+}
+NCCL_HOST_DEVICE_INLINE void idivmodFast64(uint64_t *quo, uint64_t *rem, uint64_t x, uint64_t y, uint64_t yrcp) {
+  uint32_t q = yrcp == 0 ? x : mul64hi(x, yrcp);
+  uint32_t r = x - y*q;
+  if (r >= y) { q += 1; r -= y; }
+  *quo = q;
+  *rem = r;
+}
+
+NCCL_HOST_DEVICE_INLINE uint32_t idivFast32(uint32_t x, uint32_t y, uint32_t yrcp) {
+  uint32_t q, r;
+  idivmodFast32(&q, &r, x, y, yrcp);
+  return q;
+}
+NCCL_HOST_DEVICE_INLINE uint32_t idivFast64(uint64_t x, uint64_t y, uint64_t yrcp) {
+  uint64_t q, r;
+  idivmodFast64(&q, &r, x, y, yrcp);
+  return q;
+}
+
+NCCL_HOST_DEVICE_INLINE uint32_t imodFast32(uint32_t x, uint32_t y, uint32_t yrcp) {
+  uint32_t q, r;
+  idivmodFast32(&q, &r, x, y, yrcp);
+  return r;
+}
+NCCL_HOST_DEVICE_INLINE uint32_t imodFast64(uint64_t x, uint64_t y, uint64_t yrcp) {
+  uint64_t q, r;
+  idivmodFast64(&q, &r, x, y, yrcp);
+  return r;
+}
+
+#if __CUDACC__
+// Precomputed integer reciprocoals for denominator values 1..64 inclusive.
+// Pass these to idivFast64() for fast division on the GPU.
+NCCL_DEVICE_INLINE uint64_t idivRcp64_upto64(int x) {
+  static constexpr uint64_t table[65] = {
+    idivRcp64(0x01), idivRcp64(0x01), idivRcp64(0x02), idivRcp64(0x03),
+    idivRcp64(0x04), idivRcp64(0x05), idivRcp64(0x06), idivRcp64(0x07),
+    idivRcp64(0x08), idivRcp64(0x09), idivRcp64(0x0a), idivRcp64(0x0b),
+    idivRcp64(0x0c), idivRcp64(0x0d), idivRcp64(0x0e), idivRcp64(0x0f),
+    idivRcp64(0x10), idivRcp64(0x11), idivRcp64(0x12), idivRcp64(0x13),
+    idivRcp64(0x14), idivRcp64(0x15), idivRcp64(0x16), idivRcp64(0x17),
+    idivRcp64(0x18), idivRcp64(0x19), idivRcp64(0x1a), idivRcp64(0x1b),
+    idivRcp64(0x1c), idivRcp64(0x1d), idivRcp64(0x1e), idivRcp64(0x1f),
+    idivRcp64(0x20), idivRcp64(0x21), idivRcp64(0x22), idivRcp64(0x23),
+    idivRcp64(0x24), idivRcp64(0x25), idivRcp64(0x26), idivRcp64(0x27),
+    idivRcp64(0x28), idivRcp64(0x29), idivRcp64(0x2a), idivRcp64(0x2b),
+    idivRcp64(0x2c), idivRcp64(0x2d), idivRcp64(0x2e), idivRcp64(0x2f),
+    idivRcp64(0x30), idivRcp64(0x31), idivRcp64(0x32), idivRcp64(0x33),
+    idivRcp64(0x34), idivRcp64(0x35), idivRcp64(0x36), idivRcp64(0x37),
+    idivRcp64(0x38), idivRcp64(0x39), idivRcp64(0x3a), idivRcp64(0x3b),
+    idivRcp64(0x3c), idivRcp64(0x3d), idivRcp64(0x3e), idivRcp64(0x3f),
+    idivRcp64(0x40)
+  };
+  return table[x];
+}
+#endif
+
+#if __CUDACC__
+NCCL_DEVICE_INLINE uint32_t idivRcp32_upto64(int x) {
+  return idivRcp64_upto64(x)>>32;
+}
+#endif
+
+#if __CUDACC__
+NCCL_DEVICE_INLINE void fenceAcquireGpu() {
+  static __device__ int dummy;
+  int tmp;
+  asm volatile("ld.acquire.gpu.s32 %0,[%1];" : "=r"(tmp) : "l"(&dummy) : "memory");
+  dummy = tmp;
+}
+NCCL_DEVICE_INLINE void fenceReleaseGpu() {
+  cuda::atomic_thread_fence(cuda::memory_order_release, cuda::thread_scope_device);
+}
+#endif
+
+#if __CUDACC__
+NCCL_DEVICE_INLINE cuda::memory_order acquireOrderOf(cuda::memory_order ord) {
+  return ord == cuda::memory_order_release ? cuda::memory_order_relaxed :
+         ord == cuda::memory_order_acq_rel ? cuda::memory_order_acquire :
+         ord;
+}
+NCCL_DEVICE_INLINE cuda::memory_order releaseOrderOf(cuda::memory_order ord) {
+  return ord == cuda::memory_order_acquire ? cuda::memory_order_relaxed :
+         ord == cuda::memory_order_acq_rel ? cuda::memory_order_release :
+         ord;
+}
+#endif
+
+#if __CUDACC__
+NCCL_DEVICE_INLINE int lane() {
+  int ret;
+  asm("mov.u32 %0, %%laneid;" : "=r"(ret));
+  return ret;
+}
+NCCL_DEVICE_INLINE unsigned int lanemask_lt() {
+  unsigned int ret;
+  asm("mov.u32 %0, %%lanemask_lt;" : "=r"(ret));
+  return ret;
+}
+#endif
+
+#if __CUDACC__
+// Load anything, but cache like its constant memory.
+template<typename T>
+NCCL_DEVICE_INLINE T loadConst(T const *p) {
+  if (alignof(T) == 1) {
+    union { uint8_t part[sizeof(T)]; T ret; };
+    for (int i=0; i < (int)sizeof(T); i++) part[i] = __ldg((uint8_t const*)p + i);
+    return ret;
+  } else if (alignof(T) == 2) {
+    union { uint16_t part[sizeof(T)/2]; T ret; };
+    for (int i=0; i < (int)sizeof(T)/2; i++) part[i] = __ldg((uint16_t const*)p + i);
+    return ret;
+  } else if (alignof(T) == 4) {
+    union { uint32_t part[sizeof(T)/4]; T ret; };
+    for (int i=0; i < (int)sizeof(T)/4; i++) part[i] = __ldg((uint32_t const*)p + i);
+    return ret;
+  } else if (alignof(T) == 8) {
+    union { uint64_t part[sizeof(T)/8]; T ret; };
+    for (int i=0; i < (int)sizeof(T)/8; i++) part[i] = __ldg((uint64_t const*)p + i);
+    return ret;
+  } else { // alignof(T) >= 16
+    union { ulonglong2 part[sizeof(T)/16]; T ret; };
+    for (int i=0; i < (int)sizeof(T)/16; i++) part[i] = __ldg((ulonglong2 const*)p + i);
+    return ret;
+  }
+}
+#endif
+
+////////////////////////////////////////////////////////////////////////////////
+// Optional<T>: Holds a T that may or may not be constructed. An Optional
+// constructed with a Present<Arg...> will have its T constructed via the
+// T::T(Arg...) constructor. An Optional constructed with a Absent will not
+// have its T constructed.
+
+template<int ...vals>
+struct IntSeq {};
+
+template<int n, int m, int ...i>
+struct IntSeqUpTo: IntSeqUpTo<n, m+1, i..., m> {};
+template<int n, int ...i>
+struct IntSeqUpTo<n, n, i...> { using Type = IntSeq<i...>; };
+
+// Present<Arg...>: Packs a list of arguments together to be passed to Optional<T>.
+template<typename ...Arg>
+struct Present;
+template<>
+struct Present<> {};
+template<typename H, typename ...T>
+struct Present<H, T...> {
+  H h;
+  Present<T...> t;
+
+  NCCL_HOST_DEVICE_INLINE H get(IntSeq<0>) {
+    return static_cast<H>(h);
+  }
+  template<int i>
+  NCCL_HOST_DEVICE_INLINE decltype(auto) get(IntSeq<i>) {
+    return t.get(IntSeq<i-1>{});
+  }
+};
+
+NCCL_HOST_DEVICE_INLINE Present<> present() {
+  return Present<>{};
+}
+template<typename H, typename ...T>
+NCCL_HOST_DEVICE_INLINE Present<H&&, T&&...> present(H&& h, T&& ...t) {
+  return Present<H&&, T&&...>{static_cast<H&&>(h), present(static_cast<T&&>(t)...)};
+}
+
+struct Absent {};
+
+template<typename T>
+struct Optional {
+  bool present; // Is `thing` constructed.
+  union { T thing; };
+
+  // Construct with absent thing:
+  NCCL_HOST_DEVICE_INLINE constexpr Optional(): present(false) {}
+  NCCL_HOST_DEVICE_INLINE constexpr Optional(Absent): present(false) {}
+
+  // Helper constructor
+  template<int ...i, typename ...Arg>
+  NCCL_HOST_DEVICE_INLINE Optional(Present<Arg...> args, IntSeq<i...>):
+    present(true),
+    thing{args.get(IntSeq<i>())...} {
+  }
+  // Construct with present thing:
+  template<typename ...Arg>
+  NCCL_HOST_DEVICE_INLINE Optional(Present<Arg...> args):
+    Optional(args, IntSeqUpTo<sizeof...(Arg), 0>::Type()) {
+  }
+
+  NCCL_HOST_DEVICE_INLINE ~Optional() {
+    if (present) thing.~T();
+  }
+};
+
+}}
+#endif // __cplusplus
+#endif

nvidia/nccl/include/nccl_device.h

@@ -0,0 +1,15 @@
+/*************************************************************************
+ * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See LICENSE.txt for license information
+ ************************************************************************/
+
+#include "nccl_device/impl/comm__funcs.h"
+#include "nccl_device/coop.h"
+#include "nccl_device/impl/core__funcs.h"
+#include "nccl_device/impl/ll_a2a__funcs.h"
+#include "nccl_device/impl/mem_barrier__funcs.h"
+//#include "nccl_device/net_barrier__funcs.h"
+//#include "nccl_device/net_scratch_a2a__funcs.h"
+//#include "nccl_device/barrier__funcs.h"
+#include "nccl_device/impl/ptr__funcs.h"

nvidia_nccl_cu13-2.28.3.dist-info/METADATA

@@ -0,0 +1,45 @@
+Metadata-Version: 2.4
+Name: nvidia-nccl-cu13
+Version: 2.28.3
+Summary: NVIDIA Collective Communication Library (NCCL) Runtime
+Home-page: https://developer.nvidia.com/cuda-zone
+Author: Nvidia CUDA Installer Team
+Author-email: compute_installer@nvidia.com
+License-Expression: LicenseRef-NVIDIA-Proprietary
+Keywords: cuda,nvidia,runtime,machine learning,deep learning
+Classifier: Development Status :: 4 - Beta
+Classifier: Intended Audience :: Developers
+Classifier: Intended Audience :: Education
+Classifier: Intended Audience :: Science/Research
+Classifier: Natural Language :: English
+Classifier: Programming Language :: Python :: 3
+Classifier: Programming Language :: Python :: 3.5
+Classifier: Programming Language :: Python :: 3.6
+Classifier: Programming Language :: Python :: 3.7
+Classifier: Programming Language :: Python :: 3.8
+Classifier: Programming Language :: Python :: 3.9
+Classifier: Programming Language :: Python :: 3.10
+Classifier: Programming Language :: Python :: 3.11
+Classifier: Programming Language :: Python :: 3 :: Only
+Classifier: Topic :: Scientific/Engineering
+Classifier: Topic :: Scientific/Engineering :: Mathematics
+Classifier: Topic :: Scientific/Engineering :: Artificial Intelligence
+Classifier: Topic :: Software Development
+Classifier: Topic :: Software Development :: Libraries
+Classifier: Operating System :: Microsoft :: Windows
+Classifier: Operating System :: POSIX :: Linux
+Requires-Python: >=3
+License-File: License.txt
+Dynamic: author
+Dynamic: author-email
+Dynamic: classifier
+Dynamic: description
+Dynamic: home-page
+Dynamic: keywords
+Dynamic: license
+Dynamic: license-file
+Dynamic: license-expression
+Dynamic: requires-python
+Dynamic: summary
+
+NCCL (pronounced "Nickel") is a stand-alone library of standard collective communication routines for GPUs, implementing all-reduce, all-gather, reduce, broadcast, and reduce-scatter. It has been optimized to achieve high bandwidth on any platform using PCIe, NVLink, NVswitch, as well as networking using InfiniBand Verbs or TCP/IP sockets.

nvidia_nccl_cu13-2.28.3.dist-info/RECORD

@@ -0,0 +1,25 @@
+nvidia/nccl/include/nccl.h,sha256=IK7t8WAvdNaI5fZ2B-2XWbfEEU1VjzuLRR4bRWa5f9g,24962
+nvidia/nccl/include/nccl_device.h,sha256=ezE--yGdfirMW4jOKjKLy4a60_bVwcHzohSrIcIK1jc,647
+nvidia/nccl/include/nccl_device/comm.h,sha256=NI1zfO81NPABwxXDSNrXCSkXuVDomHTDbhW8HllDCxo,344
+nvidia/nccl/include/nccl_device/coop.h,sha256=lDqtFaHmEarBqCOVdqVu3fOuzcmgwBZHCf30GQIoiDs,4558
+nvidia/nccl/include/nccl_device/core.h,sha256=b4lIT2As3nv7Pb8S2SsYsb_kkRl7f69VTU6FKtCQcSQ,5775
+nvidia/nccl/include/nccl_device/ll_a2a.h,sha256=rL8t8ygiBwuCcQyR9g5v-_2VQVJ81QsUcmij7pBQP8E,2059
+nvidia/nccl/include/nccl_device/mem_barrier.h,sha256=tXAWPUKr545oOfTWoPivtXh97GC-c8of6kBl3nRuFcE,1400
+nvidia/nccl/include/nccl_device/ptr.h,sha256=Ee2Osw362B4l6ro8hVmPAbVvHSYsnDSOcPisPzhNHZs,2401
+nvidia/nccl/include/nccl_device/utility.h,sha256=FxKHc6FUeMriKOOH-q-zs2WpiDjVdkAX_aoog5tG8BE,11135
+nvidia/nccl/include/nccl_device/impl/comm__funcs.h,sha256=CyFNrVnQJfH2XKEypZXNxgt770UOk9V-Hn6rrRz4j2U,396
+nvidia/nccl/include/nccl_device/impl/comm__types.h,sha256=VlxpsIjoJvq7tTBXkndAm4CSln6RVgBEDmZXpl5t2HE,1015
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+nvidia_nccl_cu13-2.28.3.dist-info/licenses/License.txt,sha256=DwF0prTgszrCY3W_cpUzB1sy9MUaW2gCo9dC19zcmnY,1895
+nvidia_nccl_cu13-2.28.3.dist-info/METADATA,sha256=HW7-ITCQK2pNT1f4oUJ66lU-c5XFLlgQi1MAuBQmuyI,2026
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+nvidia_nccl_cu13-2.28.3.dist-info/RECORD,,

nvidia_nccl_cu13-2.28.3.dist-info/WHEEL

@@ -0,0 +1,5 @@
+Wheel-Version: 1.0
+Generator: setuptools (80.9.0)
+Root-Is-Purelib: true
+Tag: py3-none-manylinux_2_18_aarch64
+

nvidia_nccl_cu13-2.28.3.dist-info/licenses/License.txt

@@ -0,0 +1,39 @@
+
+ Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+  * Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+  * Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in the
+    documentation and/or other materials provided with the distribution.
+  * Neither the name of NVIDIA CORPORATION, Lawrence Berkeley National
+    Laboratory, the U.S. Department of Energy, nor the names of their
+    contributors may be used to endorse or promote products derived
+    from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
+ EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+ The U.S. Department of Energy funded the development of this software
+ under subcontract 7078610 with Lawrence Berkeley National Laboratory.
+
+
+This code also includes files from the NVIDIA Tools Extension SDK project.
+
+See:
+
+   https://github.com/NVIDIA/NVTX
+
+for more information and license details.

nvidia_nccl_cu13-2.28.3.dist-info/top_level.txt

@@ -0,0 +1 @@
+nvidia