lief 0.16.5__cp38-cp38-win_amd64.whl → 0.17.0__cp38-cp38-win_amd64.whl
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- lief/ART/__init__.pyi +19 -18
- lief/COFF/__init__.pyi +708 -0
- lief/DEX/__init__.pyi +165 -159
- lief/ELF/__init__.pyi +2807 -2348
- lief/MachO/__init__.pyi +1877 -1457
- lief/OAT/__init__.pyi +153 -150
- lief/PE/__init__.pyi +2633 -2021
- lief/PE/unwind_aarch64/__init__.pyi +58 -0
- lief/PE/unwind_x64/__init__.pyi +53 -0
- lief/VDEX/__init__.pyi +10 -8
- lief/__init__.py +1 -1
- lief/__init__.pyi +280 -249
- lief/_lief.pyd +0 -0
- lief/assembly/__init__.pyi +17 -0
- lief/assembly/aarch64/__init__.pyi +11015 -8889
- lief/assembly/aarch64/operands/__init__.pyi +5 -5
- lief/assembly/arm/__init__.pyi +4521 -4491
- lief/assembly/ebpf/__init__.pyi +535 -481
- lief/assembly/mips/__init__.pyi +2926 -2888
- lief/assembly/powerpc/__init__.pyi +2958 -2846
- lief/assembly/riscv/__init__.pyi +14788 -13826
- lief/assembly/x86/__init__.pyi +24970 -19926
- lief/assembly/x86/operands/__init__.pyi +5 -5
- lief/dsc/__init__.pyi +31 -25
- lief/dwarf/__init__.pyi +160 -146
- lief/dwarf/editor/__init__.pyi +138 -0
- lief/dwarf/parameters/__init__.pyi +3 -3
- lief/dwarf/types/__init__.pyi +49 -49
- lief/logging/__init__.pyi +12 -12
- lief/objc/__init__.pyi +26 -26
- lief/pdb/__init__.pyi +272 -38
- lief/pdb/types/__init__.pyi +22 -22
- {lief-0.16.5.dist-info → lief-0.17.0.dist-info}/METADATA +1 -1
- lief-0.17.0.dist-info/RECORD +37 -0
- lief-0.16.5.dist-info/RECORD +0 -33
- {lief-0.16.5.dist-info → lief-0.17.0.dist-info}/WHEEL +0 -0
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@@ -2,13 +2,17 @@ import enum
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import lief.assembly.aarch64
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from typing import Iterator, Optional, Union
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import lief
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import lief.assembly.aarch64
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class Immediate(lief.assembly.aarch64.Operand):
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@property
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def value(self) -> int: ...
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class Register(lief.assembly.aarch64.Operand):
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@property
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def value(self) -> Optional[Union[lief.assembly.aarch64.REG, lief.assembly.aarch64.SYSREG]]: ...
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class Memory(lief.assembly.aarch64.Operand):
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class SHIFT(enum.Enum):
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UNKNOWN = 0
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@@ -42,7 +46,3 @@ class Memory(lief.assembly.aarch64.Operand):
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class PCRelative(lief.assembly.aarch64.Operand):
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@property
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def value(self) -> int: ...
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class Register(lief.assembly.aarch64.Operand):
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@property
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def value(self) -> Optional[Union[lief.assembly.aarch64.REG, lief.assembly.aarch64.SYSREG]]: ...
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