PyPI - lief - Versions diffs - 0.16.5__cp312-cp312-musllinux_1_2_aarch64.whl → 0.17.0__cp312-cp312-musllinux_1_2_aarch64.whl - Mend

lief 0.16.5__cp312-cp312-musllinux_1_2_aarch64.whl → 0.17.0__cp312-cp312-musllinux_1_2_aarch64.whl

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.

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Files changed (36) hide show

lief/ART/__init__.pyi +19 -18
lief/COFF/__init__.pyi +708 -0
lief/DEX/__init__.pyi +165 -159
lief/ELF/__init__.pyi +2807 -2348
lief/MachO/__init__.pyi +1877 -1457
lief/OAT/__init__.pyi +153 -150
lief/PE/__init__.pyi +2633 -2021
lief/PE/unwind_aarch64/__init__.pyi +58 -0
lief/PE/unwind_x64/__init__.pyi +53 -0
lief/VDEX/__init__.pyi +10 -8
lief/__init__.py +1 -1
lief/__init__.pyi +280 -249
lief/_lief.so +0 -0
lief/assembly/__init__.pyi +17 -0
lief/assembly/aarch64/__init__.pyi +11015 -8889
lief/assembly/aarch64/operands/__init__.pyi +5 -5
lief/assembly/arm/__init__.pyi +4521 -4491
lief/assembly/ebpf/__init__.pyi +535 -481
lief/assembly/mips/__init__.pyi +2926 -2888
lief/assembly/powerpc/__init__.pyi +2958 -2846
lief/assembly/riscv/__init__.pyi +14788 -13826
lief/assembly/x86/__init__.pyi +24970 -19926
lief/assembly/x86/operands/__init__.pyi +5 -5
lief/dsc/__init__.pyi +31 -25
lief/dwarf/__init__.pyi +160 -146
lief/dwarf/editor/__init__.pyi +138 -0
lief/dwarf/parameters/__init__.pyi +3 -3
lief/dwarf/types/__init__.pyi +49 -49
lief/logging/__init__.pyi +12 -12
lief/objc/__init__.pyi +26 -26
lief/pdb/__init__.pyi +272 -38
lief/pdb/types/__init__.pyi +22 -22
{lief-0.16.5.dist-info → lief-0.17.0.dist-info}/METADATA +1 -1
lief-0.17.0.dist-info/RECORD +37 -0
lief-0.16.5.dist-info/RECORD +0 -33
{lief-0.16.5.dist-info → lief-0.17.0.dist-info}/WHEEL +0 -0

lief/assembly/ebpf/__init__.pyi CHANGED Viewed

@@ -1,13 +1,9 @@
 import enum
 from typing import Iterator, Optional, Union
-import lief
+import lief.assembly
-class Instruction(lief.assembly.Instruction):
-    @property
-    def opcode(self) -> OPCODE: ...
 class OPCODE(enum.Enum):
     PHI = 0
@@ -31,954 +27,1012 @@ class OPCODE(enum.Enum):
     IMPLICIT_DEF = 10
-    SUBREG_TO_REG = 11
+    INIT_UNDEF = 11
+    SUBREG_TO_REG = 12
+    COPY_TO_REGCLASS = 13
+    DBG_VALUE = 14
+    DBG_VALUE_LIST = 15
+    DBG_INSTR_REF = 16
+    DBG_PHI = 17
+    DBG_LABEL = 18
+    REG_SEQUENCE = 19
+    COPY = 20
+    BUNDLE = 21
+    LIFETIME_START = 22
+    LIFETIME_END = 23
+    PSEUDO_PROBE = 24
+    ARITH_FENCE = 25
-    COPY_TO_REGCLASS = 12
+    STACKMAP = 26
-    DBG_VALUE = 13
+    FENTRY_CALL = 27
-    DBG_VALUE_LIST = 14
+    PATCHPOINT = 28
-    DBG_INSTR_REF = 15
+    LOAD_STACK_GUARD = 29
-    DBG_PHI = 16
+    PREALLOCATED_SETUP = 30
-    DBG_LABEL = 17
+    PREALLOCATED_ARG = 31
-    REG_SEQUENCE = 18
+    STATEPOINT = 32
-    COPY = 19
+    LOCAL_ESCAPE = 33
-    BUNDLE = 20
+    FAULTING_OP = 34
-    LIFETIME_START = 21
+    PATCHABLE_OP = 35
-    LIFETIME_END = 22
+    PATCHABLE_FUNCTION_ENTER = 36
-    PSEUDO_PROBE = 23
+    PATCHABLE_RET = 37
-    ARITH_FENCE = 24
+    PATCHABLE_FUNCTION_EXIT = 38
-    STACKMAP = 25
+    PATCHABLE_TAIL_CALL = 39
-    FENTRY_CALL = 26
+    PATCHABLE_EVENT_CALL = 40
-    PATCHPOINT = 27
+    PATCHABLE_TYPED_EVENT_CALL = 41
-    LOAD_STACK_GUARD = 28
+    ICALL_BRANCH_FUNNEL = 42
-    PREALLOCATED_SETUP = 29
+    FAKE_USE = 43
-    PREALLOCATED_ARG = 30
+    MEMBARRIER = 44
-    STATEPOINT = 31
+    JUMP_TABLE_DEBUG_INFO = 45
-    LOCAL_ESCAPE = 32
+    CONVERGENCECTRL_ENTRY = 46
-    FAULTING_OP = 33
+    CONVERGENCECTRL_ANCHOR = 47
-    PATCHABLE_OP = 34
+    CONVERGENCECTRL_LOOP = 48
-    PATCHABLE_FUNCTION_ENTER = 35
+    CONVERGENCECTRL_GLUE = 49
-    PATCHABLE_RET = 36
+    G_ASSERT_SEXT = 50
-    PATCHABLE_FUNCTION_EXIT = 37
+    G_ASSERT_ZEXT = 51
-    PATCHABLE_TAIL_CALL = 38
+    G_ASSERT_ALIGN = 52
-    PATCHABLE_EVENT_CALL = 39
+    G_ADD = 53
-    PATCHABLE_TYPED_EVENT_CALL = 40
+    G_SUB = 54
-    ICALL_BRANCH_FUNNEL = 41
+    G_MUL = 55
-    MEMBARRIER = 42
+    G_SDIV = 56
-    JUMP_TABLE_DEBUG_INFO = 43
+    G_UDIV = 57
-    CONVERGENCECTRL_ENTRY = 44
+    G_SREM = 58
-    CONVERGENCECTRL_ANCHOR = 45
+    G_UREM = 59
-    CONVERGENCECTRL_LOOP = 46
+    G_SDIVREM = 60
-    CONVERGENCECTRL_GLUE = 47
+    G_UDIVREM = 61
-    G_ASSERT_SEXT = 48
+    G_AND = 62
-    G_ASSERT_ZEXT = 49
+    G_OR = 63
-    G_ASSERT_ALIGN = 50
+    G_XOR = 64
-    G_ADD = 51
+    G_ABDS = 65
-    G_SUB = 52
+    G_ABDU = 66
-    G_MUL = 53
+    G_IMPLICIT_DEF = 67
-    G_SDIV = 54
+    G_PHI = 68
-    G_UDIV = 55
+    G_FRAME_INDEX = 69
-    G_SREM = 56
+    G_GLOBAL_VALUE = 70
-    G_UREM = 57
+    G_PTRAUTH_GLOBAL_VALUE = 71
-    G_SDIVREM = 58
+    G_CONSTANT_POOL = 72
-    G_UDIVREM = 59
+    G_EXTRACT = 73
-    G_AND = 60
+    G_UNMERGE_VALUES = 74
-    G_OR = 61
+    G_INSERT = 75
-    G_XOR = 62
+    G_MERGE_VALUES = 76
-    G_IMPLICIT_DEF = 63
+    G_BUILD_VECTOR = 77
-    G_PHI = 64
+    G_BUILD_VECTOR_TRUNC = 78
-    G_FRAME_INDEX = 65
+    G_CONCAT_VECTORS = 79
-    G_GLOBAL_VALUE = 66
+    G_PTRTOINT = 80
-    G_PTRAUTH_GLOBAL_VALUE = 67
+    G_INTTOPTR = 81
-    G_CONSTANT_POOL = 68
+    G_BITCAST = 82
-    G_EXTRACT = 69
+    G_FREEZE = 83
-    G_UNMERGE_VALUES = 70
+    G_CONSTANT_FOLD_BARRIER = 84
-    G_INSERT = 71
+    G_INTRINSIC_FPTRUNC_ROUND = 85
-    G_MERGE_VALUES = 72
+    G_INTRINSIC_TRUNC = 86
-    G_BUILD_VECTOR = 73
+    G_INTRINSIC_ROUND = 87
-    G_BUILD_VECTOR_TRUNC = 74
+    G_INTRINSIC_LRINT = 88
-    G_CONCAT_VECTORS = 75
+    G_INTRINSIC_LLRINT = 89
-    G_PTRTOINT = 76
+    G_INTRINSIC_ROUNDEVEN = 90
-    G_INTTOPTR = 77
+    G_READCYCLECOUNTER = 91
-    G_BITCAST = 78
+    G_READSTEADYCOUNTER = 92
-    G_FREEZE = 79
+    G_LOAD = 93
-    G_CONSTANT_FOLD_BARRIER = 80
+    G_SEXTLOAD = 94
-    G_INTRINSIC_FPTRUNC_ROUND = 81
+    G_ZEXTLOAD = 95
-    G_INTRINSIC_TRUNC = 82
+    G_INDEXED_LOAD = 96
-    G_INTRINSIC_ROUND = 83
+    G_INDEXED_SEXTLOAD = 97
-    G_INTRINSIC_LRINT = 84
+    G_INDEXED_ZEXTLOAD = 98
-    G_INTRINSIC_LLRINT = 85
+    G_STORE = 99
-    G_INTRINSIC_ROUNDEVEN = 86
+    G_INDEXED_STORE = 100
-    G_READCYCLECOUNTER = 87
+    G_ATOMIC_CMPXCHG_WITH_SUCCESS = 101
-    G_READSTEADYCOUNTER = 88
+    G_ATOMIC_CMPXCHG = 102
-    G_LOAD = 89
+    G_ATOMICRMW_XCHG = 103
-    G_SEXTLOAD = 90
+    G_ATOMICRMW_ADD = 104
-    G_ZEXTLOAD = 91
+    G_ATOMICRMW_SUB = 105
-    G_INDEXED_LOAD = 92
+    G_ATOMICRMW_AND = 106
-    G_INDEXED_SEXTLOAD = 93
+    G_ATOMICRMW_NAND = 107
-    G_INDEXED_ZEXTLOAD = 94
+    G_ATOMICRMW_OR = 108
-    G_STORE = 95
+    G_ATOMICRMW_XOR = 109
-    G_INDEXED_STORE = 96
+    G_ATOMICRMW_MAX = 110
-    G_ATOMIC_CMPXCHG_WITH_SUCCESS = 97
+    G_ATOMICRMW_MIN = 111
-    G_ATOMIC_CMPXCHG = 98
+    G_ATOMICRMW_UMAX = 112
-    G_ATOMICRMW_XCHG = 99
+    G_ATOMICRMW_UMIN = 113
-    G_ATOMICRMW_ADD = 100
+    G_ATOMICRMW_FADD = 114
-    G_ATOMICRMW_SUB = 101
+    G_ATOMICRMW_FSUB = 115
-    G_ATOMICRMW_AND = 102
+    G_ATOMICRMW_FMAX = 116
-    G_ATOMICRMW_NAND = 103
+    G_ATOMICRMW_FMIN = 117
-    G_ATOMICRMW_OR = 104
+    G_ATOMICRMW_FMAXIMUM = 118
-    G_ATOMICRMW_XOR = 105
+    G_ATOMICRMW_FMINIMUM = 119
-    G_ATOMICRMW_MAX = 106
+    G_ATOMICRMW_UINC_WRAP = 120
-    G_ATOMICRMW_MIN = 107
+    G_ATOMICRMW_UDEC_WRAP = 121
-    G_ATOMICRMW_UMAX = 108
+    G_ATOMICRMW_USUB_COND = 122
-    G_ATOMICRMW_UMIN = 109
+    G_ATOMICRMW_USUB_SAT = 123
-    G_ATOMICRMW_FADD = 110
+    G_FENCE = 124
-    G_ATOMICRMW_FSUB = 111
+    G_PREFETCH = 125
-    G_ATOMICRMW_FMAX = 112
+    G_BRCOND = 126
-    G_ATOMICRMW_FMIN = 113
+    G_BRINDIRECT = 127
-    G_ATOMICRMW_UINC_WRAP = 114
+    G_INVOKE_REGION_START = 128
-    G_ATOMICRMW_UDEC_WRAP = 115
+    G_INTRINSIC = 129
-    G_FENCE = 116
+    G_INTRINSIC_W_SIDE_EFFECTS = 130
-    G_PREFETCH = 117
+    G_INTRINSIC_CONVERGENT = 131
-    G_BRCOND = 118
+    G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 132
-    G_BRINDIRECT = 119
+    G_ANYEXT = 133
-    G_INVOKE_REGION_START = 120
+    G_TRUNC = 134
-    G_INTRINSIC = 121
+    G_TRUNC_SSAT_S = 135
-    G_INTRINSIC_W_SIDE_EFFECTS = 122
+    G_TRUNC_SSAT_U = 136
-    G_INTRINSIC_CONVERGENT = 123
+    G_TRUNC_USAT_U = 137
-    G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 124
+    G_CONSTANT = 138
-    G_ANYEXT = 125
+    G_FCONSTANT = 139
-    G_TRUNC = 126
+    G_VASTART = 140
-    G_CONSTANT = 127
+    G_VAARG = 141
-    G_FCONSTANT = 128
+    G_SEXT = 142
-    G_VASTART = 129
+    G_SEXT_INREG = 143
-    G_VAARG = 130
+    G_ZEXT = 144
-    G_SEXT = 131
+    G_SHL = 145
-    G_SEXT_INREG = 132
+    G_LSHR = 146
-    G_ZEXT = 133
+    G_ASHR = 147
-    G_SHL = 134
+    G_FSHL = 148
-    G_LSHR = 135
+    G_FSHR = 149
-    G_ASHR = 136
+    G_ROTR = 150
-    G_FSHL = 137
+    G_ROTL = 151
-    G_FSHR = 138
+    G_ICMP = 152
-    G_ROTR = 139
+    G_FCMP = 153
-    G_ROTL = 140
+    G_SCMP = 154
-    G_ICMP = 141
+    G_UCMP = 155
-    G_FCMP = 142
+    G_SELECT = 156
-    G_SCMP = 143
+    G_UADDO = 157
-    G_UCMP = 144
+    G_UADDE = 158
-    G_SELECT = 145
+    G_USUBO = 159
-    G_UADDO = 146
+    G_USUBE = 160
-    G_UADDE = 147
+    G_SADDO = 161
-    G_USUBO = 148
+    G_SADDE = 162
-    G_USUBE = 149
+    G_SSUBO = 163
-    G_SADDO = 150
+    G_SSUBE = 164
-    G_SADDE = 151
+    G_UMULO = 165
-    G_SSUBO = 152
+    G_SMULO = 166
-    G_SSUBE = 153
+    G_UMULH = 167
-    G_UMULO = 154
+    G_SMULH = 168
-    G_SMULO = 155
+    G_UADDSAT = 169
-    G_UMULH = 156
+    G_SADDSAT = 170
-    G_SMULH = 157
+    G_USUBSAT = 171
-    G_UADDSAT = 158
+    G_SSUBSAT = 172
-    G_SADDSAT = 159
+    G_USHLSAT = 173
-    G_USUBSAT = 160
+    G_SSHLSAT = 174
-    G_SSUBSAT = 161
+    G_SMULFIX = 175
-    G_USHLSAT = 162
+    G_UMULFIX = 176
-    G_SSHLSAT = 163
+    G_SMULFIXSAT = 177
-    G_SMULFIX = 164
+    G_UMULFIXSAT = 178
-    G_UMULFIX = 165
+    G_SDIVFIX = 179
-    G_SMULFIXSAT = 166
+    G_UDIVFIX = 180
-    G_UMULFIXSAT = 167
+    G_SDIVFIXSAT = 181
-    G_SDIVFIX = 168
+    G_UDIVFIXSAT = 182
-    G_UDIVFIX = 169
+    G_FADD = 183
-    G_SDIVFIXSAT = 170
+    G_FSUB = 184
-    G_UDIVFIXSAT = 171
+    G_FMUL = 185
-    G_FADD = 172
+    G_FMA = 186
-    G_FSUB = 173
+    G_FMAD = 187
-    G_FMUL = 174
+    G_FDIV = 188
-    G_FMA = 175
+    G_FREM = 189
-    G_FMAD = 176
+    G_FPOW = 190
-    G_FDIV = 177
+    G_FPOWI = 191
-    G_FREM = 178
+    G_FEXP = 192
-    G_FPOW = 179
+    G_FEXP2 = 193
-    G_FPOWI = 180
+    G_FEXP10 = 194
-    G_FEXP = 181
+    G_FLOG = 195
-    G_FEXP2 = 182
+    G_FLOG2 = 196
-    G_FEXP10 = 183
+    G_FLOG10 = 197
-    G_FLOG = 184
+    G_FLDEXP = 198
-    G_FLOG2 = 185
+    G_FFREXP = 199
-    G_FLOG10 = 186
+    G_FNEG = 200
-    G_FLDEXP = 187
+    G_FPEXT = 201
-    G_FFREXP = 188
+    G_FPTRUNC = 202
-    G_FNEG = 189
+    G_FPTOSI = 203
-    G_FPEXT = 190
+    G_FPTOUI = 204
-    G_FPTRUNC = 191
+    G_SITOFP = 205
-    G_FPTOSI = 192
+    G_UITOFP = 206
-    G_FPTOUI = 193
+    G_FPTOSI_SAT = 207
-    G_SITOFP = 194
+    G_FPTOUI_SAT = 208
-    G_UITOFP = 195
+    G_FABS = 209
-    G_FABS = 196
+    G_FCOPYSIGN = 210
-    G_FCOPYSIGN = 197
+    G_IS_FPCLASS = 211
-    G_IS_FPCLASS = 198
+    G_FCANONICALIZE = 212
-    G_FCANONICALIZE = 199
+    G_FMINNUM = 213
-    G_FMINNUM = 200
+    G_FMAXNUM = 214
-    G_FMAXNUM = 201
+    G_FMINNUM_IEEE = 215
-    G_FMINNUM_IEEE = 202
+    G_FMAXNUM_IEEE = 216
-    G_FMAXNUM_IEEE = 203
+    G_FMINIMUM = 217
-    G_FMINIMUM = 204
+    G_FMAXIMUM = 218
-    G_FMAXIMUM = 205
+    G_FMINIMUMNUM = 219
-    G_GET_FPENV = 206
+    G_FMAXIMUMNUM = 220
-    G_SET_FPENV = 207
+    G_GET_FPENV = 221
-    G_RESET_FPENV = 208
+    G_SET_FPENV = 222
-    G_GET_FPMODE = 209
+    G_RESET_FPENV = 223
-    G_SET_FPMODE = 210
+    G_GET_FPMODE = 224
-    G_RESET_FPMODE = 211
+    G_SET_FPMODE = 225
-    G_PTR_ADD = 212
+    G_RESET_FPMODE = 226
-    G_PTRMASK = 213
+    G_GET_ROUNDING = 227
-    G_SMIN = 214
+    G_PTR_ADD = 228
-    G_SMAX = 215
+    G_PTRMASK = 229
-    G_UMIN = 216
+    G_SMIN = 230
-    G_UMAX = 217
+    G_SMAX = 231
-    G_ABS = 218
+    G_UMIN = 232
-    G_LROUND = 219
+    G_UMAX = 233
-    G_LLROUND = 220
+    G_ABS = 234
-    G_BR = 221
+    G_LROUND = 235
-    G_BRJT = 222
+    G_LLROUND = 236
-    G_VSCALE = 223
+    G_BR = 237
-    G_INSERT_SUBVECTOR = 224
+    G_BRJT = 238
-    G_EXTRACT_SUBVECTOR = 225
+    G_VSCALE = 239
-    G_INSERT_VECTOR_ELT = 226
+    G_INSERT_SUBVECTOR = 240
-    G_EXTRACT_VECTOR_ELT = 227
+    G_EXTRACT_SUBVECTOR = 241
-    G_SHUFFLE_VECTOR = 228
+    G_INSERT_VECTOR_ELT = 242
-    G_SPLAT_VECTOR = 229
+    G_EXTRACT_VECTOR_ELT = 243
-    G_VECTOR_COMPRESS = 230
+    G_SHUFFLE_VECTOR = 244
-    G_CTTZ = 231
+    G_SPLAT_VECTOR = 245
-    G_CTTZ_ZERO_UNDEF = 232
+    G_STEP_VECTOR = 246
-    G_CTLZ = 233
+    G_VECTOR_COMPRESS = 247
-    G_CTLZ_ZERO_UNDEF = 234
+    G_CTTZ = 248
-    G_CTPOP = 235
+    G_CTTZ_ZERO_UNDEF = 249
-    G_BSWAP = 236
+    G_CTLZ = 250
-    G_BITREVERSE = 237
+    G_CTLZ_ZERO_UNDEF = 251
-    G_FCEIL = 238
+    G_CTPOP = 252
-    G_FCOS = 239
+    G_BSWAP = 253
-    G_FSIN = 240
+    G_BITREVERSE = 254
-    G_FTAN = 241
+    G_FCEIL = 255
-    G_FACOS = 242
+    G_FCOS = 256
-    G_FASIN = 243
+    G_FSIN = 257
-    G_FATAN = 244
+    G_FSINCOS = 258
-    G_FCOSH = 245
+    G_FTAN = 259
-    G_FSINH = 246
+    G_FACOS = 260
-    G_FTANH = 247
+    G_FASIN = 261
-    G_FSQRT = 248
+    G_FATAN = 262
-    G_FFLOOR = 249
+    G_FATAN2 = 263
-    G_FRINT = 250
+    G_FCOSH = 264
-    G_FNEARBYINT = 251
+    G_FSINH = 265
-    G_ADDRSPACE_CAST = 252
+    G_FTANH = 266
-    G_BLOCK_ADDR = 253
+    G_FSQRT = 267
-    G_JUMP_TABLE = 254
+    G_FFLOOR = 268
-    G_DYN_STACKALLOC = 255
+    G_FRINT = 269
-    G_STACKSAVE = 256
+    G_FNEARBYINT = 270
-    G_STACKRESTORE = 257
+    G_ADDRSPACE_CAST = 271
-    G_STRICT_FADD = 258
+    G_BLOCK_ADDR = 272
-    G_STRICT_FSUB = 259
+    G_JUMP_TABLE = 273
-    G_STRICT_FMUL = 260
+    G_DYN_STACKALLOC = 274
-    G_STRICT_FDIV = 261
+    G_STACKSAVE = 275
-    G_STRICT_FREM = 262
+    G_STACKRESTORE = 276
-    G_STRICT_FMA = 263
+    G_STRICT_FADD = 277
-    G_STRICT_FSQRT = 264
+    G_STRICT_FSUB = 278
-    G_STRICT_FLDEXP = 265
+    G_STRICT_FMUL = 279
-    G_READ_REGISTER = 266
+    G_STRICT_FDIV = 280
-    G_WRITE_REGISTER = 267
+    G_STRICT_FREM = 281
-    G_MEMCPY = 268
+    G_STRICT_FMA = 282
-    G_MEMCPY_INLINE = 269
+    G_STRICT_FSQRT = 283
-    G_MEMMOVE = 270
+    G_STRICT_FLDEXP = 284
-    G_MEMSET = 271
+    G_READ_REGISTER = 285
-    G_BZERO = 272
+    G_WRITE_REGISTER = 286
-    G_TRAP = 273
+    G_MEMCPY = 287
-    G_DEBUGTRAP = 274
+    G_MEMCPY_INLINE = 288
-    G_UBSANTRAP = 275
+    G_MEMMOVE = 289
-    G_VECREDUCE_SEQ_FADD = 276
+    G_MEMSET = 290
-    G_VECREDUCE_SEQ_FMUL = 277
+    G_BZERO = 291
-    G_VECREDUCE_FADD = 278
+    G_TRAP = 292
-    G_VECREDUCE_FMUL = 279
+    G_DEBUGTRAP = 293
-    G_VECREDUCE_FMAX = 280
+    G_UBSANTRAP = 294
-    G_VECREDUCE_FMIN = 281
+    G_VECREDUCE_SEQ_FADD = 295
-    G_VECREDUCE_FMAXIMUM = 282
+    G_VECREDUCE_SEQ_FMUL = 296
-    G_VECREDUCE_FMINIMUM = 283
+    G_VECREDUCE_FADD = 297
-    G_VECREDUCE_ADD = 284
+    G_VECREDUCE_FMUL = 298
-    G_VECREDUCE_MUL = 285
+    G_VECREDUCE_FMAX = 299
-    G_VECREDUCE_AND = 286
+    G_VECREDUCE_FMIN = 300
-    G_VECREDUCE_OR = 287
+    G_VECREDUCE_FMAXIMUM = 301
-    G_VECREDUCE_XOR = 288
+    G_VECREDUCE_FMINIMUM = 302
-    G_VECREDUCE_SMAX = 289
+    G_VECREDUCE_ADD = 303
-    G_VECREDUCE_SMIN = 290
+    G_VECREDUCE_MUL = 304
-    G_VECREDUCE_UMAX = 291
+    G_VECREDUCE_AND = 305
-    G_VECREDUCE_UMIN = 292
+    G_VECREDUCE_OR = 306
-    G_SBFX = 293
+    G_VECREDUCE_XOR = 307
-    G_UBFX = 294
+    G_VECREDUCE_SMAX = 308
-    ADJCALLSTACKDOWN = 295
+    G_VECREDUCE_SMIN = 309
-    ADJCALLSTACKUP = 296
+    G_VECREDUCE_UMAX = 310
-    FI_ri = 297
+    G_VECREDUCE_UMIN = 311
-    MEMCPY = 298
+    G_SBFX = 312
-    Select = 299
+    G_UBFX = 313
-    Select_32 = 300
+    ADJCALLSTACKDOWN = 314
-    Select_32_64 = 301
+    ADJCALLSTACKUP = 315
-    Select_64_32 = 302
+    FI_ri = 316
-    Select_Ri = 303
+    MEMCPY = 317
-    Select_Ri_32 = 304
+    Select = 318
-    Select_Ri_32_64 = 305
+    Select_32 = 319
-    Select_Ri_64_32 = 306
+    Select_32_64 = 320
-    ADDR_SPACE_CAST = 307
+    Select_64_32 = 321
-    ADD_ri = 308
+    Select_Ri = 322
-    ADD_ri_32 = 309
+    Select_Ri_32 = 323
-    ADD_rr = 310
+    Select_Ri_32_64 = 324
-    ADD_rr_32 = 311
+    Select_Ri_64_32 = 325
-    AND_ri = 312
+    ADDR_SPACE_CAST = 326
-    AND_ri_32 = 313
+    ADD_ri = 327
-    AND_rr = 314
+    ADD_ri_32 = 328
-    AND_rr_32 = 315
+    ADD_rr = 329
-    BE16 = 316
+    ADD_rr_32 = 330
-    BE32 = 317
+    AND_ri = 331
-    BE64 = 318
+    AND_ri_32 = 332
-    BSWAP16 = 319
+    AND_rr = 333
-    BSWAP32 = 320
+    AND_rr_32 = 334
-    BSWAP64 = 321
+    BE16 = 335
-    CMPXCHGD = 322
+    BE32 = 336
-    CMPXCHGW32 = 323
+    BE64 = 337
-    CORE_LD32 = 324
+    BSWAP16 = 338
-    CORE_LD64 = 325
+    BSWAP32 = 339
-    CORE_SHIFT = 326
+    BSWAP64 = 340
-    CORE_ST = 327
+    CMPXCHGD = 341
-    DIV_ri = 328
+    CMPXCHGW32 = 342
-    DIV_ri_32 = 329
+    CORE_LD32 = 343
-    DIV_rr = 330
+    CORE_LD64 = 344
-    DIV_rr_32 = 331
+    CORE_SHIFT = 345
-    JAL = 332
+    CORE_ST = 346
-    JALX = 333
+    DIV_ri = 347
-    JCOND = 334
+    DIV_ri_32 = 348
-    JEQ_ri = 335
+    DIV_rr = 349
-    JEQ_ri_32 = 336
+    DIV_rr_32 = 350
-    JEQ_rr = 337
+    JAL = 351
-    JEQ_rr_32 = 338
+    JALX = 352
-    JMP = 339
+    JCOND = 353
-    JMPL = 340
+    JEQ_ri = 354
-    JNE_ri = 341
+    JEQ_ri_32 = 355
-    JNE_ri_32 = 342
+    JEQ_rr = 356
-    JNE_rr = 343
+    JEQ_rr_32 = 357
-    JNE_rr_32 = 344
+    JMP = 358
-    JSET_ri = 345
+    JMPL = 359
-    JSET_ri_32 = 346
+    JNE_ri = 360
-    JSET_rr = 347
+    JNE_ri_32 = 361
-    JSET_rr_32 = 348
+    JNE_rr = 362
-    JSGE_ri = 349
+    JNE_rr_32 = 363
-    JSGE_ri_32 = 350
+    JSET_ri = 364
-    JSGE_rr = 351
+    JSET_ri_32 = 365
-    JSGE_rr_32 = 352
+    JSET_rr = 366
-    JSGT_ri = 353
+    JSET_rr_32 = 367
-    JSGT_ri_32 = 354
+    JSGE_ri = 368
-    JSGT_rr = 355
+    JSGE_ri_32 = 369
-    JSGT_rr_32 = 356
+    JSGE_rr = 370
-    JSLE_ri = 357
+    JSGE_rr_32 = 371
-    JSLE_ri_32 = 358
+    JSGT_ri = 372
-    JSLE_rr = 359
+    JSGT_ri_32 = 373
-    JSLE_rr_32 = 360
+    JSGT_rr = 374
-    JSLT_ri = 361
+    JSGT_rr_32 = 375
-    JSLT_ri_32 = 362
+    JSLE_ri = 376
-    JSLT_rr = 363
+    JSLE_ri_32 = 377
-    JSLT_rr_32 = 364
+    JSLE_rr = 378
-    JUGE_ri = 365
+    JSLE_rr_32 = 379
-    JUGE_ri_32 = 366
+    JSLT_ri = 380
-    JUGE_rr = 367
+    JSLT_ri_32 = 381
-    JUGE_rr_32 = 368
+    JSLT_rr = 382
-    JUGT_ri = 369
+    JSLT_rr_32 = 383
-    JUGT_ri_32 = 370
+    JUGE_ri = 384
-    JUGT_rr = 371
+    JUGE_ri_32 = 385
-    JUGT_rr_32 = 372
+    JUGE_rr = 386
-    JULE_ri = 373
+    JUGE_rr_32 = 387
-    JULE_ri_32 = 374
+    JUGT_ri = 388
-    JULE_rr = 375
+    JUGT_ri_32 = 389
-    JULE_rr_32 = 376
+    JUGT_rr = 390
-    JULT_ri = 377
+    JUGT_rr_32 = 391
-    JULT_ri_32 = 378
+    JULE_ri = 392
-    JULT_rr = 379
+    JULE_ri_32 = 393
-    JULT_rr_32 = 380
+    JULE_rr = 394
-    LDB = 381
+    JULE_rr_32 = 395
-    LDB32 = 382
+    JULT_ri = 396
-    LDBSX = 383
+    JULT_ri_32 = 397
-    LDD = 384
+    JULT_rr = 398
-    LDH = 385
+    JULT_rr_32 = 399
-    LDH32 = 386
+    LDB = 400
-    LDHSX = 387
+    LDB32 = 401
-    LDW = 388
+    LDBACQ32 = 402
-    LDW32 = 389
+    LDBSX = 403
-    LDWSX = 390
+    LDD = 404
-    LD_ABS_B = 391
+    LDDACQ = 405
-    LD_ABS_H = 392
+    LDH = 406
-    LD_ABS_W = 393
+    LDH32 = 407
-    LD_IND_B = 394
+    LDHACQ32 = 408
-    LD_IND_H = 395
+    LDHSX = 409
-    LD_IND_W = 396
+    LDW = 410
-    LD_imm64 = 397
+    LDW32 = 411
-    LD_pseudo = 398
+    LDWACQ32 = 412
-    LE16 = 399
+    LDWSX = 413
-    LE32 = 400
+    LD_ABS_B = 414
-    LE64 = 401
+    LD_ABS_H = 415
-    MOD_ri = 402
+    LD_ABS_W = 416
-    MOD_ri_32 = 403
+    LD_IND_B = 417
-    MOD_rr = 404
+    LD_IND_H = 418
-    MOD_rr_32 = 405
+    LD_IND_W = 419
-    MOVSX_rr_16 = 406
+    LD_imm64 = 420
-    MOVSX_rr_32 = 407
+    LD_pseudo = 421
-    MOVSX_rr_32_16 = 408
+    LE16 = 422
-    MOVSX_rr_32_8 = 409
+    LE32 = 423
-    MOVSX_rr_8 = 410
+    LE64 = 424
-    MOV_32_64 = 411
+    MOD_ri = 425
-    MOV_ri = 412
+    MOD_ri_32 = 426
-    MOV_ri_32 = 413
+    MOD_rr = 427
-    MOV_rr = 414
+    MOD_rr_32 = 428
-    MOV_rr_32 = 415
+    MOVSX_rr_16 = 429
-    MUL_ri = 416
+    MOVSX_rr_32 = 430
-    MUL_ri_32 = 417
+    MOVSX_rr_32_16 = 431
-    MUL_rr = 418
+    MOVSX_rr_32_8 = 432
-    MUL_rr_32 = 419
+    MOVSX_rr_8 = 433
-    NEG_32 = 420
+    MOV_32_64 = 434
-    NEG_64 = 421
+    MOV_ri = 435
-    NOP = 422
+    MOV_ri_32 = 436
-    OR_ri = 423
+    MOV_rr = 437
-    OR_ri_32 = 424
+    MOV_rr_32 = 438
-    OR_rr = 425
+    MUL_ri = 439
-    OR_rr_32 = 426
+    MUL_ri_32 = 440
-    RET = 427
+    MUL_rr = 441
-    SDIV_ri = 428
+    MUL_rr_32 = 442
-    SDIV_ri_32 = 429
+    NEG_32 = 443
-    SDIV_rr = 430
+    NEG_64 = 444
-    SDIV_rr_32 = 431
+    NOP = 445
-    SLL_ri = 432
+    OR_ri = 446
-    SLL_ri_32 = 433
+    OR_ri_32 = 447
-    SLL_rr = 434
+    OR_rr = 448
-    SLL_rr_32 = 435
+    OR_rr_32 = 449
-    SMOD_ri = 436
+    RET = 450
-    SMOD_ri_32 = 437
+    SDIV_ri = 451
-    SMOD_rr = 438
+    SDIV_ri_32 = 452
-    SMOD_rr_32 = 439
+    SDIV_rr = 453
-    SRA_ri = 440
+    SDIV_rr_32 = 454
-    SRA_ri_32 = 441
+    SLL_ri = 455
-    SRA_rr = 442
+    SLL_ri_32 = 456
-    SRA_rr_32 = 443
+    SLL_rr = 457
-    SRL_ri = 444
+    SLL_rr_32 = 458
-    SRL_ri_32 = 445
+    SMOD_ri = 459
-    SRL_rr = 446
+    SMOD_ri_32 = 460
-    SRL_rr_32 = 447
+    SMOD_rr = 461
-    STB = 448
+    SMOD_rr_32 = 462
-    STB32 = 449
+    SRA_ri = 463
-    STB_imm = 450
+    SRA_ri_32 = 464
-    STD = 451
+    SRA_rr = 465
-    STD_imm = 452
+    SRA_rr_32 = 466
-    STH = 453
+    SRL_ri = 467
-    STH32 = 454
+    SRL_ri_32 = 468
-    STH_imm = 455
+    SRL_rr = 469
-    STW = 456
+    SRL_rr_32 = 470
-    STW32 = 457
+    STB = 471
-    STW_imm = 458
+    STB32 = 472
-    SUB_ri = 459
+    STBREL32 = 473
-    SUB_ri_32 = 460
+    STB_imm = 474
-    SUB_rr = 461
+    STD = 475
-    SUB_rr_32 = 462
+    STDREL = 476
-    XADDD = 463
+    STD_imm = 477
-    XADDW = 464
+    STH = 478
-    XADDW32 = 465
+    STH32 = 479
-    XANDD = 466
+    STHREL32 = 480
-    XANDW32 = 467
+    STH_imm = 481
-    XCHGD = 468
+    STW = 482
-    XCHGW32 = 469
+    STW32 = 483
-    XFADDD = 470
+    STWREL32 = 484
-    XFADDW32 = 471
+    STW_imm = 485
-    XFANDD = 472
+    SUB_ri = 486
-    XFANDW32 = 473
+    SUB_ri_32 = 487
-    XFORD = 474
+    SUB_rr = 488
-    XFORW32 = 475
+    SUB_rr_32 = 489
-    XFXORD = 476
+    XADDD = 490
-    XFXORW32 = 477
+    XADDW = 491
-    XORD = 478
+    XADDW32 = 492
-    XORW32 = 479
+    XANDD = 493
-    XOR_ri = 480
+    XANDW32 = 494
-    XOR_ri_32 = 481
+    XCHGD = 495
-    XOR_rr = 482
+    XCHGW32 = 496
-    XOR_rr_32 = 483
+    XFADDD = 497
-    XXORD = 484
+    XFADDW32 = 498
-    XXORW32 = 485
+    XFANDD = 499
-    INSTRUCTION_LIST_END = 486
+    XFANDW32 = 500
+    XFORD = 501
+    XFORW32 = 502
+    XFXORD = 503
+    XFXORW32 = 504
+    XORD = 505
+    XORW32 = 506
+    XOR_ri = 507
+    XOR_ri_32 = 508
+    XOR_rr = 509
+    XOR_rr_32 = 510
+    XXORD = 511
+    XXORW32 = 512
+    INSTRUCTION_LIST_END = 513
+class Instruction(lief.assembly.Instruction):
+    @property
+    def opcode(self) -> OPCODE: ...