lambdapdk 0.1.55__py3-none-any.whl → 0.2.0__py3-none-any.whl

lambdapdk/asap7/libs/fakeio7.py

@@ -1,35 +1,273 @@
-import os
-import siliconcompiler
-from lambdapdk import register_data_source
+from pathlib import Path
 
+from siliconcompiler import ASIC
+from lambdalib import LambalibTechLibrary
+from lambdapdk import LambdaLibrary, _LambdaPath
+from lambdapdk.asap7 import ASAP7PDK
 
-def setup():
+
+class FakeIO7Library(LambdaLibrary):
     '''
     ASAP7 Fake I/O library.
     '''
-    libdir = "lambdapdk/asap7/libs/fakeio7/"
+    def __init__(self):
+        super().__init__()
+        self.set_name("fakeio7")
+
+        self.add_asic_pdk(ASAP7PDK())
+
+        path_base = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("models.physical"):
+                self.add_file(path_base / "lef" / "fakeio7.lef")
+                self.add_asic_aprfileset()
+
+            with self.active_fileset("models.blackbox"):
+                self.add_file(path_base / "blackbox" / "model.v")
+            self.add_yosys_blackbox_fileset("models.blackbox")
+
+
+class FakeIO7Lambdalib_la_iovdd(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iovdd", [FakeIO7Library])
+        self.set_name("fakeio7_la_iovdd")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iovdd.v")
+
+
+class FakeIO7Lambdalib_la_iopoc(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iopoc", [FakeIO7Library])
+        self.set_name("fakeio7_la_iopoc")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iopoc.v")
+
+
+class FakeIO7Lambdalib_la_iocorner(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iocorner", [FakeIO7Library])
+        self.set_name("fakeio7_la_iocorner")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iocorner.v")
+
+
+class FakeIO7Lambdalib_la_iotxdiff(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iotxdiff", [FakeIO7Library])
+        self.set_name("fakeio7_la_iotxdiff")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iotxdiff.v")
+
+
+class FakeIO7Lambdalib_la_ioanalog(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_ioanalog", [FakeIO7Library])
+        self.set_name("fakeio7_la_ioanalog")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_ioanalog.v")
+
+
+class FakeIO7Lambdalib_la_ioinput(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_ioinput", [FakeIO7Library])
+        self.set_name("fakeio7_la_ioinput")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_ioinput.v")
+
+
+class FakeIO7Lambdalib_la_iocut(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iocut", [FakeIO7Library])
+        self.set_name("fakeio7_la_iocut")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iocut.v")
+
+
+class FakeIO7Lambdalib_la_iovss(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iovss", [FakeIO7Library])
+        self.set_name("fakeio7_la_iovss")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iovss.v")
+
+
+class FakeIO7Lambdalib_la_iovddio(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iovddio", [FakeIO7Library])
+        self.set_name("fakeio7_la_iovddio")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iovddio.v")
+
+
+class FakeIO7Lambdalib_la_iovssio(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iovssio", [FakeIO7Library])
+        self.set_name("fakeio7_la_iovssio")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iovssio.v")
+
+
+class FakeIO7Lambdalib_la_iovdda(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iovdda", [FakeIO7Library])
+        self.set_name("fakeio7_la_iovdda")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iovdda.v")
+
+
+class FakeIO7Lambdalib_la_iovssa(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iovssa", [FakeIO7Library])
+        self.set_name("fakeio7_la_iovssa")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iovssa.v")
+
+
+class FakeIO7Lambdalib_la_ioclamp(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_ioclamp", [FakeIO7Library])
+        self.set_name("fakeio7_la_ioclamp")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_ioclamp.v")
+
+
+class FakeIO7Lambdalib_la_iorxdiff(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iorxdiff", [FakeIO7Library])
+        self.set_name("fakeio7_la_iorxdiff")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
 
-    lib = siliconcompiler.Library('asap7_fakeio7', package='lambdapdk')
-    register_data_source(lib)
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iorxdiff.v")
 
-    # pdk
-    lib.set('option', 'pdk', 'asap7')
-    stackup = '10M'
 
-    lib.set('output', stackup, 'lef', os.path.join(libdir, 'lef/fakeio7.lef'))
+class FakeIO7Lambdalib_la_iobidir(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_iobidir", [FakeIO7Library])
+        self.set_name("fakeio7_la_iobidir")
 
-    lib.set('output', 'blackbox', 'verilog', os.path.join(libdir, 'blackbox', 'model.v'))
+        # version
+        self.package.set_version("v1")
 
-    lambda_lib = siliconcompiler.Library('lambdalib_iolib_asap7', package='lambdapdk')
-    register_data_source(lambda_lib)
-    lambda_lib.add('option', 'ydir', os.path.join(libdir, 'lambda'))
-    lambda_lib.use(lib)
-    lambda_lib.set('asic', 'macrolib', lib.design)
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeio7")
 
-    return [lib, lambda_lib]
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_iobidir.v")
 
 
-#########################
-if __name__ == "__main__":
-    for lib in setup(siliconcompiler.Chip('<lib>')):
-        lib.write_manifest(f'{lib.top()}.json')
+class FakeIO7Lambdalib_IO(LambalibTechLibrary):
+    @classmethod
+    def alias(cls, project: ASIC):
+        FakeIO7Lambdalib_la_iovdd.alias(project)
+        FakeIO7Lambdalib_la_iopoc.alias(project)
+        FakeIO7Lambdalib_la_iocorner.alias(project)
+        FakeIO7Lambdalib_la_iotxdiff.alias(project)
+        FakeIO7Lambdalib_la_ioanalog.alias(project)
+        FakeIO7Lambdalib_la_ioinput.alias(project)
+        FakeIO7Lambdalib_la_iocut.alias(project)
+        FakeIO7Lambdalib_la_iovss.alias(project)
+        FakeIO7Lambdalib_la_iovddio.alias(project)
+        FakeIO7Lambdalib_la_iovssio.alias(project)
+        FakeIO7Lambdalib_la_iovdda.alias(project)
+        FakeIO7Lambdalib_la_iovssa.alias(project)
+        FakeIO7Lambdalib_la_ioclamp.alias(project)
+        FakeIO7Lambdalib_la_iorxdiff.alias(project)
+        FakeIO7Lambdalib_la_iobidir.alias(project)

lambdapdk/asap7/libs/fakekit7.py

@@ -1,27 +1,22 @@
-import os
-import siliconcompiler
-from lambdapdk import register_data_source
+from pathlib import Path
 
+from lambdapdk import LambdaLibrary
+from lambdapdk.asap7 import ASAP7PDK
 
-def setup():
+
+class FakeKit7Library(LambdaLibrary):
     '''
     ASAP7 Fake Chip Collatoral library.
     '''
-    libdir = "lambdapdk/asap7/libs/fakekit7/"
-
-    lib = siliconcompiler.Library('asap7_fakekit7', package='lambdapdk')
-    register_data_source(lib)
-
-    # pdk
-    lib.set('option', 'pdk', 'asap7')
-    stackup = '10M'
-
-    lib.set('output', stackup, 'lef', os.path.join(libdir, 'lef/tsv.lef'))
+    def __init__(self):
+        super().__init__()
+        self.set_name("fakekit7")
 
-    return lib
+        self.add_asic_pdk(ASAP7PDK())
 
+        path_base = Path("lambdapdk", "asap7", "libs", "fakekit7")
 
-#########################
-if __name__ == "__main__":
-    lib = setup(siliconcompiler.Chip('<lib>'))
-    lib.write_manifest(f'{lib.top()}.json')
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("models.physical"):
+                self.add_file(path_base / "lef" / "tsv.lef")
+                self.add_asic_aprfileset()

lambdapdk/asap7/libs/fakeram7.py

@@ -1,43 +1,243 @@
-from siliconcompiler import Library
-from lambdapdk import register_data_source
+from pathlib import Path
 
+from lambdalib import LambalibTechLibrary
+from lambdapdk import LambdaLibrary, _LambdaPath
+from lambdapdk.asap7 import ASAP7PDK
 
-def setup():
-    libs = []
-    stackup = '10M'
 
-    for config in ('64x32', '128x32', '256x32', '256x64',
-                   '512x32', '512x64', '512x128',
-                   '1024x32', '1024x64',
-                   '2048x32', '2048x64',
-                   '4096x32', '4096x64',
-                   '8192x32', '8192x64'):
-        for ramtype in ('dp', 'sp'):
-            mem_name = f'fakeram7_{ramtype}_{config}'
-            lib = Library(mem_name, package='lambdapdk')
-            register_data_source(lib)
-            path_base = 'lambdapdk/asap7/libs/fakeram7'
-            lib.add('output', stackup, 'lef', f'{path_base}/lef/{mem_name}.lef')
+class _FakeRAM7Library(LambdaLibrary):
+    def __init__(self, config):
+        super().__init__()
+        self.set_name(f"fakeram7_{config}")
 
-            for corner in ('slow', 'fast', 'typical'):
-                lib.add('output', corner, 'nldm', f'{path_base}/nldm/{mem_name}.lib')
+        self.add_asic_pdk(ASAP7PDK())
 
-            lib.set('option', 'file', 'openroad_pdngen',
-                    f'{path_base}/apr/openroad/pdngen.tcl')
-            lib.set('option', 'file', 'openroad_global_connect',
-                    f'{path_base}/apr/openroad/global_connect.tcl')
+        path_base = Path("lambdapdk", "asap7", "libs", "fakeram7")
 
-            lib.set('option', 'var', 'klayout_allow_missing_cell', mem_name)
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("models.physical"):
+                self.add_file(path_base / "lef" / f"{self.name}.lef")
+                self.add_asic_aprfileset()
 
-            libs.append(lib)
+                with self.active_fileset("models.timing.nldm"):
+                    self.add_file(path_base / "nldm" / f"{self.name}.lib")
+                    self.add_asic_libcornerfileset("generic", "nldm")
 
-    lambda_lib = Library('lambdalib_fakeram7', package='lambdapdk')
-    register_data_source(lambda_lib)
-    lambda_lib.add('option', 'ydir', 'lambdapdk/asap7/libs/fakeram7/lambda')
-    for lib in libs:
-        lambda_lib.use(lib)
-        lambda_lib.add('asic', 'macrolib', lib.design)
+            with self.active_fileset("openroad.powergrid"):
+                self.add_file(path_base / "apr" / "openroad" / "pdngen.tcl")
+                self.add_openroad_powergridfileset()
+            with self.active_fileset("openroad.globalconnect"):
+                self.add_file(path_base / "apr" / "openroad" / "global_connect.tcl")
+                self.add_openroad_globalconnectfileset()
 
-    libs.append(lambda_lib)
+            self.add_klayout_allowmissingcell(self.name)
 
-    return libs
+
+class FakeRAM7_dp_64x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_64x32")
+
+
+class FakeRAM7_sp_64x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_64x32")
+
+
+class FakeRAM7_dp_128x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_128x32")
+
+
+class FakeRAM7_sp_128x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_128x32")
+
+
+class FakeRAM7_dp_256x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_256x32")
+
+
+class FakeRAM7_sp_256x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_256x32")
+
+
+class FakeRAM7_dp_256x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_256x64")
+
+
+class FakeRAM7_sp_256x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_256x64")
+
+
+class FakeRAM7_dp_512x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_512x32")
+
+
+class FakeRAM7_sp_512x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_512x32")
+
+
+class FakeRAM7_dp_512x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_512x64")
+
+
+class FakeRAM7_sp_512x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_512x64")
+
+
+class FakeRAM7_dp_512x128(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_512x128")
+
+
+class FakeRAM7_sp_512x128(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_512x128")
+
+
+class FakeRAM7_dp_1024x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_1024x32")
+
+
+class FakeRAM7_sp_1024x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_1024x32")
+
+
+class FakeRAM7_dp_1024x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_1024x64")
+
+
+class FakeRAM7_sp_1024x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_1024x64")
+
+
+class FakeRAM7_dp_2048x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_2048x32")
+
+
+class FakeRAM7_sp_2048x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_2048x32")
+
+
+class FakeRAM7_dp_2048x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_2048x64")
+
+
+class FakeRAM7_sp_2048x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_2048x64")
+
+
+class FakeRAM7_dp_4096x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_4096x32")
+
+
+class FakeRAM7_sp_4096x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_4096x32")
+
+
+class FakeRAM7_dp_4096x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_4096x64")
+
+
+class FakeRAM7_sp_4096x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_4096x64")
+
+
+class FakeRAM7_dp_8192x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_8192x32")
+
+
+class FakeRAM7_sp_8192x32(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_8192x32")
+
+
+class FakeRAM7_dp_8192x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("dp_8192x64")
+
+
+class FakeRAM7_sp_8192x64(_FakeRAM7Library):
+    def __init__(self):
+        super().__init__("sp_8192x64")
+
+
+class FakeRAM7Lambdalib_SinglePort(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_spram", [
+            FakeRAM7_sp_64x32,
+            FakeRAM7_sp_128x32,
+            FakeRAM7_sp_256x32,
+            FakeRAM7_sp_256x64,
+            FakeRAM7_sp_512x32,
+            FakeRAM7_sp_512x64,
+            FakeRAM7_sp_512x128,
+            FakeRAM7_sp_1024x32,
+            FakeRAM7_sp_1024x64,
+            FakeRAM7_sp_2048x32,
+            FakeRAM7_sp_2048x64,
+            FakeRAM7_sp_4096x32,
+            FakeRAM7_sp_4096x64,
+            FakeRAM7_sp_8192x32,
+            FakeRAM7_sp_8192x64])
+        self.set_name("fakeram7_la_spram")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeram7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_spram.v")
+
+
+class FakeRAM7Lambdalib_DoublePort(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_dpram", [
+            FakeRAM7_dp_64x32,
+            FakeRAM7_dp_128x32,
+            FakeRAM7_dp_256x32,
+            FakeRAM7_dp_256x64,
+            FakeRAM7_dp_512x32,
+            FakeRAM7_dp_512x64,
+            FakeRAM7_dp_512x128,
+            FakeRAM7_dp_1024x32,
+            FakeRAM7_dp_1024x64,
+            FakeRAM7_dp_2048x32,
+            FakeRAM7_dp_2048x64,
+            FakeRAM7_dp_4096x32,
+            FakeRAM7_dp_4096x64,
+            FakeRAM7_dp_8192x32,
+            FakeRAM7_dp_8192x64])
+        self.set_name("fakeram7_la_dpram")
+
+        # version
+        self.package.set_version("v1")
+
+        lib_path = Path("lambdapdk", "asap7", "libs", "fakeram7")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_dpram.v")