esiaccel 0.1.5.dev138__cp310-cp310-win_amd64.whl → 0.1.5.dev163__cp310-cp310-win_amd64.whl
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- esiaccel/CosimBackend.dll +0 -0
- esiaccel/ESICppRuntime.dll +0 -0
- esiaccel/EsiCosimDpiServer.dll +0 -0
- esiaccel/MtiPli.dll +0 -0
- esiaccel/cosim/Cosim_Endpoint.sv +62 -15
- esiaccel/esi-cosim.py +85 -65
- esiaccel/esiCppAccel.cp310-win_amd64.pyd +0 -0
- esiaccel/esiquery.exe +0 -0
- {esiaccel-0.1.5.dev138.dist-info → esiaccel-0.1.5.dev163.dist-info}/METADATA +1 -1
- {esiaccel-0.1.5.dev138.dist-info → esiaccel-0.1.5.dev163.dist-info}/RECORD +14 -14
- {esiaccel-0.1.5.dev138.dist-info → esiaccel-0.1.5.dev163.dist-info}/WHEEL +0 -0
- {esiaccel-0.1.5.dev138.dist-info → esiaccel-0.1.5.dev163.dist-info}/entry_points.txt +0 -0
- {esiaccel-0.1.5.dev138.dist-info → esiaccel-0.1.5.dev163.dist-info}/licenses/LICENSE +0 -0
- {esiaccel-0.1.5.dev138.dist-info → esiaccel-0.1.5.dev163.dist-info}/top_level.txt +0 -0
esiaccel/CosimBackend.dll
CHANGED
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Binary file
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esiaccel/ESICppRuntime.dll
CHANGED
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Binary file
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esiaccel/EsiCosimDpiServer.dll
CHANGED
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Binary file
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esiaccel/MtiPli.dll
CHANGED
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Binary file
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esiaccel/cosim/Cosim_Endpoint.sv
CHANGED
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@@ -9,6 +9,8 @@
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// Package: Cosim_DpiPkg
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//
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// Main cosim <--> dpi bridge module.
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+
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+
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//
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//===----------------------------------------------------------------------===//
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@@ -118,9 +120,8 @@ module Cosim_Endpoint_FromHost
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$error("Cosim endpoint (%s) register failed: %d", ENDPOINT_ID, rc);
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end
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-
///
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-
///
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-
///
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/// ***********************
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/// Useful constants.
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localparam int FROM_HOST_SIZE_BYTES = int'((FROM_HOST_SIZE_BITS+7)/8);
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// The number of bits over a byte.
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@@ -129,13 +130,30 @@ module Cosim_Endpoint_FromHost
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localparam int FROM_HOST_SIZE_BYTES_FLOOR_IN_BITS
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= FROM_HOST_SIZE_BYTES_FLOOR * 8;
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+
// Buffer to hold incoming data directly from the DPI calls.
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byte unsigned DataOutBuffer[FROM_HOST_SIZE_BYTES-1:0];
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+
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// Pipeline interface signals for buffering DataOut.
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// DataOut_a_valid is asserted when a complete message is available in
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// DataOut_a buffer and waiting to be accepted by the skid buffer.
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logic DataOut_a_valid;
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// Packed representation of the byte buffer to feed the skid input.
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logic [FROM_HOST_SIZE_BITS-1:0] DataOut_a;
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// Ready/valid wires between this module and the skid buffer.
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wire DataOut_a_ready;
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wire DataOut_x_valid;
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wire [FROM_HOST_SIZE_BITS-1:0] DataOut_x;
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+
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always @(posedge clk) begin
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if (~rst) begin
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-
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-
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-
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-
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// If the skid buffer accepted the input token this cycle, clear the
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// internal valid that indicates we have buffered data.
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if (DataOut_a_valid && DataOut_a_ready)
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DataOut_a_valid <= 1'b0;
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+
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// Only attempt to fetch data from the host when the skid buffer can
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// accept it (DataOut_a_ready).
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if (!DataOut_a_valid && DataOut_a_ready) begin
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int data_limit;
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int rc;
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@@ -149,7 +167,7 @@ module Cosim_Endpoint_FromHost
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ENDPOINT_ID, FROM_HOST_SIZE_BYTES, data_limit, rc);
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end else if (rc == 0) begin
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if (data_limit == FROM_HOST_SIZE_BYTES)
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-
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DataOut_a_valid <= 1'b1;
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else if (data_limit == 0)
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begin end // No message.
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else
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@@ -159,24 +177,53 @@ module Cosim_Endpoint_FromHost
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end
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end
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end else begin
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-
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DataOut_a_valid <= 1'b0;
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end
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end
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-
//
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// Pack the byte array into a single vector that will be handed to the
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// skid buffer as its input payload.
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genvar iOut;
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generate
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for (iOut=0; iOut<FROM_HOST_SIZE_BYTES_FLOOR; iOut++)
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-
assign
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assign DataOut_a[((iOut+1)*8)-1:iOut*8] = DataOutBuffer[iOut];
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if (FROM_HOST_SIZE_BITS_DIFF != 0)
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// If the type is not a multiple of 8,
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assign
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-
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-
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// If the type is not a multiple of 8, copy the extra bits.
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assign DataOut_a[(FROM_HOST_SIZE_BYTES_FLOOR_IN_BITS +
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FROM_HOST_SIZE_BITS_DIFF - 1) :
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+
FROM_HOST_SIZE_BYTES_FLOOR_IN_BITS]
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= DataOutBuffer[FROM_HOST_SIZE_BYTES - 1]
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[FROM_HOST_SIZE_BITS_DIFF - 1 : 0];
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endgenerate
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/// *******************
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/// Data out management.
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///
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/// It has been observed that some simulators (verilator) does not handle
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/// combinational driving from DPI well (resulting in non-determinism wrt
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/// some of the combinational outputs being dropped/replicated). Questa does
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/// not show this behavior.
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/// A mitigation is to add a skid buffer to decouple the DPI interface
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/// from the output interface.
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// Instantiate a single-stage pipeline to buffer tokens that arrive from
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// the host and present them to the module's output with proper
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// ready/valid handshaking.
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ESI_PipelineStage #(.WIDTH(FROM_HOST_SIZE_BITS)) out_pipe (
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.clk(clk),
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.rst(rst),
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.a_valid(DataOut_a_valid),
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.a(DataOut_a),
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.a_ready(DataOut_a_ready),
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.x_valid(DataOut_x_valid),
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.x(DataOut_x),
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.x_ready(DataOutReady)
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);
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// Drive the module's outward-facing signals from the pipeline output.
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assign DataOutValid = DataOut_x_valid;
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assign DataOut = DataOut_x;
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+
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initial begin
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$display("FROM_HOST_SIZE_BITS: %d", FROM_HOST_SIZE_BITS);
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$display("FROM_HOST_SIZE_BYTES: %d", FROM_HOST_SIZE_BYTES);
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esiaccel/esi-cosim.py
CHANGED
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@@ -82,6 +82,24 @@ class SourceFiles:
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return self.dpi_sv + self.user
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class SimProcess:
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def __init__(self, proc: subprocess.Popen, port: int):
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self.proc = proc
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self.port = port
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def force_stop(self):
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"""Make sure to stop the simulation no matter what."""
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if self.proc:
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os.killpg(os.getpgid(self.proc.pid), signal.SIGINT)
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# Allow the simulation time to flush its outputs.
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try:
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self.proc.wait(timeout=1.0)
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except subprocess.TimeoutExpired:
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# If the simulation doesn't exit of its own free will, kill it.
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self.proc.kill()
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class Simulator:
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# Some RTL simulators don't use stderr for error messages. Everything goes to
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@@ -135,6 +153,65 @@ class Simulator:
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"""Return the command to run the simulation."""
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assert False, "Must be implemented by subclass"
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def run_proc(self, gui: bool = False) -> SimProcess:
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"""Run the simulation process. Returns the Popen object and the port which
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the simulation is listening on."""
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# Open log files
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self.run_dir.mkdir(parents=True, exist_ok=True)
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simStdout = open(self.run_dir / "sim_stdout.log", "w")
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simStderr = open(self.run_dir / "sim_stderr.log", "w")
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# Erase the config file if it exists. We don't want to read
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# an old config.
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portFileName = self.run_dir / "cosim.cfg"
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if os.path.exists(portFileName):
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os.remove(portFileName)
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# Run the simulation.
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simEnv = Simulator.get_env()
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if self.debug:
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simEnv["COSIM_DEBUG_FILE"] = "cosim_debug.log"
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if "DEBUG_PERIOD" not in simEnv:
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# Slow the simulation down to one tick per millisecond.
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simEnv["DEBUG_PERIOD"] = "1"
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rcmd = self.run_command(gui)
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simProc = subprocess.Popen(self.run_command(gui),
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stdout=simStdout,
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stderr=simStderr,
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env=simEnv,
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cwd=self.run_dir,
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preexec_fn=os.setsid)
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simStderr.close()
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simStdout.close()
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+
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# Get the port which the simulation RPC selected.
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checkCount = 0
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while (not os.path.exists(portFileName)) and \
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simProc.poll() is None:
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time.sleep(0.1)
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checkCount += 1
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if checkCount > 500 and not gui:
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raise Exception(f"Cosim never wrote cfg file: {portFileName}")
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port = -1
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while port < 0:
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portFile = open(portFileName, "r")
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for line in portFile.readlines():
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m = re.match("port: (\\d+)", line)
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if m is not None:
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port = int(m.group(1))
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portFile.close()
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+
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# Wait for the simulation to start accepting RPC connections.
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checkCount = 0
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while not is_port_open(port):
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checkCount += 1
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if checkCount > 200:
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raise Exception(f"Cosim RPC port ({port}) never opened")
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if simProc.poll() is not None:
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raise Exception("Simulation exited early")
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time.sleep(0.05)
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return SimProcess(proc=simProc, port=port)
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def run(self,
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inner_command: str,
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gui: bool = False,
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@@ -146,83 +223,23 @@ class Simulator:
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# syntax errors in that block.
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simProc = None
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try:
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-
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self.run_dir.mkdir(parents=True, exist_ok=True)
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simStdout = open(self.run_dir / "sim_stdout.log", "w")
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simStderr = open(self.run_dir / "sim_stderr.log", "w")
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-
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# Erase the config file if it exists. We don't want to read
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# an old config.
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portFileName = self.run_dir / "cosim.cfg"
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if os.path.exists(portFileName):
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os.remove(portFileName)
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-
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# Run the simulation.
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simEnv = Simulator.get_env()
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if self.debug:
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simEnv["COSIM_DEBUG_FILE"] = "cosim_debug.log"
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-
if "DEBUG_PERIOD" not in simEnv:
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# Slow the simulation down to one tick per millisecond.
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simEnv["DEBUG_PERIOD"] = "1"
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simProc = subprocess.Popen(self.run_command(gui),
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stdout=simStdout,
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stderr=simStderr,
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env=simEnv,
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cwd=self.run_dir,
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preexec_fn=os.setsid)
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simStderr.close()
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simStdout.close()
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-
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# Get the port which the simulation RPC selected.
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-
checkCount = 0
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while (not os.path.exists(portFileName)) and \
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simProc.poll() is None:
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time.sleep(0.1)
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checkCount += 1
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if checkCount > 200 and not gui:
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raise Exception(f"Cosim never wrote cfg file: {portFileName}")
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port = -1
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while port < 0:
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portFile = open(portFileName, "r")
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for line in portFile.readlines():
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m = re.match("port: (\\d+)", line)
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if m is not None:
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port = int(m.group(1))
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portFile.close()
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-
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# Wait for the simulation to start accepting RPC connections.
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checkCount = 0
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while not is_port_open(port):
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checkCount += 1
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if checkCount > 200:
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raise Exception(f"Cosim RPC port ({port}) never opened")
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if simProc.poll() is not None:
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raise Exception("Simulation exited early")
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time.sleep(0.05)
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-
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+
simProc = self.run_proc(gui=gui)
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if server_only:
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# wait for user input to kill the server
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input(
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-
f"Running in server-only mode on port {port} - Press anything to kill the server..."
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+
f"Running in server-only mode on port {simProc.port} - Press anything to kill the server..."
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)
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return 0
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else:
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# Run the inner command, passing the connection info via environment vars.
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testEnv = os.environ.copy()
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212
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-
testEnv["ESI_COSIM_PORT"] = str(port)
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+
testEnv["ESI_COSIM_PORT"] = str(simProc.port)
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testEnv["ESI_COSIM_HOST"] = "localhost"
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return subprocess.run(inner_command, cwd=os.getcwd(),
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env=testEnv).returncode
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finally:
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-
# Make sure to stop the simulation no matter what.
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241
|
if simProc:
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-
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|
220
|
-
# Allow the simulation time to flush its outputs.
|
|
221
|
-
try:
|
|
222
|
-
simProc.wait(timeout=1.0)
|
|
223
|
-
except subprocess.TimeoutExpired:
|
|
224
|
-
# If the simulation doesn't exit of its own free will, kill it.
|
|
225
|
-
simProc.kill()
|
|
242
|
+
simProc.force_stop()
|
|
226
243
|
|
|
227
244
|
|
|
228
245
|
class Verilator(Simulator):
|
|
@@ -247,8 +264,11 @@ class Verilator(Simulator):
|
|
|
247
264
|
"-Wno-TIMESCALEMOD",
|
|
248
265
|
"-Wno-fatal",
|
|
249
266
|
"-sv",
|
|
250
|
-
"--build",
|
|
251
267
|
"--exe",
|
|
268
|
+
"--build",
|
|
269
|
+
"-j",
|
|
270
|
+
"0",
|
|
271
|
+
"--output-split",
|
|
252
272
|
"--assert",
|
|
253
273
|
str(Verilator.DefaultDriver),
|
|
254
274
|
]
|
|
Binary file
|
esiaccel/esiquery.exe
CHANGED
|
Binary file
|
|
@@ -1,22 +1,22 @@
|
|
|
1
|
-
esiaccel/CosimBackend.dll,sha256=
|
|
1
|
+
esiaccel/CosimBackend.dll,sha256=WzsSdJR9VEXX16DxT2R0Q3bSnDfdxfOTYe2Avw-Mf3w,7152128
|
|
2
2
|
esiaccel/CosimBackend.lib,sha256=UjflmgR93Kl22Du0lTqGhXWQqWEF-V8VwcqUuFo8GNk,4992924
|
|
3
|
-
esiaccel/ESICppRuntime.dll,sha256=
|
|
3
|
+
esiaccel/ESICppRuntime.dll,sha256=6sa4ndgPQNg2GN2ZfqpMHRBX8-0bM1MWgDQL3d6xOcI,4078592
|
|
4
4
|
esiaccel/ESICppRuntime.lib,sha256=iGJtktQywYhQCody90jvprSYC7kB9LWt3LEX5yIGEkM,15154004
|
|
5
|
-
esiaccel/EsiCosimDpiServer.dll,sha256=
|
|
5
|
+
esiaccel/EsiCosimDpiServer.dll,sha256=DsqKLWF3wqkS11DQc7EEAaA63HO2FmSon5mtYIXnb5M,159744
|
|
6
6
|
esiaccel/EsiCosimDpiServer.lib,sha256=bYBigD0RtRRSEiDxf4_gvpasLjD8fcUmC0CjRgQiQ0s,604164
|
|
7
|
-
esiaccel/MtiPli.dll,sha256=
|
|
7
|
+
esiaccel/MtiPli.dll,sha256=2ZJwzUQ3z29vl2Xsj2TsVgqgfD1eDdbzjtUs-O9sd7s,14848
|
|
8
8
|
esiaccel/MtiPli.lib,sha256=X0PcXwheCUvBMgQ5BAawePxbXQSLNk5M1FFn6V56ydo,14570
|
|
9
9
|
esiaccel/__init__.py,sha256=65xXWHwJwRePsyhWk837NpzuN0qsNhoAX29TOiSYKGc,905
|
|
10
10
|
esiaccel/accelerator.py,sha256=BcXPsUqcQV3YsVVyYbz9P6JnZLlcnuageFbJwID9_3s,3318
|
|
11
11
|
esiaccel/codegen.py,sha256=uoYELtnIabVvgLeCABj-mWras0BvmSKABPH-cd9nDFk,6560
|
|
12
|
-
esiaccel/esi-cosim.py,sha256=
|
|
13
|
-
esiaccel/esiCppAccel.cp310-win_amd64.pyd,sha256=
|
|
14
|
-
esiaccel/esiquery.exe,sha256=
|
|
12
|
+
esiaccel/esi-cosim.py,sha256=Z8gBKNr4iWtrokBLd2xym9ClwsFP0kQNRCnjMRfytcY,14852
|
|
13
|
+
esiaccel/esiCppAccel.cp310-win_amd64.pyd,sha256=uSZ4JN9kd-Btcb47AcYb7kFLIge7FP_R_b8VNAiFSBQ,500224
|
|
14
|
+
esiaccel/esiquery.exe,sha256=0Zm7d8IQi3dgTXsG8pKayoJOkqQNALV3TTG2f7RjBqo,441856
|
|
15
15
|
esiaccel/types.py,sha256=LFLzUCvtYF6FLsmKet6eJTMq2ija2Z5kxd5Ks6tkS4U,19044
|
|
16
16
|
esiaccel/utils.py,sha256=q-8fmgJ9tUvmBsIvqZiZ7u845IJhOjvjYTQLhhrNYl0,1515
|
|
17
17
|
esiaccel/cmake/esiaccelConfig.cmake,sha256=u2aW99k1lEcmYTG1P3BTJqtmDrj53wUUaBz_jzw8kYY,565
|
|
18
18
|
esiaccel/cosim/Cosim_DpiPkg.sv,sha256=9qGn1VyAVrzBP5At1thV6xrovg0WghICD01Zz9J221E,3458
|
|
19
|
-
esiaccel/cosim/Cosim_Endpoint.sv,sha256=
|
|
19
|
+
esiaccel/cosim/Cosim_Endpoint.sv,sha256=2F7UQYWavUlWx7Iqi_6iawn5geZRPG96H8rDBBDRAQ0,8391
|
|
20
20
|
esiaccel/cosim/Cosim_Manifest.sv,sha256=vl9b6XieEkP880IBw1ferekBnDJwFanZZggJJGertXM,1123
|
|
21
21
|
esiaccel/cosim/driver.cpp,sha256=DrEKkSN7Y_Hu7wcaUulH5mbC2L4yB9xLClRMeRUpzHM,3842
|
|
22
22
|
esiaccel/cosim/driver.sv,sha256=ro-j9GM164A1W0MDPkqYfEn3TUKHSqVvgjO31fnloQI,1428
|
|
@@ -35,9 +35,9 @@ esiaccel/include/esi/Utils.h,sha256=KPd75GajIFeTBVJocXBjwsJqhbZg-ShWZCIe3oQdBss,
|
|
|
35
35
|
esiaccel/include/esi/backends/Cosim.h,sha256=s7vYd0ra6m1nvk-n37MjvBoGVI-CCUKBt0DU4PKlaHM,2838
|
|
36
36
|
esiaccel/include/esi/backends/RpcServer.h,sha256=WMwnhwU2qnrcglGNeiKg9QQHpkDx1QE1JydKYDK4jqE,1856
|
|
37
37
|
esiaccel/include/esi/backends/Trace.h,sha256=kx4wwLH3a0ndmRUdaDyYGZ1SP83zlpFrk30Nw8ZrJJA,3286
|
|
38
|
-
esiaccel-0.1.5.
|
|
39
|
-
esiaccel-0.1.5.
|
|
40
|
-
esiaccel-0.1.5.
|
|
41
|
-
esiaccel-0.1.5.
|
|
42
|
-
esiaccel-0.1.5.
|
|
43
|
-
esiaccel-0.1.5.
|
|
38
|
+
esiaccel-0.1.5.dev163.dist-info/licenses/LICENSE,sha256=vtnVnB8_lN1yPYcA5MeT56R8UsQtBhyzZLBvu_KMf7I,13468
|
|
39
|
+
esiaccel-0.1.5.dev163.dist-info/METADATA,sha256=ghDk1XHfRI5GwmYRAW9aWvWpO3HcAE5he_FeHu2NtNk,16148
|
|
40
|
+
esiaccel-0.1.5.dev163.dist-info/WHEEL,sha256=KUuBC6lxAbHCKilKua8R9W_TM71_-9Sg5uEP3uDWcoU,101
|
|
41
|
+
esiaccel-0.1.5.dev163.dist-info/entry_points.txt,sha256=_CuNLV0fyTURxRREFwpzGycifZW_-7-MyuJNEwKK9J8,137
|
|
42
|
+
esiaccel-0.1.5.dev163.dist-info/top_level.txt,sha256=fYWTWMDK4PDu4ePQ9NtcFHas2k8-d1kWhTs2avPpgB4,9
|
|
43
|
+
esiaccel-0.1.5.dev163.dist-info/RECORD,,
|
|
File without changes
|
|
File without changes
|
|
File without changes
|
|
File without changes
|