cutez 0.1.0__py3-none-any.whl
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- cutex/__init__.py +218 -0
- cutex/__init__.pyi +21 -0
- cutex/pipeline.py +7 -0
- cutex/pipeline.pyi +3 -0
- cutex/runtime.py +14 -0
- cutex/runtime.pyi +3 -0
- cutex/testing.py +11 -0
- cutex/testing.pyi +3 -0
- cutex/utils/__init__.py +7 -0
- cutex/utils/__init__.pyi +3 -0
- cutex/utils/sm100.py +7 -0
- cutex/utils/sm100.pyi +3 -0
- cutez/__init__.py +218 -0
- cutez-0.1.0.dist-info/METADATA +6 -0
- cutez-0.1.0.dist-info/RECORD +18 -0
- cutez-0.1.0.dist-info/WHEEL +5 -0
- cutez-0.1.0.dist-info/licenses/LICENSE +21 -0
- cutez-0.1.0.dist-info/top_level.txt +1 -0
cutex/__init__.py
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from typing import List, Type, Union, Tuple
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import cutlass.cute as cute
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from cutlass.cute.arch import numeric_conversion
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from cutlass.cute.nvgpu.common import CopyUniversalOp
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from cutlass.cute.nvgpu.warp import StMatrix8x8x16bOp, StMatrix16x8x8bOp
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from cutlass.cute.nvgpu.tcgen05 import (
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MmaF16BF16Op,
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MmaTF32Op,
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MmaI8Op,
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MmaFP8Op,
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MmaMXF8Op,
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MmaMXF4Op,
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MmaMXF4NVF4Op,
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OperandSource as Tcgen05OperandSource,
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OperandMajorMode,
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CtaGroup,
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Ld16x64bOp,
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Ld16x128bOp,
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Ld16x256bOp,
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Ld16x32bx2Op,
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Ld32x32bOp,
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Repetition,
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Pack,
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SmemLayoutAtomKind,
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make_smem_layout_atom,
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tile_to_mma_shape,
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is_tmem_load,
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get_tmem_copy_properties,
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)
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from cutlass.cute.nvgpu.cpasync import (
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CopyBulkTensorTileG2SMulticastOp,
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CopyBulkTensorTileG2SOp,
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)
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from cutlass.utils.layout import LayoutEnum
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from cutlass.cutlass_dsl import (
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Float16,
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BFloat16,
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TFloat32,
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Float32,
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Uint8,
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Int8,
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Float8E4M3FN,
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Float8E5M2,
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Float4E2M1FN,
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Numeric,
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NumericMeta,
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dsl_user_op,
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)
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from torch._prims_common import number_type
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@dsl_user_op
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def explain_get_smem_store_op(
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layout_d: LayoutEnum,
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elem_ty_d: Type[Numeric],
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elem_ty_acc: Type[Numeric],
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tiled_tmem_load: cute.TiledCopy,
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*,
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loc=None,
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ip=None,
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) -> cute.CopyAtom:
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"""Selects the largest vectorized smem store atom available subject to
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constraint of gmem layout and chosen TMEM_LOAD's thread-value ownership.
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:param layout_d: The layout enum of the output tensor D.
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:type layout_d: LayoutEnum
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:param elem_ty_d: The element type for output tensor D.
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:type elem_ty_d: Type[Numeric]
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:param elem_ty_acc: The element type for accumulator.
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:type elem_ty_acc: Type[Numeric]
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:param tiled_tmem_load: An instance of TiledCopy that represents the tmem load operation.
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:type tiled_tmem_load: cute.TiledCopy
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:return: Either SmemStoreMatrix or SimtSyncCopy, based on the input parameters.
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:rtype: cute.CopyAtom
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"""
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def validate_type(ty, ty_name):
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if not isinstance(ty, NumericMeta):
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raise TypeError(f"{ty_name} must be a Numeric, but got {ty}")
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validate_type(elem_ty_d, "elem_ty_d")
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validate_type(elem_ty_acc, "elem_ty_acc")
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is_m_major = layout_d.is_m_major_c()
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is_n_major = layout_d.is_n_major_c()
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if not is_tmem_load(tiled_tmem_load):
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return cute.make_copy_atom(CopyUniversalOp(), elem_ty_d, loc=loc, ip=ip)
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num_dp, num_bits, num_rep, pack = get_tmem_copy_properties(tiled_tmem_load)
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use_stmatrix_m8n8_4x = (
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all(
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[
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elem_ty_acc.width == 32,
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elem_ty_d.width == 32,
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is_n_major,
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num_dp == 16,
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num_bits == 128,
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num_rep in (2, 4, 8, 16, 32, 64),
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pack == Pack.NONE,
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]
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)
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or all(
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[
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elem_ty_acc.width == 32,
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elem_ty_d.width == 16,
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num_dp == 16,
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num_bits == 256,
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num_rep in (2, 4, 8, 16, 32),
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pack == Pack.NONE,
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]
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)
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or all(
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[
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elem_ty_acc.width == 16,
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elem_ty_d.width == 16,
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num_dp == 16,
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num_bits == 128,
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num_rep in (2, 4, 8, 16, 32, 64),
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pack == Pack.PACK_16b_IN_32b,
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]
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)
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)
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use_stmatrix_m16n8_4x = all(
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[
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elem_ty_acc.width == 32,
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elem_ty_d.width == 8,
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is_m_major,
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num_dp == 16,
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num_bits == 256,
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num_rep in (4, 8, 16, 32),
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pack == Pack.NONE,
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]
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)
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use_stmatrix_m8n8_2x = (
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all(
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[
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elem_ty_acc.width == 32,
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elem_ty_d.width == 32,
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is_n_major,
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num_dp == 16,
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num_bits == 128,
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num_rep == 1,
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pack == Pack.NONE,
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]
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)
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or all(
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[
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elem_ty_acc.width == 32,
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elem_ty_d.width == 16,
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num_dp == 16,
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num_bits == 256,
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num_rep == 1,
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pack == Pack.NONE,
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]
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)
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or all(
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[
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elem_ty_acc.width == 16,
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elem_ty_d.width == 16,
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num_dp == 16,
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num_bits == 128,
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num_rep == 1,
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pack == Pack.PACK_16b_IN_32b,
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]
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)
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)
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use_stmatrix_m16n8_2x = all(
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[
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elem_ty_acc.width == 32,
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elem_ty_d.width == 8,
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is_m_major,
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num_dp == 16,
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num_bits == 256,
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num_rep == 2,
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pack == Pack.NONE,
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]
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)
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use_stmatrix_m16n8_1x = all(
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[
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elem_ty_acc.width == 32,
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elem_ty_d.width == 8,
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is_m_major,
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num_dp == 16,
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num_bits == 256,
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num_rep == 1,
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pack == Pack.NONE,
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]
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)
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print("===========================================")
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print("explain_get_smem_store_op:")
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if num_dp != 16 or num_bits < 128:
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print("NOTE: to directly use stmatrix, tcgen05.ld must have 16 lanes and 128/256b instruction")
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print(f"elem_ty_acc.width: {elem_ty_acc.width}")
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print(f"elem_ty_d.width: {elem_ty_d.width}")
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print(f"is_n_major: {is_n_major}")
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print(f"num_dp: {num_dp}")
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print(f"num_bits: {num_bits}")
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print(f"num_rep: {num_rep}")
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print(f"pack: {pack}")
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print("===========================================")
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if use_stmatrix_m8n8_4x:
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op = StMatrix8x8x16bOp(is_m_major, 4)
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elif use_stmatrix_m8n8_2x:
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op = StMatrix8x8x16bOp(is_m_major, 2)
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elif use_stmatrix_m16n8_4x:
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op = StMatrix16x8x8bOp(transpose=True, num_matrices=4)
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elif use_stmatrix_m16n8_2x:
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op = StMatrix16x8x8bOp(transpose=True, num_matrices=2)
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elif use_stmatrix_m16n8_1x:
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op = StMatrix16x8x8bOp(transpose=True, num_matrices=1)
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else:
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op = CopyUniversalOp()
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print(op)
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cutex/__init__.pyi
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from cutlass.cute import *
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import cutlass.cute.nvgpu as nvgpu
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import cutlass.cute.runtime as runtime
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import cutlass.cute.testing as testing
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import cutlass.pipeline as pipeline
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import cutlass.utils as utils
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import cutlass.utils.blackwell_helpers as sm100
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from cutlass.cute.nvgpu import cpasync, tcgen05
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from cutlass.cute.runtime import *
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from cutlass.cute.runtime import from_dlpack, make_fake_stream
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from cutlass.cute.testing import *
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from cutlass.cute.nvgpu import *
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from cutlass.pipeline import *
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from cutlass.utils import *
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from cutlass.utils.blackwell_helpers import *
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def dummy() -> str: ...
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__all__: list[str]
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cutex/pipeline.py
ADDED
cutex/pipeline.pyi
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cutex/runtime.py
ADDED
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import cutlass.cute.runtime as _runtime
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from cutlass.cute.runtime import from_dlpack
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_runtime_public_names = getattr(_runtime, "__all__", None)
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if _runtime_public_names is None:
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_runtime_public_names = [name for name in dir(_runtime) if not name.startswith("_")]
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for _name in _runtime_public_names:
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if hasattr(_runtime, _name):
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globals()[_name] = getattr(_runtime, _name)
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__all__ = [name for name in _runtime_public_names if hasattr(_runtime, name)]
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if "from_dlpack" not in __all__:
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__all__.append("from_dlpack")
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cutex/runtime.pyi
ADDED
cutex/testing.py
ADDED
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@@ -0,0 +1,11 @@
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import cutlass.cute.testing as _testing
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_testing_public_names = getattr(_testing, "__all__", None)
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if _testing_public_names is None:
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_testing_public_names = [name for name in dir(_testing) if not name.startswith("_")]
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for _name in _testing_public_names:
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if hasattr(_testing, _name):
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globals()[_name] = getattr(_testing, _name)
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__all__ = [name for name in _testing_public_names if hasattr(_testing, name)]
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cutex/testing.pyi
ADDED
cutex/utils/__init__.py
ADDED
cutex/utils/__init__.pyi
ADDED
cutex/utils/sm100.py
ADDED
cutex/utils/sm100.pyi
ADDED
cutez/__init__.py
ADDED
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@@ -0,0 +1,218 @@
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1
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from typing import List, Type, Union, Tuple
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2
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+
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3
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import cutlass.cute as cute
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4
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+
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5
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+
from cutlass.cute.arch import numeric_conversion
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6
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from cutlass.cute.nvgpu.common import CopyUniversalOp
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7
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from cutlass.cute.nvgpu.warp import StMatrix8x8x16bOp, StMatrix16x8x8bOp
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8
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from cutlass.cute.nvgpu.tcgen05 import (
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9
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MmaF16BF16Op,
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10
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+
MmaTF32Op,
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11
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+
MmaI8Op,
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12
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MmaFP8Op,
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13
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MmaMXF8Op,
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14
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MmaMXF4Op,
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15
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MmaMXF4NVF4Op,
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16
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OperandSource as Tcgen05OperandSource,
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17
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+
OperandMajorMode,
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18
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CtaGroup,
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19
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+
Ld16x64bOp,
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20
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+
Ld16x128bOp,
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21
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+
Ld16x256bOp,
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22
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+
Ld16x32bx2Op,
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23
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Ld32x32bOp,
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24
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Repetition,
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25
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+
Pack,
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26
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+
SmemLayoutAtomKind,
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27
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make_smem_layout_atom,
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28
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+
tile_to_mma_shape,
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29
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+
is_tmem_load,
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30
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get_tmem_copy_properties,
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31
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+
)
|
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32
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+
from cutlass.cute.nvgpu.cpasync import (
|
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33
|
+
CopyBulkTensorTileG2SMulticastOp,
|
|
34
|
+
CopyBulkTensorTileG2SOp,
|
|
35
|
+
)
|
|
36
|
+
from cutlass.utils.layout import LayoutEnum
|
|
37
|
+
from cutlass.cutlass_dsl import (
|
|
38
|
+
Float16,
|
|
39
|
+
BFloat16,
|
|
40
|
+
TFloat32,
|
|
41
|
+
Float32,
|
|
42
|
+
Uint8,
|
|
43
|
+
Int8,
|
|
44
|
+
Float8E4M3FN,
|
|
45
|
+
Float8E5M2,
|
|
46
|
+
Float4E2M1FN,
|
|
47
|
+
Numeric,
|
|
48
|
+
NumericMeta,
|
|
49
|
+
dsl_user_op,
|
|
50
|
+
)
|
|
51
|
+
from torch._prims_common import number_type
|
|
52
|
+
|
|
53
|
+
@dsl_user_op
|
|
54
|
+
def explain_get_smem_store_op(
|
|
55
|
+
layout_d: LayoutEnum,
|
|
56
|
+
elem_ty_d: Type[Numeric],
|
|
57
|
+
elem_ty_acc: Type[Numeric],
|
|
58
|
+
tiled_tmem_load: cute.TiledCopy,
|
|
59
|
+
*,
|
|
60
|
+
loc=None,
|
|
61
|
+
ip=None,
|
|
62
|
+
) -> cute.CopyAtom:
|
|
63
|
+
"""Selects the largest vectorized smem store atom available subject to
|
|
64
|
+
constraint of gmem layout and chosen TMEM_LOAD's thread-value ownership.
|
|
65
|
+
|
|
66
|
+
:param layout_d: The layout enum of the output tensor D.
|
|
67
|
+
:type layout_d: LayoutEnum
|
|
68
|
+
:param elem_ty_d: The element type for output tensor D.
|
|
69
|
+
:type elem_ty_d: Type[Numeric]
|
|
70
|
+
:param elem_ty_acc: The element type for accumulator.
|
|
71
|
+
:type elem_ty_acc: Type[Numeric]
|
|
72
|
+
:param tiled_tmem_load: An instance of TiledCopy that represents the tmem load operation.
|
|
73
|
+
:type tiled_tmem_load: cute.TiledCopy
|
|
74
|
+
|
|
75
|
+
:return: Either SmemStoreMatrix or SimtSyncCopy, based on the input parameters.
|
|
76
|
+
:rtype: cute.CopyAtom
|
|
77
|
+
"""
|
|
78
|
+
|
|
79
|
+
def validate_type(ty, ty_name):
|
|
80
|
+
if not isinstance(ty, NumericMeta):
|
|
81
|
+
raise TypeError(f"{ty_name} must be a Numeric, but got {ty}")
|
|
82
|
+
|
|
83
|
+
validate_type(elem_ty_d, "elem_ty_d")
|
|
84
|
+
validate_type(elem_ty_acc, "elem_ty_acc")
|
|
85
|
+
|
|
86
|
+
is_m_major = layout_d.is_m_major_c()
|
|
87
|
+
is_n_major = layout_d.is_n_major_c()
|
|
88
|
+
|
|
89
|
+
if not is_tmem_load(tiled_tmem_load):
|
|
90
|
+
return cute.make_copy_atom(CopyUniversalOp(), elem_ty_d, loc=loc, ip=ip)
|
|
91
|
+
|
|
92
|
+
num_dp, num_bits, num_rep, pack = get_tmem_copy_properties(tiled_tmem_load)
|
|
93
|
+
|
|
94
|
+
use_stmatrix_m8n8_4x = (
|
|
95
|
+
all(
|
|
96
|
+
[
|
|
97
|
+
elem_ty_acc.width == 32,
|
|
98
|
+
elem_ty_d.width == 32,
|
|
99
|
+
is_n_major,
|
|
100
|
+
num_dp == 16,
|
|
101
|
+
num_bits == 128,
|
|
102
|
+
num_rep in (2, 4, 8, 16, 32, 64),
|
|
103
|
+
pack == Pack.NONE,
|
|
104
|
+
]
|
|
105
|
+
)
|
|
106
|
+
or all(
|
|
107
|
+
[
|
|
108
|
+
elem_ty_acc.width == 32,
|
|
109
|
+
elem_ty_d.width == 16,
|
|
110
|
+
num_dp == 16,
|
|
111
|
+
num_bits == 256,
|
|
112
|
+
num_rep in (2, 4, 8, 16, 32),
|
|
113
|
+
pack == Pack.NONE,
|
|
114
|
+
]
|
|
115
|
+
)
|
|
116
|
+
or all(
|
|
117
|
+
[
|
|
118
|
+
elem_ty_acc.width == 16,
|
|
119
|
+
elem_ty_d.width == 16,
|
|
120
|
+
num_dp == 16,
|
|
121
|
+
num_bits == 128,
|
|
122
|
+
num_rep in (2, 4, 8, 16, 32, 64),
|
|
123
|
+
pack == Pack.PACK_16b_IN_32b,
|
|
124
|
+
]
|
|
125
|
+
)
|
|
126
|
+
)
|
|
127
|
+
use_stmatrix_m16n8_4x = all(
|
|
128
|
+
[
|
|
129
|
+
elem_ty_acc.width == 32,
|
|
130
|
+
elem_ty_d.width == 8,
|
|
131
|
+
is_m_major,
|
|
132
|
+
num_dp == 16,
|
|
133
|
+
num_bits == 256,
|
|
134
|
+
num_rep in (4, 8, 16, 32),
|
|
135
|
+
pack == Pack.NONE,
|
|
136
|
+
]
|
|
137
|
+
)
|
|
138
|
+
use_stmatrix_m8n8_2x = (
|
|
139
|
+
all(
|
|
140
|
+
[
|
|
141
|
+
elem_ty_acc.width == 32,
|
|
142
|
+
elem_ty_d.width == 32,
|
|
143
|
+
is_n_major,
|
|
144
|
+
num_dp == 16,
|
|
145
|
+
num_bits == 128,
|
|
146
|
+
num_rep == 1,
|
|
147
|
+
pack == Pack.NONE,
|
|
148
|
+
]
|
|
149
|
+
)
|
|
150
|
+
or all(
|
|
151
|
+
[
|
|
152
|
+
elem_ty_acc.width == 32,
|
|
153
|
+
elem_ty_d.width == 16,
|
|
154
|
+
num_dp == 16,
|
|
155
|
+
num_bits == 256,
|
|
156
|
+
num_rep == 1,
|
|
157
|
+
pack == Pack.NONE,
|
|
158
|
+
]
|
|
159
|
+
)
|
|
160
|
+
or all(
|
|
161
|
+
[
|
|
162
|
+
elem_ty_acc.width == 16,
|
|
163
|
+
elem_ty_d.width == 16,
|
|
164
|
+
num_dp == 16,
|
|
165
|
+
num_bits == 128,
|
|
166
|
+
num_rep == 1,
|
|
167
|
+
pack == Pack.PACK_16b_IN_32b,
|
|
168
|
+
]
|
|
169
|
+
)
|
|
170
|
+
)
|
|
171
|
+
use_stmatrix_m16n8_2x = all(
|
|
172
|
+
[
|
|
173
|
+
elem_ty_acc.width == 32,
|
|
174
|
+
elem_ty_d.width == 8,
|
|
175
|
+
is_m_major,
|
|
176
|
+
num_dp == 16,
|
|
177
|
+
num_bits == 256,
|
|
178
|
+
num_rep == 2,
|
|
179
|
+
pack == Pack.NONE,
|
|
180
|
+
]
|
|
181
|
+
)
|
|
182
|
+
use_stmatrix_m16n8_1x = all(
|
|
183
|
+
[
|
|
184
|
+
elem_ty_acc.width == 32,
|
|
185
|
+
elem_ty_d.width == 8,
|
|
186
|
+
is_m_major,
|
|
187
|
+
num_dp == 16,
|
|
188
|
+
num_bits == 256,
|
|
189
|
+
num_rep == 1,
|
|
190
|
+
pack == Pack.NONE,
|
|
191
|
+
]
|
|
192
|
+
)
|
|
193
|
+
print("===========================================")
|
|
194
|
+
print("explain_get_smem_store_op:")
|
|
195
|
+
if num_dp != 16 or num_bits < 128:
|
|
196
|
+
print("NOTE: to directly use stmatrix, tcgen05.ld must have 16 lanes and 128/256b instruction")
|
|
197
|
+
print(f"elem_ty_acc.width: {elem_ty_acc.width}")
|
|
198
|
+
print(f"elem_ty_d.width: {elem_ty_d.width}")
|
|
199
|
+
print(f"is_n_major: {is_n_major}")
|
|
200
|
+
print(f"num_dp: {num_dp}")
|
|
201
|
+
print(f"num_bits: {num_bits}")
|
|
202
|
+
print(f"num_rep: {num_rep}")
|
|
203
|
+
print(f"pack: {pack}")
|
|
204
|
+
|
|
205
|
+
if use_stmatrix_m8n8_4x:
|
|
206
|
+
op = StMatrix8x8x16bOp(is_m_major, 4)
|
|
207
|
+
elif use_stmatrix_m8n8_2x:
|
|
208
|
+
op = StMatrix8x8x16bOp(is_m_major, 2)
|
|
209
|
+
elif use_stmatrix_m16n8_4x:
|
|
210
|
+
op = StMatrix16x8x8bOp(transpose=True, num_matrices=4)
|
|
211
|
+
elif use_stmatrix_m16n8_2x:
|
|
212
|
+
op = StMatrix16x8x8bOp(transpose=True, num_matrices=2)
|
|
213
|
+
elif use_stmatrix_m16n8_1x:
|
|
214
|
+
op = StMatrix16x8x8bOp(transpose=True, num_matrices=1)
|
|
215
|
+
else:
|
|
216
|
+
op = CopyUniversalOp()
|
|
217
|
+
print(op)
|
|
218
|
+
print("===========================================")
|
|
@@ -0,0 +1,18 @@
|
|
|
1
|
+
cutex/__init__.py,sha256=_zLi5I9jqk_WdAgiX0d--RVxScNy3Oo90iFQ5VV7WhY,6206
|
|
2
|
+
cutex/__init__.pyi,sha256=Jy4j9ANKmE7SXBupKqH2IufsFm1xUO6WNPs7yZ_USwA,620
|
|
3
|
+
cutex/pipeline.py,sha256=1wgcnhAex3mjVSadfG2r0fRLxsmiIlp4oKElYNq4OY0,265
|
|
4
|
+
cutex/pipeline.pyi,sha256=LTgR1WXuv0H9KmSaM0CxJbJyGm5ft3fU3Ig4T1x5xcI,51
|
|
5
|
+
cutex/runtime.py,sha256=DkMxTHUWwP6UUAh7r3q6Efn0XRgFD6hCMSdgL3KbpEw,536
|
|
6
|
+
cutex/runtime.pyi,sha256=UQ_UbT1HfUuMtjdxP18zWzbqYClyjhtmLAEFV4dvBdg,55
|
|
7
|
+
cutex/testing.py,sha256=Gnk6yME2Kmi4hBzhu2xc2K5ITpc1lix0a0M7Z2SwDAw,424
|
|
8
|
+
cutex/testing.pyi,sha256=Cp2Ne0rhrUGaxpkg_9TVM8HSHFGGmovtVP-u6EG7XPc,55
|
|
9
|
+
cutex/utils/__init__.py,sha256=G2ylaTDZAb7sIvHa5uxEVKjT4zeQP_WkDIx1K7Fh3us,244
|
|
10
|
+
cutex/utils/__init__.pyi,sha256=98JcUMHBPpCbQ4GqiNgFVrzZmkGTzE0XlPw4jLa11vE,48
|
|
11
|
+
cutex/utils/sm100.py,sha256=JjCmDJ9xyzI6zdTnngx0JRxpuKbds-TeKsp3uSV4VzM,262
|
|
12
|
+
cutex/utils/sm100.pyi,sha256=yKzsc6H9fqPD95uJUnK38AIE1isoikNpYl4wE_xqS7Q,66
|
|
13
|
+
cutez/__init__.py,sha256=NbPATzMmEYxzPWd5SKY1AGDQQGrl2oPJz0bARHOyM0g,6206
|
|
14
|
+
cutez-0.1.0.dist-info/licenses/LICENSE,sha256=SQLFFQMkaYtZwAws2RPvCzAFCoGt4gctI1qmnGnh5lQ,1063
|
|
15
|
+
cutez-0.1.0.dist-info/METADATA,sha256=X9wYU7jq3IkmVq7eH8e15Lm-jyCZ9VI5fasfjstAOos,130
|
|
16
|
+
cutez-0.1.0.dist-info/WHEEL,sha256=aeYiig01lYGDzBgS8HxWXOg3uV61G9ijOsup-k9o1sk,91
|
|
17
|
+
cutez-0.1.0.dist-info/top_level.txt,sha256=RRDVDnvYVjgqHEhwgzWfzN0PFqZWRBbiToei-I0fhPk,6
|
|
18
|
+
cutez-0.1.0.dist-info/RECORD,,
|
|
@@ -0,0 +1,21 @@
|
|
|
1
|
+
MIT License
|
|
2
|
+
|
|
3
|
+
Copyright (c) 2026 ZhangZ
|
|
4
|
+
|
|
5
|
+
Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
6
|
+
of this software and associated documentation files (the "Software"), to deal
|
|
7
|
+
in the Software without restriction, including without limitation the rights
|
|
8
|
+
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
9
|
+
copies of the Software, and to permit persons to whom the Software is
|
|
10
|
+
furnished to do so, subject to the following conditions:
|
|
11
|
+
|
|
12
|
+
The above copyright notice and this permission notice shall be included in all
|
|
13
|
+
copies or substantial portions of the Software.
|
|
14
|
+
|
|
15
|
+
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
16
|
+
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
17
|
+
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
|
18
|
+
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
19
|
+
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
20
|
+
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
21
|
+
SOFTWARE.
|
|
@@ -0,0 +1 @@
|
|
|
1
|
+
cutez
|