cocotb 1.9.1__cp312-cp312-win32.whl → 1.9.2__cp312-cp312-win32.whl

cocotb/__init__.py

@@ -313,7 +313,13 @@ def _initialise_testbench_(argv_):
     top = cocotb.handle.SimHandle(handle)
 
     global regression_manager
-    regression_manager = RegressionManager.from_discovery(top)
+    try:
+        regression_manager = RegressionManager.from_discovery(top)
+    except BaseException as e:
+        log.error(e)
+        simulator.stop_simulator()
+        _stop_library_coverage()
+        return  # pragma: no cover
 
     global scheduler
     scheduler = Scheduler(handle_result=regression_manager._handle_result)
@@ -322,6 +328,13 @@ def _initialise_testbench_(argv_):
     regression_manager._execute()
 
 
+def _stop_library_coverage() -> None:
+    if _library_coverage is not None:
+        # TODO: move this once we have normal shutdown behavior to _sim_event
+        _library_coverage.stop()
+        _library_coverage.save()  # pragma: no cover
+
+
 def _sim_event(message):
     """Function that can be called externally to signal an event."""
     from cocotb.result import SimFailure
@@ -329,8 +342,12 @@ def _sim_event(message):
     # We simply return here as the simulator will exit
     # so no cleanup is needed
     msg = f"Failing test at simulator request before test run completion: {message}"
-    scheduler.log.error(msg)
-    scheduler._finish_scheduler(SimFailure(msg))
+    if scheduler is not None:
+        scheduler.log.error(msg)
+        scheduler._finish_scheduler(SimFailure(msg))
+    else:
+        log.error(msg)
+        _stop_library_coverage()
 
 
 @deprecated("This function is now private")

cocotb/_version.py

@@ -5,4 +5,4 @@
 # 1) we don't load dependencies by storing it in __init__.py
 # 2) we can import it in setup.py for the same reason
 # 3) we can import it into your module
-__version__ = "1.9.1"
+__version__ = "1.9.2"

cocotb/regression.py

@@ -204,7 +204,6 @@ class RegressionManager:
             except Exception as E:
                 _logger.critical("Failed to import module %s: %s", module_name, E)
                 _logger.info('MODULE variable was "%s"', ".".join(modules))
-                _logger.info("Traceback: ")
                 _logger.info(traceback.format_exc())
                 raise
 
@@ -304,13 +303,10 @@ class RegressionManager:
             self.log.info("Writing coverage data")
             self._cov.save()
             self._cov.html_report()
-        if cocotb._library_coverage is not None:
-            # TODO: move this once we have normal shutdown behavior to _sim_event
-            cocotb._library_coverage.stop()
-            cocotb._library_coverage.save()
 
         # Setup simulator finalization
         simulator.stop_simulator()
+        cocotb._stop_library_coverage()
 
     @deprecated("This method is now private.")
     def next_test(self) -> Optional[Test]:

cocotb/share/makefiles/simulators/Makefile.activehdl

@@ -22,8 +22,15 @@ ALOG_ARGS += $(COMPILE_ARGS)
 ACOM_ARGS += $(COMPILE_ARGS)
 ASIM_ARGS += $(SIM_ARGS)
 
-RTL_LIBRARY ?= work
 ALOG_ARGS += +define+COCOTB_SIM -dbg
+
+ifdef RTL_LIBRARY
+    $(warning Using RTL_LIBRARY is deprecated, please use TOPLEVEL_LIBRARY instead.)
+    TOPLEVEL_LIBRARY ?= $(RTL_LIBRARY)
+else
+    TOPLEVEL_LIBRARY ?= work
+endif
+
 ACOM_ARGS += -dbg
 
 GPI_EXTRA:=
@@ -46,8 +53,8 @@ endif
 
 # Create a DO script (Tcl-like but not fully compatible) based on the list of $(VERILOG_SOURCES)
 $(SIM_BUILD)/runsim.do : $(VERILOG_SOURCES) $(VHDL_SOURCES) | $(SIM_BUILD)
-	@echo "alib $(RTL_LIBRARY)" > $@
-	@echo "set worklib $(RTL_LIBRARY)" >> $@
+	@echo "alib $(TOPLEVEL_LIBRARY)" > $@
+	@echo "set worklib $(TOPLEVEL_LIBRARY)" >> $@
 ifneq ($(VHDL_SOURCES),)
 	@echo "acom $(ACOM_ARGS) $(call to_tcl_path,$(VHDL_SOURCES))" >> $@
 endif

cocotb/share/makefiles/simulators/Makefile.questa

@@ -42,9 +42,12 @@ ifeq (, $(CMD))
     $(error Unable to locate command >$(CMD_BIN)<)
 endif
 
-RTL_LIBRARY ?= work
-
-TOPLEVEL_LIBRARY ?= $(RTL_LIBRARY)
+ifdef RTL_LIBRARY
+    $(warning Using RTL_LIBRARY is deprecated, please use TOPLEVEL_LIBRARY instead.)
+    TOPLEVEL_LIBRARY ?= $(RTL_LIBRARY)
+else
+    TOPLEVEL_LIBRARY ?= work
+endif
 TOPLEVEL := "$(TOPLEVEL_LIBRARY).$(TOPLEVEL)"
 
 ifndef VLOG_ARGS
@@ -127,19 +130,19 @@ $(SIM_BUILD)/runsim.do : $(VHDL_SOURCES) $(VERILOG_SOURCES) $(CUSTOM_COMPILE_DEP
 	@echo "}" >> $@
 	@echo "vmap -c" >> $@
 	$(foreach LIB, $(VHDL_LIB_ORDER), $(make_lib))
-	@echo "if [file exists $(SIM_BUILD)/$(RTL_LIBRARY)] {vdel -lib $(SIM_BUILD)/$(RTL_LIBRARY) -all}" >> $@
-	@echo "vlib $(SIM_BUILD)/$(RTL_LIBRARY)" >> $@
-	@echo "vmap $(RTL_LIBRARY) $(SIM_BUILD)/$(RTL_LIBRARY)" >> $@
+	@echo "if [file exists $(SIM_BUILD)/$(TOPLEVEL_LIBRARY)] {vdel -lib $(SIM_BUILD)/$(TOPLEVEL_LIBRARY) -all}" >> $@
+	@echo "vlib $(SIM_BUILD)/$(TOPLEVEL_LIBRARY)" >> $@
+	@echo "vmap $(TOPLEVEL_LIBRARY) $(SIM_BUILD)/$(TOPLEVEL_LIBRARY)" >> $@
 ifneq ($(VHDL_SOURCES),)
-	@echo "vcom -work $(RTL_LIBRARY) $(VCOM_ARGS) $(call to_tcl_path,$(VHDL_SOURCES))" >> $@
+	@echo "vcom -work $(TOPLEVEL_LIBRARY) $(VCOM_ARGS) $(call to_tcl_path,$(VHDL_SOURCES))" >> $@
 endif
 ifneq ($(VERILOG_SOURCES),)
-	@echo "vlog -work $(RTL_LIBRARY) +define+COCOTB_SIM -sv $(VLOG_ARGS) $(EXTRA_ARGS) $(call to_tcl_path,$(VERILOG_SOURCES))" >> $@
+	@echo "vlog -work $(TOPLEVEL_LIBRARY) +define+COCOTB_SIM -sv $(VLOG_ARGS) $(EXTRA_ARGS) $(call to_tcl_path,$(VERILOG_SOURCES))" >> $@
 endif
 ifdef SCRIPT_FILE
 	@echo "do $(SCRIPT_FILE)" >> $@
 endif
-	@echo "vsim $(VSIM_ARGS) $(EXTRA_ARGS) $(PLUSARGS) $(SIM_BUILD)/$(TOPLEVEL)" >> $@
+	@echo "vsim $(VSIM_ARGS) $(EXTRA_ARGS) $(PLUSARGS) $(TOPLEVEL)" >> $@
 ifeq ($(WAVES),1)
 	@echo "log -recursive /*" >> $@
 endif

cocotb/share/makefiles/simulators/Makefile.riviera

@@ -69,9 +69,15 @@ ASIM_ARGS += $(SIM_ARGS)
 # Plusargs need to be passed to ASIM command not vsimsa
 ASIM_ARGS += $(PLUSARGS)
 
-RTL_LIBRARY ?= work
 ALOG_ARGS += +define+COCOTB_SIM
 
+ifdef RTL_LIBRARY
+    $(warning Using RTL_LIBRARY is deprecated, please use TOPLEVEL_LIBRARY instead.)
+    TOPLEVEL_LIBRARY ?= $(RTL_LIBRARY)
+else
+    TOPLEVEL_LIBRARY ?= work
+endif
+
 # Pass the VPI library to the Verilog compilation to get extended checking.
 ALOG_ARGS += -pli $(shell cocotb-config --lib-name-path vpi riviera)
 
@@ -127,15 +133,15 @@ $(SIM_BUILD)/runsim.tcl : $(VERILOG_SOURCES) $(VHDL_SOURCES) | $(SIM_BUILD)
 	@echo "@if [string length [array get env LICENSE_QUEUE]] {" >> $@
 	@echo " set LICENSE_QUEUE $$::env(LICENSE_QUEUE)" >> $@
 	@echo "}" >> $@
-	@echo "if [file exists $(SIM_BUILD)/$(RTL_LIBRARY)] {adel -lib $(SIM_BUILD)/$(RTL_LIBRARY) -all}" >> $@;
-	@echo "alib $(SIM_BUILD)/$(RTL_LIBRARY)" >> $@
-	@echo "amap $(RTL_LIBRARY) $(SIM_BUILD)/$(RTL_LIBRARY)" >> $@;
-	@echo "set worklib $(RTL_LIBRARY)" >> $@;
+	@echo "if [file exists $(SIM_BUILD)/$(TOPLEVEL_LIBRARY)] {adel -lib $(SIM_BUILD)/$(TOPLEVEL_LIBRARY) -all}" >> $@;
+	@echo "alib $(SIM_BUILD)/$(TOPLEVEL_LIBRARY)" >> $@
+	@echo "amap $(TOPLEVEL_LIBRARY) $(SIM_BUILD)/$(TOPLEVEL_LIBRARY)" >> $@;
+	@echo "set worklib $(TOPLEVEL_LIBRARY)" >> $@;
 ifneq ($(VHDL_SOURCES),)
-	@echo "acom -work $(RTL_LIBRARY) $(ACOM_ARGS) $(call to_tcl_path,$(VHDL_SOURCES))" >> $@
+	@echo "acom -work $(TOPLEVEL_LIBRARY) $(ACOM_ARGS) $(call to_tcl_path,$(VHDL_SOURCES))" >> $@
 endif
 ifneq ($(VERILOG_SOURCES),)
-	@echo "alog -work $(RTL_LIBRARY) $(ALOG_ARGS) $(call to_tcl_path,$(VERILOG_SOURCES))" >> $@
+	@echo "alog -work $(TOPLEVEL_LIBRARY) $(ALOG_ARGS) $(call to_tcl_path,$(VERILOG_SOURCES))" >> $@
 endif
 ifdef SCRIPT_FILE
 	@echo "do $(SCRIPT_FILE)" >> $@
@@ -154,8 +160,8 @@ else
 	@echo "run -all" >> $@
 	@echo "endsim" >> $@
 ifeq ($(COVERAGE),1)
-	@echo "acdb report -cov $(COVERAGE_TYPES) -db $(RTL_LIBRARY).acdb -html -o coverage/acdb_report.html" >> $@
-	@echo "acdb report -cov $(COVERAGE_TYPES) -db $(RTL_LIBRARY).acdb -txt -o coverage/acdb_report.txt" >> $@
+	@echo "acdb report -cov $(COVERAGE_TYPES) -db $(TOPLEVEL_LIBRARY).acdb -html -o coverage/acdb_report.html" >> $@
+	@echo "acdb report -cov $(COVERAGE_TYPES) -db $(TOPLEVEL_LIBRARY).acdb -txt -o coverage/acdb_report.txt" >> $@
 endif
 	@echo "exit" >> $@
 endif

{cocotb-1.9.1.dist-info → cocotb-1.9.2.dist-info}/METADATA

@@ -1,6 +1,6 @@
 Metadata-Version: 2.1
 Name: cocotb
-Version: 1.9.1
+Version: 1.9.2
 Summary: cocotb is a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python.
 Home-page: https://www.cocotb.org
 Author: Chris Higgs, Stuart Hodgson
@@ -18,6 +18,8 @@ Classifier: Programming Language :: Python :: 3.8
 Classifier: Programming Language :: Python :: 3.9
 Classifier: Programming Language :: Python :: 3.10
 Classifier: Programming Language :: Python :: 3.11
+Classifier: Programming Language :: Python :: 3.12
+Classifier: Programming Language :: Python :: 3.13
 Classifier: License :: OSI Approved :: BSD License
 Classifier: Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)
 Classifier: Framework :: cocotb

cocotb-1.9.2.dist-info/RECORD

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