classiq 0.32.1__py3-none-any.whl → 0.34.0__py3-none-any.whl

classiq/interface/model/validations/handles_validator.py

@@ -1,7 +1,11 @@
 from typing import Dict, Iterable, Mapping, Union
 
-from classiq.interface.generator.function_params import IOName, PortDirection
-from classiq.interface.model.handle_binding import HandleBinding, SlicedHandleBinding
+from classiq.interface.generator.function_params import PortDirection
+from classiq.interface.model.handle_binding import (
+    HandleBinding,
+    SlicedHandleBinding,
+    SubscriptHandleBinding,
+)
 from classiq.interface.model.local_variable_declaration import LocalVariableDeclaration
 from classiq.interface.model.port_declaration import PortDeclaration
 from classiq.interface.model.quantum_statement import QuantumOperation
@@ -9,12 +13,15 @@ from classiq.interface.model.validation_handle import HandleState, ValidationHan
 from classiq.interface.model.validations.handle_validation_base import (
     HandleValidationBase,
 )
+from classiq.interface.model.variable_declaration_statement import (
+    VariableDeclarationStatement,
+)
 
 
 def _initialize_handles_to_state(
-    port_declarations: Mapping[IOName, PortDeclaration],
+    port_declarations: Mapping[str, PortDeclaration],
     local_handles: Iterable[LocalVariableDeclaration],
-) -> Mapping[str, ValidationHandle]:
+) -> Dict[str, ValidationHandle]:
     handles_to_state: Dict[str, ValidationHandle] = dict()
 
     for port_decl in port_declarations.values():
@@ -35,7 +42,7 @@ def _initialize_handles_to_state(
 class HandleValidator(HandleValidationBase):
     def __init__(
         self,
-        port_declarations: Mapping[IOName, PortDeclaration],
+        port_declarations: Mapping[str, PortDeclaration],
         local_handles: Iterable[LocalVariableDeclaration],
     ) -> None:
         super().__init__(port_declarations)
@@ -53,6 +60,20 @@ class HandleValidator(HandleValidationBase):
         self._handle_outputs(call.wiring_outputs)
         self._handle_inouts(call.wiring_inouts)
 
+    def handle_variable_declaration(
+        self, declaration: VariableDeclarationStatement
+    ) -> None:
+        handle_wiring_state = self._handles_to_state.get(declaration.name)
+        if handle_wiring_state is not None:
+            handle_wiring_state.append_error(
+                f"Trying to declare a variable of the same name as previously declared variable {declaration.name}"
+            )
+            return
+
+        self._handles_to_state[declaration.name] = ValidationHandle(
+            HandleState.UNINITIALIZED
+        )
+
     def _handle_inputs(self, inputs: Mapping[str, HandleBinding]) -> None:
         for handle_binding in inputs.values():
             handle_wiring_state = self._handles_to_state[handle_binding.name]
@@ -77,7 +98,10 @@ class HandleValidator(HandleValidationBase):
             handle_wiring_state.initialize()
 
     def _handle_inouts(
-        self, inouts: Mapping[str, Union[SlicedHandleBinding, HandleBinding]]
+        self,
+        inouts: Mapping[
+            str, Union[SlicedHandleBinding, SubscriptHandleBinding, HandleBinding]
+        ],
     ) -> None:
         sliced_handles = set()
         whole_handles = set()
@@ -90,12 +114,14 @@ class HandleValidator(HandleValidationBase):
                     f"Trying to access handle {handle_binding.name} as inout but it is in incorrect state"
                 )
 
-            if isinstance(handle_binding, SlicedHandleBinding):
+            if isinstance(
+                handle_binding, (SlicedHandleBinding, SubscriptHandleBinding)
+            ):
                 sliced_handles.add(handle_binding.name)
             else:
                 whole_handles.add(handle_binding.name)
 
         for handle in sliced_handles & whole_handles:
             self._handles_to_state[handle].append_error(
-                f"Invalid use of inout handle {handle_binding.name}, used both sliced and whole"
+                f"Invalid use of inout handle {handle_binding.name}, used both in slice or subscript and whole"
             )

classiq/interface/model/variable_declaration_statement.py

@@ -0,0 +1,8 @@
+from classiq.interface.model.quantum_statement import QuantumStatement
+from classiq.interface.model.quantum_variable_declaration import (
+    QuantumVariableDeclaration,
+)
+
+
+class VariableDeclarationStatement(QuantumStatement, QuantumVariableDeclaration):
+    pass

classiq/interface/server/routes.py

@@ -1,6 +1,9 @@
 ANALYZER_PREFIX = "/analyzer"
 CHEMISTRY_PREFIX = "/chemistry"
-EXECUTE_PREFIX = "/execute"
+LEGACY_EXECUTE_PREFIX = "/execute"
+EXECUTION_PREFIX = "/execution"
+
+SYNTHESIS_SERVICE_PREFIX = "/synthesis/v1"
 
 ANALYZER_CIRCUIT_PAGE = "circuit"
 DEFAULT_IDE_FE_APP = "https://platform.classiq.io/"
@@ -17,9 +20,7 @@ ANALYZER_OPTIONAL_DEVICES = "/graphs/available_devices"
 ANALYZER_OPTIONAL_DEVICES_FULL_PATH = ANALYZER_PREFIX + ANALYZER_OPTIONAL_DEVICES
 
 TASKS_SUFFIX = "/tasks"
-GENERATED_CIRCUIT_SUFFIX = "/generated_circuit"
 QUANTUM_PROGRAM_SUFFIX = "/quantum_program"
-FINANCE_SUFFIX = "/finance"
 ESTIMATE_SUFFIX = "/estimate"
 RB = "/rb"
 ANALYZER_DATA_TASK = f"{TASKS_SUFFIX}/data"
@@ -35,10 +36,7 @@ DATA_DOG_EVENT_TASK_FULL_PATH = f"{ANALYZER_PREFIX}{DATA_DOG_EVENT_TASK}"
 
 IDE_QASM_TASK = f"{TASKS_SUFFIX}/generated_circuit_from_qasm"
 IDE_QASM_FULL_PATH = f"{ANALYZER_PREFIX}{IDE_QASM_TASK}"
-IDE_EXECUTION_RESULTS_PATH = f"/results{EXECUTE_PREFIX}"
-ASYNC_TASKS_SUFFIX = "/async_tasks"
 TASKS_GENERATE_SUFFIX = TASKS_SUFFIX + "/generate"
-SEMANTICS_CHECK_SUFFIX = TASKS_SUFFIX + "/semantic_checks"
 TASKS_VISUALIZE_SUFFIX = TASKS_SUFFIX + "/visualize"
 TASKS_SOLVE_SUFFIX = "/tasks/solve"
 MODEL_GENERATE_PREFIX = "/generate_model"
@@ -52,25 +50,22 @@ TASKS_GENERATE_FULL_PATH = TASKS_GENERATE_SUFFIX
 TASKS_SOLVE_EXACT_SUFFIX = "/tasks/solve_exact"
 TASKS_UCC_OPERATORS_SUFFIX = "/tasks/ucc_operators"
 
-TASKS_GET_MAX_CUT_MODEL = "/tasks/get_max_cut_model"
 
-EXECUTE_GENERATED_CIRCUIT_FULL_PATH = EXECUTE_PREFIX + GENERATED_CIRCUIT_SUFFIX
-EXECUTE_QUANTUM_PROGRAM_FULL_PATH = EXECUTE_PREFIX + QUANTUM_PROGRAM_SUFFIX
-EXECUTE_QUANTUM_PROGRAM_PREFIX = EXECUTE_QUANTUM_PROGRAM_FULL_PATH
-EXECUTE_FINANCE_FULL_PATH = EXECUTE_PREFIX + FINANCE_SUFFIX
-EXECUTE_ESTIMATE_FULL_PATH = EXECUTE_PREFIX + ESTIMATE_SUFFIX
-EXECUTE_ASYNC_TASKS_FULL_PATH = EXECUTE_PREFIX + ASYNC_TASKS_SUFFIX
+EXECUTION_JOBS_SUFFIX = "/jobs"
+EXECUTION_JOBS_FULL_PATH = EXECUTION_PREFIX + EXECUTION_JOBS_SUFFIX
+EXECUTE_QUANTUM_PROGRAM_FULL_PATH = LEGACY_EXECUTE_PREFIX + QUANTUM_PROGRAM_SUFFIX
+EXECUTE_ESTIMATE_FULL_PATH = LEGACY_EXECUTE_PREFIX + ESTIMATE_SUFFIX
 
 ANALYZER_FULL_PATH = ANALYZER_PREFIX + TASKS_SUFFIX
 ANALYZER_RB_FULL_PATH = ANALYZER_PREFIX + TASK_RB_SUFFIX
 GENERATE_RESOURCE_ESTIMATOR_REPORT = "/resource_estimator_report"
 
-CHEMISTRY_GENERATE_HAMILTONIAN_FULL_PATH = CHEMISTRY_PREFIX + TASKS_SUFFIX
+GENERATE_HAMILTONIAN_SUFFIX = "/generate_hamiltonian"
+GENERATE_HAMILTONIAN_FULL_PATH = SYNTHESIS_SERVICE_PREFIX + GENERATE_HAMILTONIAN_SUFFIX
+
 CHEMISTRY_GENERATE_UCC_OPERATORS_FULL_PATH = (
     CHEMISTRY_PREFIX + TASKS_UCC_OPERATORS_SUFFIX
 )
-CHEMISTRY_SOLVE_EXACT_FULL_PATH = CHEMISTRY_PREFIX + TASKS_SOLVE_EXACT_SUFFIX
-CHEMISTRY_SOLVE_FULL_PATH = CHEMISTRY_PREFIX + TASKS_SOLVE_SUFFIX
 
 FINANCE_GENERATE_MODEL_PATH = MODEL_GENERATE_PREFIX + "/finance"
 

classiq/model/__init__.py

@@ -1,3 +1,5 @@
+from typing import List
+
 from classiq.interface.generator.model import *  # noqa: F403
 from classiq.interface.generator.model import __all__ as _model_all
 
@@ -8,5 +10,5 @@ __all__ = ["FunctionGenerator", "Model"]
 __all__.extend(_model_all)
 
 
-def __dir__():
+def __dir__() -> List[str]:
     return __all__

classiq/model/function_handler.py

@@ -454,7 +454,7 @@ class FunctionHandler(abc.ABC):
 
         raise AttributeError(f"{self.__class__.__name__!r} has no attribute {item!r}")
 
-    def __dir__(self):
+    def __dir__(self) -> List[str]:
         builtin_func_name = [
             func.__name__
             for func in function_param_list.function_param_library.param_list

classiq/model/function_handler.pyi

@@ -24,7 +24,7 @@ from classiq.model import logic_flow_change_handler as logic_flow_change_handler
 from classiq.model.logic_flow import LogicFlowBuilder as LogicFlowBuilder
 from classiq.quantum_functions.function_library import FunctionLibrary as FunctionLibrary, QuantumFunction as QuantumFunction, SynthesisQuantumFunctionDeclaration as SynthesisQuantumFunctionDeclaration
 from classiq.quantum_register import QReg as QReg, QRegGenericAlias as QRegGenericAlias
-from typing import Any, Callable, Collection, Dict, Iterable, Mapping, Optional, Union
+from typing import Any, Callable, Collection, Dict, Iterable, List, Mapping, Optional, Union
 
 SupportedInputArgs = Union[Mapping[IOName, QReg], Collection[QReg], QReg]
 WireNameDict = Dict[IOName, WireName]
@@ -40,114 +40,114 @@ class FunctionHandler(abc.ABC, metaclass=abc.ABCMeta):
     def output_wires(self) -> WireNameDict: ...
     def create_inputs(self, inputs: Mapping[IOName, QRegGenericAlias]) -> Dict[IOName, QReg]: ...
     def set_outputs(self, outputs: Mapping[IOName, QReg]) -> None: ...
-    def apply(self, function_name: Union[str, SynthesisQuantumFunctionDeclaration, QuantumFunction], in_wires: Optional[SupportedInputArgs] = ..., out_wires: Optional[SupportedInputArgs] = ..., is_inverse: bool = ..., strict_zero_ios: bool = ..., release_by_inverse: bool = ..., control_states: Optional[Union[ControlState, Iterable[ControlState]]] = ..., should_control: bool = ..., power: int = ..., call_name: Optional[str] = ..., parameters_dict: Optional[Dict[str, ParameterFloatType]] = ...) -> Dict[IOName, QReg]: ...
+    def apply(self, function_name: Union[str, SynthesisQuantumFunctionDeclaration, QuantumFunction], in_wires: Optional[SupportedInputArgs] = None, out_wires: Optional[SupportedInputArgs] = None, is_inverse: bool = False, strict_zero_ios: bool = True, release_by_inverse: bool = False, control_states: Optional[Union[ControlState, Iterable[ControlState]]] = None, should_control: bool = True, power: int = 1, call_name: Optional[str] = None, parameters_dict: Optional[Dict[str, ParameterFloatType]] = None) -> Dict[IOName, QReg]: ...
     def release_qregs(self, qregs: Union[QReg, Collection[QReg]]) -> None: ...
     def __getattr__(self, item: str) -> Callable[..., Any]: ...
-    def __dir__(self): ...
+    def __dir__(self) -> List[str]: ...
     def include_library(self, library: FunctionLibrary) -> None: ...
     @abc.abstractmethod
     def create_library(self) -> None: ...
-    def AmplitudeLoading(self, params: AmplitudeLoading, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def PhaseGate(self, params: PhaseGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def RZZGate(self, params: RZZGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def HartreeFock(self, params: HartreeFock, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def RandomizedBenchmarking(self, params: RandomizedBenchmarking, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def CXGate(self, params: CXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def BitwiseOr(self, params: BitwiseOr, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def MCPhaseGate(self, params: MCPhaseGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def LShift(self, params: LShift, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def BitwiseXor(self, params: BitwiseXor, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def HadamardTransform(self, params: HadamardTransform, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def RShift(self, params: RShift, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def RGate(self, params: RGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def RXXGate(self, params: RXXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def QFT(self, params: QFT, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def GridEntangler(self, params: GridEntangler, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def LogicalAnd(self, params: LogicalAnd, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def HardwareEfficientAnsatz(self, params: HardwareEfficientAnsatz, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def NotEqual(self, params: NotEqual, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def LinearGCI(self, params: LinearGCI, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def GreaterThan(self, params: GreaterThan, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def GreaterEqual(self, params: GreaterEqual, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def LessThan(self, params: LessThan, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def LessEqual(self, params: LessEqual, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def CRZGate(self, params: CRZGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def CPhaseGate(self, params: CPhaseGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def ExponentialStatePreparation(self, params: ExponentialStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def HVA(self, params: HVA, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def RZGate(self, params: RZGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def FinancePayoff(self, params: FinancePayoff, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Exponentiation(self, params: Exponentiation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def UnitaryGate(self, params: UnitaryGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def QSVMFeatureMap(self, params: QSVMFeatureMap, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def CyclicShift(self, params: CyclicShift, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def StatePreparation(self, params: StatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def LShift(self, params: LShift, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def BitwiseAnd(self, params: BitwiseAnd, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def UniformDistributionStatePreparation(self, params: UniformDistributionStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def XGate(self, params: XGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def RYGate(self, params: RYGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Negation(self, params: Negation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def MCPhaseGate(self, params: MCPhaseGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Subtractor(self, params: Subtractor, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def HartreeFock(self, params: HartreeFock, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Finance(self, params: Finance, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Identity(self, params: Identity, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Mcu(self, params: Mcu, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def HypercubeEntangler(self, params: HypercubeEntangler, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def C3XGate(self, params: C3XGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def UCC(self, params: UCC, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def CYGate(self, params: CYGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def YGate(self, params: YGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def CZGate(self, params: CZGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def UGate(self, params: UGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def RandomizedBenchmarking(self, params: RandomizedBenchmarking, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def PhaseEstimation(self, params: PhaseEstimation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def InequalityMixer(self, params: InequalityMixer, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Sign(self, params: Sign, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def CommutingPauliExponentiation(self, params: CommutingPauliExponentiation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Equal(self, params: Equal, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def AmplitudeLoading(self, params: AmplitudeLoading, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def ComputationalBasisStatePreparation(self, params: ComputationalBasisStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def GridEntangler(self, params: GridEntangler, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def RXGate(self, params: RXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def WStatePreparation(self, params: WStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Mcx(self, params: Mcx, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def RYYGate(self, params: RYYGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def SwapGate(self, params: SwapGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def BellStatePreparation(self, params: BellStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def GroverOperator(self, params: GroverOperator, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def AmplitudeEstimation(self, params: AmplitudeEstimation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def PiecewiseLinearRotationAmplitudeLoading(self, params: PiecewiseLinearRotationAmplitudeLoading, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def QFT(self, params: QFT, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def YGate(self, params: YGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def TwoDimensionalEntangler(self, params: TwoDimensionalEntangler, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def ZGate(self, params: ZGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def HGate(self, params: HGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def IGate(self, params: IGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def StatePropagator(self, params: StatePropagator, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def CHGate(self, params: CHGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def CustomFunction(self, params: CustomFunction, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def CSXGate(self, params: CSXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def SGate(self, params: SGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def SdgGate(self, params: SdgGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def RZGate(self, params: RZGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def SXGate(self, params: SXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def IGate(self, params: IGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def RZZGate(self, params: RZZGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def SuzukiTrotter(self, params: SuzukiTrotter, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def SXGate(self, params: SXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def SdgGate(self, params: SdgGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def SXdgGate(self, params: SXdgGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def GHZStatePreparation(self, params: GHZStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def TGate(self, params: TGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def CommutingPauliExponentiation(self, params: CommutingPauliExponentiation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Exponentiation(self, params: Exponentiation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def ExponentialStatePreparation(self, params: ExponentialStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def PiecewiseLinearRotationAmplitudeLoading(self, params: PiecewiseLinearRotationAmplitudeLoading, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Identity(self, params: Identity, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Equal(self, params: Equal, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def NotEqual(self, params: NotEqual, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Mcu(self, params: Mcu, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def GreaterThan(self, params: GreaterThan, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def GreaterEqual(self, params: GreaterEqual, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def LessThan(self, params: LessThan, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def SwapGate(self, params: SwapGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def LessEqual(self, params: LessEqual, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def RYGate(self, params: RYGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def TdgGate(self, params: TdgGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def iSwapGate(self, params: iSwapGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def QDrift(self, params: QDrift, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def CustomOracle(self, params: CustomOracle, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def BitwiseXor(self, params: BitwiseXor, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def Modulo(self, params: Modulo, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def LogicalOr(self, params: LogicalOr, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def FinanceModels(self, params: FinanceModels, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def GroverDiffuser(self, params: GroverDiffuser, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def WStatePreparation(self, params: WStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def InequalityMixer(self, params: InequalityMixer, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def CustomFunction(self, params: CustomFunction, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def RangeMixer(self, params: RangeMixer, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Arithmetic(self, params: Arithmetic, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def CHGate(self, params: CHGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def HardwareEfficientAnsatz(self, params: HardwareEfficientAnsatz, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def CSXGate(self, params: CSXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def BitwiseInvert(self, params: BitwiseInvert, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def CustomOracle(self, params: CustomOracle, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def UnitaryGate(self, params: UnitaryGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Negation(self, params: Negation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def HadamardTransform(self, params: HadamardTransform, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def TdgGate(self, params: TdgGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def Multiplier(self, params: Multiplier, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def PhaseEstimation(self, params: PhaseEstimation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def StatePreparation(self, params: StatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Subtractor(self, params: Subtractor, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def Min(self, params: Min, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def BitwiseInvert(self, params: BitwiseInvert, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def Max(self, params: Max, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def HypercubeEntangler(self, params: HypercubeEntangler, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def RXGate(self, params: RXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def GroverDiffuser(self, params: GroverDiffuser, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def LinearPauliRotations(self, params: LinearPauliRotations, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def RangeMixer(self, params: RangeMixer, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Arithmetic(self, params: Arithmetic, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def FinanceModels(self, params: FinanceModels, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def RXXGate(self, params: RXXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def PiecewiseLinearAmplitudeLoading(self, params: PiecewiseLinearAmplitudeLoading, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def CCXGate(self, params: CCXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def LogicalAnd(self, params: LogicalAnd, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def FinancePayoff(self, params: FinancePayoff, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def CRYGate(self, params: CRYGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def StatePropagator(self, params: StatePropagator, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def CRXGate(self, params: CRXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Sign(self, params: Sign, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Adder(self, params: Adder, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def BitwiseAnd(self, params: BitwiseAnd, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def LinearGCI(self, params: LinearGCI, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def C4XGate(self, params: C4XGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def HVA(self, params: HVA, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def iSwapGate(self, params: iSwapGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def QSVMFeatureMap(self, params: QSVMFeatureMap, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def CyclicShift(self, params: CyclicShift, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def QDrift(self, params: QDrift, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def WeightedAdder(self, params: WeightedAdder, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def UniformDistributionStatePreparation(self, params: UniformDistributionStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Mcx(self, params: Mcx, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def GHZStatePreparation(self, params: GHZStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def BellStatePreparation(self, params: BellStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def GroverOperator(self, params: GroverOperator, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def TwoDimensionalEntangler(self, params: TwoDimensionalEntangler, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def RShift(self, params: RShift, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def AmplitudeEstimation(self, params: AmplitudeEstimation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def RYYGate(self, params: RYYGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def CRZGate(self, params: CRZGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def PhaseGate(self, params: PhaseGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def CXGate(self, params: CXGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
     def ArithmeticOracle(self, params: ArithmeticOracle, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def Finance(self, params: Finance, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def ComputationalBasisStatePreparation(self, params: ComputationalBasisStatePreparation, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def LinearPauliRotations(self, params: LinearPauliRotations, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def UGate(self, params: UGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def CPhaseGate(self, params: CPhaseGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def PiecewiseLinearAmplitudeLoading(self, params: PiecewiseLinearAmplitudeLoading, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
-    def XGate(self, params: XGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def WeightedAdder(self, params: WeightedAdder, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def UCC(self, params: UCC, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def C4XGate(self, params: C4XGate, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def Adder(self, params: Adder, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...
+    def BitwiseOr(self, params: BitwiseOr, in_wires: Optional[Dict[str, Wire]] = None) -> Dict[str, Wire]: ...

classiq/qmod/declaration_inferrer.py

@@ -36,13 +36,17 @@ OPERAND_ARG_NAME = "arg{i}"
 
 
 def _version_portable_get_args(py_type: type) -> tuple:
+    if get_origin(py_type) is None:
+        return tuple()
     if sys.version_info[0:2] < (3, 10):
         return get_args(py_type)  # The result of __class_getitem__
     else:
         return get_args(py_type)[0]
 
 
-def _python_type_to_qmod(py_type: type) -> Optional[ConcreteClassicalType]:
+def _python_type_to_qmod(
+    py_type: type, *, qmodule: ModelStateContainer
+) -> Optional[ConcreteClassicalType]:
     if py_type == int:
         return Integer()
     elif py_type == float:
@@ -50,7 +54,9 @@ def _python_type_to_qmod(py_type: type) -> Optional[ConcreteClassicalType]:
     elif py_type == bool:
         return Bool()
     elif get_origin(py_type) == list:
-        return ClassicalList(element_type=_python_type_to_qmod(get_args(py_type)[0]))
+        return ClassicalList(
+            element_type=_python_type_to_qmod(get_args(py_type)[0], qmodule=qmodule)
+        )
     elif get_origin(py_type) == Array:
         array_args = _version_portable_get_args(py_type)
         if len(array_args) != 2:
@@ -58,36 +64,41 @@ def _python_type_to_qmod(py_type: type) -> Optional[ConcreteClassicalType]:
                 "Array accepts two generic parameters in the form 'Array[<element-type>, <size>]'"
             )
         return ClassicalArray(
-            element_type=_python_type_to_qmod(array_args[0]),
+            element_type=_python_type_to_qmod(array_args[0], qmodule=qmodule),
             size=get_type_hint_expr(array_args[1]),
         )
     elif inspect.isclass(py_type) and issubclass(py_type, QStructBase):
-        _add_qmod_struct(py_type)
+        _add_qmod_struct(py_type, qmodule=qmodule)
         return Struct(name=py_type.__name__)
     return None
 
 
-def _add_qmod_struct(py_type: Type[QStructBase]) -> None:
+def _add_qmod_struct(
+    py_type: Type[QStructBase], *, qmodule: ModelStateContainer
+) -> None:
     if (
         py_type.__name__ in StructDeclaration.BUILTIN_STRUCT_DECLARATIONS
-        or py_type.__name__ in ModelStateContainer.TYPE_DECLS.keys()
+        or py_type.__name__ in qmodule.type_decls.keys()
     ):
         return
 
-    ModelStateContainer.TYPE_DECLS[py_type.__name__] = StructDeclaration(
+    qmodule.type_decls[py_type.__name__] = StructDeclaration(
         name=py_type.__name__,
         variables={
-            f.name: _python_type_to_qmod(f.type) for f in dataclasses.fields(py_type)
+            f.name: _python_type_to_qmod(f.type, qmodule=qmodule)
+            for f in dataclasses.fields(py_type)
         },
     )
 
 
-def _extract_param_decl(name: str, py_type: Any) -> ClassicalParameterDeclaration:
+def _extract_param_decl(
+    name: str, py_type: Any, *, qmodule: ModelStateContainer
+) -> ClassicalParameterDeclaration:
     if len(get_args(py_type)) != 1:
         raise ValueError("QParam takes exactly one generic argument")
     py_type = get_args(py_type)[0]
     return ClassicalParameterDeclaration(
-        name=name, classical_type=_python_type_to_qmod(py_type)
+        name=name, classical_type=_python_type_to_qmod(py_type, qmodule=qmodule)
     )
 
 
@@ -104,35 +115,43 @@ def _extract_port_decl(name: str, py_type: Any) -> PortDeclaration:
     )
 
 
-def _extract_operand_decl(name: str, py_type: Any) -> QuantumOperandDeclaration:
+def _extract_operand_decl(
+    name: str, py_type: Any, qmodule: ModelStateContainer
+) -> QuantumOperandDeclaration:
     qc_args = _version_portable_get_args(py_type)
     arg_dict = {
         OPERAND_ARG_NAME.format(i=i): arg_type for i, arg_type in enumerate(qc_args)
     }
     return QuantumOperandDeclaration(
         name=name,
-        positional_arg_declarations=_extract_positional_args(arg_dict),
+        positional_arg_declarations=_extract_positional_args(arg_dict, qmodule=qmodule),
     )
 
 
-def _extract_positional_args(args: Dict[str, Any]) -> List[PositionalArg]:
+def _extract_positional_args(
+    args: Dict[str, Any], qmodule: ModelStateContainer
+) -> List[PositionalArg]:
     result: List[PositionalArg] = []
     for name, py_type in args.items():
         if name == "return":
             continue
         name = unmangle_keyword(name)
         if get_origin(py_type) is QParam:
-            result.append(_extract_param_decl(name, py_type))
+            result.append(_extract_param_decl(name, py_type, qmodule=qmodule))
         elif QVar.from_type_hint(py_type) is not None:
             result.append(_extract_port_decl(name, py_type))
         else:
-            assert get_origin(py_type) is QCallable
-            result.append(_extract_operand_decl(name, py_type))
+            assert get_origin(py_type) or py_type is QCallable
+            result.append(_extract_operand_decl(name, py_type, qmodule=qmodule))
     return result
 
 
-def infer_func_decl(py_func: Callable) -> QuantumFunctionDeclaration:
+def infer_func_decl(
+    py_func: Callable, qmodule: ModelStateContainer
+) -> QuantumFunctionDeclaration:
     return QuantumFunctionDeclaration(
         name=unmangle_keyword(py_func.__name__),
-        positional_arg_declarations=_extract_positional_args(py_func.__annotations__),
+        positional_arg_declarations=_extract_positional_args(
+            py_func.__annotations__, qmodule=qmodule
+        ),
     )

classiq/qmod/model_state_container.py

@@ -1,4 +1,4 @@
-from typing import ClassVar, Dict
+from typing import Dict
 
 from classiq.interface.model.native_function_definition import NativeFunctionDefinition
 
@@ -6,5 +6,8 @@ from classiq import StructDeclaration
 
 
 class ModelStateContainer:
-    TYPE_DECLS: ClassVar[Dict[str, StructDeclaration]]
-    NATIVE_DEFS: ClassVar[Dict[str, NativeFunctionDefinition]]
+    type_decls: Dict[str, StructDeclaration]
+    native_defs: Dict[str, NativeFunctionDefinition]
+
+
+QMODULE = ModelStateContainer()