cirq-core 1.4.0.dev20240202192938__py3-none-any.whl → 1.4.0.dev20240203002706__py3-none-any.whl

cirq/_version.py

@@ -1 +1 @@
-__version__ = "1.4.0.dev20240202192938"
+__version__ = "1.4.0.dev20240203002706"

cirq/sim/simulation_product_state.py

@@ -63,12 +63,19 @@ class SimulationProductState(
         return self._split_untangled_states
 
     def create_merged_state(self) -> TSimulationState:
+        merged_state = self.sim_states[None]
         if not self.split_untangled_states:
-            return self.sim_states[None]
-        final_args = self.sim_states[None]
-        for args in set([self.sim_states[k] for k in self.sim_states.keys() if k is not None]):
-            final_args = final_args.kronecker_product(args)
-        return final_args.transpose_to_qubit_order(self.qubits)
+            return merged_state
+        extra_states = set([self.sim_states[k] for k in self.sim_states.keys() if k is not None])
+        if not extra_states:
+            return merged_state
+
+        # This comes from a member variable so we need to copy it if we're going to modify inplace
+        # before returning. We're not running a step currently, so no need to copy buffers.
+        merged_state = merged_state.copy(deep_copy_buffers=False)
+        for state in extra_states:
+            merged_state.kronecker_product(state, inplace=True)
+        return merged_state.transpose_to_qubit_order(self.qubits, inplace=True)
 
     def _act_on_fallback_(
         self, action: Any, qubits: Sequence['cirq.Qid'], allow_decompose: bool = True
@@ -106,7 +113,7 @@ class SimulationProductState(
             if op_args_opt is None:
                 op_args_opt = self.sim_states[q]
             elif q not in op_args_opt.qubits:
-                op_args_opt = op_args_opt.kronecker_product(self.sim_states[q])
+                op_args_opt.kronecker_product(self.sim_states[q], inplace=True)
         op_args = op_args_opt or self.sim_states[None]
 
         # (Backfill the args map with the new value)
@@ -123,7 +130,7 @@ class SimulationProductState(
         ):
             for q in qubits:
                 if op_args.allows_factoring and len(op_args.qubits) > 1:
-                    q_args, op_args = op_args.factor((q,), validate=False)
+                    q_args, _ = op_args.factor((q,), validate=False, inplace=True)
                     self._sim_states[q] = q_args
 
             # (Backfill the args map with the new value)

cirq/transformers/optimize_for_target_gateset.py

@@ -14,7 +14,7 @@
 
 """Transformers to rewrite a circuit using gates from a given target gateset."""
 
-from typing import Optional, Callable, Hashable, Sequence, TYPE_CHECKING
+from typing import Optional, Callable, Hashable, Sequence, TYPE_CHECKING, Union
 
 from cirq import circuits
 from cirq.protocols import decompose_protocol as dp
@@ -102,19 +102,29 @@ def optimize_for_target_gateset(
     context: Optional['cirq.TransformerContext'] = None,
     gateset: Optional['cirq.CompilationTargetGateset'] = None,
     ignore_failures: bool = True,
+    max_num_passes: Union[int, None] = 1,
 ) -> 'cirq.Circuit':
     """Transforms the given circuit into an equivalent circuit using gates accepted by `gateset`.
 
+    Repeat max_num_passes times or when `max_num_passes=None` until no further changes can be done
     1. Run all `gateset.preprocess_transformers`
     2. Convert operations using built-in cirq decompose + `gateset.decompose_to_target_gateset`.
     3. Run all `gateset.postprocess_transformers`
 
+    Note:
+        The optimizer is a heuristic and may not produce optimal results even with
+        max_num_passes=None. The preprocessors and postprocessors of the gate set
+        as well as their order yield different results.
+
+
     Args:
         circuit: Input circuit to transform. It will not be modified.
         context: `cirq.TransformerContext` storing common configurable options for transformers.
         gateset: Target gateset, which should be an instance of `cirq.CompilationTargetGateset`.
         ignore_failures: If set, operations that fail to convert are left unchanged. If not set,
             conversion failures raise a ValueError.
+        max_num_passes: The maximum number of passes to do. A value of `None` means to keep
+            iterating until no more changes happen to the number of moments or operations.
 
     Returns:
         An equivalent circuit containing gates accepted by `gateset`.
@@ -126,20 +136,32 @@ def optimize_for_target_gateset(
         return _decompose_operations_to_target_gateset(
             circuit, context=context, ignore_failures=ignore_failures
         )
-
-    for transformer in gateset.preprocess_transformers:
-        circuit = transformer(circuit, context=context)
-
-    circuit = _decompose_operations_to_target_gateset(
-        circuit,
-        context=context,
-        gateset=gateset,
-        decomposer=gateset.decompose_to_target_gateset,
-        ignore_failures=ignore_failures,
-        tags_to_decompose=(gateset._intermediate_result_tag,),
-    )
-
-    for transformer in gateset.postprocess_transformers:
-        circuit = transformer(circuit, context=context)
-
+    if isinstance(max_num_passes, int):
+        _outerloop = lambda: range(max_num_passes)
+    else:
+
+        def _outerloop():
+            while True:
+                yield 0
+
+    initial_num_moments, initial_num_ops = len(circuit), sum(1 for _ in circuit.all_operations())
+    for _ in _outerloop():
+        for transformer in gateset.preprocess_transformers:
+            circuit = transformer(circuit, context=context)
+        circuit = _decompose_operations_to_target_gateset(
+            circuit,
+            context=context,
+            gateset=gateset,
+            decomposer=gateset.decompose_to_target_gateset,
+            ignore_failures=ignore_failures,
+            tags_to_decompose=(gateset._intermediate_result_tag,),
+        )
+        for transformer in gateset.postprocess_transformers:
+            circuit = transformer(circuit, context=context)
+
+        num_moments, num_ops = len(circuit), sum(1 for _ in circuit.all_operations())
+        if (num_moments, num_ops) == (initial_num_moments, initial_num_ops):
+            # Stop early. No further optimizations can be done.
+            break
+        initial_num_moments, initial_num_ops = num_moments, num_ops
     return circuit.unfreeze(copy=False)

cirq/transformers/optimize_for_target_gateset_test.py

@@ -12,6 +12,8 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
+from typing import Union
+
 import cirq
 from cirq.protocols.decompose_protocol import DecomposeResult
 from cirq.transformers.optimize_for_target_gateset import _decompose_operations_to_target_gateset
@@ -243,3 +245,151 @@ def test_optimize_for_target_gateset_deep():
 1: ───#2───────────────────────────────────────────────────────────────────────────
 ''',
     )
+
+
+@pytest.mark.parametrize('max_num_passes', [2, None])
+def test_optimize_for_target_gateset_multiple_passes(max_num_passes: Union[int, None]):
+    gateset = cirq.CZTargetGateset()
+
+    input_circuit = cirq.Circuit(
+        [
+            cirq.Moment(
+                cirq.X(cirq.LineQubit(1)),
+                cirq.X(cirq.LineQubit(2)),
+                cirq.X(cirq.LineQubit(3)),
+                cirq.X(cirq.LineQubit(6)),
+            ),
+            cirq.Moment(
+                cirq.H(cirq.LineQubit(0)),
+                cirq.H(cirq.LineQubit(1)),
+                cirq.H(cirq.LineQubit(2)),
+                cirq.H(cirq.LineQubit(3)),
+                cirq.H(cirq.LineQubit(4)),
+                cirq.H(cirq.LineQubit(5)),
+                cirq.H(cirq.LineQubit(6)),
+            ),
+            cirq.Moment(
+                cirq.H(cirq.LineQubit(1)), cirq.H(cirq.LineQubit(3)), cirq.H(cirq.LineQubit(5))
+            ),
+            cirq.Moment(
+                cirq.CZ(cirq.LineQubit(0), cirq.LineQubit(1)),
+                cirq.CZ(cirq.LineQubit(2), cirq.LineQubit(3)),
+                cirq.CZ(cirq.LineQubit(4), cirq.LineQubit(5)),
+            ),
+            cirq.Moment(
+                cirq.CZ(cirq.LineQubit(2), cirq.LineQubit(1)),
+                cirq.CZ(cirq.LineQubit(4), cirq.LineQubit(3)),
+                cirq.CZ(cirq.LineQubit(6), cirq.LineQubit(5)),
+            ),
+        ]
+    )
+    desired_circuit = cirq.Circuit.from_moments(
+        cirq.Moment(
+            cirq.PhasedXZGate(axis_phase_exponent=0.5, x_exponent=-0.5, z_exponent=1.0).on(
+                cirq.LineQubit(4)
+            )
+        ),
+        cirq.Moment(cirq.CZ(cirq.LineQubit(4), cirq.LineQubit(5))),
+        cirq.Moment(
+            cirq.PhasedXZGate(axis_phase_exponent=-1.0, x_exponent=1, z_exponent=0).on(
+                cirq.LineQubit(1)
+            ),
+            cirq.PhasedXZGate(axis_phase_exponent=0.5, x_exponent=-0.5, z_exponent=1.0).on(
+                cirq.LineQubit(0)
+            ),
+            cirq.PhasedXZGate(axis_phase_exponent=-1.0, x_exponent=1, z_exponent=0).on(
+                cirq.LineQubit(3)
+            ),
+            cirq.PhasedXZGate(axis_phase_exponent=-0.5, x_exponent=0.5, z_exponent=0.0).on(
+                cirq.LineQubit(2)
+            ),
+        ),
+        cirq.Moment(
+            cirq.CZ(cirq.LineQubit(0), cirq.LineQubit(1)),
+            cirq.CZ(cirq.LineQubit(2), cirq.LineQubit(3)),
+        ),
+        cirq.Moment(
+            cirq.CZ(cirq.LineQubit(2), cirq.LineQubit(1)),
+            cirq.CZ(cirq.LineQubit(4), cirq.LineQubit(3)),
+        ),
+        cirq.Moment(
+            cirq.PhasedXZGate(axis_phase_exponent=-0.5, x_exponent=0.5, z_exponent=0.0).on(
+                cirq.LineQubit(6)
+            )
+        ),
+        cirq.Moment(cirq.CZ(cirq.LineQubit(6), cirq.LineQubit(5))),
+    )
+    got = cirq.optimize_for_target_gateset(
+        input_circuit, gateset=gateset, max_num_passes=max_num_passes
+    )
+    cirq.testing.assert_same_circuits(got, desired_circuit)
+
+
+@pytest.mark.parametrize('max_num_passes', [2, None])
+def test_optimize_for_target_gateset_multiple_passes_dont_preserve_moment_structure(
+    max_num_passes: Union[int, None]
+):
+    gateset = cirq.CZTargetGateset(preserve_moment_structure=False)
+
+    input_circuit = cirq.Circuit(
+        [
+            cirq.Moment(
+                cirq.X(cirq.LineQubit(1)),
+                cirq.X(cirq.LineQubit(2)),
+                cirq.X(cirq.LineQubit(3)),
+                cirq.X(cirq.LineQubit(6)),
+            ),
+            cirq.Moment(
+                cirq.H(cirq.LineQubit(0)),
+                cirq.H(cirq.LineQubit(1)),
+                cirq.H(cirq.LineQubit(2)),
+                cirq.H(cirq.LineQubit(3)),
+                cirq.H(cirq.LineQubit(4)),
+                cirq.H(cirq.LineQubit(5)),
+                cirq.H(cirq.LineQubit(6)),
+            ),
+            cirq.Moment(
+                cirq.H(cirq.LineQubit(1)), cirq.H(cirq.LineQubit(3)), cirq.H(cirq.LineQubit(5))
+            ),
+            cirq.Moment(
+                cirq.CZ(cirq.LineQubit(0), cirq.LineQubit(1)),
+                cirq.CZ(cirq.LineQubit(2), cirq.LineQubit(3)),
+                cirq.CZ(cirq.LineQubit(4), cirq.LineQubit(5)),
+            ),
+            cirq.Moment(
+                cirq.CZ(cirq.LineQubit(2), cirq.LineQubit(1)),
+                cirq.CZ(cirq.LineQubit(4), cirq.LineQubit(3)),
+                cirq.CZ(cirq.LineQubit(6), cirq.LineQubit(5)),
+            ),
+        ]
+    )
+    desired_circuit = cirq.Circuit(
+        cirq.PhasedXZGate(axis_phase_exponent=0.5, x_exponent=-0.5, z_exponent=1.0).on(
+            cirq.LineQubit(4)
+        ),
+        cirq.PhasedXZGate(axis_phase_exponent=-1.0, x_exponent=1, z_exponent=0).on(
+            cirq.LineQubit(1)
+        ),
+        cirq.PhasedXZGate(axis_phase_exponent=-0.5, x_exponent=0.5, z_exponent=0.0).on(
+            cirq.LineQubit(2)
+        ),
+        cirq.PhasedXZGate(axis_phase_exponent=0.5, x_exponent=-0.5, z_exponent=1.0).on(
+            cirq.LineQubit(0)
+        ),
+        cirq.PhasedXZGate(axis_phase_exponent=-1.0, x_exponent=1, z_exponent=0).on(
+            cirq.LineQubit(3)
+        ),
+        cirq.PhasedXZGate(axis_phase_exponent=-0.5, x_exponent=0.5, z_exponent=0.0).on(
+            cirq.LineQubit(6)
+        ),
+        cirq.CZ(cirq.LineQubit(4), cirq.LineQubit(5)),
+        cirq.CZ(cirq.LineQubit(0), cirq.LineQubit(1)),
+        cirq.CZ(cirq.LineQubit(2), cirq.LineQubit(3)),
+        cirq.CZ(cirq.LineQubit(2), cirq.LineQubit(1)),
+        cirq.CZ(cirq.LineQubit(4), cirq.LineQubit(3)),
+        cirq.CZ(cirq.LineQubit(6), cirq.LineQubit(5)),
+    )
+    got = cirq.optimize_for_target_gateset(
+        input_circuit, gateset=gateset, max_num_passes=max_num_passes
+    )
+    cirq.testing.assert_same_circuits(got, desired_circuit)

cirq/transformers/target_gatesets/compilation_target_gateset.py

@@ -14,7 +14,7 @@
 
 """Base class for creating custom target gatesets which can be used for compilation."""
 
-from typing import Optional, List, Hashable, TYPE_CHECKING
+from typing import Optional, List, Hashable, TYPE_CHECKING, Union, Type
 import abc
 
 from cirq import circuits, ops, protocols, transformers
@@ -80,6 +80,27 @@ class CompilationTargetGateset(ops.Gateset, metaclass=abc.ABCMeta):
     which can transform any given circuit to contain gates accepted by this gateset.
     """
 
+    def __init__(
+        self,
+        *gates: Union[Type['cirq.Gate'], 'cirq.Gate', 'cirq.GateFamily'],
+        name: Optional[str] = None,
+        unroll_circuit_op: bool = True,
+        preserve_moment_structure: bool = True,
+    ):
+        """Initializes CompilationTargetGateset.
+
+        Args:
+            *gates: A list of `cirq.Gate` subclasses / `cirq.Gate` instances /
+                `cirq.GateFamily` instances to initialize the Gateset.
+            name: (Optional) Name for the Gateset. Useful for description.
+            unroll_circuit_op: If True, `cirq.CircuitOperation` is recursively
+                validated by validating the underlying `cirq.Circuit`.
+            preserve_moment_structure: Whether to preserve the moment structure of the
+                circuit during compilation or not.
+        """
+        super().__init__(*gates, name=name, unroll_circuit_op=unroll_circuit_op)
+        self._preserve_moment_structure = preserve_moment_structure
+
     @property
     @abc.abstractmethod
     def num_qubits(self) -> int:
@@ -140,11 +161,14 @@ class CompilationTargetGateset(ops.Gateset, metaclass=abc.ABCMeta):
     @property
     def postprocess_transformers(self) -> List['cirq.TRANSFORMER']:
         """List of transformers which should be run after decomposing individual operations."""
-        return [
+        processors: List['cirq.TRANSFORMER'] = [
             merge_single_qubit_gates.merge_single_qubit_moments_to_phxz,
             transformers.drop_negligible_operations,
             transformers.drop_empty_moments,
         ]
+        if not self._preserve_moment_structure:
+            processors.append(transformers.stratified_circuit)
+        return processors
 
 
 class TwoQubitCompilationTargetGateset(CompilationTargetGateset):

cirq/transformers/target_gatesets/cz_gateset.py

@@ -48,6 +48,7 @@ class CZTargetGateset(compilation_target_gateset.TwoQubitCompilationTargetGatese
         atol: float = 1e-8,
         allow_partial_czs: bool = False,
         additional_gates: Sequence[Union[Type['cirq.Gate'], 'cirq.Gate', 'cirq.GateFamily']] = (),
+        preserve_moment_structure: bool = True,
     ) -> None:
         """Initializes CZTargetGateset
 
@@ -57,6 +58,8 @@ class CZTargetGateset(compilation_target_gateset.TwoQubitCompilationTargetGatese
              `cirq.CZ`, are part of this gateset.
             additional_gates: Sequence of additional gates / gate families which should also
               be "accepted" by this gateset. This is empty by default.
+            preserve_moment_structure: Whether to preserve the moment structure of the
+                circuit during compilation or not.
         """
         super().__init__(
             ops.CZPowGate if allow_partial_czs else ops.CZ,
@@ -65,6 +68,7 @@ class CZTargetGateset(compilation_target_gateset.TwoQubitCompilationTargetGatese
             ops.GlobalPhaseGate,
             *additional_gates,
             name='CZPowTargetGateset' if allow_partial_czs else 'CZTargetGateset',
+            preserve_moment_structure=preserve_moment_structure,
         )
         self.additional_gates = tuple(
             g if isinstance(g, ops.GateFamily) else ops.GateFamily(gate=g) for g in additional_gates

{cirq_core-1.4.0.dev20240202192938.dist-info → cirq_core-1.4.0.dev20240203002706.dist-info}/METADATA

@@ -1,6 +1,6 @@
 Metadata-Version: 2.1
 Name: cirq-core
-Version: 1.4.0.dev20240202192938
+Version: 1.4.0.dev20240203002706
 Summary: A framework for creating, editing, and invoking Noisy Intermediate Scale Quantum (NISQ) circuits.
 Home-page: http://github.com/quantumlib/cirq
 Author: The Cirq Developers

{cirq_core-1.4.0.dev20240202192938.dist-info → cirq_core-1.4.0.dev20240203002706.dist-info}/RECORD

@@ -4,7 +4,7 @@ cirq/_compat_test.py,sha256=Qq3ZcfgD-Nb81cEppQdJqhAyrVqXKtfXZYGXT0p-Wh0,34718
 cirq/_doc.py,sha256=yDyWUD_2JDS0gShfGRb-rdqRt9-WeL7DhkqX7np0Nko,2879
 cirq/_import.py,sha256=p9gMHJscbtDDkfHOaulvd3Aer0pwUF5AXpL89XR8dNw,8402
 cirq/_import_test.py,sha256=6K_v0riZJXOXUphHNkGA8MY-JcmGlezFaGmvrNhm3OQ,1015
-cirq/_version.py,sha256=84b6bw5jqq4Ijc7eXTPenuuGmlY3H83Q1Ga1U4DT8tA,40
+cirq/_version.py,sha256=_oK0Ij5sCSjO6t24BdebXRvmtGUL2E0rip7ZvXy7tZQ,40
 cirq/_version_test.py,sha256=yYS6xm5-nuBRQJa9R3n41WdvFtVyY7Lb5Q8bea3VgBI,133
 cirq/conftest.py,sha256=X7yLFL8GLhg2CjPw0hp5e_dGASfvHx1-QT03aUbhKJw,1168
 cirq/json_resolver_cache.py,sha256=S0HaPOCUIck-vNSQlS6KxnQtle6w-2dGuSxkUbJQY9Y,13168
@@ -887,7 +887,7 @@ cirq/sim/density_matrix_utils.py,sha256=9Fbzh0c9hzwEff383YwRit2K_tvlpT4Vyq3rjLij
 cirq/sim/density_matrix_utils_test.py,sha256=ZJpeolcie9rSIvrWhxcGhzr6Ojyn8me00rfrDwn4y-M,14225
 cirq/sim/mux.py,sha256=ysXjeMddmNaaG3twkGBqJqLLQa_Pm-Y9c6yeGLpYbxo,12469
 cirq/sim/mux_test.py,sha256=uJUUnE9qg10rF0pGWo_bAWhp8JzsmOGW4hFRZeTKwdM,13680
-cirq/sim/simulation_product_state.py,sha256=3qEz1mEsIcWiG_i1WVNTs_CVzN-nO0XWdvSdIvL9s0A,6699
+cirq/sim/simulation_product_state.py,sha256=u0GLCgPAmdMhuoVCkQu2rwRrsM3DBQFsYJUXae-2ETs,7076
 cirq/sim/simulation_product_state_test.py,sha256=ajfQcf5QpF40FndpoKetNluRfq6ds91buKFxiTafoXg,8905
 cirq/sim/simulation_state.py,sha256=ARvnXjw6n-GqPV07ZQMC7rLEgm4GDNhdTUItXRZ-TeU,12626
 cirq/sim/simulation_state_base.py,sha256=95FDt2omBxU-3KXwii6KCKMC9MtXRc1ZtnLZRE8vI0o,4196
@@ -1026,8 +1026,8 @@ cirq/transformers/merge_k_qubit_gates.py,sha256=dUsswQOIHfbb6Lu37fecgrpT6_45zmDE
 cirq/transformers/merge_k_qubit_gates_test.py,sha256=0zp3FZpoNqUstrHxb7mGRQ79Ld6mV4a_inNqwfw8Wjw,14341
 cirq/transformers/merge_single_qubit_gates.py,sha256=NRREV4Z6Ptc3mZnOUgzQePdj4H0aix17WOUwZUB7iQ8,5826
 cirq/transformers/merge_single_qubit_gates_test.py,sha256=0U5oitYfOIka1hUOn1Cv8zVK1Uo34DVaOnGMgqfRg4Q,9966
-cirq/transformers/optimize_for_target_gateset.py,sha256=2f93hEA_9vXbutkoOtzBTk_bjKLfdLWqsuue4-w4Rp0,6005
-cirq/transformers/optimize_for_target_gateset_test.py,sha256=G73RDFhdhXqpXMTEPyl_t5huhcyY1u6XqOToVEFpVJA,13848
+cirq/transformers/optimize_for_target_gateset.py,sha256=MxhFsCm2XgW3gdpNW4NGVmz1VdQvzKdNNCtVZDuZiVE,7229
+cirq/transformers/optimize_for_target_gateset_test.py,sha256=a2z7y7sgeQ2l2xo15b9xMuaSEmNB9_Z9vUyt8fIVXF4,19641
 cirq/transformers/qubit_management_transformers.py,sha256=A7Mweu9ElLSCsy_atmgFbYlzOFXKhct5gQ5YNTjjaVU,9430
 cirq/transformers/qubit_management_transformers_test.py,sha256=GGuZ4uxtFI59t9diW67_J17XQdBu9NFZjOHeMAHmm8Y,13991
 cirq/transformers/stratify.py,sha256=EEcXD6PEdHTZAoaAfaHnsw3Hf1SftbIl19hZOU_ZnXE,10469
@@ -1082,9 +1082,9 @@ cirq/transformers/routing/route_circuit_cqc_test.py,sha256=gKGIBwftHR6CkUGdZ5z8t
 cirq/transformers/routing/visualize_routed_circuit.py,sha256=cKYvswXnNIQJ0Okketzkpy9Tw0Z_Y2DaG4cJmK9ouHY,2917
 cirq/transformers/routing/visualize_routed_circuit_test.py,sha256=MHL0DTdWCTsS1ayXlaJmBor8UbXo94lhgPKDXc97lRw,5040
 cirq/transformers/target_gatesets/__init__.py,sha256=Sy572ZdTcImWcFinPq53rwf1Yxm9S3tpp4mjSCx-_T8,991
-cirq/transformers/target_gatesets/compilation_target_gateset.py,sha256=XSHBerLgJVKL8gLYVSxSQ42zYr48GiYg2-m_SlGV5O4,12377
+cirq/transformers/target_gatesets/compilation_target_gateset.py,sha256=EarJ3_dIkpKzPVGd8898o1_kVH9ISNS8KT2PPUPq6Zk,13535
 cirq/transformers/target_gatesets/compilation_target_gateset_test.py,sha256=-3pTUXcNvO-2OigtNco4DtF9jAaKu6SnnXBzlOmhxKU,9538
-cirq/transformers/target_gatesets/cz_gateset.py,sha256=lEHuFq59pK3mS6XYkt8eLtyMvATZzRPWSKYF6GIrYXg,4499
+cirq/transformers/target_gatesets/cz_gateset.py,sha256=5YJVD0uyb6w848_x8Qg5nLYMKyylyWmgDBNtm725oAU,4750
 cirq/transformers/target_gatesets/cz_gateset_test.py,sha256=M5rhQPt2XGrX26cvyknTIFGLBqa2jPgg4D0z8rhFogU,10584
 cirq/transformers/target_gatesets/sqrt_iswap_gateset.py,sha256=Rtoi2xmhlk_fobf5Hwc1nDQlLtmKPcJm2FJTR8JgpN0,6278
 cirq/transformers/target_gatesets/sqrt_iswap_gateset_test.py,sha256=-Oi3b9oX-0_3U9SKAkijVO-uBy4ut4PrFnsx-yFJ9mU,14391
@@ -1148,8 +1148,8 @@ cirq/work/sampler.py,sha256=JEAeQQRF3bqlO9AkOf4XbrTATDI5f5JgyM_FAUCNxao,19751
 cirq/work/sampler_test.py,sha256=B2ZsuqGT854gQtBIAh8k0LiG9Vj5wSzcGvkxOUoTcW4,13217
 cirq/work/zeros_sampler.py,sha256=x1C7cup66a43n-3tm8QjhiqJa07qcJW10FxNp9jJ59Q,2356
 cirq/work/zeros_sampler_test.py,sha256=JIkpBBFPJe5Ba4142vzogyWyboG1Q1ZAm0UVGgOoZn8,3279
-cirq_core-1.4.0.dev20240202192938.dist-info/LICENSE,sha256=tAkwu8-AdEyGxGoSvJ2gVmQdcicWw3j1ZZueVV74M-E,11357
-cirq_core-1.4.0.dev20240202192938.dist-info/METADATA,sha256=Cmcp3U-J6pBh-aE2sh3Uc-nBEk-0s9M8rQq4lM-bqrc,2083
-cirq_core-1.4.0.dev20240202192938.dist-info/WHEEL,sha256=oiQVh_5PnQM0E3gPdiz09WCNmwiHDMaGer_elqB3coM,92
-cirq_core-1.4.0.dev20240202192938.dist-info/top_level.txt,sha256=Sz9iOxHU0IEMLSFGwiwOCaN2e9K-jFbBbtpPN1hB73g,5
-cirq_core-1.4.0.dev20240202192938.dist-info/RECORD,,
+cirq_core-1.4.0.dev20240203002706.dist-info/LICENSE,sha256=tAkwu8-AdEyGxGoSvJ2gVmQdcicWw3j1ZZueVV74M-E,11357
+cirq_core-1.4.0.dev20240203002706.dist-info/METADATA,sha256=ZCY9qeGHNT-NRK9C4lMd4mYcHfO9-jO20HR5Vcrnj5c,2083
+cirq_core-1.4.0.dev20240203002706.dist-info/WHEEL,sha256=oiQVh_5PnQM0E3gPdiz09WCNmwiHDMaGer_elqB3coM,92
+cirq_core-1.4.0.dev20240203002706.dist-info/top_level.txt,sha256=Sz9iOxHU0IEMLSFGwiwOCaN2e9K-jFbBbtpPN1hB73g,5
+cirq_core-1.4.0.dev20240203002706.dist-info/RECORD,,