angr 9.2.87__py3-none-manylinux2014_x86_64.whl → 9.2.89__py3-none-manylinux2014_x86_64.whl

angr/analyses/variable_recovery/engine_ail.py

@@ -6,6 +6,7 @@ import ailment
 import claripy
 from unique_log_filter import UniqueLogFilter
 
+from angr.utils.constants import MAX_POINTSTO_BITS
 from ...calling_conventions import SimRegArg
 from ...sim_type import SimTypeFunction
 from ...engines.light import SimEngineLightAILMixin
@@ -120,6 +121,13 @@ class SimEngineVRAIL(
             if stmt.ret_expr is not None:
                 ret_expr_bits = stmt.ret_expr.bits
 
+        if isinstance(target, ailment.Expr.Expression) and not isinstance(target, ailment.Expr.Const):
+            # this is a dynamically calculated call target
+            target_expr = self._expr(target)
+            funcaddr_typevar = target_expr.typevar
+            load_typevar = self._create_access_typevar(target_expr.typevar, False, self.arch.bytes, 0)
+            self.state.add_type_constraint(typevars.Subtype(funcaddr_typevar, load_typevar))
+
         # discover the prototype
         prototype: Optional[SimTypeFunction] = None
         if stmt.prototype is not None:
@@ -249,7 +257,9 @@ class SimEngineVRAIL(
         r = self._expr(expr.operand)
         typevar = None
         if r.typevar is not None:
-            if isinstance(r.typevar, typevars.DerivedTypeVariable) and isinstance(r.typevar.label, typevars.ConvertTo):
+            if isinstance(r.typevar, typevars.DerivedTypeVariable) and isinstance(
+                r.typevar.one_label, typevars.ConvertTo
+            ):
                 # there is already a conversion - overwrite it
                 if not isinstance(r.typevar.type_var, typeconsts.TypeConstant):
                     typevar = typevars.DerivedTypeVariable(r.typevar.type_var, typevars.ConvertTo(expr.to_bits))
@@ -264,7 +274,7 @@ class SimEngineVRAIL(
         typevar = None
         if r.typevar is not None:
             if isinstance(r.typevar, typevars.DerivedTypeVariable) and isinstance(
-                r.typevar.label, typevars.ReinterpretAs
+                r.typevar.one_label, typevars.ReinterpretAs
             ):
                 # there is already a reinterpretas - overwrite it
                 typevar = typevars.DerivedTypeVariable(
@@ -276,18 +286,27 @@ class SimEngineVRAIL(
         return RichR(self.state.top(expr.to_bits), typevar=typevar)
 
     def _ail_handle_StackBaseOffset(self, expr: ailment.Expr.StackBaseOffset):
-        typevar = self.state.stack_offset_typevars.get(expr.offset, None)
+        ref_typevar = self.state.stack_offset_typevars.get(expr.offset, None)
 
-        if typevar is None:
+        if ref_typevar is None:
             # allocate a new type variable
-            typevar = typevars.TypeVariable()
-            self.state.stack_offset_typevars[expr.offset] = typevar
+            ref_typevar = typevars.TypeVariable()
+            self.state.stack_offset_typevars[expr.offset] = ref_typevar
 
         value_v = self.state.stack_address(expr.offset)
-        richr = RichR(value_v, typevar=typevar)
-        self._ensure_variable_existence(richr, self._codeloc(), src_expr=expr)
+        richr = RichR(value_v, typevar=ref_typevar)
+        codeloc = self._codeloc()
+        var_and_offsets = self._ensure_variable_existence(richr, codeloc, src_expr=expr)
         if self._reference_spoffset:
-            self._reference(richr, self._codeloc(), src=expr)
+            self._reference(richr, codeloc, src=expr)
+        for var, off_in_var in var_and_offsets:
+            if self.state.typevars.has_type_variable_for(var, codeloc):
+                var_typevar = self.state.typevars.get_type_variable(var, codeloc)
+                load_typevar = self._create_access_typevar(
+                    ref_typevar, False, MAX_POINTSTO_BITS // 8, 0 if off_in_var is None else off_in_var
+                )
+                type_constraint = typevars.Subtype(var_typevar, load_typevar)
+                self.state.add_type_constraint(type_constraint)
 
         return richr
 

angr/analyses/variable_recovery/engine_base.py

@@ -1,4 +1,4 @@
-from typing import Optional, Set, List, Tuple, TYPE_CHECKING
+from typing import Optional, Set, List, Tuple, Union, TYPE_CHECKING
 import logging
 
 import claripy
@@ -9,6 +9,7 @@ from ...errors import SimEngineError, SimMemoryMissingError
 from ...sim_variable import SimVariable, SimStackVariable, SimRegisterVariable, SimMemoryVariable
 from ...code_location import CodeLocation
 from ..typehoon import typevars, typeconsts
+from ..typehoon.typevars import TypeVariable, DerivedTypeVariable, AddN, SubN, Load, Store
 
 if TYPE_CHECKING:
     from .variable_recovery_base import VariableRecoveryStateBase
@@ -139,11 +140,13 @@ class SimEngineVRBase(SimEngineLight):
     # Logic
     #
 
-    def _ensure_variable_existence(self, richr_addr: RichR, codeloc: CodeLocation, src_expr=None):
+    def _ensure_variable_existence(
+        self, richr_addr: RichR, codeloc: CodeLocation, src_expr=None
+    ) -> Optional[List[Tuple[SimVariable, int]]]:
         data: claripy.ast.Base = richr_addr.data
 
         if data is None:
-            return
+            return None
 
         if self.state.is_stack_address(data):
             # this is a stack address
@@ -226,7 +229,7 @@ class SimEngineVRBase(SimEngineLight):
                 existing_vars = [(variable, 0)]
 
         else:
-            return
+            return None
 
         # record all variables
         for var, offset in existing_vars:
@@ -234,6 +237,8 @@ class SimEngineVRBase(SimEngineLight):
                 offset = None
             variable_manager.record_variable(codeloc, var, offset, atom=src_expr)
 
+        return existing_vars
+
     def _reference(self, richr: RichR, codeloc: CodeLocation, src=None):
         data: claripy.ast.Base = richr.data
 
@@ -534,17 +539,11 @@ class SimEngineVRBase(SimEngineLight):
             # it's an array!
             if offset.concrete and elem_size.concrete:
                 concrete_offset = offset.concrete_value * elem_size.concrete_value
-                store_typevar = typevars.DerivedTypeVariable(
-                    typevars.DerivedTypeVariable(typevar, typevars.Store()),
-                    typevars.HasField(size * self.state.arch.byte_width, concrete_offset),
-                )
-                self.state.add_type_constraint(typevars.Existence(store_typevar))
+                store_typevar = self._create_access_typevar(typevar, True, size, concrete_offset)
+                self.state.add_type_constraint(typevars.Subtype(store_typevar, typeconsts.TopType()))
             else:
-                store_typevar = typevars.DerivedTypeVariable(
-                    typevars.DerivedTypeVariable(typevar, typevars.Store()),
-                    typevars.HasField(size * self.state.arch.byte_width, 0),
-                )
-                self.state.add_type_constraint(typevars.Existence(store_typevar))
+                store_typevar = self._create_access_typevar(typevar, True, size, 0)
+                self.state.add_type_constraint(typevars.Subtype(store_typevar, typeconsts.TopType()))
             # FIXME: This is a hack so that we can interpret the target as an array
             is_array = typevars.DerivedTypeVariable(typevar, typevars.IsArray())
             self.state.add_type_constraint(typevars.Existence(is_array))
@@ -556,11 +555,8 @@ class SimEngineVRBase(SimEngineLight):
             # it's just a variable
             # however, since it's a global address, we still treat it as writing to a location
             if data.typevar is not None:
-                store_typevar = typevars.DerivedTypeVariable(
-                    typevars.DerivedTypeVariable(typevar, typevars.Store()),
-                    typevars.HasField(size * self.state.arch.byte_width, 0),
-                )
-                self.state.add_type_constraint(typevars.Existence(store_typevar))
+                store_typevar = self._create_access_typevar(typevar, True, size, 0)
+                self.state.add_type_constraint(typevars.Subtype(store_typevar, typeconsts.TopType()))
                 self.state.add_type_constraint(typevars.Subtype(data.typevar, store_typevar))
 
     def _store_to_variable(self, richr_addr: RichR, size: int, stmt=None):  # pylint:disable=unused-argument
@@ -578,9 +574,9 @@ class SimEngineVRBase(SimEngineLight):
             typevar = richr_addr.typevar
 
         if typevar is not None:
-            if isinstance(typevar, typevars.DerivedTypeVariable) and isinstance(typevar.label, typevars.AddN):
+            if isinstance(typevar, typevars.DerivedTypeVariable) and isinstance(typevar.one_label, typevars.AddN):
                 base_typevar = typevar.type_var
-                field_offset = typevar.label.n
+                field_offset = typevar.one_label.n
             else:
                 base_typevar = typevar
                 field_offset = 0
@@ -588,13 +584,10 @@ class SimEngineVRBase(SimEngineLight):
             # if addr_variable is not None:
             #     self.variable_manager[self.func_addr].reference_at(addr_variable, field_offset, codeloc, atom=stmt)
 
-            store_typevar = typevars.DerivedTypeVariable(
-                typevars.DerivedTypeVariable(base_typevar, typevars.Store()),
-                typevars.HasField(size * self.state.arch.byte_width, field_offset),
-            )
+            store_typevar = self._create_access_typevar(base_typevar, True, size, field_offset)
             if addr_variable is not None:
                 self.state.typevars.add_type_variable(addr_variable, codeloc, typevar)
-            self.state.add_type_constraint(typevars.Existence(store_typevar))
+            self.state.add_type_constraint(typevars.Subtype(store_typevar, typeconsts.TopType()))
 
     def _load(self, richr_addr: RichR, size: int, expr=None):
         """
@@ -758,20 +751,17 @@ class SimEngineVRBase(SimEngineLight):
         # parse the loading offset
         offset = 0
         if isinstance(richr_addr.typevar, typevars.DerivedTypeVariable) and isinstance(
-            richr_addr.typevar.label, typevars.AddN
+            richr_addr.typevar.one_label, typevars.AddN
         ):
-            offset = richr_addr.typevar.label.n
+            offset = richr_addr.typevar.one_label.n
             richr_addr_typevar = richr_addr.typevar.type_var  # unpack
         else:
             richr_addr_typevar = richr_addr.typevar
 
         if richr_addr_typevar is not None:
             # create a type constraint
-            typevar = typevars.DerivedTypeVariable(
-                typevars.DerivedTypeVariable(richr_addr_typevar, typevars.Load()),
-                typevars.HasField(size * self.state.arch.byte_width, offset),
-            )
-            self.state.add_type_constraint(typevars.Existence(typevar))
+            typevar = self._create_access_typevar(richr_addr_typevar, False, size, offset)
+            self.state.add_type_constraint(typevars.Subtype(typevar, typeconsts.TopType()))
 
         return RichR(self.state.top(size * self.state.arch.byte_width), typevar=typevar)
 
@@ -832,20 +822,14 @@ class SimEngineVRBase(SimEngineLight):
             # it's an array!
             if offset.concrete and elem_size.concrete:
                 concrete_offset = offset.concrete_value * elem_size.concrete_value
-                load_typevar = typevars.DerivedTypeVariable(
-                    typevars.DerivedTypeVariable(typevar, typevars.Store()),
-                    typevars.HasField(size * self.state.arch.byte_width, concrete_offset),
-                )
-                self.state.add_type_constraint(typevars.Existence(load_typevar))
+                load_typevar = self._create_access_typevar(typevar, True, size, concrete_offset)
+                self.state.add_type_constraint(typevars.Subtype(load_typevar, typeconsts.TopType()))
             else:
                 # FIXME: This is a hack
                 for i in range(0, 4):
                     concrete_offset = size * i
-                    load_typevar = typevars.DerivedTypeVariable(
-                        typevars.DerivedTypeVariable(typevar, typevars.Store()),
-                        typevars.HasField(size * self.state.arch.byte_width, concrete_offset),
-                    )
-                    self.state.add_type_constraint(typevars.Existence(load_typevar))
+                    load_typevar = self._create_access_typevar(typevar, True, size, concrete_offset)
+                    self.state.add_type_constraint(typevars.Subtype(load_typevar, typeconsts.TopType()))
 
         return RichR(self.state.top(size * self.state.arch.byte_width), typevar=typevar)
 
@@ -931,3 +915,26 @@ class SimEngineVRBase(SimEngineLight):
             # ignore the variable and the associated type if we are only reading part of the variable
             return RichR(r_value, variable=var)
         return RichR(r_value, variable=var, typevar=typevar)
+
+    def _create_access_typevar(
+        self, typevar: Union[TypeVariable, DerivedTypeVariable], is_store: bool, size: int, offset: int
+    ) -> DerivedTypeVariable:
+        if isinstance(typevar, DerivedTypeVariable):
+            if isinstance(typevar.labels[-1], AddN):
+                offset += typevar.labels[-1].n
+                if len(typevar.labels) == 1:
+                    typevar = typevar.type_var
+                else:
+                    typevar = DerivedTypeVariable(typevar.type_var, None, labels=typevar.labels[:-1])
+            elif isinstance(typevar.labels[-1], SubN):
+                offset -= typevar.labels[-1].n
+                if len(typevar.labels) == 1:
+                    typevar = typevar.type_var
+                else:
+                    typevar = DerivedTypeVariable(typevar.type_var, None, labels=typevar.labels[:-1])
+        lbl = Store() if is_store else Load()
+        return DerivedTypeVariable(
+            typevar,
+            None,
+            labels=(lbl, typevars.HasField(size * self.state.arch.byte_width, offset)),
+        )

angr/analyses/variable_recovery/variable_recovery_base.py

@@ -157,6 +157,7 @@ class VariableRecoveryStateBase:
         global_region=None,
         typevars=None,
         type_constraints=None,
+        func_typevar=None,
         delayed_type_constraints=None,
         stack_offset_typevars=None,
         project=None,
@@ -211,7 +212,8 @@ class VariableRecoveryStateBase:
         self.phi_variables: Dict[SimVariable, SimVariable] = {}
 
         self.typevars = TypeVariables() if typevars is None else typevars
-        self.type_constraints = set() if type_constraints is None else type_constraints
+        self.type_constraints = defaultdict(set) if type_constraints is None else type_constraints
+        self.func_typevar = func_typevar
         self.delayed_type_constraints = (
             DefaultChainMapCOW(set, collapse_threshold=25)
             if delayed_type_constraints is None
@@ -362,7 +364,18 @@ class VariableRecoveryStateBase:
         :return:
         """
 
-        self.type_constraints.add(constraint)
+        self.type_constraints[self.func_typevar].add(constraint)
+
+    def add_type_constraint_for_function(self, func_typevar, constraint):
+        """
+        Add a new type constraint for a specified function.
+
+        :param func_typevar:
+        :param constraint:
+        :return:
+        """
+
+        self.type_constraints[func_typevar].add(constraint)
 
     def downsize(self) -> None:
         """
@@ -370,7 +383,7 @@ class VariableRecoveryStateBase:
 
         :return:    None
         """
-        self.type_constraints = set()
+        self.type_constraints = defaultdict(set)
 
     @staticmethod
     def downsize_region(region: MultiValuedMemory) -> MultiValuedMemory:

angr/analyses/variable_recovery/variable_recovery_fast.py

@@ -1,5 +1,5 @@
 # pylint:disable=wrong-import-position,wrong-import-order
-from typing import Optional, List, Tuple, Union, DefaultDict, Set
+from typing import Optional, List, Tuple, Union, DefaultDict, Set, Dict, TYPE_CHECKING
 import logging
 from collections import defaultdict
 
@@ -22,6 +22,9 @@ from .variable_recovery_base import VariableRecoveryBase, VariableRecoveryStateB
 from .engine_vex import SimEngineVRVEX
 from .engine_ail import SimEngineVRAIL
 
+if TYPE_CHECKING:
+    from angr.analyses.typehoon.typevars import TypeConstraint
+
 l = logging.getLogger(name=__name__)
 
 
@@ -44,6 +47,7 @@ class VariableRecoveryFastState(VariableRecoveryStateBase):
         global_region=None,
         typevars=None,
         type_constraints=None,
+        func_typevar=None,
         delayed_type_constraints=None,
         stack_offset_typevars=None,
         project=None,
@@ -59,6 +63,7 @@ class VariableRecoveryFastState(VariableRecoveryStateBase):
             global_region=global_region,
             typevars=typevars,
             type_constraints=type_constraints,
+            func_typevar=func_typevar,
             delayed_type_constraints=delayed_type_constraints,
             stack_offset_typevars=stack_offset_typevars,
             project=project,
@@ -88,6 +93,7 @@ class VariableRecoveryFastState(VariableRecoveryStateBase):
             global_region=self.global_region.copy(),
             typevars=self.typevars,
             type_constraints=self.type_constraints,
+            func_typevar=self.func_typevar,
             delayed_type_constraints=self.delayed_type_constraints,
             stack_offset_typevars=dict(self.stack_offset_typevars),
             project=self.project,
@@ -162,7 +168,7 @@ class VariableRecoveryFastState(VariableRecoveryStateBase):
             else:
                 typevar = TypeVariable()
                 for orig_typevar in all_typevars:
-                    type_constraints.add(Equivalence(orig_typevar, typevar))
+                    type_constraints[self.func_typevar].add(Equivalence(orig_typevar, typevar))
             stack_offset_typevars[offset] = typevar
 
         ret_val_size = self.ret_val_size
@@ -186,6 +192,7 @@ class VariableRecoveryFastState(VariableRecoveryStateBase):
             global_region=merged_global_region,
             typevars=typevars,
             type_constraints=type_constraints,
+            func_typevar=self.func_typevar,
             delayed_type_constraints=delayed_typeconstraints,
             stack_offset_typevars=stack_offset_typevars,
             project=self.project,
@@ -271,7 +278,8 @@ class VariableRecoveryFast(ForwardAnalysis, VariableRecoveryBase):  # pylint:dis
         self._node_to_cc = {}
         self.var_to_typevars: DefaultDict[SimVariable, Set[TypeVariable]] = defaultdict(set)
         self.typevars = None
-        self.type_constraints = None
+        self.type_constraints: Optional[Dict["TypeVariable", Set["TypeConstraint"]]] = None
+        self.func_typevar = TypeVariable(name=func.name)
         self.delayed_type_constraints = None
         self.ret_val_size = None
 
@@ -288,7 +296,7 @@ class VariableRecoveryFast(ForwardAnalysis, VariableRecoveryBase):  # pylint:dis
 
     def _pre_analysis(self):
         self.typevars = TypeVariables()
-        self.type_constraints = set()
+        self.type_constraints = defaultdict(set)
         self.delayed_type_constraints = defaultdict(set)
 
         self.initialize_dominance_frontiers()
@@ -319,6 +327,7 @@ class VariableRecoveryFast(ForwardAnalysis, VariableRecoveryBase):  # pylint:dis
             project=self.project,
             typevars=self.typevars,
             type_constraints=self.type_constraints,
+            func_typevar=self.func_typevar,
             delayed_type_constraints=self.delayed_type_constraints,
         )
         initial_sp = state.stack_address(self.project.arch.bytes if self.project.arch.call_pushes_ret else 0)
@@ -472,7 +481,7 @@ class VariableRecoveryFast(ForwardAnalysis, VariableRecoveryBase):  # pylint:dis
             if len(typevars) > 1 and isinstance(var, SimMemoryVariable) and not isinstance(var, SimStackVariable):
                 sorted_typevars = list(sorted(typevars, key=lambda x: str(x)))  # pylint:disable=unnecessary-lambda
                 for tv in sorted_typevars[1:]:
-                    self.type_constraints.add(Equivalence(sorted_typevars[0], tv))
+                    self.type_constraints[self.func_typevar].add(Equivalence(sorted_typevars[0], tv))
 
         self.variable_manager[self.function.addr].ret_val_size = self.ret_val_size
 

angr/exploration_techniques/tracer.py

@@ -1041,6 +1041,8 @@ class Tracer(ExplorationTechnique):
 
         # now remove our breakpoints since other people might not want them
         for s in [last_state, crash_state]:
+            if s is None:
+                continue
             s.inspect.remove_breakpoint("address_concretization", bp1)
             s.inspect.remove_breakpoint("address_concretization", bp2)
 

angr/misc/autoimport.py

@@ -1,5 +1,7 @@
 import os
 import importlib
+import importlib.machinery
+import importlib.util
 import logging
 from typing import Optional, Callable
 
@@ -61,3 +63,27 @@ def filter_module(mod, type_req=None, subclass_req=None):
         if subclass_req is not None and not issubclass(val, subclass_req):
             continue
         yield name, val
+
+
+def auto_import_source_files(base_path, ignore_files=(), filter_func: Optional[Callable] = None):
+    for proc_file_name in os.listdir(base_path):
+        if not proc_file_name.endswith(".py"):
+            continue
+        if proc_file_name in ignore_files or proc_file_name == "__init__.py":
+            continue
+
+        proc_module_name = proc_file_name[:-3]
+        if filter_func is not None and not filter_func(proc_file_name):
+            continue
+
+        proc_path = os.path.join(base_path, proc_file_name)
+        try:
+            loader = importlib.machinery.SourceFileLoader(proc_module_name, proc_path)
+            spec = importlib.util.spec_from_loader(proc_module_name, loader)
+            proc_module = importlib.util.module_from_spec(spec)
+            loader.exec_module(proc_module)
+        except ImportError:
+            l.warning("Unable to autoimport module from file %s", proc_path, exc_info=True)
+            continue
+        else:
+            yield proc_module_name, proc_module

angr/procedures/definitions/__init__.py

@@ -1,13 +1,15 @@
+# pylint:disable=arguments-renamed,global-statement
 import copy
 import os
-import archinfo
-from collections import defaultdict
 import logging
 import inspect
-from typing import Optional, Dict, Type, TYPE_CHECKING
+from collections import defaultdict
+from typing import Optional, Dict, Type, List, TYPE_CHECKING
 
 import itanium_demangler
 
+import archinfo
+
 from ...sim_type import parse_cpp_file, SimTypeFunction
 from ...calling_conventions import DEFAULT_CC
 from ...misc import autoimport
@@ -625,6 +627,33 @@ class SimSyscallLibrary(SimLibrary):
 # - We will load all APIs when load_all_definitions() is called.
 
 _DEFINITIONS_BASEDIR = os.path.dirname(os.path.realpath(__file__))
+_EXTERNAL_DEFINITIONS_DIRS: Optional[List[str]] = None
+
+
+def load_external_definitions():
+    """
+    Load library definitions from specific directories. By default it parses ANGR_EXTERNAL_DEFINITIONS_DIRS as a
+    semi-colon separated list of directory paths. Then it loads all .py files in each directory. These .py files should
+    declare SimLibrary() objects and call .set_library_names() to register themselves in angr.SIM_LIBRARIES.
+    """
+
+    global _EXTERNAL_DEFINITIONS_DIRS
+
+    if _EXTERNAL_DEFINITIONS_DIRS is None and "ANGR_EXTERNAL_DEFINITIONS_DIRS" in os.environ:
+        _EXTERNAL_DEFINITIONS_DIRS = os.environ["ANGR_EXTERNAL_DEFINITIONS_DIRS"].strip('"').split(";")
+        l.debug("Using external library definitions from %s", _EXTERNAL_DEFINITIONS_DIRS)
+        for d in _EXTERNAL_DEFINITIONS_DIRS:
+            if not os.path.isdir(d):
+                l.warning("External library definitions directory %s does not exist or is not a directory.", d)
+
+    if _EXTERNAL_DEFINITIONS_DIRS:
+        # we must load all definitions prior to any external definitions are loaded. otherwise external definitions may
+        # be overwritten by embedded definitions in angr, which is undesirable
+        load_all_definitions()
+
+        for d in _EXTERNAL_DEFINITIONS_DIRS:
+            for _ in autoimport.auto_import_source_files(d):
+                pass
 
 
 def load_win32api_definitions():

angr/utils/constants.py

@@ -1,5 +1,6 @@
 DEFAULT_STATEMENT = -2
 SWITCH_MISSING_DEFAULT_NODE_ADDR = 0xFFFF_FFFE
+MAX_POINTSTO_BITS = -1330 * 8
 
 
 def is_alignment_mask(n):

angr/utils/graph.py

@@ -683,8 +683,27 @@ class GraphUtils:
         # find all strongly connected components in the graph
         sccs = [scc for scc in networkx.strongly_connected_components(graph) if len(scc) > 1]
 
+        def _sort_edge(edge):
+            """
+            A sorter to make a deterministic order of edges.
+            """
+            _src, _dst = edge
+            src_addr, dst_addr = 0, 0
+            if hasattr(_src, "addr"):
+                src_addr = _src.addr
+            elif isinstance(_src, int):
+                src_addr = _src
+
+            if hasattr(_dst, "addr"):
+                dst_addr = _dst.addr
+            elif isinstance(_dst, int):
+                dst_addr = _dst
+
+            return src_addr + dst_addr
+
         # collapse all strongly connected components
-        for src, dst in graph.edges():
+        edges = sorted(list(graph.edges()), key=_sort_edge)
+        for src, dst in edges:
             scc_index = GraphUtils._components_index_node(sccs, src)
             if scc_index is not None:
                 src = SCCPlaceholder(scc_index)

{angr-9.2.87.dist-info → angr-9.2.89.dist-info}/METADATA

@@ -1,6 +1,6 @@
 Metadata-Version: 2.1
 Name: angr
-Version: 9.2.87
+Version: 9.2.89
 Summary: A multi-architecture binary analysis toolkit, with the ability to perform dynamic symbolic execution and various static analyses on binaries
 Home-page: https://github.com/angr/angr
 License: BSD-2-Clause
@@ -17,13 +17,13 @@ Description-Content-Type: text/markdown
 License-File: LICENSE
 Requires-Dist: CppHeaderParser
 Requires-Dist: GitPython
-Requires-Dist: ailment ==9.2.87
-Requires-Dist: archinfo ==9.2.87
+Requires-Dist: ailment ==9.2.89
+Requires-Dist: archinfo ==9.2.89
 Requires-Dist: cachetools
 Requires-Dist: capstone ==5.0.0.post1
 Requires-Dist: cffi >=1.14.0
-Requires-Dist: claripy ==9.2.87
-Requires-Dist: cle ==9.2.87
+Requires-Dist: claripy ==9.2.89
+Requires-Dist: cle ==9.2.89
 Requires-Dist: dpkt
 Requires-Dist: itanium-demangler
 Requires-Dist: mulpyplexer
@@ -32,7 +32,8 @@ Requires-Dist: networkx !=2.8.1,>=2.0
 Requires-Dist: protobuf >=3.19.0
 Requires-Dist: psutil
 Requires-Dist: pycparser >=2.18
-Requires-Dist: pyvex ==9.2.87
+Requires-Dist: pyformlang
+Requires-Dist: pyvex ==9.2.89
 Requires-Dist: rich >=13.1.0
 Requires-Dist: rpyc
 Requires-Dist: sortedcontainers