angr 9.2.75__py3-none-win_amd64.whl → 9.2.77__py3-none-win_amd64.whl

angr/knowledge_plugins/key_definitions/rd_model.py

@@ -32,9 +32,9 @@ class ReachingDefinitionsModel:
             len(self.observed_results),
         )
 
-    def add_def(self, d: "Definition", codeloc: "CodeLocation") -> None:
+    def add_def(self, d: "Definition") -> None:
         if self.liveness is not None:
-            self.liveness.add_def(d, codeloc)
+            self.liveness.add_def(d)
 
     def kill_def(self, d: "Definition") -> None:
         if self.liveness is not None:
@@ -48,9 +48,9 @@ class ReachingDefinitionsModel:
         if self.liveness is not None:
             self.liveness.at_new_block(code_loc, pred_codelocs)
 
-    def complete_loc(self) -> None:
+    def make_liveness_snapshot(self) -> None:
         if self.liveness is not None:
-            self.liveness.complete_loc()
+            self.liveness.make_liveness_snapshot()
 
     def find_defs_at(self, code_loc: "CodeLocation", op: int = OP_BEFORE) -> Set["Definition"]:
         return self.liveness.find_defs_at(code_loc, op=op)

angr/knowledge_plugins/propagations/states.py

@@ -808,7 +808,9 @@ class PropagatorAILState(PropagatorState):
                 or isinstance(old, ailment.Expr.Register)
                 and (old.reg_offset == self.arch.sp_offset or (not bp_as_gpr and old.reg_offset == self.arch.bp_offset))
             ):
-                self._replacements[codeloc][old] = new
+                self._replacements[codeloc][old] = (
+                    new if stmt_to_remove is None else {"expr": new, "stmt_to_remove": stmt_to_remove}
+                )
                 replaced = True
         else:
             prop_count = 0

angr/knowledge_plugins/variables/variable_manager.py

@@ -90,6 +90,7 @@ class VariableManagerInternal(Serializable):
         self._atom_to_variable: Dict[
             Union[Tuple[int, int], Tuple[int, int, int]], Dict[int, Set[Tuple[SimVariable, int]]]
         ] = defaultdict(_defaultdict_set)
+        self._ident_to_variable: Dict[str, SimVariable] = {}
         self._variable_counters = {
             "register": count(),
             "stack": count(),
@@ -109,6 +110,9 @@ class VariableManagerInternal(Serializable):
         self.variable_to_types: Dict[SimVariable, SimType] = {}
         self.variables_with_manual_types = set()
 
+        # optimization
+        self._variables_without_writes = set()
+
         self.ret_val_size = None
 
     #
@@ -241,6 +245,7 @@ class VariableManagerInternal(Serializable):
                 model._phi_variables[var] = set()
             else:
                 model._variables.add(var)
+                model._ident_to_variable[var.ident] = var
 
         # variable accesses
         for varaccess_pb2 in cmsg.accesses:
@@ -314,6 +319,8 @@ class VariableManagerInternal(Serializable):
 
             region.add_variable(offset, var)
 
+        model._variables_without_writes = model.get_variables_without_writes()
+
         return model
 
     #
@@ -338,7 +345,7 @@ class VariableManagerInternal(Serializable):
         ident = "i%s_%d" % (prefix, next(self._variable_counters[sort]))
         return ident
 
-    def add_variable(self, sort, start, variable):
+    def add_variable(self, sort, start, variable: SimVariable):
         if sort == "stack":
             region = self._stack_region
         elif sort == "register":
@@ -347,17 +354,17 @@ class VariableManagerInternal(Serializable):
             region = self._global_region
         else:
             raise ValueError("Unsupported sort %s in add_variable()." % sort)
-        existing = [x for x in region.get_variables_by_offset(start) if x.ident == variable.ident]
-        if len(existing) == 1:
-            var = existing[0]
-            if var.name is not None and not variable.renamed:
-                variable.name = var.name
-                variable.renamed = var.renamed
-        else:
-            # implicitly overwrite or add I guess
-            pass
+
+        # find if there is already an existing variable with the same identifier
+        if variable.ident in self._ident_to_variable:
+            existing_var = self._ident_to_variable[variable.ident]
+            if existing_var.name is not None and not variable.renamed:
+                variable.name = existing_var.name
+                variable.renamed = existing_var.renamed
+        self._ident_to_variable[variable.ident] = variable
         region.add_variable(start, variable)
         self._variables.add(variable)
+        self._variables_without_writes.add(variable)
 
     def set_variable(self, sort, start, variable: SimVariable):
         if sort == "stack":
@@ -368,17 +375,15 @@ class VariableManagerInternal(Serializable):
             region = self._global_region
         else:
             raise ValueError("Unsupported sort %s in set_variable()." % sort)
-        existing = [x for x in region.get_variables_by_offset(start) if x.ident == variable.ident]
-        if len(existing) == 1:
-            var = existing[0]
-            if var.name is not None and not variable.renamed:
-                variable.name = var.name
-                variable.renamed = var.renamed
-        else:
-            # implicitly overwrite or add I guess
-            pass
+        # find if there is already an existing variable with the same identifier
+        if variable.ident in self._ident_to_variable:
+            existing_var = self._ident_to_variable[variable.ident]
+            if existing_var.name is not None and not variable.renamed:
+                variable.name = existing_var.name
+                variable.renamed = existing_var.renamed
         region.set_variable(start, variable)
         self._variables.add(variable)
+        self._variables_without_writes.add(variable)
 
     def write_to(self, variable, offset, location, overwrite=False, atom=None):
         self._record_variable_access(
@@ -404,17 +409,19 @@ class VariableManagerInternal(Serializable):
         overwrite=False,
         atom=None,
     ):
-        # TODO can this line be removed, should we be only adding to _variables in add_variable?
-        self._variables.add(variable)
         atom_hash = (hash(atom) & 0xFFFF_FFFF) if atom is not None else None
         if overwrite:
             self._variable_accesses[variable] = {VariableAccess(variable, sort, location, offset, atom_hash=atom_hash)}
         else:
             self._variable_accesses[variable].add(VariableAccess(variable, sort, location, offset, atom_hash=atom_hash))
         self.record_variable(location, variable, offset, overwrite=overwrite, atom=atom)
+        if sort == VariableAccessSort.WRITE and variable in self._variables_without_writes:
+            self._variables_without_writes.discard(variable)
 
     def record_variable(self, location: "CodeLocation", variable, offset, overwrite=False, atom=None):
-        self._variables.add(variable)
+        if variable.ident not in self._ident_to_variable:
+            self._ident_to_variable[variable.ident] = variable
+            self._variables.add(variable)
         var_and_offset = variable, offset
         atom_hash = (hash(atom) & 0xFFFF_FFFF) if atom is not None else None
         key = (
@@ -693,7 +700,7 @@ class VariableManagerInternal(Serializable):
             variables[phi] = self._phi_variables[phi]
         return variables
 
-    def input_variables(self, exclude_specials=True):
+    def get_variables_without_writes(self) -> List[SimVariable]:
         """
         Get all variables that have never been written to.
 
@@ -703,16 +710,35 @@ class VariableManagerInternal(Serializable):
         def has_write_access(accesses):
             return any(acc for acc in accesses if acc.access_type == VariableAccessSort.WRITE)
 
+        input_variables = []
+
+        for variable, accesses in self._variable_accesses.items():
+            if variable in self._phi_variables:
+                # a phi variable is definitely not an input variable
+                continue
+            if not has_write_access(accesses):
+                input_variables.append(variable)
+
+        return input_variables
+
+    def input_variables(self, exclude_specials: bool = True):
+        """
+        Get all variables that have never been written to.
+
+        :return: A list of variables that are never written to.
+        """
+
         def has_read_access(accesses):
             return any(acc for acc in accesses if acc.access_type == VariableAccessSort.READ)
 
         input_variables = []
 
-        for variable, accesses in self._variable_accesses.items():
+        for variable in self._variables_without_writes:
             if variable in self._phi_variables:
                 # a phi variable is definitely not an input variable
                 continue
-            if not has_write_access(accesses) and has_read_access(accesses):
+            accesses = self._variable_accesses[variable]
+            if has_read_access(accesses):
                 if not exclude_specials or not variable.category:
                     input_variables.append(variable)
 

angr/misc/bug_report.py

@@ -1,4 +1,4 @@
-import imp
+import importlib
 import os
 import sys
 import datetime
@@ -41,7 +41,7 @@ def print_versions():
     for m in angr_modules:
         print("######## %s #########" % m)
         try:
-            _, python_filename, _ = imp.find_module(m)
+            python_filename = importlib.util.find_spec(m).origin
         except ImportError:
             print("Python could not find " + m)
             continue

angr/sim_type.py

@@ -498,6 +498,52 @@ class SimTypeChar(SimTypeReg):
         return self.__class__(signed=self.signed, label=self.label)
 
 
+class SimTypeWideChar(SimTypeReg):
+    """
+    SimTypeWideChar is a type that specifies a wide character (a UTF-16 character).
+    """
+
+    _base_name = "char"
+
+    def __init__(self, signed=True, label=None):
+        """
+        :param label: the type label.
+        """
+        SimTypeReg.__init__(self, 16, label=label)
+        self.signed = signed
+
+    def __repr__(self):
+        return "wchar"
+
+    def store(self, state, addr, value):
+        self._size = state.arch.byte_width
+        try:
+            super().store(state, addr, value)
+        except TypeError:
+            if isinstance(value, bytes) and len(value) == 2:
+                value = state.solver.BVV(value[0], state.arch.byte_width)
+                super().store(state, addr, value)
+            else:
+                raise
+
+    def extract(self, state, addr, concrete=False):
+        self._size = state.arch.byte_width
+
+        out = super().extract(state, addr, concrete)
+        if concrete:
+            return bytes([out])
+        return out
+
+    def _init_str(self):
+        return "{}({})".format(
+            self.__class__.__name__,
+            ('label="%s"' % self.label) if self.label is not None else "",
+        )
+
+    def copy(self):
+        return self.__class__(signed=self.signed, label=self.label)
+
+
 class SimTypeBool(SimTypeChar):
     _base_name = "bool"
 

angr/storage/memory_mixins/__init__.py

@@ -1,4 +1,4 @@
-# pylint:disable=abstract-method
+# pylint:disable=abstract-method,wrong-import-position,unused-argument,missing-class-docstring,arguments-differ
 from typing import Iterable, Tuple, Dict, Any, Optional
 
 import claripy
@@ -114,7 +114,6 @@ class MemoryMixin(SimStatePlugin):
 
         The ``inspect``, ``events``, and ``key`` parameters are for ``state.solver.Unconstrained``, if it is used.
         """
-        pass
 
     def _merge_values(self, values: Iterable[Tuple[Any, Any]], merged_size: int, **kwargs) -> Optional[Any]:
         """
@@ -187,6 +186,7 @@ from .paged_memory.paged_memory_mixin import (
 )
 from .paged_memory.privileged_mixin import PrivilegedPagingMixin
 from .paged_memory.stack_allocation_mixin import StackAllocationMixin
+from .paged_memory.paged_memory_multivalue_mixin import PagedMemoryMultiValueMixin
 from .paged_memory.pages import *
 
 from .slotted_memory import SlottedMemoryMixin
@@ -353,6 +353,7 @@ class MultiValuedMemory(
     DefaultFillerMixin,
     MultiValueMergerMixin,
     PagedMemoryMixin,
+    PagedMemoryMultiValueMixin,
 ):
     def _default_value(self, addr, size, **kwargs):
         # TODO: Make _default_value() a separate Mixin

angr/storage/memory_mixins/paged_memory/paged_memory_multivalue_mixin.py

@@ -0,0 +1,63 @@
+from .. import MemoryMixin
+
+
+class PagedMemoryMultiValueMixin(MemoryMixin):
+    """
+    Implement optimizations and fast accessors for the MultiValues-variant of Paged Memory.
+    """
+
+    def load_annotations(self, addr: int, size: int, **kwargs):
+        if not isinstance(size, int):
+            raise TypeError("Need size to be resolved to an int by this point")
+
+        if not isinstance(addr, int):
+            raise TypeError("Need addr to be resolved to an int by this point")
+
+        pageno, pageoff = self._divide_addr(addr)
+
+        annotations = set()
+
+        # fasttrack basic case
+        if pageoff + size <= self.page_size:
+            page = self._get_page(pageno, False, **kwargs)
+            loaded = page.load(
+                pageoff,
+                size=size,
+                page_addr=pageno * self.page_size,
+                memory=self,
+                cooperate=True,
+                **kwargs,
+            )
+            for _, mos in loaded:
+                if isinstance(mos, set):
+                    for mo in mos:
+                        annotations.update(mo.object.annotations)
+                else:
+                    annotations.update(mos.object.annotations)
+
+        else:
+            max_pageno = (1 << self.state.arch.bits) // self.page_size
+            bytes_done = 0
+            while bytes_done < size:
+                page = self._get_page(pageno, False, **kwargs)
+                sub_size = min(self.page_size - pageoff, size - bytes_done)
+                loaded = page.load(
+                    pageoff,
+                    size=sub_size,
+                    page_addr=pageno * self.page_size,
+                    memory=self,
+                    cooperate=True,
+                    **kwargs,
+                )
+                for _, mos in loaded:
+                    if isinstance(mos, set):
+                        for mo in mos:
+                            annotations.update(mo.object.annotations)
+                    else:
+                        annotations.update(mos.object.annotations)
+
+                bytes_done += sub_size
+                pageno = (pageno + 1) % max_pageno
+                pageoff = 0
+
+        return annotations

angr/storage/memory_mixins/paged_memory/pages/mv_list_page.py

@@ -275,6 +275,11 @@ class MVListPage(
 
     def changed_bytes(self, other: "MVListPage", page_addr: int = None):
         candidates: Set[int] = super().changed_bytes(other)
+        if candidates is not None:
+            # using the result from the history tracking mixin as an approximation
+            return candidates
+
+        # slower path
         if candidates is None:
             candidates: Set[int] = set()
             # resort to the slower solution

{angr-9.2.75.dist-info → angr-9.2.77.dist-info}/METADATA

@@ -1,6 +1,6 @@
 Metadata-Version: 2.1
 Name: angr
-Version: 9.2.75
+Version: 9.2.77
 Summary: A multi-architecture binary analysis toolkit, with the ability to perform dynamic symbolic execution and various static analyses on binaries
 Home-page: https://github.com/angr/angr
 License: BSD-2-Clause
@@ -17,13 +17,13 @@ Description-Content-Type: text/markdown
 License-File: LICENSE
 Requires-Dist: CppHeaderParser
 Requires-Dist: GitPython
-Requires-Dist: ailment ==9.2.75
-Requires-Dist: archinfo ==9.2.75
+Requires-Dist: ailment ==9.2.77
+Requires-Dist: archinfo ==9.2.77
 Requires-Dist: cachetools
 Requires-Dist: capstone ==5.0.0.post1
 Requires-Dist: cffi >=1.14.0
-Requires-Dist: claripy ==9.2.75
-Requires-Dist: cle ==9.2.75
+Requires-Dist: claripy ==9.2.77
+Requires-Dist: cle ==9.2.77
 Requires-Dist: dpkt
 Requires-Dist: itanium-demangler
 Requires-Dist: mulpyplexer
@@ -32,7 +32,7 @@ Requires-Dist: networkx !=2.8.1,>=2.0
 Requires-Dist: protobuf >=3.19.0
 Requires-Dist: psutil
 Requires-Dist: pycparser >=2.18
-Requires-Dist: pyvex ==9.2.75
+Requires-Dist: pyvex ==9.2.77
 Requires-Dist: rich >=13.1.0
 Requires-Dist: rpyc
 Requires-Dist: sortedcontainers