angr 9.2.192__cp311-cp311-macosx_10_12_x86_64.whl

angr/storage/memory_mixins/__init__.py

@@ -0,0 +1,317 @@
+from __future__ import annotations
+
+from angr.sim_state import SimState
+from .actions_mixin import ActionsMixinHigh, ActionsMixinLow
+from .address_concretization_mixin import AddressConcretizationMixin
+from .bvv_conversion_mixin import DataNormalizationMixin
+from .clouseau_mixin import InspectMixinHigh
+from .conditional_store_mixin import ConditionalMixin
+from .convenient_mappings_mixin import ConvenientMappingsMixin
+from .default_filler_mixin import DefaultFillerMixin, SpecialFillerMixin, ExplicitFillerMixin
+from .dirty_addrs_mixin import DirtyAddrsMixin
+from .hex_dumper_mixin import HexDumperMixin
+from .label_merger_mixin import LabelMergerMixin
+from .multi_value_merger_mixin import MultiValueMergerMixin
+from .name_resolution_mixin import NameResolutionMixin
+from .simplification_mixin import SimplificationMixin
+from .simple_interface_mixin import SimpleInterfaceMixin
+from .size_resolution_mixin import SizeNormalizationMixin, SizeConcretizationMixin
+from .smart_find_mixin import SmartFindMixin
+from .symbolic_merger_mixin import SymbolicMergerMixin
+from .top_merger_mixin import TopMergerMixin
+from .underconstrained_mixin import UnderconstrainedMixin
+from .unwrapper_mixin import UnwrapperMixin
+
+from .paged_memory.page_backer_mixins import ClemoryBackerMixin, ConcreteBackerMixin, DictBackerMixin
+from .paged_memory.paged_memory_mixin import (
+    PagedMemoryMixin,
+    ListPagesMixin,
+    UltraPagesMixin,
+    ListPagesWithLabelsMixin,
+    MVListPagesMixin,
+    MVListPagesWithLabelsMixin,
+)
+from .paged_memory.privileged_mixin import PrivilegedPagingMixin
+from .paged_memory.stack_allocation_mixin import StackAllocationMixin
+from .paged_memory.paged_memory_multivalue_mixin import PagedMemoryMultiValueMixin
+from .paged_memory.pages import (
+    CooperationBase,
+    MemoryObjectMixin,
+    ISPOMixin,
+    RefcountMixin,
+    PermissionsMixin,
+    HistoryTrackingMixin,
+    PageBase,
+    PageType,
+    ListPage,
+    MVListPage,
+    UltraPage,
+)
+
+from .slotted_memory import SlottedMemoryMixin
+from .regioned_memory import (
+    RegionedMemoryMixin,
+    RegionCategoryMixin,
+    StaticFindMixin,
+    AbstractMergerMixin,
+    MemoryRegionMetaMixin,
+    RegionedAddressConcretizationMixin,
+)
+from .keyvalue_memory_mixin import KeyValueMemoryMixin
+from .javavm_memory_mixin import JavaVmMemoryMixin
+
+# pylint:disable=missing-class-docstring
+
+
+class DefaultMemory(
+    HexDumperMixin,
+    SmartFindMixin,
+    UnwrapperMixin,
+    NameResolutionMixin,
+    DataNormalizationMixin,
+    SimplificationMixin,
+    InspectMixinHigh,
+    ActionsMixinHigh,
+    UnderconstrainedMixin,
+    SizeConcretizationMixin,
+    SizeNormalizationMixin,
+    AddressConcretizationMixin,
+    # InspectMixinLow,
+    ActionsMixinLow,
+    ConditionalMixin,
+    ConvenientMappingsMixin,
+    DirtyAddrsMixin,
+    # -----
+    StackAllocationMixin,
+    ConcreteBackerMixin,
+    ClemoryBackerMixin,
+    DictBackerMixin,
+    PrivilegedPagingMixin,
+    UltraPagesMixin,
+    DefaultFillerMixin,
+    SymbolicMergerMixin,
+    PagedMemoryMixin,
+):
+    pass
+
+
+class DefaultListPagesMemory(
+    HexDumperMixin,
+    SmartFindMixin,
+    UnwrapperMixin,
+    NameResolutionMixin,
+    DataNormalizationMixin,
+    SimplificationMixin,
+    ActionsMixinHigh,
+    UnderconstrainedMixin,
+    SizeConcretizationMixin,
+    SizeNormalizationMixin,
+    InspectMixinHigh,
+    AddressConcretizationMixin,
+    # InspectMixinLow,
+    ActionsMixinLow,
+    ConditionalMixin,
+    ConvenientMappingsMixin,
+    DirtyAddrsMixin,
+    # -----
+    StackAllocationMixin,
+    ClemoryBackerMixin,
+    DictBackerMixin,
+    PrivilegedPagingMixin,
+    ListPagesMixin,
+    DefaultFillerMixin,
+    SymbolicMergerMixin,
+    PagedMemoryMixin,
+):
+    pass
+
+
+class FastMemory(
+    NameResolutionMixin,
+    SimpleInterfaceMixin,
+    SimplificationMixin,
+    InspectMixinHigh,
+    ConditionalMixin,
+    ExplicitFillerMixin,
+    DefaultFillerMixin,
+    SlottedMemoryMixin,
+):
+    pass
+
+
+class AbstractMemory(
+    UnwrapperMixin,
+    NameResolutionMixin,
+    DataNormalizationMixin,
+    SimplificationMixin,
+    InspectMixinHigh,
+    ActionsMixinHigh,
+    UnderconstrainedMixin,
+    SizeConcretizationMixin,
+    SizeNormalizationMixin,
+    # InspectMixinLow,
+    ActionsMixinLow,
+    ConditionalMixin,
+    RegionedAddressConcretizationMixin,
+    # -----
+    RegionedMemoryMixin,
+):
+    pass
+
+
+class RegionedMemory(
+    RegionCategoryMixin,
+    MemoryRegionMetaMixin,
+    StaticFindMixin,
+    UnwrapperMixin,
+    NameResolutionMixin,
+    DataNormalizationMixin,
+    SimplificationMixin,
+    SizeConcretizationMixin,
+    SizeNormalizationMixin,
+    AddressConcretizationMixin,
+    ConvenientMappingsMixin,
+    DirtyAddrsMixin,
+    # -----
+    ClemoryBackerMixin,
+    DictBackerMixin,
+    UltraPagesMixin,
+    DefaultFillerMixin,
+    AbstractMergerMixin,
+    PagedMemoryMixin,
+):
+    pass
+
+
+class LabeledMemory(
+    SizeNormalizationMixin,
+    ListPagesWithLabelsMixin,
+    DefaultFillerMixin,
+    TopMergerMixin,
+    LabelMergerMixin,
+    PagedMemoryMixin,
+):
+    """
+    LabeledMemory is used in static analysis. It allows storing values with labels, such as `Definition`.
+    """
+
+    def _default_value(self, addr, size, **kwargs):  # pylint:disable=arguments-differ
+        # TODO: Make _default_value() a separate Mixin
+
+        if kwargs.get("name", "").startswith("merge_uc_"):
+            # this is a hack. when this condition is satisfied, _default_value() is called inside Listpage.merge() to
+            # create temporary values. we simply return a TOP value here.
+            return self.state.top(size * self.state.arch.byte_width)
+
+        # we never fill default values for non-existent loads
+        kwargs["fill_missing"] = False
+        return super()._default_value(addr, size, **kwargs)
+
+
+class MultiValuedMemory(
+    SizeNormalizationMixin,
+    MVListPagesMixin,
+    DefaultFillerMixin,
+    MultiValueMergerMixin,
+    PagedMemoryMixin,
+    PagedMemoryMultiValueMixin,
+):
+    def _default_value(self, addr, size, **kwargs):  # pylint:disable=arguments-differ
+        # TODO: Make _default_value() a separate Mixin
+
+        if kwargs.get("name", "").startswith("merge_uc_"):
+            # this is a hack. when this condition is satisfied, _default_value() is called inside Listpage.merge() to
+            # create temporary values. we simply return a TOP value here.
+            return self.state.top(size * self.state.arch.byte_width)
+
+        # we never fill default values for non-existent loads
+        kwargs["fill_missing"] = False
+        return super()._default_value(addr, size, **kwargs)
+
+
+class KeyValueMemory(
+    KeyValueMemoryMixin,
+):
+    pass
+
+
+class JavaVmMemory(
+    JavaVmMemoryMixin,
+):
+    pass
+
+
+SimState.register_default("sym_memory", DefaultMemory)
+SimState.register_default("fast_memory", FastMemory)
+SimState.register_default("abs_memory", AbstractMemory)
+SimState.register_default("keyvalue_memory", KeyValueMemory)
+SimState.register_default("javavm_memory", JavaVmMemory)
+
+
+__all__ = (
+    "AbstractMemory",
+    "AbstractMergerMixin",
+    "ActionsMixinHigh",
+    "ActionsMixinLow",
+    "AddressConcretizationMixin",
+    "ClemoryBackerMixin",
+    "ConcreteBackerMixin",
+    "ConditionalMixin",
+    "ConvenientMappingsMixin",
+    "CooperationBase",
+    "DataNormalizationMixin",
+    "DefaultFillerMixin",
+    "DefaultListPagesMemory",
+    "DefaultMemory",
+    "DictBackerMixin",
+    "DirtyAddrsMixin",
+    "ExplicitFillerMixin",
+    "FastMemory",
+    "HexDumperMixin",
+    "HistoryTrackingMixin",
+    "ISPOMixin",
+    "InspectMixinHigh",
+    "JavaVmMemory",
+    "JavaVmMemoryMixin",
+    "KeyValueMemory",
+    "KeyValueMemoryMixin",
+    "LabelMergerMixin",
+    "LabeledMemory",
+    "ListPage",
+    "ListPagesMixin",
+    "ListPagesWithLabelsMixin",
+    "MVListPage",
+    "MVListPagesMixin",
+    "MVListPagesWithLabelsMixin",
+    "MemoryObjectMixin",
+    "MemoryRegionMetaMixin",
+    "MultiValueMergerMixin",
+    "MultiValuedMemory",
+    "NameResolutionMixin",
+    "PageBase",
+    "PageType",
+    "PagedMemoryMixin",
+    "PagedMemoryMultiValueMixin",
+    "PermissionsMixin",
+    "PrivilegedPagingMixin",
+    "RefcountMixin",
+    "RegionCategoryMixin",
+    "RegionedAddressConcretizationMixin",
+    "RegionedMemory",
+    "RegionedMemoryMixin",
+    "SimpleInterfaceMixin",
+    "SimplificationMixin",
+    "SizeConcretizationMixin",
+    "SizeNormalizationMixin",
+    "SlottedMemoryMixin",
+    "SmartFindMixin",
+    "SpecialFillerMixin",
+    "StackAllocationMixin",
+    "StaticFindMixin",
+    "SymbolicMergerMixin",
+    "TopMergerMixin",
+    "UltraPage",
+    "UltraPagesMixin",
+    "UnderconstrainedMixin",
+    "UnwrapperMixin",
+)

angr/storage/memory_mixins/actions_mixin.py

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+from __future__ import annotations
+import claripy
+
+from angr.state_plugins.sim_action import SimActionData, SimActionObject
+from angr import sim_options as o
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
+
+
+class ActionsMixinHigh(MemoryMixin):
+    def load(self, addr, size=None, *, condition=None, fallback=None, disable_actions=False, action=None, **kwargs):
+        if not disable_actions and o.AUTO_REFS in self.state.options and action is None:
+            action = self.__make_action("read", addr, size, None, condition, fallback)
+
+        r = super().load(addr, size=size, condition=condition, fallback=fallback, action=action, **kwargs)
+
+        if not disable_actions:
+            if o.AST_DEPS in self.state.options and self.category == "reg":
+                r = SimActionObject(r, reg_deps=frozenset((addr,)))
+
+            if action is not None and action.actual_addrs and o.AUTO_REFS in self.state.options:
+                # ActionsMixinLow fills up action.actual_addrs. If the load fails, actual_addrs will be None or empty.
+                # In that case, we do not add the action.
+                action.data = action._make_object(r)
+                if action.size is None:
+                    action.size = len(r)
+
+                self.state.history.add_action(action)
+
+        return r
+
+    def store(self, addr, data, size=None, *, disable_actions=False, action=None, condition=None, **kwargs):
+        if not disable_actions and o.AUTO_REFS in self.state.options and action is None:
+            action = self.__make_action("write", addr, size, data, condition, None)
+
+        super().store(addr, data, size=size, action=action, condition=condition, **kwargs)
+
+        if action is not None and not disable_actions and action.actual_addrs and o.AUTO_REFS in self.state.options:
+            # ActionsMixinLow fills up action.actual_addrs. If the store fails, actual_addrs will be None or empty.
+            # In that case, we do not add the action.
+            self.state.history.add_action(action)
+
+    def __make_action(self, kind, addr, size, data, condition, fallback):
+        ref_size = size * self.state.arch.byte_width if size is not None else len(data) if data is not None else None
+        region_type = self.category if self.category != "file" else self.id
+        action = SimActionData(
+            self.state, region_type, kind, addr=addr, data=data, size=ref_size, condition=condition, fallback=fallback
+        )
+
+        action.added_constraints = claripy.true()
+        return action
+
+    def _add_constraints(self, c, *, action=None, **kwargs):
+        if action is not None:
+            action.added_constraints = claripy.And(action.added_constraints, c)
+        return super()._add_constraints(c, action=action, **kwargs)
+
+
+class ActionsMixinLow(MemoryMixin):
+    def load(self, addr, size=None, *, action=None, **kwargs):
+        if action is not None:
+            if action.actual_addrs is None:
+                action.actual_addrs = []
+            action.actual_addrs.append(addr)
+        return super().load(addr, size, action=action, **kwargs)
+
+    def store(self, addr, data, size=None, *, action: SimActionData | None = None, **kwargs):
+        if action is not None:
+            if action.actual_addrs is None:
+                action.actual_addrs = []
+            action.actual_addrs.append(addr)
+            action.actual_value = action._make_object(data)
+        return super().store(addr, data, size, action=action, **kwargs)