angr 9.2.119__py3-none-macosx_11_0_arm64.whl → 9.2.121__py3-none-macosx_11_0_arm64.whl

angr/storage/memory_mixins/convenient_mappings_mixin.py

@@ -5,9 +5,9 @@ import logging
 import claripy
 
 from angr import sim_options as options
-from ...utils.cowdict import ChainMapCOW
-from ...errors import SimMemoryError, SimMemoryMissingError
-from . import MemoryMixin
+from angr.utils.cowdict import ChainMapCOW
+from angr.errors import SimMemoryError, SimMemoryMissingError
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 l = logging.getLogger(name=__name__)
 

angr/storage/memory_mixins/default_filler_mixin.py

@@ -3,10 +3,10 @@ import logging
 
 import claripy
 
-from . import MemoryMixin
-from ... import sim_options as options
-from ...misc.ux import once
-from ...errors import SimMemoryMissingError
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
+from angr import sim_options as options
+from angr.misc.ux import once
+from angr.errors import SimMemoryMissingError
 
 l = logging.getLogger(__name__)
 

angr/storage/memory_mixins/dirty_addrs_mixin.py

@@ -1,5 +1,6 @@
 from __future__ import annotations
-from . import MemoryMixin
+
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 
 class DirtyAddrsMixin(MemoryMixin):

angr/storage/memory_mixins/hex_dumper_mixin.py

@@ -1,8 +1,8 @@
 from __future__ import annotations
 import string
 
-from ...errors import SimValueError
-from . import MemoryMixin
+from angr.errors import SimValueError
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 import contextlib
 
 

angr/storage/memory_mixins/{javavm_memory/javavm_memory_mixin.py → javavm_memory_mixin.py}

@@ -5,9 +5,9 @@ import os
 
 import claripy
 
-from .... import concretization_strategies
-from ....errors import SimUnsatError, SimMemoryAddressError
-from ....engines.soot.values import (
+from angr import concretization_strategies
+from angr.errors import SimUnsatError, SimMemoryAddressError
+from angr.engines.soot.values import (
     SimSootValue_ArrayRef,
     SimSootValue_ArrayBaseRef,
     SimSootValue_InstanceFieldRef,
@@ -16,13 +16,18 @@ from ....engines.soot.values import (
     SimSootValue_StaticFieldRef,
     SimSootValue_StringRef,
 )
-from .. import MemoryMixin
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 
 l = logging.getLogger(name=__name__)
 
 
+# pylint: disable=too-many-positional-arguments
+
+
 class JavaVmMemoryMixin(MemoryMixin):
+    """A memory mixin for JavaVM memory."""
+
     def __init__(
         self,
         memory_id="mem",
@@ -38,7 +43,7 @@ class JavaVmMemoryMixin(MemoryMixin):
 
         self._stack = [] if stack is None else stack
         # delayed import
-        from .. import KeyValueMemory
+        from . import KeyValueMemory  # pylint: disable=import-outside-toplevel
 
         self.heap = KeyValueMemory("mem") if heap is None else heap
         self.vm_static_table = KeyValueMemory("mem") if vm_static_table is None else vm_static_table
@@ -81,7 +86,7 @@ class JavaVmMemoryMixin(MemoryMixin):
         else:
             l.error("Unknown addr type %s", addr)
 
-    def load(self, addr, frame=0, none_if_missing=False):  # pylint: disable=arguments-differ
+    def load(self, addr, frame=0, none_if_missing=False):  # pylint: disable=arguments-differ,arguments-renamed
         if type(addr) is SimSootValue_Local:
             cstack = self._stack[-1 + (-1 * frame)]
             return cstack.load(addr.id, none_if_missing=none_if_missing)
@@ -118,7 +123,7 @@ class JavaVmMemoryMixin(MemoryMixin):
         return None
 
     def push_stack_frame(self):
-        from .. import KeyValueMemory
+        from . import KeyValueMemory  # pylint: disable=import-outside-toplevel
 
         self._stack.append(KeyValueMemory("mem"))
 
@@ -379,11 +384,9 @@ class JavaVmMemoryMixin(MemoryMixin):
     def merge(self, others, merge_conditions, common_ancestor=None):  # pylint: disable=unused-argument
         l.warning("Merging is not implemented for JavaVM memory!")
 
-    def widen(self, others):  # pylint: disable=unused-argument
+    def widen(self, others):  # pylint: disable=no-self-use,unused-argument
         l.warning("Widening is not implemented for JavaVM memory!")
 
-    def _find(
-        self, addr, what, max_search=None, max_symbolic_bytes=None, default=None
-    ):  # pylint: disable=unused-argument
+    # pylint: disable=no-self-use,unused-argument
+    def _find(self, addr, what, max_search=None, max_symbolic_bytes=None, default=None):
         l.warning("Find is not implemented for JavaVM memory!")
-        return

angr/storage/memory_mixins/{keyvalue_memory/keyvalue_memory_mixin.py → keyvalue_memory_mixin.py}

@@ -1,8 +1,11 @@
 from __future__ import annotations
-from .. import MemoryMixin
+
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 
 class TypedVariable:
+    """TypedVariable is a simple class that holds a value and a type."""
+
     __slots__ = (
         "type",
         "value",
@@ -14,18 +17,20 @@ class TypedVariable:
 
 
 class KeyValueMemoryMixin(MemoryMixin):
+    """KeyValueMemoryMixin is a mixin that provides a simple key-value store for memory."""
+
     def __init__(self, *args, **kwargs):
         super().__init__(*args, **kwargs)
 
         self._store = {}
 
-    def load(self, key, none_if_missing=False, **kwargs):
-        if none_if_missing and key not in self._store:
+    def load(self, addr, size=None, none_if_missing=False, **kwargs):  # pylint: disable=unused-argument
+        if none_if_missing and addr not in self._store:
             return None
-        return self._store[key].value
+        return self._store[addr].value
 
-    def store(self, key, data, type_=None, **kwargs):
-        self._store[key] = TypedVariable(type_, data)
+    def store(self, addr, data, type_=None, **kwargs):
+        self._store[addr] = TypedVariable(type_, data)
 
     @MemoryMixin.memo
     def copy(self, memo):

angr/storage/memory_mixins/label_merger_mixin.py

@@ -1,7 +1,7 @@
 from __future__ import annotations
 from collections.abc import Iterable
 
-from . import MemoryMixin
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 
 class LabelMergerMixin(MemoryMixin):

angr/storage/memory_mixins/memory_mixin.py

@@ -0,0 +1,163 @@
+from __future__ import annotations
+
+from collections.abc import Iterable
+from typing import Any
+
+import claripy
+
+from angr.errors import SimMemoryError
+from angr.state_plugins.plugin import SimStatePlugin
+
+
+class MemoryMixin(SimStatePlugin):
+    """
+    Base class for memory mixins. In angr, all memory objects are made by
+    subclassing one or more MemoryMixins, each adding some functionality to the
+    memory object.
+    """
+
+    SUPPORTS_CONCRETE_LOAD = False
+
+    def __init__(self, memory_id=None, endness="Iend_BE"):
+        super().__init__()
+        self.id = memory_id
+        self.endness = endness
+
+    def copy(self, memo):  # pylint:disable=unused-argument
+        o = type(self).__new__(type(self))
+        o.id = self.id
+        o.endness = self.endness
+        return o
+
+    @property
+    def category(self):
+        """
+        Return the category of this SimMemory instance. It can be one of the three following categories: reg, mem,
+        or file.
+        """
+
+        if self.id in ("reg", "mem"):
+            return self.id
+
+        if self.id.startswith("file"):
+            return "file"
+
+        if "_" in self.id:
+            return self.id.split("_")[0]
+
+        raise SimMemoryError(f'Unknown SimMemory category for memory_id "{self.id}"')
+
+    @property
+    def variable_key_prefix(self):
+        s = self.category
+        if s == "file":
+            return (s, self.id)
+        return (s,)
+
+    def find(self, addr, data, max_search, **kwargs):
+        pass
+
+    def _add_constraints(self, c, add_constraints=True, condition=None, **kwargs):  # pylint:disable=unused-argument
+        if add_constraints:
+            to_add = c & condition | ~condition if condition is not None else c
+            self.state.add_constraints(to_add)
+
+    def load(self, addr, size=None, **kwargs):
+        pass
+
+    def store(self, addr, data, **kwargs):
+        pass
+
+    def merge(self, others, merge_conditions, common_ancestor=None) -> bool:
+        pass
+
+    def compare(self, other) -> bool:
+        pass
+
+    def widen(self, others):
+        pass
+
+    def permissions(self, addr, permissions=None, **kwargs):
+        pass
+
+    def map_region(self, addr, length, permissions, init_zero=False, **kwargs):
+        pass
+
+    def unmap_region(self, addr, length, **kwargs):
+        pass
+
+    # Optional interface:
+    def concrete_load(self, addr, size, writing=False, **kwargs) -> memoryview:
+        """
+        Set SUPPORTS_CONCRETE_LOAD to True and implement concrete_load if reading concrete bytes is faster in this
+        memory model.
+
+        :param addr:    The address to load from.
+        :param size:    Size of the memory read.
+        :param writing:
+        :return:        A memoryview into the loaded bytes.
+        """
+        raise NotImplementedError
+
+    def erase(self, addr, size=None, **kwargs) -> None:
+        """
+        Set [addr:addr+size) to uninitialized. In many cases this will be faster than overwriting those locations with
+        new values. This is commonly used during static data flow analysis.
+
+        :param addr:    The address to start erasing.
+        :param size:    The number of bytes for erasing.
+        :return:        None
+        """
+        raise NotImplementedError
+
+    def _default_value(  # pylint:disable=too-many-positional-arguments
+        self, addr, size, name=None, inspect=True, events=True, key=None, **kwargs
+    ):
+        """
+        Override this method to provide default values for a variety of edge cases and base cases.
+
+        :param addr:    If this value is being filled to provide a default memory value, this will be its address.
+                        Otherwise, None.
+        :param size:    The size in bytes of the value to return
+        :param name:    A descriptive identifier for the value, for if a symbol is created.
+
+        The ``inspect``, ``events``, and ``key`` parameters are for ``state.solver.Unconstrained``, if it is used.
+        """
+
+    def _merge_values(self, values: Iterable[tuple[Any, Any]], merged_size: int, **kwargs) -> Any | None:
+        """
+        Override this method to provide value merging support.
+
+        :param values:          A collection of values with their merge conditions.
+        :param merged_size:     The size (in bytes) of the merged value.
+        :return:                The merged value, or None to skip merging of the current value.
+        """
+        raise NotImplementedError
+
+    def _merge_labels(self, labels: Iterable[dict], **kwargs) -> dict | None:
+        """
+        Override this method to provide label merging support.
+
+        :param labels:          A collection of labels.
+        :return:                The merged label, or None to skip merging of the current label.
+        """
+        raise NotImplementedError
+
+    def replace_all(self, old: claripy.ast.BV, new: claripy.ast.BV):
+        raise NotImplementedError
+
+    def _replace_all(self, addrs: Iterable[int], old: claripy.ast.BV, new: claripy.ast.BV):
+        raise NotImplementedError
+
+    def copy_contents(self, dst, src, size, condition=None, **kwargs):
+        """
+        Override this method to provide faster copying of large chunks of data.
+
+        :param dst:     The destination of copying.
+        :param src:     The source of copying.
+        :param size:    The size of copying.
+        :param condition:   The storing condition.
+        :param kwargs:      Other parameters.
+        :return:        None
+        """
+        raise NotImplementedError

angr/storage/memory_mixins/multi_value_merger_mixin.py

@@ -3,7 +3,7 @@ from __future__ import annotations
 from typing import Any
 from collections.abc import Iterable, Callable
 
-from . import MemoryMixin
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 
 class MultiValueMergerMixin(MemoryMixin):

angr/storage/memory_mixins/name_resolution_mixin.py

@@ -1,7 +1,9 @@
 from __future__ import annotations
+
 import claripy
 from archinfo.arch_arm import is_arm_arch
-from . import MemoryMixin
+
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 stn_map = {"st%d" % n: n for n in range(8)}
 tag_map = {"tag%d" % n: n for n in range(8)}
@@ -15,7 +17,7 @@ class NameResolutionMixin(MemoryMixin):
 
     def _resolve_location_name(self, name, is_write=False):
         # Delayed load so SimMemory does not rely on SimEngines
-        from ...engines.vex.claripy.ccall import _get_flags
+        from angr.engines.vex.claripy.ccall import _get_flags
 
         if self.category == "reg":
             if self.state.arch.name in ("X86", "AMD64"):
@@ -64,4 +66,4 @@ class NameResolutionMixin(MemoryMixin):
         return super().load(addr, size=size, **kwargs)
 
 
-from ...errors import SimMemoryError
+from angr.errors import SimMemoryError

angr/storage/memory_mixins/paged_memory/paged_memory_mixin.py

@@ -7,9 +7,9 @@ from collections import defaultdict
 
 import claripy
 
-from angr.storage.memory_mixins import MemoryMixin
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 from angr.storage.memory_mixins.paged_memory.pages import PageType, ListPage, UltraPage, MVListPage
-from ....errors import SimMemoryError
+from angr.errors import SimMemoryError
 
 # yeet
 ffi = cffi.FFI()

angr/storage/memory_mixins/paged_memory/paged_memory_multivalue_mixin.py

@@ -1,5 +1,6 @@
 from __future__ import annotations
-from .. import MemoryMixin
+
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 
 class PagedMemoryMultiValueMixin(MemoryMixin):

angr/storage/memory_mixins/paged_memory/pages/__init__.py

@@ -1,7 +1,7 @@
 from __future__ import annotations
 import typing
 
-from angr.storage.memory_mixins import MemoryMixin
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 from .cooperation import CooperationBase, MemoryObjectMixin
 from .ispo_mixin import ISPOMixin
 from .refcount_mixin import RefcountMixin
@@ -30,3 +30,18 @@ PageType = typing.TypeVar("PageType", bound=PageBase)
 from .list_page import ListPage
 from .mv_list_page import MVListPage
 from .ultra_page import UltraPage
+
+
+__all__ = (
+    "CooperationBase",
+    "MemoryObjectMixin",
+    "ISPOMixin",
+    "RefcountMixin",
+    "PermissionsMixin",
+    "HistoryTrackingMixin",
+    "PageBase",
+    "PageType",
+    "ListPage",
+    "MVListPage",
+    "UltraPage",
+)

angr/storage/memory_mixins/paged_memory/pages/history_tracking_mixin.py

@@ -1,7 +1,7 @@
 # pylint:disable=arguments-differ,unused-argument,no-member
 from __future__ import annotations
 
-from angr.storage.memory_mixins import MemoryMixin
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 from angr.utils.segment_list import SegmentList
 from .refcount_mixin import RefcountMixin
 

angr/storage/memory_mixins/paged_memory/pages/ispo_mixin.py

@@ -1,6 +1,7 @@
 # pylint:disable=arguments-differ
 from __future__ import annotations
-from angr.storage.memory_mixins import MemoryMixin
+
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 
 class ISPOMixin(MemoryMixin):

angr/storage/memory_mixins/paged_memory/pages/mv_list_page.py

@@ -5,7 +5,7 @@ from typing import Union, Any
 from collections.abc import Callable
 
 from angr.utils.dynamic_dictlist import DynamicDictList
-from .....storage.memory_object import SimMemoryObject, SimLabeledMemoryObject
+from angr.storage.memory_object import SimMemoryObject, SimLabeledMemoryObject
 from . import PageBase
 from .cooperation import MemoryObjectSetMixin
 

angr/storage/memory_mixins/paged_memory/pages/permissions_mixin.py

@@ -1,7 +1,7 @@
 from __future__ import annotations
 import claripy
 
-from angr.storage.memory_mixins import MemoryMixin
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 
 class PermissionsMixin(MemoryMixin):

angr/storage/memory_mixins/paged_memory/pages/refcount_mixin.py

@@ -1,5 +1,6 @@
 from __future__ import annotations
-from angr.storage.memory_mixins import MemoryMixin
+
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 from angr.misc import PicklableLock
 
 

angr/storage/memory_mixins/paged_memory/pages/ultra_page.py

@@ -8,7 +8,7 @@ from sortedcontainers import SortedDict
 
 import claripy
 
-from .....errors import SimMemoryError
+from angr.errors import SimMemoryError
 from . import PageBase
 from .cooperation import MemoryObjectMixin, SimMemoryObject
 
@@ -455,7 +455,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
                     replaced_object = replaced_objects_cache[mo.object]
 
             else:
-                replaced_object = mo.object.replace(old, new)
+                replaced_object = claripy.replace(mo.object, old, new)
                 replaced_objects_cache[mo.object] = replaced_object
                 if mo.object is replaced_object:
                     # The replace does not really occur

angr/storage/memory_mixins/paged_memory/stack_allocation_mixin.py

@@ -2,8 +2,8 @@ from __future__ import annotations
 import logging
 
 from .paged_memory_mixin import PagedMemoryMixin
-from ....errors import SimSegfaultException, SimMemoryError
-from ....sim_options import STRICT_PAGE_ACCESS
+from angr.errors import SimSegfaultException, SimMemoryError
+from angr.sim_options import STRICT_PAGE_ACCESS
 
 l = logging.getLogger(__name__)
 

angr/storage/memory_mixins/regioned_memory/__init__.py

@@ -1,7 +1,17 @@
 from __future__ import annotations
+
 from .regioned_memory_mixin import RegionedMemoryMixin
 from .region_category_mixin import RegionCategoryMixin
 from .static_find_mixin import StaticFindMixin
 from .abstract_merger_mixin import AbstractMergerMixin
 from .region_meta_mixin import MemoryRegionMetaMixin
 from .regioned_address_concretization_mixin import RegionedAddressConcretizationMixin
+
+__all__ = (
+    "RegionedMemoryMixin",
+    "RegionCategoryMixin",
+    "StaticFindMixin",
+    "AbstractMergerMixin",
+    "MemoryRegionMetaMixin",
+    "RegionedAddressConcretizationMixin",
+)

angr/storage/memory_mixins/regioned_memory/abstract_merger_mixin.py

@@ -4,8 +4,7 @@ import logging
 from collections.abc import Iterable
 from typing import Any
 
-
-from .. import MemoryMixin
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 l = logging.getLogger(name=__name__)
 

angr/storage/memory_mixins/regioned_memory/region_category_mixin.py

@@ -1,5 +1,6 @@
 from __future__ import annotations
-from .. import MemoryMixin
+
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 
 class RegionCategoryMixin(MemoryMixin):

angr/storage/memory_mixins/regioned_memory/region_data.py

@@ -3,8 +3,8 @@ from sortedcontainers import SortedDict
 
 import claripy
 
-from ....errors import SimRegionMapError
-from ....state_plugins import SimStatePlugin
+from angr.errors import SimRegionMapError
+from angr.state_plugins import SimStatePlugin
 
 
 class AddressWrapper:

angr/storage/memory_mixins/regioned_memory/region_meta_mixin.py

@@ -2,7 +2,7 @@ from __future__ import annotations
 import copy
 from typing import Any
 
-from .. import MemoryMixin
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 
 
 class Segment:

angr/storage/memory_mixins/regioned_memory/regioned_address_concretization_mixin.py

@@ -3,10 +3,10 @@ from collections.abc import Generator
 
 import claripy
 
-from ....sim_options import HYBRID_SOLVER, APPROXIMATE_FIRST
-from .... import concretization_strategies
-from ....errors import SimMergeError, SimMemoryAddressError
-from .. import MemoryMixin
+from angr.sim_options import HYBRID_SOLVER, APPROXIMATE_FIRST
+from angr import concretization_strategies
+from angr.errors import SimMergeError, SimMemoryAddressError
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 from .abstract_address_descriptor import AbstractAddressDescriptor
 from .region_data import AddressWrapper
 

angr/storage/memory_mixins/regioned_memory/regioned_memory_mixin.py

@@ -8,20 +8,15 @@ import claripy
 from claripy.annotation import RegionAnnotation
 from claripy.ast import Bool, Bits, BV
 
-from ....sim_options import (
-    AVOID_MULTIVALUED_READS,
-    CONSERVATIVE_READ_STRATEGY,
-    KEEP_MEMORY_READS_DISCRETE,
-    CONSERVATIVE_WRITE_STRATEGY,
-)
-from ....state_plugins.sim_action_object import _raw_ast
-from ....errors import SimMemoryError, SimAbstractMemoryError
-from .. import MemoryMixin
+from angr.sim_options import AVOID_MULTIVALUED_READS, CONSERVATIVE_READ_STRATEGY, CONSERVATIVE_WRITE_STRATEGY
+from angr.state_plugins.sim_action_object import _raw_ast
+from angr.errors import SimMemoryError, SimAbstractMemoryError
+from angr.storage.memory_mixins.memory_mixin import MemoryMixin
 from .region_data import AddressWrapper, RegionMap
 from .abstract_address_descriptor import AbstractAddressDescriptor
 
 if TYPE_CHECKING:
-    from ....sim_state import SimState
+    from angr.sim_state import SimState
 
 
 _l = logging.getLogger(name=__name__)
@@ -59,7 +54,7 @@ class RegionedMemoryMixin(MemoryMixin):
 
         if regioned_memory_cls is None:
             # delayed import
-            from .. import RegionedMemory  # pylint:disable=import-outside-toplevel
+            from angr.storage.memory_mixins import RegionedMemory  # pylint:disable=import-outside-toplevel
 
             regioned_memory_cls = RegionedMemory
 
@@ -126,13 +121,7 @@ class RegionedMemoryMixin(MemoryMixin):
                 **kwargs,
             )
 
-            if val is None:
-                if KEEP_MEMORY_READS_DISCRETE in self.state.options:
-                    val = self.state.solver.DSIS(to_conv=new_val, max_card=100000)
-                else:
-                    val = new_val
-            else:
-                val = val.union(new_val)
+            val = new_val if val is None else val.union(new_val)
 
         if val is None:
             # address_wrappers is empty - we cannot concretize the address in static mode.
@@ -358,7 +347,6 @@ class RegionedMemoryMixin(MemoryMixin):
 
         :param addr:
         :param is_write:
-        :param convert_to_valueset:
         :param target_region:
         :return:
         """
@@ -426,7 +414,7 @@ class RegionedMemoryMixin(MemoryMixin):
     def _apply_condition_to_symbolic_addr(addr, condition):
         _, converted = claripy.constraint_to_si(condition)
         for original_expr, constrained_expr in converted:
-            addr = addr.replace(original_expr, constrained_expr)
+            addr = claripy.replace(addr, original_expr, constrained_expr)
         return addr
 
     @staticmethod

angr/storage/memory_mixins/regioned_memory/static_find_mixin.py

@@ -1,7 +1,7 @@
 from __future__ import annotations
 import claripy
 
-from ..smart_find_mixin import SmartFindMixin
+from angr.storage.memory_mixins.smart_find_mixin import SmartFindMixin
 
 
 class StaticFindMixin(SmartFindMixin):  # pylint:disable=abstract-method