angr 9.2.118__py3-none-macosx_11_0_arm64.whl → 9.2.120__py3-none-macosx_11_0_arm64.whl

angr/sim_type.py

@@ -1,24 +1,21 @@
 # pylint:disable=abstract-method,line-too-long,missing-class-docstring,wrong-import-position
 from __future__ import annotations
-from __future__ import annotations
 
 import contextlib
-from collections import OrderedDict, defaultdict, ChainMap
 import copy
 import re
-from typing import Literal, Optional, Any, Union, TYPE_CHECKING, cast, overload
-from collections.abc import Iterable
 import logging
-
-try:
-    import CppHeaderParser
-except ImportError:
-    CppHeaderParser = None
+from collections import OrderedDict, defaultdict, ChainMap
+from collections.abc import Iterable
+from typing import Literal, Any, TYPE_CHECKING, cast, overload
 
 from archinfo import Endness, Arch
 import claripy
+import CppHeaderParser
+import pycparser
 
 from angr.errors import AngrMissingTypeError, AngrTypeError
+from angr.sim_state import SimState
 from .misc.ux import deprecated
 
 if TYPE_CHECKING:
@@ -26,12 +23,7 @@ if TYPE_CHECKING:
     from angr.procedures.definitions import SimTypeCollection
     from angr.storage.memory_mixins import _Coerce
 
-    StoreType = Union[_Coerce, claripy.ast.BV]
-else:
-    try:
-        import pycparser
-    except ImportError:
-        pycparser = None
+    StoreType = _Coerce
 
 
 l = logging.getLogger(name=__name__)
@@ -69,7 +61,7 @@ class SimType:
         return self_type.__eq__(other, avoid=avoid)  # pylint:disable=unnecessary-dunder-call
 
     def __eq__(self, other, avoid=None):
-        if type(self) != type(other):
+        if type(self) is not type(other):
             return False
 
         for attr in self._fields:
@@ -495,6 +487,48 @@ class SimTypeLongLong(SimTypeInt):
     _base_name = "long long"
 
 
+class SimTypeFixedSizeInt(SimTypeInt):
+    """
+    The base class for all fixed-size (i.e., the size stays the same on all platforms) integer types. Do not
+    instantiate this class directly.
+    """
+
+    _base_name: str = "int"
+    _fixed_size: int = 32
+
+    def c_repr(self, name=None, full=0, memo=None, indent=0):
+        out = self._base_name
+        if not self.signed:
+            out = "u" + out
+        if name is None:
+            return out
+        return f"{out} {name}"
+
+    def __repr__(self) -> str:
+        name = self._base_name
+        if not self.signed:
+            name = "u" + name
+
+        try:
+            return name + " (%d bits)" % self.size
+        except ValueError:
+            return name
+
+    @property
+    def size(self) -> int:
+        return self._fixed_size
+
+
+class SimTypeInt128(SimTypeFixedSizeInt):
+    _base_name = "int128_t"
+    _fixed_size = 128
+
+
+class SimTypeInt256(SimTypeFixedSizeInt):
+    _base_name = "int256_t"
+    _fixed_size = 256
+
+
 class SimTypeChar(SimTypeReg):
     """
     SimTypeChar is a type that specifies a character;
@@ -3457,7 +3491,7 @@ def parse_cpp_file(cpp_decl, with_param_names: bool = False):
     func_decls: dict[str, SimTypeCppFunction] = {}
     for the_func in h.functions:
         # FIXME: We always assume that there is a "this" pointer but it is not the case for static methods.
-        proto = cast(Optional[SimTypeCppFunction], _cpp_decl_to_type(the_func, {}, opaque_classes=True))
+        proto = cast(SimTypeCppFunction | None, _cpp_decl_to_type(the_func, {}, opaque_classes=True))
         if proto is not None and the_func["class"]:
             func_name = cast(str, the_func["class"] + "::" + the_func["name"])
             proto.args = (
@@ -3557,4 +3591,3 @@ struct timeval {
     )
 
 from .state_plugins.view import SimMemView
-from .state_plugins import SimState

angr/simos/__init__.py

@@ -31,3 +31,15 @@ register_simos("windows", SimWindows)
 register_simos("cgc", SimCGC)
 register_simos("javavm", SimJavaVM)
 register_simos("snimmuc_nxp", SimSnimmucNxp)
+
+
+__all__ = (
+    "SimOS",
+    "SimUserland",
+    "SimLinux",
+    "SimCGC",
+    "SimWindows",
+    "SimJavaVM",
+    "SimSnimmucNxp",
+    "os_mapping",
+)

angr/simos/cgc.py

@@ -4,9 +4,9 @@ import logging
 import claripy
 from cle import BackedCGC
 
-from ..procedures import SIM_LIBRARIES as L
-from ..state_plugins import SimActionData
-from .. import sim_options as o
+from angr.procedures import SIM_LIBRARIES as L
+from angr.state_plugins import SimActionData
+from angr import sim_options as o
 from .userland import SimUserland
 
 _l = logging.getLogger(name=__name__)
@@ -27,9 +27,9 @@ class SimCGC(SimUserland):
         :param allocate_stack_page_count:   Number of pages to pre-allocate for stack
         """
         # default stack as specified in the cgc abi
-        if kwargs.get("stack_end", None) is None:
+        if kwargs.get("stack_end") is None:
             kwargs["stack_end"] = 0xBAAAB000
-        if kwargs.get("stack_size", None) is None:
+        if kwargs.get("stack_size") is None:
             kwargs["stack_size"] = 1024 * 1024 * 8
 
         s = super().state_blank(**kwargs)  # pylint:disable=invalid-name

angr/simos/javavm.py

@@ -1,25 +1,27 @@
 from __future__ import annotations
+
 import logging
 
-from angr import SIM_PROCEDURES, options
 from archinfo.arch_soot import ArchSoot, SootAddressDescriptor, SootAddressTerminator, SootArgument, SootNullConstant
 from claripy import BVS, BVV, StringS, StringV, FSORT_FLOAT, FSORT_DOUBLE, FPV, FPS
 from claripy.ast.fp import FP, fpToIEEEBV
 from claripy.ast.bv import BV
 
-from ..calling_conventions import default_cc, SimCCSoot
-from ..engines.soot import SootMixin
-from ..engines.soot.expressions import SimSootExpr_NewArray  # , SimSootExpr_NewMultiArray
-from ..engines.soot.values import (
+from angr import SIM_PROCEDURES, options
+
+from angr.calling_conventions import default_cc, SimCCSoot
+from angr.engines.soot import SootMixin
+from angr.engines.soot.expressions import SimSootExpr_NewArray
+from angr.engines.soot.values import (
     SimSootValue_ArrayRef,
     SimSootValue_StringRef,
     SimSootValue_ThisRef,
     SimSootValue_StaticFieldRef,
 )
-from ..errors import AngrSimOSError
-from ..procedures.java_jni import jni_functions
-from ..sim_state import SimState
-from ..sim_type import SimTypeFunction, SimTypeNum
+from angr.errors import AngrSimOSError
+from angr.procedures.java_jni import jni_functions
+from angr.sim_state import SimState
+from angr.sim_type import SimTypeFunction, SimTypeNum
 from .simos import SimOS
 
 l = logging.getLogger("angr.simos.JavaVM")
@@ -100,16 +102,12 @@ class SimJavaVM(SimOS):
     #
 
     def state_blank(self, addr=None, **kwargs):  # pylint: disable=arguments-differ
-        if not kwargs.get("mode", None):
+        if not kwargs.get("mode"):
             kwargs["mode"] = self.project._default_analysis_mode
-        if not kwargs.get("arch", None):
+        if not kwargs.get("arch"):
             kwargs["arch"] = self.arch
-        if not kwargs.get("os_name", None):
+        if not kwargs.get("os_name"):
             kwargs["os_name"] = self.name
-        # enable support for string analysis
-        add_options = kwargs.get("add_options", set())
-        add_options.add(options.COMPOSITE_SOLVER)
-        kwargs["add_options"] = add_options
 
         if self.is_javavm_with_jni_support:
             # If the JNI support is enabled (i.e. JNI libs are loaded), the SimState
@@ -163,7 +161,7 @@ class SimJavaVM(SimOS):
 
         # initialize class containing the current method
         state.javavm_classloader.get_class(
-            state.addr.method.class_name, init_class=True, step_func=kwargs.get("step_function", None)
+            state.addr.method.class_name, init_class=True, step_func=kwargs.get("step_function")
         )
 
         # initialize the Java environment
@@ -194,13 +192,13 @@ class SimJavaVM(SimOS):
         return state
 
     @staticmethod
-    def generate_symbolic_cmd_line_arg(state, max_length=1000):
+    def generate_symbolic_cmd_line_arg(state):
         """
         Generates a new symbolic cmd line argument string.
         :return: The string reference.
         """
         str_ref = SimSootValue_StringRef(state.memory.get_new_uuid())
-        str_sym = StringS("cmd_line_arg", max_length)
+        str_sym = StringS("cmd_line_arg")
         state.solver.add(str_sym != StringV(""))
         state.memory.store(str_ref, str_sym)
         return str_ref
@@ -312,7 +310,7 @@ class SimJavaVM(SimOS):
         if type_ == "double":
             return FPS(f"default_value_{type_}", FSORT_DOUBLE)
         if type_ == "java.lang.String":
-            return SimSootValue_StringRef.new_string(state, StringS(f"default_value_{type_}", 1000))
+            return SimSootValue_StringRef.new_string(state, StringS(f"default_value_{type_}"))
         if type_.endswith("[][]"):
             raise NotImplementedError
         if type_.endswith("[]"):
@@ -435,9 +433,6 @@ class SimJavaVM(SimOS):
         jni_type_size = ArchSoot.sizeof.get(java_type, self.native_simos.arch.bits)
         return SimTypeNum(size=jni_type_size)
 
-    def get_method_native_type(self, method):
-        return SimTypeFunction
-
     @property
     def native_arch(self):
         """

angr/simos/linux.py

@@ -11,11 +11,11 @@ from cle.address_translator import AT
 from cle.backends.elf.relocation.arm64 import R_AARCH64_TLSDESC
 from archinfo import ArchX86, ArchAMD64, ArchARM, ArchAArch64, ArchMIPS32, ArchMIPS64, ArchPPC32, ArchPPC64
 
-from ..tablespecs import StringTableSpec
-from ..procedures import SIM_PROCEDURES as P, SIM_LIBRARIES as L
-from ..state_plugins import SimFilesystem, SimHostFilesystem
-from ..storage.file import SimFile, SimFileBase
-from ..errors import AngrSyscallError
+from angr.tablespecs import StringTableSpec
+from angr.procedures import SIM_PROCEDURES as P, SIM_LIBRARIES as L
+from angr.state_plugins import SimFilesystem, SimHostFilesystem
+from angr.storage.file import SimFile, SimFileBase
+from angr.errors import AngrSyscallError
 from .userland import SimUserland
 
 _l = logging.getLogger(name=__name__)
@@ -238,7 +238,7 @@ class SimLinux(SimUserland):
                 fs[name] = fs[name].encode("utf-8")
             if type(fs[name]) is bytes:
                 fs[name] = claripy.BVV(fs[name])
-            if isinstance(fs[name], claripy.Bits):
+            if isinstance(fs[name], claripy.ast.Bits):
                 fs[name] = SimFile(name, content=fs[name])
             if not isinstance(fs[name], SimFileBase):
                 raise TypeError(f"Provided fs initializer with unusable type {type(fs[name])!r}")

angr/simos/simos.py

@@ -6,17 +6,13 @@ from archinfo import ArchMIPS32, ArchS390X
 import claripy
 
 import angr
-from ..errors import (
-    AngrCallableError,
-    AngrCallableMultistateError,
-    AngrSimOSError,
-)
-from ..sim_state import SimState
-from ..state_plugins import SimSystemPosix
-from ..calling_conventions import default_cc
-from ..procedures import SIM_PROCEDURES as P
-from .. import sim_options as o
-from ..storage.file import SimFileStream, SimFileBase
+from angr.errors import AngrCallableError, AngrCallableMultistateError, AngrSimOSError
+from angr.sim_state import SimState
+from angr.state_plugins import SimSystemPosix
+from angr.calling_conventions import default_cc
+from angr.procedures import SIM_PROCEDURES as P
+from angr import sim_options as o
+from angr.storage.file import SimFileStream, SimFileBase
 
 
 _l = logging.getLogger(name=__name__)
@@ -112,20 +108,20 @@ class SimOS:
         Any additional arguments will be passed to the SimState constructor
         """
         # TODO: move ALL of this into the SimState constructor
-        if kwargs.get("mode", None) is None:
+        if kwargs.get("mode") is None:
             kwargs["mode"] = self.project._default_analysis_mode
         if permissions_backer is not None:
             kwargs["permissions_map"] = permissions_backer[1]
             kwargs["default_permissions"] = 7 if permissions_backer[0] else 3
-        if kwargs.get("cle_memory_backer", None) is None:
+        if kwargs.get("cle_memory_backer") is None:
             kwargs["cle_memory_backer"] = self.project.loader
-        if kwargs.get("os_name", None) is None:
+        if kwargs.get("os_name") is None:
             kwargs["os_name"] = self.name
         actual_stack_end = stack_end
         if stack_end is None:
             stack_end = self.arch.initial_sp
 
-        if kwargs.get("permissions_map", None) is None:
+        if kwargs.get("permissions_map") is None:
             # just a dict of address ranges to permission bits
             permission_map = {}
             for obj in self.project.loader.all_objects:
@@ -149,7 +145,7 @@ class SimOS:
             if type(stdin) is type:
                 stdin = stdin(name="stdin", has_end=False)
             else:
-                if isinstance(stdin, claripy.Bits):
+                if isinstance(stdin, claripy.ast.Bits):
                     num_bytes = len(stdin) // self.project.arch.byte_width
                 else:
                     num_bytes = len(stdin)

angr/simos/userland.py

@@ -1,9 +1,9 @@
 from __future__ import annotations
 import logging
 
-from ..calling_conventions import SYSCALL_CC, SimCCSyscall
-from ..errors import AngrUnsupportedSyscallError, SimSolverError
-from ..procedures import SIM_PROCEDURES as P
+from angr.calling_conventions import SYSCALL_CC, SimCCSyscall
+from angr.errors import AngrUnsupportedSyscallError, SimSolverError
+from angr.procedures import SIM_PROCEDURES as P
 from .simos import SimOS
 
 _l = logging.getLogger(name=__name__)

angr/simos/windows.py

@@ -10,16 +10,11 @@ import claripy
 from archinfo import ArchX86, ArchAMD64
 import cle.backends
 
-from ..errors import (
-    AngrSimOSError,
-    SimSegfaultException,
-    SimUnsupportedError,
-    SimZeroDivisionException,
-)
-from .. import sim_options as o
-from ..tablespecs import StringTableSpec
-from ..procedures import SIM_LIBRARIES as L
-from ..procedures.definitions import load_win32api_definitions
+from angr.errors import AngrSimOSError, SimSegfaultException, SimUnsupportedError, SimZeroDivisionException
+from angr import sim_options as o
+from angr.tablespecs import StringTableSpec
+from angr.procedures import SIM_LIBRARIES as L
+from angr.procedures.definitions import load_win32api_definitions
 from .simos import SimOS
 
 _l = logging.getLogger(name=__name__)
@@ -422,7 +417,7 @@ class SimWindows(SimOS):
 
         # let's go let's go!
         # we want to use a true guard here. if it's not true, then it's already been added in windup.
-        successors.add_successor(exc_state, self._exception_handler, claripy.true, "Ijk_Exception")
+        successors.add_successor(exc_state, self._exception_handler, claripy.true(), "Ijk_Exception")
         successors.processed = True
 
     # these two methods load and store register state from a struct CONTEXT

angr/state_hierarchy.py

@@ -213,7 +213,7 @@ class StateHierarchy:
                 n()._satisfiable = False
                 try:
                     if n().state is not None:
-                        n().state.add_constraints(claripy.false)
+                        n().state.add_constraints(claripy.false())
                 except ReferenceError:
                     pass
             self._graph.remove_nodes_from(all_children)

angr/state_plugins/__init__.py

@@ -1,30 +1,86 @@
-# pylint:disable=wildcard-import
 from __future__ import annotations
-from .plugin import *
-from .libc import *
-from .inspect import *
-from .posix import *
-from .solver import *
-from .light_registers import *
-from .log import *
-from .history import *
-from .scratch import *
-from .cgc import *
-from .gdb import *
-from .uc_manager import *
+
+from .plugin import SimStatePlugin
+from .libc import SimStateLibc
+from .inspect import SimInspector, NO_OVERRIDE, BP_BEFORE, BP_AFTER, BP_BOTH, BP_IPDB, BP_IPYTHON
+from .posix import PosixDevFS, PosixProcFS, SimSystemPosix
+from .solver import SimSolver
+from .light_registers import SimLightRegisters
+from .log import SimStateLog
+from .history import SimStateHistory
+from .scratch import SimStateScratch
+from .cgc import SimStateCGC
+from .gdb import GDB
+from .uc_manager import SimUCManager
 from .unicorn_engine import Unicorn
-from .sim_action import *
-from .sim_action_object import *
-from .sim_event import *
-from .callstack import *
-from .globals import *
-from .preconstrainer import *
-from .loop_data import *
-from .view import *
-from .filesystem import *
-from .heap import *
-from .concrete import *
-from .jni_references import *
-from .javavm_classloader import *
-from .symbolizer import *
-from .debug_variables import *
+from .sim_action import SimAction, SimActionExit, SimActionConstraint, SimActionOperation, SimActionData
+from .sim_action_object import SimActionObject
+from .sim_event import SimEvent, resource_event
+from .callstack import CallStack
+from .globals import SimStateGlobals
+from .preconstrainer import SimStatePreconstrainer
+from .loop_data import SimStateLoopData
+from .view import SimRegNameView, SimMemView, StructMode
+from .filesystem import Stat, SimFilesystem, SimMount, SimHostFilesystem
+from .heap import SimHeapBase, SimHeapBrk, SimHeapLibc, SimHeapPTMalloc, PTChunk, PTChunkIterator
+from .concrete import Concrete
+from .jni_references import SimStateJNIReferences
+from .javavm_classloader import SimJavaVmClassloader
+from .symbolizer import SimSymbolizer
+from .debug_variables import SimDebugVariable, SimDebugVariablePlugin
+
+
+__all__ = (
+    "SimStatePlugin",
+    "SimStateLibc",
+    "SimInspector",
+    "NO_OVERRIDE",
+    "BP_BEFORE",
+    "BP_AFTER",
+    "BP_BOTH",
+    "BP_IPDB",
+    "BP_IPYTHON",
+    "PosixDevFS",
+    "PosixProcFS",
+    "SimSystemPosix",
+    "SimSolver",
+    "SimLightRegisters",
+    "SimStateLog",
+    "SimStateHistory",
+    "SimStateScratch",
+    "SimStateCGC",
+    "GDB",
+    "SimUCManager",
+    "Unicorn",
+    "SimAction",
+    "SimActionExit",
+    "SimActionConstraint",
+    "SimActionOperation",
+    "SimActionData",
+    "SimActionObject",
+    "SimEvent",
+    "resource_event",
+    "CallStack",
+    "SimStateGlobals",
+    "SimStatePreconstrainer",
+    "SimStateLoopData",
+    "SimRegNameView",
+    "SimMemView",
+    "StructMode",
+    "Stat",
+    "SimFilesystem",
+    "SimMount",
+    "SimHostFilesystem",
+    "SimHeapBase",
+    "SimHeapBrk",
+    "SimHeapLibc",
+    "SimHeapPTMalloc",
+    "PTChunk",
+    "PTChunkIterator",
+    "Concrete",
+    "SimStateJNIReferences",
+    "SimJavaVmClassloader",
+    "SimSymbolizer",
+    "SimDebugVariable",
+    "SimDebugVariablePlugin",
+)

angr/state_plugins/callstack.py

@@ -5,7 +5,7 @@ import logging
 from collections.abc import Iterator
 
 from .plugin import SimStatePlugin
-from ..errors import AngrError, SimEmptyCallStackError
+from angr.errors import AngrError, SimEmptyCallStackError
 
 l = logging.getLogger(name=__name__)
 

angr/state_plugins/concrete.py

@@ -7,11 +7,10 @@ import re
 import struct
 
 from .plugin import SimStatePlugin
-from ..errors import SimConcreteRegisterError
+from angr.errors import SimConcreteRegisterError
 from archinfo import ArchX86, ArchAMD64
 
 l = logging.getLogger("state_plugin.concrete")
-# l.setLevel(logging.DEBUG)
 
 
 class Concrete(SimStatePlugin):
@@ -290,7 +289,7 @@ class Concrete(SimStatePlugin):
                                 new_reloc.relocate([])
 
 
-from ..sim_state import SimState
-from .. import sim_options as options
+from angr.sim_state import SimState
+from angr import sim_options as options
 
 SimState.register_default("concrete", Concrete)

angr/state_plugins/filesystem.py

@@ -4,9 +4,9 @@ import logging
 from collections import namedtuple
 
 from .plugin import SimStatePlugin
-from ..storage.file import SimFile
-from ..errors import SimMergeError
-from ..misc.ux import once
+from angr.storage.file import SimFile
+from angr.errors import SimMergeError
+from angr.misc.ux import once
 
 l = logging.getLogger(name=__name__)
 

angr/state_plugins/gdb.py

@@ -6,7 +6,7 @@ import claripy
 import binascii
 
 from .plugin import SimStatePlugin
-from ..errors import SimStateError
+from angr.errors import SimStateError
 
 l = logging.getLogger(name=__name__)
 

angr/state_plugins/heap/__init__.py

@@ -1,6 +1,15 @@
-# pylint:disable=wildcard-import
 from __future__ import annotations
-from .heap_base import *
-from .heap_brk import *
-from .heap_libc import *
-from .heap_ptmalloc import *
+
+from .heap_base import SimHeapBase
+from .heap_brk import SimHeapBrk
+from .heap_libc import SimHeapLibc
+from .heap_ptmalloc import SimHeapPTMalloc, PTChunk, PTChunkIterator
+
+__all__ = (
+    "SimHeapBase",
+    "SimHeapBrk",
+    "SimHeapLibc",
+    "SimHeapPTMalloc",
+    "PTChunk",
+    "PTChunkIterator",
+)

angr/state_plugins/heap/heap_base.py

@@ -1,11 +1,12 @@
 from __future__ import annotations
-from ..plugin import SimStatePlugin
-
-from ...errors import SimMemoryError
-from .. import sim_options as opts
 
 import logging
 
+import angr.sim_options as opts
+from angr.state_plugins.plugin import SimStatePlugin
+from angr.errors import SimMemoryError
+
+
 l = logging.getLogger("angr.state_plugins.heap.heap_base")
 
 # TODO: derive heap location from SimOS and binary info for something more realistic (and safe?)

angr/state_plugins/heap/heap_brk.py

@@ -4,7 +4,7 @@ import logging
 import claripy
 
 from angr.errors import SimSolverError
-from ..plugin import SimStatePlugin
+from angr.state_plugins.plugin import SimStatePlugin
 from . import SimHeapBase
 
 l = logging.getLogger(__name__)

angr/state_plugins/heap/heap_freelist.py

@@ -2,7 +2,7 @@ from __future__ import annotations
 import logging
 from . import SimHeapLibc
 from .utils import concretize
-from ...errors import SimHeapError
+from angr.errors import SimHeapError
 
 
 l = logging.getLogger("angr.state_plugins.heap.heap_freelist")