angr 9.2.102__py3-none-win_amd64.whl → 9.2.103__py3-none-win_amd64.whl

angr/storage/memory_mixins/paged_memory/pages/multi_values.py

@@ -1,4 +1,5 @@
-from typing import Dict, Optional, Set, Tuple, Iterator, Union
+from typing import Union
+from collections.abc import Iterator
 import archinfo
 
 import claripy
@@ -19,12 +20,12 @@ class MultiValues:
         "_single_value",
     )
 
-    _single_value: Optional[claripy.ast.Bits]
-    _values: Optional[Dict[int, Set[claripy.ast.Bits]]]
+    _single_value: claripy.ast.Bits | None
+    _values: dict[int, set[claripy.ast.Bits]] | None
 
     def __init__(
         self,
-        v: Union[claripy.ast.Bits, "MultiValues", None, Dict[int, Set[claripy.ast.Bits]]] = None,
+        v: Union[claripy.ast.Bits, "MultiValues", None, dict[int, set[claripy.ast.Bits]]] = None,
         offset_to_values=None,
     ):
         if v is not None and offset_to_values is not None:
@@ -126,7 +127,7 @@ class MultiValues:
                 for v in remaining_values:
                     self.add_value(offset, v)
 
-    def one_value(self, strip_annotations: bool = False) -> Optional[claripy.ast.Bits]:
+    def one_value(self, strip_annotations: bool = False) -> claripy.ast.Bits | None:
         if self._single_value is not None:
             return self._single_value
 
@@ -192,7 +193,7 @@ class MultiValues:
             return offset == 0
         return False if not self._values else offset in self._values
 
-    def __getitem__(self, offset: int) -> Set[claripy.ast.Bits]:
+    def __getitem__(self, offset: int) -> set[claripy.ast.Bits]:
         if self._single_value is not None:
             if offset == 0:
                 return {self._single_value}
@@ -201,12 +202,12 @@ class MultiValues:
             raise KeyError()
         return self._values[offset]
 
-    def keys(self) -> Set[int]:
+    def keys(self) -> set[int]:
         if self._single_value is not None:
             return {0}
         return set() if not self._values else set(self._values.keys())
 
-    def values(self) -> Iterator[Set[claripy.ast.Bits]]:
+    def values(self) -> Iterator[set[claripy.ast.Bits]]:
         if self._single_value is not None:
             yield {self._single_value}
         else:
@@ -214,7 +215,7 @@ class MultiValues:
                 return
             yield from self._values.values()
 
-    def items(self) -> Iterator[Tuple[int, Set[claripy.ast.Bits]]]:
+    def items(self) -> Iterator[tuple[int, set[claripy.ast.Bits]]]:
         if self._single_value is not None:
             yield 0, {self._single_value}
         else:
@@ -265,7 +266,7 @@ class MultiValues:
     # Private methods
     #
 
-    def _adjacent_offset(self, offset: int, before: bool = True) -> Optional[int]:
+    def _adjacent_offset(self, offset: int, before: bool = True) -> int | None:
         """
         Find the offset that is right before or after the given offset.
 

angr/storage/memory_mixins/paged_memory/pages/mv_list_page.py

@@ -1,6 +1,7 @@
 # pylint:disable=abstract-method,arguments-differ,assignment-from-no-return
 import logging
-from typing import Optional, List, Set, Tuple, Union, Callable, Any, FrozenSet
+from typing import Union, Any
+from collections.abc import Callable
 
 from angr.utils.dynamic_dictlist import DynamicDictList
 from .....storage.memory_object import SimMemoryObject, SimLabeledMemoryObject
@@ -28,19 +29,19 @@ class MVListPage(
     def __init__(self, memory=None, content=None, sinkhole=None, mo_cmp=None, **kwargs):
         super().__init__(**kwargs)
 
-        self.content: DynamicDictList[Optional[Union[_MOTYPE, Set[_MOTYPE]]]] = (
+        self.content: DynamicDictList[_MOTYPE | set[_MOTYPE] | None] = (
             DynamicDictList(max_size=memory.page_size, content=content) if content is not None else None
         )
         self.stored_offset = set()
-        self._mo_cmp: Optional[Callable] = mo_cmp
+        self._mo_cmp: Callable | None = mo_cmp
 
         if self.content is None:
             if memory is not None:
-                self.content: DynamicDictList[Optional[Union[_MOTYPE, Set[_MOTYPE]]]] = DynamicDictList(
+                self.content: DynamicDictList[_MOTYPE | set[_MOTYPE] | None] = DynamicDictList(
                     max_size=memory.page_size
                 )
 
-        self.sinkhole: Optional[_MOTYPE] = sinkhole
+        self.sinkhole: _MOTYPE | None = sinkhole
 
     def copy(self, memo) -> "MVListPage":
         o = super().copy(memo)
@@ -52,7 +53,7 @@ class MVListPage(
 
     def load(
         self, addr, size=None, endness=None, page_addr=None, memory=None, cooperate=False, **kwargs
-    ) -> List[Tuple[int, _MOTYPE]]:
+    ) -> list[tuple[int, _MOTYPE]]:
         result = []
         last_seen = ...  # ;)
 
@@ -111,7 +112,7 @@ class MVListPage(
         if not cooperate:
             data = self._force_store_cooperation(addr, data, size, endness, memory=memory, **kwargs)
 
-        data: Set[_MOTYPE]
+        data: set[_MOTYPE]
 
         if size == len(self.content) and addr == 0 and len(data) == 1:
             self.sinkhole = next(iter(data))
@@ -141,19 +142,19 @@ class MVListPage(
 
     def merge(
         self,
-        others: List["MVListPage"],
+        others: list["MVListPage"],
         merge_conditions,
         common_ancestor=None,
         page_addr: int = None,
         memory=None,
-        changed_offsets: Optional[Set[int]] = None,
+        changed_offsets: set[int] | None = None,
     ):
         if changed_offsets is None:
             changed_offsets = set()
             for other in others:
                 changed_offsets |= self.changed_bytes(other, page_addr)
 
-        all_pages: List["MVListPage"] = [self] + others
+        all_pages: list["MVListPage"] = [self] + others
         if merge_conditions is None:
             merge_conditions = [None] * len(all_pages)
 
@@ -166,7 +167,7 @@ class MVListPage(
                 continue
             l.debug("... on byte 0x%x", b)
 
-            memory_object_sets: Set[Tuple[FrozenSet[SimMemoryObject], Any]] = set()
+            memory_object_sets: set[tuple[frozenset[SimMemoryObject], Any]] = set()
             unconstrained_in = []
 
             # first get a list of all memory objects at that location, and all memories that don't have those bytes
@@ -288,7 +289,7 @@ class MVListPage(
 
             unconstrained_in = []
             self_has_memory_object_set = False
-            memory_object_sets: Set[FrozenSet[SimMemoryObject]] = set()
+            memory_object_sets: set[frozenset[SimMemoryObject]] = set()
             for sm in [self, other]:
                 if sm._contains(b, page_addr):
                     memory_objects = set()
@@ -312,14 +313,14 @@ class MVListPage(
         return True
 
     def changed_bytes(self, other: "MVListPage", page_addr: int = None):
-        candidates: Set[int] = super().changed_bytes(other)
+        candidates: set[int] = super().changed_bytes(other)
         if candidates is not None:
             # using the result from the history tracking mixin as an approximation
             return candidates
 
         # slower path
         if candidates is None:
-            candidates: Set[int] = set()
+            candidates: set[int] = set()
             # resort to the slower solution
             if self.sinkhole is None:
                 candidates |= self.stored_offset
@@ -336,7 +337,7 @@ class MVListPage(
                         candidates.add(i)
 
         byte_width = 8  # TODO: Introduce self.state if we want to use self.state.arch.byte_width
-        differences: Set[int] = set()
+        differences: set[int] = set()
         for c in candidates:
             s_contains = self._contains(c, page_addr)
             o_contains = other._contains(c, page_addr)
@@ -410,14 +411,14 @@ class MVListPage(
         return new_mo
 
     @staticmethod
-    def _resolve_range(mo: SimMemoryObject, page_addr: int, page_size) -> Tuple[int, int]:
+    def _resolve_range(mo: SimMemoryObject, page_addr: int, page_size) -> tuple[int, int]:
         start = max(mo.base, page_addr)
         end = min(mo.last_addr + 1, page_addr + page_size)
         if end <= start:
             l.warning("Nothing left of the memory object to store in SimPage.")
         return start, end
 
-    def _get_objects(self, start: int, page_addr: int) -> Optional[List[SimMemoryObject]]:
+    def _get_objects(self, start: int, page_addr: int) -> list[SimMemoryObject] | None:
         mos = self.content[start]
         if mos is None:
             return None

angr/storage/memory_mixins/paged_memory/pages/ultra_page.py

@@ -1,6 +1,7 @@
 # pylint:disable=arguments-differ
 import logging
-from typing import List, Set, Optional, Tuple, Union, Any, Iterable
+from typing import Any
+from collections.abc import Iterable
 
 from sortedcontainers import SortedDict
 
@@ -116,7 +117,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
     def store(
         self,
         addr,
-        data: Union[int, SimMemoryObject],
+        data: int | SimMemoryObject,
         size: int = None,
         endness=None,
         memory=None,
@@ -197,12 +198,12 @@ class UltraPage(MemoryObjectMixin, PageBase):
 
     def merge(
         self,
-        others: List["UltraPage"],
+        others: list["UltraPage"],
         merge_conditions,
         common_ancestor=None,
         page_addr: int = None,  # pylint: disable=arguments-differ
         memory=None,
-        changed_offsets: Optional[Set[int]] = None,
+        changed_offsets: set[int] | None = None,
     ):
         all_pages = [self] + others
         merged_to = None
@@ -220,10 +221,10 @@ class UltraPage(MemoryObjectMixin, PageBase):
                 continue
             l.debug("... on byte 0x%x", b)
 
-            memory_objects: List[Tuple[SimMemoryObject, Any]] = []
-            concretes: List[Tuple[int, Any]] = []
-            unconstrained_in: List[Tuple["UltraPage", Any]] = []
-            our_mo: Optional[SimMemoryObject] = None
+            memory_objects: list[tuple[SimMemoryObject, Any]] = []
+            concretes: list[tuple[int, Any]] = []
+            unconstrained_in: list[tuple["UltraPage", Any]] = []
+            our_mo: SimMemoryObject | None = None
 
             # first get a list of all memory objects at that location, and
             # all memories that don't have those bytes
@@ -335,12 +336,12 @@ class UltraPage(MemoryObjectMixin, PageBase):
         else:
             return self.concrete_data[addr : addr + size], memoryview(self.symbolic_bitmap)[addr : addr + size]
 
-    def changed_bytes(self, other, page_addr=None) -> Set[int]:
+    def changed_bytes(self, other, page_addr=None) -> set[int]:
         changed_candidates = super().changed_bytes(other)
         if changed_candidates is None:
             changed_candidates = range(len(self.symbolic_bitmap))
 
-        changes: Set[int] = set()
+        changes: set[int] = set()
 
         for addr in changed_candidates:
             if self.symbolic_bitmap[addr] != other.symbolic_bitmap[addr]:
@@ -395,7 +396,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
             # symbolic data or does not exist
             return self._get_object(start, page_addr) is not None
 
-    def _get_object(self, start: int, page_addr: int, memory=None) -> Optional[SimMemoryObject]:
+    def _get_object(self, start: int, page_addr: int, memory=None) -> SimMemoryObject | None:
         try:
             place = next(self.symbolic_data.irange(maximum=start, reverse=True))
         except StopIteration:

angr/storage/memory_mixins/regioned_memory/abstract_address_descriptor.py

@@ -1,4 +1,4 @@
-from typing import List, Tuple, Generator
+from collections.abc import Generator
 
 from claripy.vsa import StridedInterval
 
@@ -12,13 +12,13 @@ class AbstractAddressDescriptor:
     __slots__ = ("_regioned_addrs",)
 
     def __init__(self):
-        self._regioned_addrs: List[Tuple[str, StridedInterval]] = []
+        self._regioned_addrs: list[tuple[str, StridedInterval]] = []
 
     def __len__(self) -> int:
         # this may raise an OverflowError if self.cardinality is greater than sys.maxint
         return self.cardinality
 
-    def __iter__(self) -> Generator[Tuple[str, StridedInterval], None, None]:
+    def __iter__(self) -> Generator[tuple[str, StridedInterval], None, None]:
         yield from self._regioned_addrs
 
     @property

angr/storage/memory_mixins/regioned_memory/abstract_merger_mixin.py

@@ -1,5 +1,6 @@
 import logging
-from typing import Iterable, Tuple, Any
+from typing import Any
+from collections.abc import Iterable
 
 from .. import MemoryMixin
 
@@ -7,7 +8,7 @@ l = logging.getLogger(name=__name__)
 
 
 class AbstractMergerMixin(MemoryMixin):
-    def _merge_values(self, values: Iterable[Tuple[Any, Any]], merged_size: int, **kwargs):
+    def _merge_values(self, values: Iterable[tuple[Any, Any]], merged_size: int, **kwargs):
         # if self.category == 'reg' and self.state.arch.register_endness == 'Iend_LE':
         #     should_reverse = True
         # elif self.state.arch.memory_endness == 'Iend_LE':

angr/storage/memory_mixins/regioned_memory/region_data.py

@@ -1,4 +1,3 @@
-from typing import Optional
 from sortedcontainers import SortedDict
 
 from ....errors import SimRegionMapError
@@ -19,7 +18,7 @@ class AddressWrapper:
         "function_address",
     )
 
-    def __init__(self, region: str, region_base_addr: int, address, is_on_stack: bool, function_address: Optional[int]):
+    def __init__(self, region: str, region_base_addr: int, address, is_on_stack: bool, function_address: int | None):
         """
         Constructor for the class AddressWrapper.
 

angr/storage/memory_mixins/regioned_memory/region_meta_mixin.py

@@ -1,5 +1,5 @@
 import copy
-from typing import Dict, Tuple, Any
+from typing import Any
 
 from claripy.vsa import AbstractLocation
 
@@ -21,7 +21,7 @@ class MemoryRegionMetaMixin(MemoryMixin):
         super().__init__(**kwargs)
         self._related_function_addr = related_function_addr
         # This is a map from tuple (basicblock_key, stmt_id) to AbstractLocation objects
-        self.alocs: Dict[Tuple[Any, int], AbstractLocation] = {}
+        self.alocs: dict[tuple[Any, int], AbstractLocation] = {}
 
         self._is_stack = None
 

angr/storage/memory_mixins/regioned_memory/regioned_address_concretization_mixin.py

@@ -1,4 +1,4 @@
-from typing import Optional, Generator
+from collections.abc import Generator
 
 import claripy
 
@@ -95,7 +95,7 @@ class RegionedAddressConcretizationMixin(MemoryMixin):
         desc: AbstractAddressDescriptor,
         original_addr: claripy.ast.Bits,
         is_write: bool = False,
-        target_region: Optional[str] = None,
+        target_region: str | None = None,
     ) -> Generator[AddressWrapper, None, None]:
         strategies = self.write_strategies if is_write else self.read_strategies
         targets_limit = self._write_targets_limit if is_write else self._read_targets_limit
@@ -113,6 +113,6 @@ class RegionedAddressConcretizationMixin(MemoryMixin):
                 yield self._normalize_address_core(region, c, target_region=target_region)
 
     def _normalize_address_core(
-        self, region_id: str, relative_address: int, target_region: Optional[str] = None
+        self, region_id: str, relative_address: int, target_region: str | None = None
     ) -> AddressWrapper:
         return super()._normalize_address_core(region_id, relative_address, target_region)

angr/storage/memory_mixins/regioned_memory/regioned_memory_mixin.py

@@ -1,6 +1,7 @@
 import logging
 from itertools import count
-from typing import Dict, Optional, Generator, Union, TYPE_CHECKING, Tuple, Iterable
+from typing import Optional, TYPE_CHECKING
+from collections.abc import Generator, Iterable
 
 import claripy
 from claripy.ast import Bool, Bits, BV
@@ -45,12 +46,12 @@ class RegionedMemoryMixin(MemoryMixin):
         self,
         write_targets_limit: int = 2048,
         read_targets_limit: int = 4096,
-        stack_region_map: Optional[RegionMap] = None,
-        generic_region_map: Optional[RegionMap] = None,
+        stack_region_map: RegionMap | None = None,
+        generic_region_map: RegionMap | None = None,
         stack_size: int = 65536,
         cle_memory_backer: Optional = None,
-        dict_memory_backer: Optional[Dict] = None,
-        regioned_memory_cls: Optional[type] = None,
+        dict_memory_backer: dict | None = None,
+        regioned_memory_cls: type | None = None,
         **kwargs,
     ):
         super().__init__(**kwargs)
@@ -62,15 +63,13 @@ class RegionedMemoryMixin(MemoryMixin):
             regioned_memory_cls = RegionedMemory
 
         self._regioned_memory_cls = regioned_memory_cls
-        self._regions: Dict[str, regioned_memory_cls] = {}
+        self._regions: dict[str, regioned_memory_cls] = {}
 
         self._cle_memory_backer = cle_memory_backer
         self._dict_memory_backer = dict_memory_backer
         self._stack_size: int = stack_size
-        self._stack_region_map: Optional[RegionMap] = (
-            stack_region_map if stack_region_map is not None else RegionMap(True)
-        )
-        self._generic_region_map: Optional[RegionMap] = (
+        self._stack_region_map: RegionMap | None = stack_region_map if stack_region_map is not None else RegionMap(True)
+        self._generic_region_map: RegionMap | None = (
             generic_region_map if generic_region_map is not None else RegionMap(False)
         )
 
@@ -96,9 +95,7 @@ class RegionedMemoryMixin(MemoryMixin):
 
         return o
 
-    def load(
-        self, addr, size: Optional[Union[BV, int]] = None, endness=None, condition: Optional[Bool] = None, **kwargs
-    ):
+    def load(self, addr, size: BV | int | None = None, endness=None, condition: Bool | None = None, **kwargs):
         if isinstance(size, BV) and isinstance(size._model_vsa, ValueSet):
             _l.critical("load(): size %s is a ValueSet. Something is wrong.", size)
             if self.state.scratch.ins_addr is not None:
@@ -146,7 +143,7 @@ class RegionedMemoryMixin(MemoryMixin):
 
         return val
 
-    def store(self, addr, data, size: Optional[int] = None, endness=None, **kwargs):
+    def store(self, addr, data, size: int | None = None, endness=None, **kwargs):
         regioned_addrs_desc = self._normalize_address(addr)
         if (
             regioned_addrs_desc.cardinality >= self._write_targets_limit
@@ -169,7 +166,7 @@ class RegionedMemoryMixin(MemoryMixin):
                     r = True
         return r
 
-    def find(self, addr: Union[int, Bits], data, max_search, **kwargs):
+    def find(self, addr: int | Bits, data, max_search, **kwargs):
         # FIXME: Attempt find() on more than one region
 
         gen = self._normalize_address_type(addr, self.state.arch.bits)
@@ -196,7 +193,7 @@ class RegionedMemoryMixin(MemoryMixin):
     #
 
     def set_stack_address_mapping(
-        self, absolute_address: int, region_id: str, related_function_address: Optional[int] = None
+        self, absolute_address: int, region_id: str, related_function_address: int | None = None
     ):
         """
         Create a new mapping between an absolute address (which is the base address of a specific stack frame) and a
@@ -255,7 +252,7 @@ class RegionedMemoryMixin(MemoryMixin):
         related_function_addr: int,
         endness,
         cle_memory_backer: Optional = None,
-        dict_memory_backer: Optional[Dict] = None,
+        dict_memory_backer: dict | None = None,
     ):
         """
         Create a new MemoryRegion with the region key specified, and store it to self._regions.
@@ -317,7 +314,7 @@ class RegionedMemoryMixin(MemoryMixin):
 
         return self._regions[key].load(addr, size, bbl_addr, stmt_id, ins_addr, **kwargs)
 
-    def _region_store(self, addr, data, key: str, endness, related_function_addr: Optional[int] = None, **kwargs):
+    def _region_store(self, addr, data, key: str, endness, related_function_addr: int | None = None, **kwargs):
         if key not in self._regions:
             self._create_region(
                 key,
@@ -351,7 +348,7 @@ class RegionedMemoryMixin(MemoryMixin):
         desc: AbstractAddressDescriptor,
         original_addr: claripy.ast.Bits,
         is_write: bool = False,
-        target_region: Optional[str] = None,
+        target_region: str | None = None,
     ) -> Generator[AddressWrapper, None, None]:
         raise NotImplementedError()
 
@@ -384,7 +381,7 @@ class RegionedMemoryMixin(MemoryMixin):
         return desc
 
     def _normalize_address_core(
-        self, region_id: str, relative_address: int, target_region: Optional[str] = None
+        self, region_id: str, relative_address: int, target_region: str | None = None
     ) -> AddressWrapper:
         """
         If this is a stack address, we convert it to a correct region and address
@@ -434,7 +431,7 @@ class RegionedMemoryMixin(MemoryMixin):
         return addr
 
     @staticmethod
-    def _normalize_address_type(addr: Union[int, Bits], bits) -> Generator[Tuple[str, StridedInterval], None, None]:
+    def _normalize_address_type(addr: int | Bits, bits) -> Generator[tuple[str, StridedInterval], None, None]:
         """
         Convert address of different types to a list of mapping between region IDs and offsets (strided intervals).
 

angr/storage/memory_mixins/size_resolution_mixin.py

@@ -1,4 +1,3 @@
-from typing import Optional
 import logging
 
 from . import MemoryMixin
@@ -60,7 +59,7 @@ class SizeConcretizationMixin(MemoryMixin):
     def __init__(
         self,
         concretize_symbolic_write_size: bool = False,
-        max_concretize_count: Optional[int] = 256,
+        max_concretize_count: int | None = 256,
         max_symbolic_size: int = 0x400000,
         raise_memory_limit_error: bool = False,
         size_limit: int = 257,

angr/storage/memory_mixins/symbolic_merger_mixin.py

@@ -1,10 +1,11 @@
-from typing import Iterable, Tuple, Any
+from typing import Any
+from collections.abc import Iterable
 
 from . import MemoryMixin
 
 
 class SymbolicMergerMixin(MemoryMixin):
-    def _merge_values(self, values: Iterable[Tuple[Any, Any]], merged_size: int, **kwargs):
+    def _merge_values(self, values: Iterable[tuple[Any, Any]], merged_size: int, **kwargs):
         merged_val = self.state.solver.BVV(0, merged_size * self.state.arch.byte_width)
         for tm, fv in values:
             merged_val = self.state.solver.If(fv, tm, merged_val)

angr/storage/memory_mixins/top_merger_mixin.py

@@ -1,4 +1,5 @@
-from typing import Iterable, Tuple, Any, Callable
+from typing import Any
+from collections.abc import Iterable, Callable
 
 from . import MemoryMixin
 
@@ -13,7 +14,7 @@ class TopMergerMixin(MemoryMixin):
 
         super().__init__(*args, **kwargs)
 
-    def _merge_values(self, values: Iterable[Tuple[Any, Any]], merged_size: int, **kwargs):
+    def _merge_values(self, values: Iterable[tuple[Any, Any]], merged_size: int, **kwargs):
         merged_val = self._top_func(merged_size * self.state.arch.byte_width)
         return merged_val
 

angr/storage/memory_object.py

@@ -1,5 +1,3 @@
-from typing import Optional
-
 import claripy
 
 from ..errors import SimMemoryError
@@ -45,7 +43,7 @@ class SimMemoryObject:
         self.object = obj
         self.length = obj_bit_size(obj) // self._byte_width if length is None else length
         self.endness = endness
-        self._concrete_bytes: Optional[bytes] = None
+        self._concrete_bytes: bytes | None = None
 
     def size(self):
         return self.length * self._byte_width
@@ -69,7 +67,7 @@ class SimMemoryObject:
     def last_addr(self):
         return self.base + self.length - 1
 
-    def concrete_bytes(self, offset: int, size: int) -> Optional[bytes]:
+    def concrete_bytes(self, offset: int, size: int) -> bytes | None:
         if self._concrete_bytes is None:
             if isinstance(self.object, claripy.ast.Bits) and self.object.op == "BVV" and not self.object.annotations:
                 self._concrete_bytes = self.object.concrete_value.to_bytes(len(self.object) // self._byte_width, "big")

angr/utils/algo.py

@@ -1,7 +1,8 @@
-from typing import Callable, List, Any, Optional
+from typing import Any
+from collections.abc import Callable
 
 
-def binary_insert(lst: List, elem: Any, key: Callable, lo: int = 0, hi: Optional[int] = None) -> None:
+def binary_insert(lst: list, elem: Any, key: Callable, lo: int = 0, hi: int | None = None) -> None:
     """
     Insert an element into a sorted list, and keep the list sorted.
 

angr/utils/dynamic_dictlist.py

@@ -1,5 +1,5 @@
 import platform
-from typing import Optional, Union, Dict, List, Generic, TypeVar
+from typing import Union, Generic, TypeVar
 
 
 # Ref: https://github.com/angr/angr/pull/3471#issuecomment-1236515950
@@ -26,11 +26,11 @@ class DynamicDictList(Generic[VT]):
 
     def __init__(
         self,
-        max_size: Optional[int] = None,
-        content: Optional[Union["DynamicDictList", Dict[int, VT], List[VT]]] = None,
+        max_size: int | None = None,
+        content: Union["DynamicDictList", dict[int, VT], list[VT]] | None = None,
     ):
-        self.list_content: Optional[List[VT]] = None
-        self.dict_content: Optional[Dict[int, VT]] = None
+        self.list_content: list[VT] | None = None
+        self.dict_content: dict[int, VT] | None = None
         self.max_size = max_size
 
         if content:

angr/utils/formatting.py

@@ -1,5 +1,5 @@
 import sys
-from typing import Sequence, Optional, Callable
+from collections.abc import Sequence, Callable
 
 
 if sys.platform == "win32":
@@ -25,7 +25,7 @@ def setup_terminal():
     ansi_color_enabled = isatty
 
 
-def ansi_color(s: str, color: Optional[str]) -> str:
+def ansi_color(s: str, color: str | None) -> str:
     """
     Colorize string `s` by wrapping in ANSI escape sequence for given `color`.
 
@@ -62,9 +62,9 @@ def add_edge_to_buffer(
     ref: Sequence[str],
     start: int,
     end: int,
-    formatter: Optional[Callable[[str], str]] = None,
+    formatter: Callable[[str], str] | None = None,
     dashed: bool = False,
-    ascii_only: Optional[bool] = None,
+    ascii_only: bool | None = None,
 ):
     """
     Draw an edge by adding Unicode box and arrow glyphs to beginning of each line in a list of lines.

angr/utils/funcid.py

@@ -1,5 +1,4 @@
 # pylint:disable=too-many-boolean-expressions
-from typing import Optional
 
 import capstone
 
@@ -32,7 +31,7 @@ def is_function_security_check_cookie(func, project, security_cookie_addr: int)
     return False
 
 
-def is_function_security_init_cookie(func: "Function", project, security_cookie_addr: Optional[int]) -> bool:
+def is_function_security_init_cookie(func: "Function", project, security_cookie_addr: int | None) -> bool:
     if func.is_plt or func.is_syscall or func.is_simprocedure:
         return False
     # the function should have only one return point