webgpu-bench 0.1.0 → 0.2.0

package/dist/benchmarks/common.d.ts

@@ -24,19 +24,17 @@ export declare function createPipeline(device: GPUDevice, label: string, code: s
 export declare function metricPerSecond(amountPerOp: number, perOpMs: number): number;
 /** Per-measurement knobs (`targetMs`, `targetDispatchMs`, `warmups`) shared by every benchmark. */
 export type HarnessConfig = MeasurementConfig;
-/** Everything about a benchmark that's known before it's measured. */
+/**
+ * Everything about a benchmark that's known before it's measured. Identity/display
+ * fields (label, description, source, metric) live in `BENCHMARK_CATALOG` instead —
+ * this is just what a live run needs to size and account for the work.
+ */
 export interface BenchmarkMeta {
     id: string;
-    label: string;
-    description: string;
-    /** WGSL source of the kernel, for display alongside the result. */
-    source: string;
     category: BenchmarkCategory;
     rows: number;
     cols: number;
-    /** What this benchmark's throughput number counts. */
-    metric: MetricDef;
-    /** Amount of `metric.unit` moved/computed per op. */
+    /** Amount of `metric.unit` (per the catalog's `MetricDef` for this id) moved/computed per op. */
     amountPerOp: number;
 }
 /**

package/dist/benchmarks/common.d.ts.map

@@ -1 +1 @@
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package/dist/benchmarks/common.js

@@ -41,13 +41,9 @@ export function prepareKernelBenchmark(opts) {
         kind: 'kernel',
         meta: {
             id: opts.id,
-            label: opts.label,
-            description: opts.description,
-            source: opts.source,
             category: opts.category,
             rows: opts.rows,
             cols: opts.cols,
-            metric: opts.metric,
             amountPerOp: opts.amountPerOp,
         },
         metaAtWork: opts.metaAtWork,
@@ -87,9 +83,6 @@ export function errorResult(meta, error) {
 export function rowFromMeta(meta) {
     return {
         id: meta.id,
-        label: meta.label,
-        description: meta.description,
-        source: meta.source,
         category: meta.category,
         status: 'running',
         rows: meta.rows,
@@ -97,7 +90,6 @@ export function rowFromMeta(meta) {
         innerIterations: 0,
         timesMs: [],
         throttledMs: [],
-        metric: meta.metric,
         timingMethod: 'cpu-wallclock',
     };
 }

package/dist/benchmarks/common.js.map

@@ -1 +1 @@
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package/dist/benchmarks/flopsCommon.d.ts

@@ -1,17 +1,8 @@
 import type { GpuContext } from '../gpu/context.ts';
 import { type HarnessConfig, type PreparedBenchmark } from './common.ts';
-import type { MetricDef } from '../types.ts';
 export interface FlopsKernelSpec {
     id: string;
-    label: string;
-    description: string;
     wgsl: string;
-    /**
-     * What this kernel's per-iteration count represents. Defaults to
-     * `FLOPS_METRIC`; kernels doing integer or bit-twiddling work (not IEEE
-     * floating-point ops) should pass `OPS_METRIC` instead.
-     */
-    metric?: MetricDef;
     /** Amount of `metric.unit` (same MAC-as-2 convention throughout) performed per loop iteration by a single thread. */
     flopsPerIteration: number;
     /**

package/dist/benchmarks/flopsCommon.d.ts.map

@@ -1 +1 @@
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package/dist/benchmarks/flopsCommon.js

@@ -1,5 +1,5 @@
 import { createUniformBuffer, createEmptyStorageBuffer } from "../gpu/buffers.js";
-import { createPipeline, prepareKernelBenchmark, skippedResult, FLOPS_METRIC, } from "./common.js";
+import { createPipeline, prepareKernelBenchmark, skippedResult, } from "./common.js";
 const DEFAULT_THREADS = 1024 * 1024;
 const DEFAULT_ITERATIONS = 1024;
 const DEFAULT_MIN_ITERATIONS = 16;
@@ -20,13 +20,9 @@ export async function prepareFlopsBenchmark(ctx, spec, harness = {}) {
     const maxIterations = harness.iterations ?? spec.defaultIterations ?? DEFAULT_ITERATIONS;
     const metaAtWork = (iterations) => ({
         id: spec.id,
-        label: spec.label,
-        description: spec.description,
-        source: spec.wgsl,
         category: 'compute',
         rows: threads,
         cols: iterations,
-        metric: spec.metric ?? FLOPS_METRIC,
         amountPerOp: threads * iterations * spec.flopsPerIteration,
     });
     const meta = metaAtWork(maxIterations);

package/dist/benchmarks/flopsCommon.js.map

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package/dist/benchmarks/flopsConvert.d.ts.map

@@ -1 +1 @@
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package/dist/benchmarks/flopsConvert.js

@@ -3,7 +3,6 @@ import { flopsU32PackUnpackWgsl } from "../shaders/flopsU32PackUnpack.js";
 import { flopsI32F32ConvertWgsl } from "../shaders/flopsI32F32Convert.js";
 import { flopsF32F16ConvertWgsl } from "../shaders/flopsF32F16Convert.js";
 import { flopsI32F16ConvertWgsl } from "../shaders/flopsI32F16Convert.js";
-import { OPS_METRIC } from "./common.js";
 /**
  * Bit-twiddling and type-conversion ops: what quantized/packed formats
  * actually cost to get in and out of, as opposed to the flops-i8-* kernels
@@ -14,10 +13,7 @@ import { OPS_METRIC } from "./common.js";
 export function prepareFlopsU32PackUnpack(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-u32-packunpack',
-        label: 'u32 byte pack/unpack ops',
-        description: 'Eight independent u32 lanes, each step unpacking 4 bytes via shift+mask, incrementing them, and repacking the same way — no pack4x8 (or unpack4x8) builtin, just the bit-twiddling those compile to. 25 ops/lane/step, no unrolling.',
         wgsl: flopsU32PackUnpackWgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 200,
         defaultIterations: 256,
     }, harness);
@@ -26,10 +22,7 @@ export function prepareFlopsU32PackUnpack(ctx, harness = {}) {
 export function prepareFlopsI32F32Convert(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-i32-f32-convert',
-        label: 'i32<->f32 convert FLOPS',
-        description: 'Eight independent chains per thread, unrolled 4x: xi -> f32(xi)*a+b -> back to i32 each step. Same FMA as the fp32 scalar test plus a convert on each side, so the gap against that test isolates int<->float conversion cost.',
         wgsl: flopsI32F32ConvertWgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 128,
         defaultIterations: 256,
     }, harness);
@@ -38,10 +31,7 @@ export function prepareFlopsI32F32Convert(ctx, harness = {}) {
 export function prepareFlopsF32F16Convert(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-f16-convert',
-        label: 'f32<->f16 convert FLOPS',
-        description: 'Eight independent vec2<f32> chains per thread, unrolled 4x: pack2x16float then unpack2x16float (round-trips through fp16 bits) plus a vec2 FMA to keep the chain moving. Unlike flops-f16-*, this needs no shader-f16 device feature — it measures the conversion, not f16 compute.',
         wgsl: flopsF32F16ConvertWgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 192,
         defaultIterations: 256,
     }, harness);
@@ -50,10 +40,7 @@ export function prepareFlopsF32F16Convert(ctx, harness = {}) {
 export function prepareFlopsI32F16Convert(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-i32-f16-convert',
-        label: 'i32<->f16 convert FLOPS',
-        description: 'Eight independent i32 chains per thread, unrolled 4x: xi -> f32 -> pack2x16float -> unpack2x16float -> f32*a+b -> i32. There is no native int<->f16 conversion, so this is what the real path (through f32) costs.',
         wgsl: flopsI32F16ConvertWgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 192,
         defaultIterations: 256,
     }, harness);

package/dist/benchmarks/flopsConvert.js.map

@@ -1 +1 @@
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package/dist/benchmarks/flopsF16.d.ts.map

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package/dist/benchmarks/flopsF16.js

@@ -7,8 +7,6 @@ import { flopsF16MatvecWgsl } from "../shaders/flopsF16Matvec.js";
 export function prepareFlopsF16Scalar(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f16-scalar',
-        label: 'fp16 scalar FMA FLOPS',
-        description: 'Same eight independent, 4x-unrolled FMA chains as the fp32 scalar test, but every operand and accumulator is f16, so the chains run entirely in half precision.',
         wgsl: flopsF16ScalarWgsl,
         flopsPerIteration: 64,
         defaultIterations: 256,
@@ -19,8 +17,6 @@ export function prepareFlopsF16Scalar(ctx, harness = {}) {
 export function prepareFlopsF16Vec4(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f16-vec4',
-        label: 'fp16 vec4 FLOPS',
-        description: 'Same single FMA chain as the fp32 vec4 test, but held in a vec4<f16> register: 4 independent half-precision lanes per step. Only GPUs with packed-half ALUs run this faster than fp32.',
         wgsl: flopsF16Vec4Wgsl,
         flopsPerIteration: 8,
         defaultIterations: 1024,
@@ -31,8 +27,6 @@ export function prepareFlopsF16Vec4(ctx, harness = {}) {
 export function prepareFlopsF16Mat4(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f16-mat4',
-        label: 'fp16 mat4 FLOPS',
-        description: 'Same bounded x = m * x + c recurrence as the fp32 mat4 test, but m, c, and x are all f16, so the mat4x4 x vec4 multiply runs entirely in half precision.',
         wgsl: flopsF16Mat4Wgsl,
         flopsPerIteration: 32,
         defaultIterations: 1024,
@@ -43,8 +37,6 @@ export function prepareFlopsF16Mat4(ctx, harness = {}) {
 export function prepareFlopsF16Matvec(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f16-matvec',
-        label: 'fp16 matvec FLOPS',
-        description: 'Same register-resident 4x8 matvec tile as the fp32 matvec test, but weights, inputs, and dot() accumulation are all f16. Pure ALU: the fp16 win here comes only from the ALU, not from halved memory traffic.',
         wgsl: flopsF16MatvecWgsl,
         flopsPerIteration: 64,
         defaultIterations: 512,

package/dist/benchmarks/flopsF16.js.map

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package/dist/benchmarks/flopsF32.d.ts.map

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package/dist/benchmarks/flopsF32.js

@@ -7,8 +7,6 @@ import { flopsF32MatvecWgsl } from "../shaders/flopsF32Matvec.js";
 export function prepareFlopsF32Scalar(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-scalar',
-        label: 'fp32 scalar FMA FLOPS',
-        description: 'Eight independent scalar f32 fused multiply-add chains per thread, unrolled 4x, so the ALU always has work in flight and the number reflects throughput rather than FMA latency. ~no memory traffic.',
         wgsl: flopsF32ScalarWgsl,
         flopsPerIteration: 64,
         defaultIterations: 256,
@@ -18,8 +16,6 @@ export function prepareFlopsF32Scalar(ctx, harness = {}) {
 export function prepareFlopsF32Vec4(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-vec4',
-        label: 'fp32 vec4 FLOPS',
-        description: 'A single FMA chain held in a vec4<f32> register. On scalar-SIMT GPUs (Apple, NVIDIA, AMD) this compiles to 4 independent scalar FMAs per step, so it measures how well 4-wide instruction-level parallelism hides latency, not a wider ALU.',
         wgsl: flopsF32Vec4Wgsl,
         flopsPerIteration: 8,
         defaultIterations: 1024,
@@ -29,8 +25,6 @@ export function prepareFlopsF32Vec4(ctx, harness = {}) {
 export function prepareFlopsF32Mat4(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-mat4',
-        label: 'fp32 mat4 FLOPS',
-        description: 'x = m * x + c chained in a register with a mat4x4<f32> (a bounded contraction so it stays numerically stable): 16 FMAs per step with plenty of independent work, exercising the full mat4 x vec4 multiply.',
         wgsl: flopsF32Mat4Wgsl,
         flopsPerIteration: 32,
         defaultIterations: 1024,
@@ -40,8 +34,6 @@ export function prepareFlopsF32Mat4(ctx, harness = {}) {
 export function prepareFlopsF32Matvec(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-matvec',
-        label: 'fp32 matvec FLOPS',
-        description: 'A 4-row x 8-column f32 weight tile held in registers, applied to an 8-wide input every iteration via dot() (outputs feed back as the next inputs). The dot-product-accumulate shape of a GEMV inner loop with zero buffer traffic: pure ALU.',
         wgsl: flopsF32MatvecWgsl,
         flopsPerIteration: 64,
         defaultIterations: 512,

package/dist/benchmarks/flopsF32.js.map

@@ -1 +1 @@
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package/dist/benchmarks/flopsI8.d.ts.map

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package/dist/benchmarks/flopsI8.js

@@ -1,5 +1,4 @@
 import { prepareFlopsBenchmark } from "./flopsCommon.js";
-import { OPS_METRIC } from "./common.js";
 import { flopsI8ScalarWgsl } from "../shaders/flopsI8Scalar.js";
 import { flopsI8Vec4Wgsl } from "../shaders/flopsI8Vec4.js";
 import { flopsI8Mat4Wgsl } from "../shaders/flopsI8Mat4.js";
@@ -10,10 +9,7 @@ import { flopsI8MatvecDp4aWgsl } from "../shaders/flopsI8MatvecDp4a.js";
 export function prepareFlopsI8Scalar(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-i8-scalar',
-        label: 'int8-range scalar FMA FLOPS',
-        description: 'Same eight independent, 4x-unrolled multiply-add chains as the fp32 scalar test, but on i32 (WGSL has no first-class i8 type). Measures integer multiply-add throughput; overflow wraps.',
         wgsl: flopsI8ScalarWgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 64,
         defaultIterations: 256,
     }, harness);
@@ -22,10 +18,7 @@ export function prepareFlopsI8Scalar(ctx, harness = {}) {
 export function prepareFlopsI8Vec4(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-i8-vec4',
-        label: 'int8-range vec4 FLOPS',
-        description: 'Same single multiply-add chain as the fp32 vec4 test, but held in a vec4<i32> register: 4 independent integer lanes per step.',
         wgsl: flopsI8Vec4Wgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 8,
         defaultIterations: 1024,
     }, harness);
@@ -34,10 +27,7 @@ export function prepareFlopsI8Vec4(ctx, harness = {}) {
 export function prepareFlopsI8Mat4(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-i8-mat4',
-        label: 'int8-range mat4 FLOPS',
-        description: 'x = m * x + c chained in a register, where m is a 4x4 integer matrix emulated as four vec4<i32> rows combined with dot() (WGSL has no mat4x4<i32>): the same 4 dot products a real int4x4 multiply compiles to.',
         wgsl: flopsI8Mat4Wgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 32,
         defaultIterations: 1024,
     }, harness);
@@ -46,10 +36,7 @@ export function prepareFlopsI8Mat4(ctx, harness = {}) {
 export function prepareFlopsI8Matvec(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-i8-matvec',
-        label: 'int8 matvec FLOPS (i32 dot)',
-        description: 'Same register-resident 4x8 matvec tile as the fp32 matvec test, with int8-range weights and inputs held unpacked as vec4<i32> and accumulated with integer dot(). The no-extension int8 path: what dot4I8Packed is competing against.',
         wgsl: flopsI8MatvecWgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 64,
         defaultIterations: 512,
     }, harness);
@@ -58,10 +45,7 @@ export function prepareFlopsI8Matvec(ctx, harness = {}) {
 export function prepareFlopsI8MatvecDp4a(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-i8-matvec-dp4a',
-        label: 'int8 matvec FLOPS (dot4I8Packed)',
-        description: "Same 4x8 matvec tile, but weights and inputs stay packed four int8 lanes per u32 and each 4-wide dot product is one dot4I8Packed call from the packed_4x8_integer_dot_product extension. On GPUs without a native dp4a instruction this runs the extension's polyfill.",
         wgsl: flopsI8MatvecDp4aWgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 64,
         defaultIterations: 512,
         requiresI8Dot: true,
@@ -71,10 +55,7 @@ export function prepareFlopsI8MatvecDp4a(ctx, harness = {}) {
 export function prepareFlopsI8Dp4a(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-i8-dp4a',
-        label: 'int8 dot4I8Packed FLOPS',
-        description: "One thread per lane, accumulating dot4I8Packed(a, b) — the packed_4x8_integer_dot_product extension's 4-wide int8 dot-product instruction — in a tight loop to measure its peak throughput in isolation.",
         wgsl: flopsI8Dp4aWgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 8,
         defaultIterations: 1024,
         requiresI8Dot: true,

package/dist/benchmarks/flopsI8.js.map

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package/dist/benchmarks/flopsMath.d.ts.map

@@ -1 +1 @@
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package/dist/benchmarks/flopsMath.js

@@ -6,7 +6,6 @@ import { flopsF32RsqrtWgsl } from "../shaders/flopsF32Rsqrt.js";
 import { flopsF32PowWgsl } from "../shaders/flopsF32Pow.js";
 import { flopsF32SincosWgsl } from "../shaders/flopsF32Sincos.js";
 import { flopsF32LogWgsl } from "../shaders/flopsF32Log.js";
-import { OPS_METRIC } from "./common.js";
 /**
  * "Real" ALU ops beyond multiply-add: division and the transcendentals
  * (sqrt, pow, sin/cos, log) that 3D math leans on constantly (normalize,
@@ -21,8 +20,6 @@ import { OPS_METRIC } from "./common.js";
 export function prepareFlopsF32Div(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-div',
-        label: 'fp32 div FLOPS',
-        description: 'Eight independent scalar f32 divide-add chains per thread, unrolled 4x — the fp32 scalar FMA test with divide in place of multiply, so the gap between the two isolates the cost of division.',
         wgsl: flopsF32DivWgsl,
         flopsPerIteration: 64,
         defaultIterations: 256,
@@ -32,10 +29,7 @@ export function prepareFlopsF32Div(ctx, harness = {}) {
 export function prepareFlopsI32Div(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-i32-div',
-        label: 'i32 div FLOPS',
-        description: 'Eight independent scalar i32 divide-add chains per thread, unrolled 4x — the int8-range scalar test with divide in place of multiply. Integer division is typically the slowest basic ALU op on a GPU.',
         wgsl: flopsI32DivWgsl,
-        metric: OPS_METRIC,
         flopsPerIteration: 64,
         defaultIterations: 256,
     }, harness);
@@ -44,8 +38,6 @@ export function prepareFlopsI32Div(ctx, harness = {}) {
 export function prepareFlopsF32Sqrt(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-sqrt',
-        label: 'fp32 sqrt FLOPS',
-        description: 'Eight independent scalar f32 sqrt-add chains per thread, unrolled 4x. sqrt is a common special-function-unit instruction; this measures its throughput in isolation.',
         wgsl: flopsF32SqrtWgsl,
         flopsPerIteration: 64,
         defaultIterations: 256,
@@ -55,8 +47,6 @@ export function prepareFlopsF32Sqrt(ctx, harness = {}) {
 export function prepareFlopsF32Rsqrt(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-rsqrt',
-        label: 'fp32 rsqrt FLOPS',
-        description: 'Eight independent scalar f32 inverseSqrt-add chains per thread, unrolled 4x. The op behind every normalize(); most GPUs have a dedicated fast-rsqrt path, so compare against flops-f32-sqrt to see the gap.',
         wgsl: flopsF32RsqrtWgsl,
         flopsPerIteration: 64,
         defaultIterations: 256,
@@ -66,8 +56,6 @@ export function prepareFlopsF32Rsqrt(ctx, harness = {}) {
 export function prepareFlopsF32Pow(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-pow',
-        label: 'fp32 pow FLOPS',
-        description: 'Eight independent scalar f32 pow-add chains per thread, unrolled 4x. pow(x, e) for a non-integer e is usually exp2(e * log2(x)) under the hood — several instructions — so expect this well below sqrt/div throughput.',
         wgsl: flopsF32PowWgsl,
         flopsPerIteration: 64,
         defaultIterations: 128,
@@ -77,8 +65,6 @@ export function prepareFlopsF32Pow(ctx, harness = {}) {
 export function prepareFlopsF32Sincos(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-sincos',
-        label: 'fp32 sin/cos FLOPS',
-        description: 'Eight independent scalar f32 cos(sin(x)) chains per thread, unrolled 4x. Naturally bounded to [-1, 1], so no stabilization term is needed. Measures combined sin+cos throughput.',
         wgsl: flopsF32SincosWgsl,
         flopsPerIteration: 64,
         defaultIterations: 128,
@@ -88,8 +74,6 @@ export function prepareFlopsF32Sincos(ctx, harness = {}) {
 export function prepareFlopsF32Log(ctx, harness = {}) {
     return prepareFlopsBenchmark(ctx, {
         id: 'flops-f32-log',
-        label: 'fp32 ln FLOPS',
-        description: 'Eight independent scalar f32 ln-add chains per thread, unrolled 4x. log(x) is usually log2(x) * ln(2) under the hood, so expect throughput close to a raw log2 special-function call.',
         wgsl: flopsF32LogWgsl,
         flopsPerIteration: 64,
         defaultIterations: 256,

package/dist/benchmarks/flopsMath.js.map

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package/dist/benchmarks/streamBandwidth.d.ts.map

@@ -1 +1 @@
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+{"version":3,"file":"streamBandwidth.d.ts","sourceRoot":"","sources":["../../src/benchmarks/streamBandwidth.ts"],"names":[],"mappings":"AAAA,OAAO,KAAK,EAAE,UAAU,EAAE,MAAM,mBAAmB,CAAC;AACpD,OAAO,KAAK,EAAE,aAAa,EAAE,MAAM,qBAAqB,CAAC;AAEzD,OAAO,EAA0C,KAAK,aAAa,EAAE,KAAK,iBAAiB,EAAE,MAAM,aAAa,CAAC;AAIjH;;;;;GAKG;AACH,wBAAsB,oBAAoB,CACxC,GAAG,EAAE,UAAU,EACf,IAAI,EAAE,aAAa,EACnB,OAAO,GAAE,aAAkB,GAC1B,OAAO,CAAC,iBAAiB,CAAC,CA4B5B;AAED;;;;GAIG;AACH,wBAAsB,qBAAqB,CACzC,GAAG,EAAE,UAAU,EACf,IAAI,EAAE,aAAa,EACnB,OAAO,GAAE,aAAkB,GAC1B,OAAO,CAAC,iBAAiB,CAAC,CA0B5B"}

package/dist/benchmarks/streamBandwidth.js

@@ -1,5 +1,5 @@
 import { createUniformBuffer, createStorageBuffer, createEmptyStorageBuffer } from "../gpu/buffers.js";
-import { createPipeline, prepareKernelBenchmark, BYTES_METRIC, } from "./common.js";
+import { createPipeline, prepareKernelBenchmark } from "./common.js";
 import { streamReadWgsl } from "../shaders/streamRead.js";
 import { streamWriteWgsl } from "../shaders/streamWrite.js";
 /**
@@ -25,14 +25,10 @@ export async function prepareReadBandwidth(ctx, data, harness = {}) {
     });
     return prepareKernelBenchmark({
         id: 'read-bandwidth',
-        label: 'Read bandwidth',
-        description: 'One thread per row; streams a large buffer in via vec4<f32> loads and addition only, writes one scalar. Read-bandwidth-bound.',
-        source: streamReadWgsl,
         category: 'bandwidth',
         ctx,
         rows: data.rows,
         cols: data.cols,
-        metric: BYTES_METRIC,
         amountPerOp: data.matrix.byteLength,
         workgroupsPerIteration: [Math.ceil(data.rows / 64), 1, 1],
         pipeline,
@@ -60,14 +56,10 @@ export async function prepareWriteBandwidth(ctx, data, harness = {}) {
     });
     return prepareKernelBenchmark({
         id: 'write-bandwidth',
-        label: 'Write bandwidth',
-        description: 'One thread per row; stores computed vec4<f32> values into a large buffer with no buffer reads. Write-bandwidth-bound.',
-        source: streamWriteWgsl,
         category: 'bandwidth',
         ctx,
         rows: data.rows,
         cols: data.cols,
-        metric: BYTES_METRIC,
         amountPerOp: data.matrix.byteLength,
         workgroupsPerIteration: [Math.ceil(data.rows / 64), 1, 1],
         pipeline,

package/dist/benchmarks/streamBandwidth.js.map

@@ -1 +1 @@
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package/dist/catalog.d.ts

@@ -0,0 +1,33 @@
+import type { BenchmarkCategory, MetricDef } from './types.ts';
+/**
+ * Identity of one benchmark, known without touching the GPU: label,
+ * description and WGSL source for display, plus category/metric for
+ * formatting a result once one arrives. The sole source of truth for all
+ * of this — `runSuite`'s `BenchmarkResult` rows carry only what's known
+ * from actually running (status, timings, `metricValue`), keyed by `id`
+ * back onto this catalog rather than repeating it.
+ */
+export interface BenchmarkInfo {
+    id: string;
+    label: string;
+    description: string;
+    /** WGSL source of the kernel, for display alongside a result. */
+    source: string;
+    category: BenchmarkCategory;
+    metric: MetricDef;
+}
+/**
+ * Every benchmark `runSuite` can yield a row for, in the same order it
+ * schedules them — so a UI can render the full results table (id, label,
+ * category, metric unit, description, source) before a device is even
+ * acquired, then fill in throughput as `runSuite`'s rows arrive and merge
+ * onto these ids.
+ *
+ * Kept as a hand-written list, not derived from `suite.ts`'s benchmark
+ * table, because `suite.ts` only wires up *how* to run each kernel (its
+ * `prepare*` call) — it doesn't carry a duplicate copy of this metadata to
+ * derive from. `suite.browser.test.ts` asserts this list's ids match
+ * `runSuite`'s one-to-one, so the two can't drift silently.
+ */
+export declare const BENCHMARK_CATALOG: readonly BenchmarkInfo[];
+//# sourceMappingURL=catalog.d.ts.map

package/dist/catalog.d.ts.map

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package/dist/catalog.js

@@ -0,0 +1,260 @@
+import { BYTES_METRIC, FLOPS_METRIC, OPS_METRIC } from "./benchmarks/common.js";
+import { streamReadWgsl } from "./shaders/streamRead.js";
+import { streamWriteWgsl } from "./shaders/streamWrite.js";
+import { flopsF32ScalarWgsl } from "./shaders/flopsF32Scalar.js";
+import { flopsF32Vec4Wgsl } from "./shaders/flopsF32Vec4.js";
+import { flopsF32Mat4Wgsl } from "./shaders/flopsF32Mat4.js";
+import { flopsF32MatvecWgsl } from "./shaders/flopsF32Matvec.js";
+import { flopsF16ScalarWgsl } from "./shaders/flopsF16Scalar.js";
+import { flopsF16Vec4Wgsl } from "./shaders/flopsF16Vec4.js";
+import { flopsF16Mat4Wgsl } from "./shaders/flopsF16Mat4.js";
+import { flopsF16MatvecWgsl } from "./shaders/flopsF16Matvec.js";
+import { flopsI8ScalarWgsl } from "./shaders/flopsI8Scalar.js";
+import { flopsI8Vec4Wgsl } from "./shaders/flopsI8Vec4.js";
+import { flopsI8Mat4Wgsl } from "./shaders/flopsI8Mat4.js";
+import { flopsI8MatvecWgsl } from "./shaders/flopsI8Matvec.js";
+import { flopsI8MatvecDp4aWgsl } from "./shaders/flopsI8MatvecDp4a.js";
+import { flopsI8Dp4aWgsl } from "./shaders/flopsI8Dp4a.js";
+import { flopsF32DivWgsl } from "./shaders/flopsF32Div.js";
+import { flopsI32DivWgsl } from "./shaders/flopsI32Div.js";
+import { flopsF32SqrtWgsl } from "./shaders/flopsF32Sqrt.js";
+import { flopsF32RsqrtWgsl } from "./shaders/flopsF32Rsqrt.js";
+import { flopsF32PowWgsl } from "./shaders/flopsF32Pow.js";
+import { flopsF32SincosWgsl } from "./shaders/flopsF32Sincos.js";
+import { flopsF32LogWgsl } from "./shaders/flopsF32Log.js";
+import { flopsU32PackUnpackWgsl } from "./shaders/flopsU32PackUnpack.js";
+import { flopsI32F32ConvertWgsl } from "./shaders/flopsI32F32Convert.js";
+import { flopsF32F16ConvertWgsl } from "./shaders/flopsF32F16Convert.js";
+import { flopsI32F16ConvertWgsl } from "./shaders/flopsI32F16Convert.js";
+/**
+ * Every benchmark `runSuite` can yield a row for, in the same order it
+ * schedules them — so a UI can render the full results table (id, label,
+ * category, metric unit, description, source) before a device is even
+ * acquired, then fill in throughput as `runSuite`'s rows arrive and merge
+ * onto these ids.
+ *
+ * Kept as a hand-written list, not derived from `suite.ts`'s benchmark
+ * table, because `suite.ts` only wires up *how* to run each kernel (its
+ * `prepare*` call) — it doesn't carry a duplicate copy of this metadata to
+ * derive from. `suite.browser.test.ts` asserts this list's ids match
+ * `runSuite`'s one-to-one, so the two can't drift silently.
+ */
+export const BENCHMARK_CATALOG = [
+    {
+        id: 'read-bandwidth',
+        label: 'Read bandwidth',
+        description: 'One thread per row; streams a large buffer in via vec4<f32> loads and addition only, writes one scalar. Read-bandwidth-bound.',
+        source: streamReadWgsl,
+        category: 'bandwidth',
+        metric: BYTES_METRIC,
+    },
+    {
+        id: 'write-bandwidth',
+        label: 'Write bandwidth',
+        description: 'One thread per row; stores computed vec4<f32> values into a large buffer with no buffer reads. Write-bandwidth-bound.',
+        source: streamWriteWgsl,
+        category: 'bandwidth',
+        metric: BYTES_METRIC,
+    },
+    {
+        id: 'flops-f32-scalar',
+        label: 'fp32 scalar FMA FLOPS',
+        description: 'Eight independent scalar f32 fused multiply-add chains per thread, unrolled 4x, so the ALU always has work in flight and the number reflects throughput rather than FMA latency. ~no memory traffic.',
+        source: flopsF32ScalarWgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f32-vec4',
+        label: 'fp32 vec4 FLOPS',
+        description: 'A single FMA chain held in a vec4<f32> register. On scalar-SIMT GPUs (Apple, NVIDIA, AMD) this compiles to 4 independent scalar FMAs per step, so it measures how well 4-wide instruction-level parallelism hides latency, not a wider ALU.',
+        source: flopsF32Vec4Wgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f32-mat4',
+        label: 'fp32 mat4 FLOPS',
+        description: 'x = m * x + c chained in a register with a mat4x4<f32> (a bounded contraction so it stays numerically stable): 16 FMAs per step with plenty of independent work, exercising the full mat4 x vec4 multiply.',
+        source: flopsF32Mat4Wgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f32-matvec',
+        label: 'fp32 matvec FLOPS',
+        description: 'A 4-row x 8-column f32 weight tile held in registers, applied to an 8-wide input every iteration via dot() (outputs feed back as the next inputs). The dot-product-accumulate shape of a GEMV inner loop with zero buffer traffic: pure ALU.',
+        source: flopsF32MatvecWgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f16-scalar',
+        label: 'fp16 scalar FMA FLOPS',
+        description: 'Same eight independent, 4x-unrolled FMA chains as the fp32 scalar test, but every operand and accumulator is f16, so the chains run entirely in half precision.',
+        source: flopsF16ScalarWgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f16-vec4',
+        label: 'fp16 vec4 FLOPS',
+        description: 'Same single FMA chain as the fp32 vec4 test, but held in a vec4<f16> register: 4 independent half-precision lanes per step. Only GPUs with packed-half ALUs run this faster than fp32.',
+        source: flopsF16Vec4Wgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f16-mat4',
+        label: 'fp16 mat4 FLOPS',
+        description: 'Same bounded x = m * x + c recurrence as the fp32 mat4 test, but m, c, and x are all f16, so the mat4x4 x vec4 multiply runs entirely in half precision.',
+        source: flopsF16Mat4Wgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f16-matvec',
+        label: 'fp16 matvec FLOPS',
+        description: 'Same register-resident 4x8 matvec tile as the fp32 matvec test, but weights, inputs, and dot() accumulation are all f16. Pure ALU: the fp16 win here comes only from the ALU, not from halved memory traffic.',
+        source: flopsF16MatvecWgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-i8-scalar',
+        label: 'int8-range scalar FMA FLOPS',
+        description: 'Same eight independent, 4x-unrolled multiply-add chains as the fp32 scalar test, but on i32 (WGSL has no first-class i8 type). Measures integer multiply-add throughput; overflow wraps.',
+        source: flopsI8ScalarWgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+    {
+        id: 'flops-i8-vec4',
+        label: 'int8-range vec4 FLOPS',
+        description: 'Same single multiply-add chain as the fp32 vec4 test, but held in a vec4<i32> register: 4 independent integer lanes per step.',
+        source: flopsI8Vec4Wgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+    {
+        id: 'flops-i8-mat4',
+        label: 'int8-range mat4 FLOPS',
+        description: 'x = m * x + c chained in a register, where m is a 4x4 integer matrix emulated as four vec4<i32> rows combined with dot() (WGSL has no mat4x4<i32>): the same 4 dot products a real int4x4 multiply compiles to.',
+        source: flopsI8Mat4Wgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+    {
+        id: 'flops-i8-matvec',
+        label: 'int8 matvec FLOPS (i32 dot)',
+        description: 'Same register-resident 4x8 matvec tile as the fp32 matvec test, with int8-range weights and inputs held unpacked as vec4<i32> and accumulated with integer dot(). The no-extension int8 path: what dot4I8Packed is competing against.',
+        source: flopsI8MatvecWgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+    {
+        id: 'flops-i8-matvec-dp4a',
+        label: 'int8 matvec FLOPS (dot4I8Packed)',
+        description: "Same 4x8 matvec tile, but weights and inputs stay packed four int8 lanes per u32 and each 4-wide dot product is one dot4I8Packed call from the packed_4x8_integer_dot_product extension. On GPUs without a native dp4a instruction this runs the extension's polyfill.",
+        source: flopsI8MatvecDp4aWgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+    {
+        id: 'flops-i8-dp4a',
+        label: 'int8 dot4I8Packed FLOPS',
+        description: "One thread per lane, accumulating dot4I8Packed(a, b) — the packed_4x8_integer_dot_product extension's 4-wide int8 dot-product instruction — in a tight loop to measure its peak throughput in isolation.",
+        source: flopsI8Dp4aWgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+    {
+        id: 'flops-f32-div',
+        label: 'fp32 div FLOPS',
+        description: 'Eight independent scalar f32 divide-add chains per thread, unrolled 4x — the fp32 scalar FMA test with divide in place of multiply, so the gap between the two isolates the cost of division.',
+        source: flopsF32DivWgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-i32-div',
+        label: 'i32 div FLOPS',
+        description: 'Eight independent scalar i32 divide-add chains per thread, unrolled 4x — the int8-range scalar test with divide in place of multiply. Integer division is typically the slowest basic ALU op on a GPU.',
+        source: flopsI32DivWgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+    {
+        id: 'flops-f32-sqrt',
+        label: 'fp32 sqrt FLOPS',
+        description: 'Eight independent scalar f32 sqrt-add chains per thread, unrolled 4x. sqrt is a common special-function-unit instruction; this measures its throughput in isolation.',
+        source: flopsF32SqrtWgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f32-rsqrt',
+        label: 'fp32 rsqrt FLOPS',
+        description: 'Eight independent scalar f32 inverseSqrt-add chains per thread, unrolled 4x. The op behind every normalize(); most GPUs have a dedicated fast-rsqrt path, so compare against flops-f32-sqrt to see the gap.',
+        source: flopsF32RsqrtWgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f32-pow',
+        label: 'fp32 pow FLOPS',
+        description: 'Eight independent scalar f32 pow-add chains per thread, unrolled 4x. pow(x, e) for a non-integer e is usually exp2(e * log2(x)) under the hood — several instructions — so expect this well below sqrt/div throughput.',
+        source: flopsF32PowWgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f32-sincos',
+        label: 'fp32 sin/cos FLOPS',
+        description: 'Eight independent scalar f32 cos(sin(x)) chains per thread, unrolled 4x. Naturally bounded to [-1, 1], so no stabilization term is needed. Measures combined sin+cos throughput.',
+        source: flopsF32SincosWgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-f32-log',
+        label: 'fp32 ln FLOPS',
+        description: 'Eight independent scalar f32 ln-add chains per thread, unrolled 4x. log(x) is usually log2(x) * ln(2) under the hood, so expect throughput close to a raw log2 special-function call.',
+        source: flopsF32LogWgsl,
+        category: 'compute',
+        metric: FLOPS_METRIC,
+    },
+    {
+        id: 'flops-u32-packunpack',
+        label: 'u32 byte pack/unpack ops',
+        description: 'Eight independent u32 lanes, each step unpacking 4 bytes via shift+mask, incrementing them, and repacking the same way — no pack4x8 (or unpack4x8) builtin, just the bit-twiddling those compile to. 25 ops/lane/step, no unrolling.',
+        source: flopsU32PackUnpackWgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+    {
+        id: 'flops-i32-f32-convert',
+        label: 'i32<->f32 convert FLOPS',
+        description: 'Eight independent chains per thread, unrolled 4x: xi -> f32(xi)*a+b -> back to i32 each step. Same FMA as the fp32 scalar test plus a convert on each side, so the gap against that test isolates int<->float conversion cost.',
+        source: flopsI32F32ConvertWgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+    {
+        id: 'flops-f32-f16-convert',
+        label: 'f32<->f16 convert FLOPS',
+        description: 'Eight independent vec2<f32> chains per thread, unrolled 4x: pack2x16float then unpack2x16float (round-trips through fp16 bits) plus a vec2 FMA to keep the chain moving. Unlike flops-f16-*, this needs no shader-f16 device feature — it measures the conversion, not f16 compute.',
+        source: flopsF32F16ConvertWgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+    {
+        id: 'flops-i32-f16-convert',
+        label: 'i32<->f16 convert FLOPS',
+        description: 'Eight independent i32 chains per thread, unrolled 4x: xi -> f32 -> pack2x16float -> unpack2x16float -> f32*a+b -> i32. There is no native int<->f16 conversion, so this is what the real path (through f32) costs.',
+        source: flopsI32F16ConvertWgsl,
+        category: 'compute',
+        metric: OPS_METRIC,
+    },
+];
+//# sourceMappingURL=catalog.js.map

package/dist/catalog.js.map

@@ -0,0 +1 @@
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package/dist/index.d.ts

@@ -1,5 +1,7 @@
 export { runSuite } from './suite.ts';
-export type { BenchmarkResult, SuiteOptions, SuiteProgressEvent, DeviceInfo, Stats, BenchmarkCategory, BenchmarkStatus, TimingMethod, SamplingStopReason, } from './types.ts';
+export { BENCHMARK_CATALOG } from './catalog.ts';
+export type { BenchmarkInfo } from './catalog.ts';
+export type { BenchmarkResult, SuiteOptions, SuiteProgressEvent, DeviceInfo, Stats, BenchmarkCategory, BenchmarkStatus, TimingMethod, SamplingStopReason, MetricDef, } from './types.ts';
 export { computeStats, isBestStable, isThrottled, tQuantile975 } from './stats.ts';
 export type { BestStableOptions } from './stats.ts';
 export { DEFAULT_SAMPLING, runSampling, recordSample, roundIsThrottled, resolveSamplingConfig } from './sampling.ts';

package/dist/index.d.ts.map

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package/dist/index.js

@@ -1,4 +1,5 @@
 export { runSuite } from "./suite.js";
+export { BENCHMARK_CATALOG } from "./catalog.js";
 export { computeStats, isBestStable, isThrottled, tQuantile975 } from "./stats.js";
 export { DEFAULT_SAMPLING, runSampling, recordSample, roundIsThrottled, resolveSamplingConfig } from "./sampling.js";
 export { DEFAULT_MEASUREMENT, KernelSampler } from "./gpu/benchmarkRunner.js";

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package/dist/suite.d.ts.map

@@ -1 +1 @@
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+{"version":3,"file":"suite.d.ts","sourceRoot":"","sources":["../src/suite.ts"],"names":[],"mappings":"AAAA,OAAO,EAAqB,KAAK,UAAU,EAAE,MAAM,kBAAkB,CAAC;AAgDtE,OAAO,KAAK,EAAqB,eAAe,EAAE,YAAY,EAAE,MAAM,YAAY,CAAC;AAEnF,YAAY,EACV,eAAe,EACf,YAAY,EACZ,UAAU,EACV,KAAK,EACL,iBAAiB,EACjB,eAAe,EACf,kBAAkB,EAClB,kBAAkB,EAClB,SAAS,GACV,MAAM,YAAY,CAAC;AACpB,OAAO,EAAE,YAAY,EAAE,MAAM,YAAY,CAAC;AAgB1C;;;;;;;;;;;;;;;;;GAiBG;AACH,wBAAuB,QAAQ,CAAC,OAAO,GAAE,YAAiB,GAAG,cAAc,CAAC,eAAe,CAAC,CA6H3F;AAyCD,YAAY,EAAE,UAAU,EAAE,CAAC"}

package/dist/suite.js

@@ -8,7 +8,7 @@ import { prepareFlopsF16Scalar, prepareFlopsF16Vec4, prepareFlopsF16Mat4, prepar
 import { prepareFlopsI8Scalar, prepareFlopsI8Vec4, prepareFlopsI8Mat4, prepareFlopsI8Matvec, prepareFlopsI8MatvecDp4a, prepareFlopsI8Dp4a, } from "./benchmarks/flopsI8.js";
 import { prepareFlopsF32Div, prepareFlopsI32Div, prepareFlopsF32Sqrt, prepareFlopsF32Rsqrt, prepareFlopsF32Pow, prepareFlopsF32Sincos, prepareFlopsF32Log, } from "./benchmarks/flopsMath.js";
 import { prepareFlopsU32PackUnpack, prepareFlopsI32F32Convert, prepareFlopsF32F16Convert, prepareFlopsI32F16Convert, } from "./benchmarks/flopsConvert.js";
-import { errorResult, metricPerSecond, rowFromMeta, FLOPS_METRIC, BYTES_METRIC, } from "./benchmarks/common.js";
+import { errorResult, metricPerSecond, rowFromMeta, } from "./benchmarks/common.js";
 export { computeStats } from "./stats.js";
 const DEFAULT_ROWS = 4096;
 const DEFAULT_COLS = 4096;
@@ -81,13 +81,9 @@ export async function* runSuite(options = {}) {
     for (const [id, category, prepare] of benchmarks) {
         const fallbackMeta = {
             id,
-            label: id,
-            description: '',
-            source: '',
             category,
             rows,
             cols,
-            metric: category === 'bandwidth' ? BYTES_METRIC : FLOPS_METRIC,
             amountPerOp: 0,
         };
         let prepared;

package/dist/suite.js.map

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package/dist/types.d.ts

@@ -40,13 +40,14 @@ export interface MetricDef {
  * after every sample it takes (still `running`, with the partial stats so
  * far), and when it finishes (ok/skipped/error) — so the UI can render
  * progress incrementally.
+ *
+ * Pure measurement, no identity/display metadata: label, description, WGSL
+ * source, and the metric definition all live on the matching `id` in
+ * `BENCHMARK_CATALOG` instead, so a UI joins a result onto its catalog row
+ * rather than getting them handed twice.
  */
 export interface BenchmarkResult {
     id: string;
-    label: string;
-    description: string;
-    /** WGSL source of the kernel that was run, for display alongside the result. */
-    source: string;
     category: BenchmarkCategory;
     status: BenchmarkStatus;
     message?: string;
@@ -71,8 +72,6 @@ export interface BenchmarkResult {
     stats?: Stats;
     /** Set for `ok` rows: see `SamplingStopReason`. */
     stopReason?: SamplingStopReason;
-    /** What `metricValue` counts. Set from the start, before any measurement lands. */
-    metric: MetricDef;
     /** Peak `<metric.unit>/s`, computed from the best run (`stats.min`). */
     metricValue?: number;
     timingMethod: TimingMethod;

package/dist/types.d.ts.map

@@ -1 +1 @@
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package/package.json

@@ -1,6 +1,6 @@
 {
   "name": "webgpu-bench",
-  "version": "0.1.0",
+  "version": "0.2.0",
   "description": "Benchmark suite for WebGPU's raw ceilings: memory bandwidth and fp32/fp16/int8 FLOPS.",
   "keywords": [
     "webgpu",