virtual-machine 0.0.0-rc1
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- package/.yarn/install-state.gz +0 -0
- package/.yarnrc.yml +1 -0
- package/Cargo.toml +48 -0
- package/build/cli.js +904 -0
- package/build/index.d.ts +127 -0
- package/build/index.js +723 -0
- package/build/index.mjs +17 -0
- package/build/riscv_vm-CYH5SWIJ.mjs +672 -0
- package/build.sh +26 -0
- package/cli.ts +251 -0
- package/index.ts +15 -0
- package/package.json +30 -0
- package/src/bus.rs +558 -0
- package/src/clint.rs +132 -0
- package/src/console.rs +83 -0
- package/src/cpu.rs +1913 -0
- package/src/csr.rs +67 -0
- package/src/decoder.rs +789 -0
- package/src/dram.rs +146 -0
- package/src/emulator.rs +603 -0
- package/src/lib.rs +270 -0
- package/src/main.rs +363 -0
- package/src/mmu.rs +331 -0
- package/src/net.rs +121 -0
- package/src/net_tap.rs +164 -0
- package/src/net_webtransport.rs +446 -0
- package/src/net_ws.rs +396 -0
- package/src/plic.rs +261 -0
- package/src/uart.rs +233 -0
- package/src/virtio.rs +1074 -0
- package/tsconfig.json +19 -0
- package/tsup/index.ts +80 -0
- package/tsup/tsup.cli.ts +8 -0
- package/tsup/tsup.core.cjs.ts +7 -0
- package/tsup/tsup.core.esm.ts +8 -0
package/src/csr.rs
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use serde::{Deserialize, Serialize};
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#[derive(Debug, Clone, Copy, PartialEq, Eq, Serialize, Deserialize)]
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pub enum Mode {
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User,
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Supervisor,
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Machine,
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}
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impl Mode {
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/// Encode privilege mode into the MPP/SPP field encoding.
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pub fn to_mpp(self) -> u64 {
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match self {
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Mode::User => 0b00,
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Mode::Supervisor => 0b01,
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Mode::Machine => 0b11,
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}
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}
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/// Decode MPP/SPP field into a privilege mode.
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pub fn from_mpp(bits: u64) -> Mode {
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match bits & 0b11 {
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0b00 => Mode::User,
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0b01 => Mode::Supervisor,
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// 0b10 is reserved; treat as Machine for WARL coercion.
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_ => Mode::Machine,
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}
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}
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}
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// Common CSR addresses used by the privileged architecture.
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pub const CSR_SATP: u16 = 0x180;
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pub const CSR_MSTATUS: u16 = 0x300;
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pub const CSR_MISA: u16 = 0x301;
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pub const CSR_MEDELEG: u16 = 0x302;
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pub const CSR_MIDELEG: u16 = 0x303;
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pub const CSR_MIE: u16 = 0x304;
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pub const CSR_MTVEC: u16 = 0x305;
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pub const CSR_MEPC: u16 = 0x341;
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pub const CSR_MCAUSE: u16 = 0x342;
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pub const CSR_MTVAL: u16 = 0x343;
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pub const CSR_MIP: u16 = 0x344;
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// Supervisor CSRs
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pub const CSR_SSTATUS: u16 = 0x100;
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pub const CSR_SIE: u16 = 0x104;
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pub const CSR_STVEC: u16 = 0x105;
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pub const CSR_SSCRATCH: u16 = 0x140;
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pub const CSR_SEPC: u16 = 0x141;
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pub const CSR_SCAUSE: u16 = 0x142;
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pub const CSR_STVAL: u16 = 0x143;
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pub const CSR_SIP: u16 = 0x144;
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// Additional CSRs used by xv6 and Sstc
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pub const CSR_TIME: u16 = 0xC01; // time (read-only)
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pub const CSR_MENVCFG: u16 = 0x30A; // menvcfg (for Sstc enable bit 63)
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pub const CSR_STIMECMP: u16 = 0x14D; // stimecmp (Sstc)
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pub const CSR_MCOUNTEREN: u16 = 0x306;
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// Machine Information Registers (read-only)
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pub const CSR_MVENDORID: u16 = 0xF11; // Vendor ID
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pub const CSR_MARCHID: u16 = 0xF12; // Architecture ID
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pub const CSR_MIMPID: u16 = 0xF13; // Implementation ID
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pub const CSR_MHARTID: u16 = 0xF14; // Hardware thread ID
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