usearch 2.7.3 → 2.7.6

package/simsimd/include/simsimd/simsimd.h

@@ -1,626 +1,386 @@
 /**
- *  @brief Collection of Similarity Measures, SIMD-accelerated with SSE, AVX, NEON, SVE.
- *
- *  @author Ash Vardanian
- *  @date March 14, 2023
+ *  @brief      SIMD-accelerated Similarity Measures and Distance Functions.
+ *  @file       simsimd.h
+ *  @author     Ash Vardanian
+ *  @date       March 14, 2023
+ *  @copyright  Copyright (c) 2023
  *
+ *  References:
  *  x86 intrinsics: https://www.intel.com/content/www/us/en/docs/intrinsics-guide/
  *  Arm intrinsics: https://developer.arm.com/architectures/instruction-sets/intrinsics/
  *  Detecting target CPU features at compile time: https://stackoverflow.com/a/28939692/2766161
  */
 
 #pragma once
-#include <math.h>   // `sqrt`
-#include <stddef.h> // `size_t`
-#include <stdint.h>
-
-#ifdef _MSC_VER
-#include <intrin.h>
-#define popcount32 __popcnt
-#define popcount64 __popcnt64
-#else
-#define popcount32 __builtin_popcount
-#define popcount64 __builtin_popcountll
-#endif
-
-// Compiling for Arm: SIMSIMD_TARGET_ARM
-#if defined(__aarch64__) || defined(_M_ARM64)
-#define SIMSIMD_TARGET_ARM 1
+#include "binary.h"      // Hamming, Jaccard
+#include "probability.h" // Kullback-Leibler, Jensen–Shannon
+#include "spatial.h"     // L2, Inner Product, Cosine
 
-// Compiling for Arm: SIMSIMD_TARGET_ARM_NEON
-#if !defined(SIMSIMD_TARGET_ARM_NEON)
-#if defined(__ARM_NEON)
-#define SIMSIMD_TARGET_ARM_NEON 1
-#else
-#define SIMSIMD_TARGET_ARM_NEON 0
-#endif
-#endif
-
-// Compiling for Arm: SIMSIMD_TARGET_ARM_SVE
-#if !defined(SIMSIMD_TARGET_ARM_SVE)
-#if defined(__ARM_FEATURE_SVE)
-#define SIMSIMD_TARGET_ARM_SVE 1
-#else
-#define SIMSIMD_TARGET_ARM_SVE 0
-#endif
-#endif
-
-#undef SIMSIMD_TARGET_X86
-#undef SIMSIMD_TARGET_X86_AVX2
-#undef SIMSIMD_TARGET_X86_AVX512
-#define SIMSIMD_TARGET_X86 0
-#define SIMSIMD_TARGET_X86_AVX2 0
-#define SIMSIMD_TARGET_X86_AVX512 0
-
-// Compiling for x86: SIMSIMD_TARGET_X86
-#elif defined(__x86_64__) || defined(_M_X64)
-#define SIMSIMD_TARGET_X86 1
-
-// Compiling for x86: SIMSIMD_TARGET_X86_AVX2
-#if !defined(SIMSIMD_TARGET_X86_AVX2)
-#if defined(__AVX2__)
-#define SIMSIMD_TARGET_X86_AVX2 1
-#else
-#define SIMSIMD_TARGET_X86_AVX2 0
-#endif
-#endif
-
-// Compiling for x86: SIMSIMD_TARGET_X86_AVX512
-#if !defined(SIMSIMD_TARGET_X86_AVX512)
-#if defined(__AVX512F__) || defined(__AVX512VPOPCNTDQ__)
-#define SIMSIMD_TARGET_X86_AVX512 1
-#else
-#define SIMSIMD_TARGET_X86_AVX512 0
-#endif
-#endif
-
-#undef SIMSIMD_TARGET_ARM
-#undef SIMSIMD_TARGET_ARM_NEON
-#undef SIMSIMD_TARGET_ARM_SVE
-#define SIMSIMD_TARGET_ARM 0
-#define SIMSIMD_TARGET_ARM_NEON 0
-#define SIMSIMD_TARGET_ARM_SVE 0
-
-// Compiling for unknown hardware architecture
-#else
-#error Unknown hardware architecture!
-#endif
-
-#if SIMSIMD_TARGET_ARM_NEON
-#include <arm_neon.h>
+#if SIMSIMD_TARGET_ARM
+#ifdef __linux__
+#include <asm/hwcap.h>
+#include <sys/auxv.h>
 #endif
-
-#if SIMSIMD_TARGET_ARM_SVE
-#include <arm_sve.h>
-#endif
-
-#if SIMSIMD_TARGET_X86_AVX2 || SIMSIMD_TARGET_X86_AVX512
-#include <immintrin.h>
 #endif
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-typedef float simsimd_f32_t;
-typedef double simsimd_f64_t;
-typedef int16_t simsimd_f16_t;
-
-union simsimd_f32i32_t {
-    int32_t i;
-    float f;
-};
-
-#if SIMSIMD_TARGET_ARM
-#if SIMSIMD_TARGET_ARM_SVE
-
-__attribute__((target("+sve"))) inline static simsimd_f32_t //
-simsimd_dot_f32_sve(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
-
-    size_t i = 0;
-    svfloat32_t ab_vec = svdupq_n_f32(0.f, 0.f, 0.f, 0.f);
-    svbool_t pg_vec = svwhilelt_b32(i, d);
-    do {
-        svfloat32_t a_vec = svld1_f32(pg_vec, a + i);
-        svfloat32_t b_vec = svld1_f32(pg_vec, b + i);
-        ab_vec = svmla_f32_x(pg_vec, ab_vec, a_vec, b_vec);
-        i += svcntw();
-        pg_vec = svwhilelt_b32(i, d);
-    } while (svptest_any(svptrue_b32(), pg_vec));
-    return 1 - svaddv_f32(svptrue_b32(), ab_vec);
-}
-
-__attribute__((target("+sve"))) inline static simsimd_f32_t //
-simsimd_cos_f32_sve(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
-    size_t i = 0;
-    svfloat32_t ab_vec = svdupq_n_f32(0.f, 0.f, 0.f, 0.f);
-    svfloat32_t a2_vec = svdupq_n_f32(0.f, 0.f, 0.f, 0.f);
-    svfloat32_t b2_vec = svdupq_n_f32(0.f, 0.f, 0.f, 0.f);
-    svbool_t pg_vec = svwhilelt_b32(i, d);
-    do {
-        svfloat32_t a_vec = svld1_f32(pg_vec, a + i);
-        svfloat32_t b_vec = svld1_f32(pg_vec, b + i);
-        ab_vec = svmla_f32_x(pg_vec, ab_vec, a_vec, b_vec);
-        a2_vec = svmla_f32_x(pg_vec, a2_vec, a_vec, a_vec);
-        b2_vec = svmla_f32_x(pg_vec, b2_vec, b_vec, b_vec);
-        i += svcntw();
-        pg_vec = svwhilelt_b32(i, d);
-    } while (svptest_any(svptrue_b32(), pg_vec));
-    simsimd_f32_t ab = svaddv_f32(svptrue_b32(), ab_vec);
-    simsimd_f32_t a2 = svaddv_f32(svptrue_b32(), a2_vec);
-    simsimd_f32_t b2 = svaddv_f32(svptrue_b32(), b2_vec);
-    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
-}
-
-__attribute__((target("+sve"))) inline static simsimd_f32_t //
-simsimd_l2sq_f32_sve(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
-    size_t i = 0;
-    svfloat32_t d2_vec = svdupq_n_f32(0.f, 0.f, 0.f, 0.f);
-    svbool_t pg_vec = svwhilelt_b32(i, d);
-    do {
-        svfloat32_t a_vec = svld1_f32(pg_vec, a + i);
-        svfloat32_t b_vec = svld1_f32(pg_vec, b + i);
-        svfloat32_t a_minus_b_vec = svsub_f32_x(pg_vec, a_vec, b_vec);
-        d2_vec = svmla_f32_x(pg_vec, d2_vec, a_minus_b_vec, a_minus_b_vec);
-        i += svcntw();
-        pg_vec = svwhilelt_b32(i, d);
-    } while (svptest_any(svptrue_b32(), pg_vec));
-    simsimd_f32_t d2 = svaddv_f32(svptrue_b32(), d2_vec);
-    return d2;
-}
-
-__attribute__((target("+sve+fp16"))) inline static simsimd_f32_t //
-simsimd_cos_f16_sve(simsimd_f16_t const* a_enum, simsimd_f16_t const* b_enum, size_t d) {
-    size_t i = 0;
-    svfloat16_t ab_vec = svdupq_n_f16(0, 0, 0, 0, 0, 0, 0, 0);
-    svfloat16_t a2_vec = svdupq_n_f16(0, 0, 0, 0, 0, 0, 0, 0);
-    svfloat16_t b2_vec = svdupq_n_f16(0, 0, 0, 0, 0, 0, 0, 0);
-    svbool_t pg_vec = svwhilelt_b16(i, d);
-    simsimd_f16_t const* a = (simsimd_f16_t const*)(a_enum);
-    simsimd_f16_t const* b = (simsimd_f16_t const*)(b_enum);
-    do {
-        svfloat16_t a_vec = svld1_f16(pg_vec, (float16_t const*)a + i);
-        svfloat16_t b_vec = svld1_f16(pg_vec, (float16_t const*)b + i);
-        ab_vec = svmla_f16_x(pg_vec, ab_vec, a_vec, b_vec);
-        a2_vec = svmla_f16_x(pg_vec, a2_vec, a_vec, a_vec);
-        b2_vec = svmla_f16_x(pg_vec, b2_vec, b_vec, b_vec);
-        i += svcnth();
-        pg_vec = svwhilelt_b16(i, d);
-    } while (svptest_any(svptrue_b16(), pg_vec));
-    simsimd_f16_t ab = svaddv_f16(svptrue_b16(), ab_vec);
-    simsimd_f16_t a2 = svaddv_f16(svptrue_b16(), a2_vec);
-    simsimd_f16_t b2 = svaddv_f16(svptrue_b16(), b2_vec);
-    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
-}
-
-__attribute__((target("+sve+fp16"))) inline static simsimd_f32_t //
-simsimd_l2sq_f16_sve(simsimd_f16_t const* a_enum, simsimd_f16_t const* b_enum, size_t d) {
-    size_t i = 0;
-    svfloat16_t d2_vec = svdupq_n_f16(0, 0, 0, 0, 0, 0, 0, 0);
-    svbool_t pg_vec = svwhilelt_b16(i, d);
-    simsimd_f16_t const* a = (simsimd_f16_t const*)(a_enum);
-    simsimd_f16_t const* b = (simsimd_f16_t const*)(b_enum);
-    do {
-        svfloat16_t a_vec = svld1_f16(pg_vec, (float16_t const*)a + i);
-        svfloat16_t b_vec = svld1_f16(pg_vec, (float16_t const*)b + i);
-        svfloat16_t a_minus_b_vec = svsub_f16_x(pg_vec, a_vec, b_vec);
-        d2_vec = svmla_f16_x(pg_vec, d2_vec, a_minus_b_vec, a_minus_b_vec);
-        i += svcnth();
-        pg_vec = svwhilelt_b16(i, d);
-    } while (svptest_any(svptrue_b16(), pg_vec));
-    float16_t d2_f16 = svaddv_f16(svptrue_b16(), d2_vec);
-    return 1 - d2_f16;
-}
-
-__attribute__((target("+sve"))) inline static simsimd_f32_t //
-simsimd_hamming_b1x8_sve(uint8_t const* a, uint8_t const* b, size_t d) {
-    size_t i = 0;
-    svuint8_t d_vec = svdupq_n_u8(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
-    svbool_t pg_vec = svwhilelt_b8(i, d);
-    do {
-        svuint8_t a_vec = svld1_u8(pg_vec, a + i);
-        svuint8_t b_vec = svld1_u8(pg_vec, b + i);
-        svuint8_t a_xor_b_vec = sveor_u8_m(pg_vec, a_vec, b_vec);
-        d_vec = svadd_u8_m(pg_vec, d_vec, svcnt_u8_x(pg_vec, a_xor_b_vec));
-        i += svcntb() * __CHAR_BIT__;
-        pg_vec = svwhilelt_b32(i, d);
-    } while (svptest_any(svptrue_b32(), pg_vec));
-    return 1 - svaddv_u8(svptrue_b32(), d_vec);
-}
+/**
+ *  @brief  Enumeration of supported metric kinds.
+ */
+typedef enum {
+    simsimd_metric_unknown_k = 0, ///< Unknown metric kind
 
-#endif // SIMSIMD_TARGET_ARM_SVE
+    // Classics:
+    simsimd_metric_ip_k = 'i',    ///< Inner product
+    simsimd_metric_dot_k = 'i',   ///< Inner product alias
+    simsimd_metric_inner_k = 'i', ///< Inner product alias
 
-#if SIMSIMD_TARGET_ARM_NEON
+    simsimd_metric_cos_k = 'c',     ///< Cosine similarity
+    simsimd_metric_cosine_k = 'c',  ///< Cosine similarity alias
+    simsimd_metric_angular_k = 'c', ///< Cosine similarity alias
 
-__attribute__((target("+simd"))) inline static simsimd_f32_t //
-simsimd_dot_f32x4_neon(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
+    simsimd_metric_l2sq_k = 'e',        ///< Squared Euclidean distance
+    simsimd_metric_sqeuclidean_k = 'e', ///< Squared Euclidean distance alias
 
-    float32x4_t ab_vec = vdupq_n_f32(0);
-    for (size_t i = 0; i != d; i += 4)
-        ab_vec = vfmaq_f32(ab_vec, vld1q_f32(a + i), vld1q_f32(b + i));
-    return 1 - vaddvq_f32(ab_vec);
-}
+    // Binary:
+    simsimd_metric_hamming_k = 'b', ///< Hamming distance
+    simsimd_metric_jaccard_k = 'j', ///< Jaccard coefficient
 
-__attribute__((target("+simd+fp16"))) inline static simsimd_f32_t //
-simsimd_dot_f16x4_neon(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
+    // Probability:
+    simsimd_metric_kl_k = 'k',               ///< Kullback-Leibler divergence
+    simsimd_metric_kullback_leibler_k = 'k', ///< Kullback-Leibler divergence alias
 
-    float32x4_t ab_vec = vdupq_n_f32(0);
-    for (size_t i = 0; i != d; i += 4) {
-        float32x4_t a_vec = vcvt_f32_f16(vld1_f16((float16_t const*)a + i));
-        float32x4_t b_vec = vcvt_f32_f16(vld1_f16((float16_t const*)b + i));
-        ab_vec = vfmaq_f32(ab_vec, a_vec, b_vec);
-    }
-    return 1 - vaddvq_f32(ab_vec);
-}
+    simsimd_metric_js_k = 's',             ///< Jensen-Shannon divergence
+    simsimd_metric_jensen_shannon_k = 's', ///< Jensen-Shannon divergence alias
 
-__attribute__((target("+simd+fp16"))) inline static simsimd_f32_t //
-simsimd_cos_f16x4_neon(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
-
-    float32x4_t ab_vec = vdupq_n_f32(0);
-    float32x4_t a2_vec = vdupq_n_f32(0);
-    float32x4_t b2_vec = vdupq_n_f32(0);
-    for (size_t i = 0; i != d; i += 4) {
-        float32x4_t a_vec = vcvt_f32_f16(vld1_f16((float16_t const*)a + i));
-        float32x4_t b_vec = vcvt_f32_f16(vld1_f16((float16_t const*)b + i));
-        // vfmaq_f32(a, b, c) == vaddq_f32(vmulq_f32(b, c), a)
-        ab_vec = vfmaq_f32(ab_vec, a_vec, b_vec);
-        a2_vec = vfmaq_f32(a2_vec, a_vec, a_vec);
-        b2_vec = vfmaq_f32(b2_vec, b_vec, b_vec);
-    }
-    simsimd_f32_t ab = vaddvq_f32(ab_vec);
-    simsimd_f32_t a2 = vaddvq_f32(a2_vec);
-    simsimd_f32_t b2 = vaddvq_f32(b2_vec);
-    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
-}
+} simsimd_metric_kind_t;
 
-__attribute__((target("+simd"))) inline static simsimd_f32_t //
-simsimd_cos_i8x16_neon(int8_t const* a, int8_t const* b, size_t d) {
-
-    int32x4_t ab_vec = vdupq_n_s32(0);
-    int32x4_t a2_vec = vdupq_n_s32(0);
-    int32x4_t b2_vec = vdupq_n_s32(0);
-
-    // This 128-bit `vdot_s32` intrinsic is often unavailable, so we use the 64-bit `vdot_s32`.
-    // for (size_t i = 0; i != d; i += 16) {
-    //     int8x16_t a_vec = vld1q_s8(a + i);
-    //     int8x16_t b_vec = vld1q_s8(b + i);
-    //     ab_vec = vdotq_s32(ab_vec, a_vec, b_vec);
-    //     a2_vec = vdotq_s32(a2_vec, a_vec, a_vec);
-    //     b2_vec = vdotq_s32(b2_vec, b_vec, b_vec);
-    // }
-    for (size_t i = 0; i != d; i += 8) {
-        int16x8_t a_vec = vmovl_s8(vld1_s8(a + i));
-        int16x8_t b_vec = vmovl_s8(vld1_s8(b + i));
-        int16x8_t ab_part_vec = vmulq_s16(a_vec, b_vec);
-        int16x8_t a2_part_vec = vmulq_s16(a_vec, a_vec);
-        int16x8_t b2_part_vec = vmulq_s16(b_vec, b_vec);
-        ab_vec = vaddq_s32(ab_vec, vaddq_s32(vmovl_s16(vget_high_s16(ab_part_vec)), //
-                                             vmovl_s16(vget_low_s16(ab_part_vec))));
-        a2_vec = vaddq_s32(a2_vec, vaddq_s32(vmovl_s16(vget_high_s16(a2_part_vec)), //
-                                             vmovl_s16(vget_low_s16(a2_part_vec))));
-        b2_vec = vaddq_s32(b2_vec, vaddq_s32(vmovl_s16(vget_high_s16(b2_part_vec)), //
-                                             vmovl_s16(vget_low_s16(b2_part_vec))));
-    }
+/**
+ *  @brief  Enumeration of SIMD capabilities of the target architecture.
+ */
+typedef enum {
+    simsimd_cap_serial_k = 1,       ///< Serial (non-SIMD) capability
+    simsimd_cap_any_k = 0xFFFFFFFF, ///< Mask representing any capability
 
-    int32x2_t ab_part = vadd_s32(vget_high_s32(ab_vec), vget_low_s32(ab_vec));
-    int32_t ab = vget_lane_s32(vpadd_s32(ab_part, ab_part), 0);
-    int32x2_t a2_part = vadd_s32(vget_high_s32(a2_vec), vget_low_s32(a2_vec));
-    int32_t a2 = vget_lane_s32(vpadd_s32(a2_part, a2_part), 0);
-    int32x2_t b2_part = vadd_s32(vget_high_s32(b2_vec), vget_low_s32(b2_vec));
-    int32_t b2 = vget_lane_s32(vpadd_s32(b2_part, b2_part), 0);
-    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
-}
+    simsimd_cap_arm_neon_k = 1 << 10, ///< ARM NEON capability
+    simsimd_cap_arm_sve_k = 1 << 11,  ///< ARM SVE capability
+    simsimd_cap_arm_sve2_k = 1 << 12, ///< ARM SVE2 capability
 
-__attribute__((target("+simd"))) inline static simsimd_f32_t //
-simsimd_l2sq_i8x16_neon(int8_t const* a, int8_t const* b, size_t d) {
-
-    int32x4_t d2_vec = vdupq_n_s32(0);
-    for (size_t i = 0; i != d; i += 8) {
-        int16x8_t a_vec = vmovl_s8(vld1_s8(a + i));
-        int16x8_t b_vec = vmovl_s8(vld1_s8(b + i));
-        int16x8_t d2_part_vec = vsubq_s16(a_vec, b_vec);
-        d2_part_vec = vmulq_s16(d2_part_vec, d2_part_vec);
-        d2_vec = vaddq_s32(d2_vec, vaddq_s32(vmovl_s16(vget_high_s16(d2_part_vec)), //
-                                             vmovl_s16(vget_low_s16(d2_part_vec))));
-    }
+    simsimd_cap_x86_avx2_k = 1 << 20,            ///< x86 AVX2 capability
+    simsimd_cap_x86_avx512_k = 1 << 21,          ///< x86 AVX512 capability
+    simsimd_cap_x86_avx2fp16_k = 1 << 22,        ///< x86 AVX2 with FP16 capability
+    simsimd_cap_x86_avx512fp16_k = 1 << 23,      ///< x86 AVX512 with FP16 capability
+    simsimd_cap_x86_avx512vpopcntdq_k = 1 << 24, ///< x86 AVX512 VPOPCNTDQ instruction capability
 
-    int32x2_t d2_part = vadd_s32(vget_high_s32(d2_vec), vget_low_s32(d2_vec));
-    int32_t d2 = vget_lane_s32(vpadd_s32(d2_part, d2_part), 0);
-    return d2;
-}
+} simsimd_capability_t;
 
-__attribute__((target("+simd"))) inline static simsimd_f32_t //
-simsimd_cos_f32x4_neon(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
-
-    float32x4_t ab_vec = vdupq_n_f32(0);
-    float32x4_t a2_vec = vdupq_n_f32(0);
-    float32x4_t b2_vec = vdupq_n_f32(0);
-    for (size_t i = 0; i != d; i += 4) {
-        float32x4_t a_vec = vld1q_f32(a + i);
-        float32x4_t b_vec = vld1q_f32(b + i);
-        ab_vec = vmlaq_f32(ab_vec, a_vec, b_vec);
-        a2_vec = vmlaq_f32(a2_vec, a_vec, a_vec);
-        b2_vec = vmlaq_f32(b2_vec, b_vec, b_vec);
-    }
-    simsimd_f32_t ab = vaddvq_f32(ab_vec);
-    simsimd_f32_t a2 = vaddvq_f32(a2_vec);
-    simsimd_f32_t b2 = vaddvq_f32(b2_vec);
-    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
-}
+/**
+ *  @brief  Enumeration of supported data types.
+ */
+typedef enum {
+    simsimd_datatype_unknown_k, ///< Unknown data type
+    simsimd_datatype_f64_k,     ///< Double precision floating point
+    simsimd_datatype_f32_k,     ///< Single precision floating point
+    simsimd_datatype_f16_k,     ///< Half precision floating point
+    simsimd_datatype_i8_k,      ///< 8-bit integer
+    simsimd_datatype_b8_k,      ///< Single-bit values packed into 8-bit words
+} simsimd_datatype_t;
 
-__attribute__((target("+sve"))) inline static simsimd_f32_t //
-simsimd_hamming_b1x128_sve(uint8_t const* a, uint8_t const* b, size_t d) {
+/**
+ *  @brief  Type-punned function pointer accepting two vectors and outputting their similarity/distance.
+ *
+ *  @param[in] a Pointer to the first data array.
+ *  @param[in] b Pointer to the second data array.
+ *  @param[in] size_a Size of the first data array.
+ *  @param[in] size_b Size of the second data array.
+ *  @return Computed metric as a single-precision floating-point value.
+ */
+typedef simsimd_f32_t (*simsimd_metric_punned_t)(void const* a, void const* b, simsimd_size_t size_a,
+                                                 simsimd_size_t size_b);
 
-    /// Contains 16x 8-bit integers with running population count sums.
-    uint8x16_t d_vec = vdupq_n_u8(0);
-    for (size_t i = 0; i != d; i += 16) {
-        uint8x16_t a_vec = vld1q_u8(a + i);
-        uint8x16_t b_vec = vld1q_u8(b + i);
-        uint8x16_t a_xor_b_vec = veorq_u8(a_vec, b_vec);
-        d_vec = vaddq_u8(d_vec, vcntq_u8(a_xor_b_vec));
-    }
-    return 1 - vaddvq_u8(d_vec);
-}
-#endif // SIMSIMD_TARGET_ARM_NEON
-#endif // SIMSIMD_TARGET_ARM
+/**
+ *  @brief  Function to determine the SIMD capabilities of the current machine at @b runtime.
+ *  @return A bitmask of the SIMD capabilities represented as a `simsimd_capability_t` enum value.
+ */
+inline static simsimd_capability_t simsimd_capabilities() {
 
 #if SIMSIMD_TARGET_X86
-#if SIMSIMD_TARGET_X86_AVX2
-
-__attribute__((target("avx2")))                            //
-__attribute__((target("fma"))) inline static simsimd_f32_t //
-simsimd_dot_f32x4_avx2(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
-    __m128 ab_vec = _mm_set1_ps(0);
-    for (size_t i = 0; i != d; i += 4)
-        ab_vec = _mm_fmadd_ps(_mm_loadu_ps(a + i), _mm_loadu_ps(b + i), ab_vec);
-    ab_vec = _mm_hadd_ps(ab_vec, ab_vec);
-    ab_vec = _mm_hadd_ps(ab_vec, ab_vec);
-    union simsimd_f32i32_t ab_union;
-    ab_union.i = _mm_cvtsi128_si32(_mm_castps_si128(ab_vec));
-    return 1 - ab_union.f;
-}
-
-__attribute__((target("avx2")))                            //
-__attribute__((target("fma"))) inline static simsimd_f32_t //
-simsimd_cos_f32x4_avx2(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
-
-    __m128 ab_vec = _mm_set1_ps(0);
-    __m128 a2_vec = _mm_set1_ps(0);
-    __m128 b2_vec = _mm_set1_ps(0);
-    for (size_t i = 0; i != d; i += 4) {
-        __m128 a_vec = _mm_loadu_ps(a + i);
-        __m128 b_vec = _mm_loadu_ps(b + i);
-        ab_vec = _mm_fmadd_ps(a_vec, b_vec, ab_vec);
-        a2_vec = _mm_fmadd_ps(a_vec, a_vec, a2_vec);
-        b2_vec = _mm_fmadd_ps(b_vec, b_vec, b2_vec);
-    }
-    ab_vec = _mm_hadd_ps(ab_vec, ab_vec);
-    ab_vec = _mm_hadd_ps(ab_vec, ab_vec);
-    a2_vec = _mm_hadd_ps(a2_vec, a2_vec);
-    a2_vec = _mm_hadd_ps(a2_vec, a2_vec);
-    b2_vec = _mm_hadd_ps(b2_vec, b2_vec);
-    b2_vec = _mm_hadd_ps(b2_vec, b2_vec);
-    union simsimd_f32i32_t ab_union = {_mm_cvtsi128_si32(_mm_castps_si128(ab_vec))};
-    union simsimd_f32i32_t a2_union = {_mm_cvtsi128_si32(_mm_castps_si128(a2_vec))};
-    union simsimd_f32i32_t b2_union = {_mm_cvtsi128_si32(_mm_castps_si128(b2_vec))};
-    return 1 - ab_union.f / (sqrtf(a2_union.f) * sqrtf(b2_union.f));
-}
-
-__attribute__((target("avx2")))                            //
-__attribute__((target("fma"))) inline static simsimd_f32_t //
-simsimd_l2sq_f32x4_avx2(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
-    __m128 sum_vec = _mm_set1_ps(0);
-    for (size_t i = 0; i != d; i += 4) {
-        __m128 diff_vec = _mm_sub_ps(_mm_loadu_ps(a + i), _mm_loadu_ps(b + i));
-        sum_vec = _mm_fmadd_ps(diff_vec, diff_vec, sum_vec);
-    }
-    sum_vec = _mm_hadd_ps(sum_vec, sum_vec);
-    sum_vec = _mm_hadd_ps(sum_vec, sum_vec);
-    float result[1];
-    _mm_store_ss(result, sum_vec);
-    return result[0];
-}
-
-__attribute__((target("avx2")))                            //
-__attribute__((target("f16c")))                            //
-__attribute__((target("fma"))) inline static simsimd_f32_t //
-simsimd_dot_f16x8_avx2(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
-    __m256 ab_vec = _mm256_set1_ps(0);
-    for (size_t i = 0; i != d; i += 8) {
-        __m256 a_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(a + i)));
-        __m256 b_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(b + i)));
-        ab_vec = _mm256_fmadd_ps(a_vec, b_vec, ab_vec);
-    }
-    ab_vec = _mm256_add_ps(_mm256_permute2f128_ps(ab_vec, ab_vec, 0x81), ab_vec);
-    ab_vec = _mm256_hadd_ps(ab_vec, ab_vec);
-    ab_vec = _mm256_hadd_ps(ab_vec, ab_vec);
-    float result[1];
-    _mm_store_ss(result, _mm256_castps256_ps128(ab_vec));
-    return 1 - result[0];
-}
-
-__attribute__((target("avx2")))                            //
-__attribute__((target("f16c")))                            //
-__attribute__((target("fma"))) inline static simsimd_f32_t //
-simsimd_cos_f16x8_avx2(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
-    __m256 ab_vec = _mm256_set1_ps(0);
-    __m256 a2_vec = _mm256_set1_ps(0);
-    __m256 b2_vec = _mm256_set1_ps(0);
-    for (size_t i = 0; i != d; i += 8) {
-        __m256 a_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(a + i)));
-        __m256 b_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(b + i)));
-        ab_vec = _mm256_fmadd_ps(a_vec, b_vec, ab_vec);
-        a2_vec = _mm256_fmadd_ps(a_vec, a_vec, a2_vec);
-        b2_vec = _mm256_fmadd_ps(b_vec, b_vec, b2_vec);
-    }
-    ab_vec = _mm256_add_ps(_mm256_permute2f128_ps(ab_vec, ab_vec, 0x81), ab_vec);
-    ab_vec = _mm256_hadd_ps(ab_vec, ab_vec);
-    ab_vec = _mm256_hadd_ps(ab_vec, ab_vec);
-    a2_vec = _mm256_add_ps(_mm256_permute2f128_ps(a2_vec, a2_vec, 0x81), a2_vec);
-    a2_vec = _mm256_hadd_ps(a2_vec, a2_vec);
-    a2_vec = _mm256_hadd_ps(a2_vec, a2_vec);
-    b2_vec = _mm256_add_ps(_mm256_permute2f128_ps(b2_vec, b2_vec, 0x81), b2_vec);
-    b2_vec = _mm256_hadd_ps(b2_vec, b2_vec);
-    b2_vec = _mm256_hadd_ps(b2_vec, b2_vec);
-    float ab_result[1], a2_result[1], b2_result[1];
-    _mm_store_ss(ab_result, _mm256_castps256_ps128(ab_vec));
-    _mm_store_ss(a2_result, _mm256_castps256_ps128(a2_vec));
-    _mm_store_ss(b2_result, _mm256_castps256_ps128(b2_vec));
-    return 1 - ab_result[0] / (sqrtf(a2_result[0]) * sqrtf(b2_result[0]));
-}
-
-__attribute__((target("avx2")))                            //
-__attribute__((target("f16c")))                            //
-__attribute__((target("fma"))) inline static simsimd_f32_t //
-simsimd_l2sq_f16x8_avx2(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
-    __m256 sum_vec = _mm256_set1_ps(0);
-    for (size_t i = 0; i != d; i += 8) {
-        __m256 a_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(a + i)));
-        __m256 b_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(b + i)));
-        __m256 diff_vec = _mm256_sub_ps(a_vec, b_vec);
-        sum_vec = _mm256_fmadd_ps(diff_vec, diff_vec, sum_vec);
-    }
-    sum_vec = _mm256_add_ps(_mm256_permute2f128_ps(sum_vec, sum_vec, 0x81), sum_vec);
-    sum_vec = _mm256_hadd_ps(sum_vec, sum_vec);
-    sum_vec = _mm256_hadd_ps(sum_vec, sum_vec);
-    float result[1];
-    _mm_store_ss(result, _mm256_castps256_ps128(sum_vec));
-    return result[0];
-}
 
-__attribute__((target("avx2"))) //
-inline static simsimd_f32_t
-simsimd_cos_i8x32_avx2(int8_t const* a, int8_t const* b, size_t d) {
+    /// The states of 4 registers populated for a specific "cpuid" assmebly call
+    union {
+        int array[4];
+        struct {
+            unsigned eax, ebx, ecx, edx;
+        };
+    } info1, info7;
 
-    __m256i ab_vec = _mm256_setzero_si256();
-    __m256i a2_vec = _mm256_setzero_si256();
-    __m256i b2_vec = _mm256_setzero_si256();
-
-    for (size_t i = 0; i != d; i += 32) {
-        __m256i a_vec = _mm256_loadu_si256((__m256i const*)(a + i));
-        __m256i b_vec = _mm256_loadu_si256((__m256i const*)(b + i));
-
-        // Multiply and add packed 8-bit integers
-        __m256i ab_part_vec = _mm256_maddubs_epi16(a_vec, b_vec);
-        __m256i a2_part_vec = _mm256_maddubs_epi16(a_vec, a_vec);
-        __m256i b2_part_vec = _mm256_maddubs_epi16(b_vec, b_vec);
-
-        ab_vec = _mm256_add_epi32(ab_vec, ab_part_vec);
-        a2_vec = _mm256_add_epi32(a2_vec, a2_part_vec);
-        b2_vec = _mm256_add_epi32(b2_vec, b2_part_vec);
-    }
-
-    // Horizontal sum across the 256-bit register
-    __m128i ab_low = _mm256_extracti128_si256(ab_vec, 0);
-    __m128i ab_high = _mm256_extracti128_si256(ab_vec, 1);
-    __m128i ab_sum = _mm_add_epi32(ab_low, ab_high);
+#ifdef _MSC_VER
+    __cpuidex(info1.array, 1, 0);
+    __cpuidex(info7.array, 7, 0);
+#else
+    __asm__ __volatile__("cpuid" : "=a"(info1.eax), "=b"(info1.ebx), "=c"(info1.ecx), "=d"(info1.edx) : "a"(1), "c"(0));
+    __asm__ __volatile__("cpuid" : "=a"(info7.eax), "=b"(info7.ebx), "=c"(info7.ecx), "=d"(info7.edx) : "a"(7), "c"(0));
+#endif
 
-    __m128i a2_low = _mm256_extracti128_si256(a2_vec, 0);
-    __m128i a2_high = _mm256_extracti128_si256(a2_vec, 1);
-    __m128i a2_sum = _mm_add_epi32(a2_low, a2_high);
+    // Check for AVX2 (Function ID 7, EBX register)
+    // https://github.com/llvm/llvm-project/blob/50598f0ff44f3a4e75706f8c53f3380fe7faa896/clang/lib/Headers/cpuid.h#L148
+    unsigned supports_avx2 = (info7.ebx & 0x00000020) != 0;
+    // Check for F16C (Function ID 1, ECX register)
+    // https://github.com/llvm/llvm-project/blob/50598f0ff44f3a4e75706f8c53f3380fe7faa896/clang/lib/Headers/cpuid.h#L107
+    unsigned supports_f16c = (info1.ecx & 0x20000000) != 0;
+    // Check for AVX512F (Function ID 7, EBX register)
+    // https://github.com/llvm/llvm-project/blob/50598f0ff44f3a4e75706f8c53f3380fe7faa896/clang/lib/Headers/cpuid.h#L155
+    unsigned supports_avx512f = (info7.ebx & 0x00010000) != 0;
+    // Check for AVX512FP16 (Function ID 7, EDX register)
+    // https://github.com/llvm/llvm-project/blob/50598f0ff44f3a4e75706f8c53f3380fe7faa896/clang/lib/Headers/cpuid.h#L198C9-L198C23
+    unsigned supports_avx512fp16 = (info7.edx & 0x00800000) != 0;
+    // Check for VPOPCNTDQ (Function ID 1, ECX register)
+    // https://github.com/llvm/llvm-project/blob/50598f0ff44f3a4e75706f8c53f3380fe7faa896/clang/lib/Headers/cpuid.h#L182C30-L182C40
+    unsigned supports_avx512vpopcntdq = (info1.ecx & 0x00004000) != 0;
+
+    return (simsimd_capability_t)(                                                                   //
+        (simsimd_cap_x86_avx2_k * supports_avx2) |                                                   //
+        (simsimd_cap_x86_avx512_k * supports_avx512f) |                                              //
+        (simsimd_cap_x86_avx2fp16_k * (supports_avx2 && supports_f16c)) |                            //
+        (simsimd_cap_x86_avx512fp16_k * (supports_avx512fp16 && supports_avx512f)) |                 //
+        (simsimd_cap_x86_avx512vpopcntdq_k * (supports_avx512vpopcntdq && supports_avx512vpopcntdq)) //
+        | (simsimd_cap_serial_k));
 
-    __m128i b2_low = _mm256_extracti128_si256(b2_vec, 0);
-    __m128i b2_high = _mm256_extracti128_si256(b2_vec, 1);
-    __m128i b2_sum = _mm_add_epi32(b2_low, b2_high);
+#endif // SIMSIMD_TARGET_X86
 
-    // Further reduce to a single sum for each vector
-    int ab = _mm_extract_epi32(_mm_hadd_epi32(_mm_hadd_epi32(ab_sum, ab_sum), ab_sum), 0);
-    int a2 = _mm_extract_epi32(_mm_hadd_epi32(_mm_hadd_epi32(a2_sum, a2_sum), a2_sum), 0);
-    int b2 = _mm_extract_epi32(_mm_hadd_epi32(_mm_hadd_epi32(b2_sum, b2_sum), b2_sum), 0);
+#if SIMSIMD_TARGET_ARM
 
-    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
-}
+    // Every 64-bit Arm CPU supports NEON
+    unsigned supports_neon = 1;
+    unsigned supports_sve = 0;
+    unsigned supports_sve2 = 0;
 
-#endif // SIMSIMD_TARGET_X86_AVX2
+#ifdef __linux__
+    unsigned long hwcap = getauxval(AT_HWCAP);
+    unsigned long hwcap2 = getauxval(AT_HWCAP2);
+    supports_sve = (hwcap & HWCAP_SVE) != 0;
+    supports_sve2 = (hwcap2 & HWCAP2_SVE2) != 0;
+#endif
 
-#if SIMSIMD_TARGET_X86_AVX512
+    return (simsimd_capability_t)(                 //
+        (simsimd_cap_arm_neon_k * supports_neon) | //
+        (simsimd_cap_arm_sve_k * supports_sve) |   //
+        (simsimd_cap_arm_sve2_k * supports_sve2) | //
+        (simsimd_cap_serial_k));
 
-__attribute__((target("avx512fp16")))                          //
-__attribute__((target("avx512f"))) inline static simsimd_f32_t //
-simsimd_dot_f16x16_avx512(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
-    __m512 ab_vec = _mm512_set1_ps(0);
-    for (size_t i = 0; i != d; i += 16) {
-        __m512 a_vec = _mm512_cvtxph_ps(_mm256_loadu_ph(a + i));
-        __m512 b_vec = _mm512_cvtxph_ps(_mm256_loadu_ph(b + i));
-        ab_vec = _mm512_fmadd_ps(a_vec, b_vec, ab_vec);
-    }
-    simsimd_f32_t ab = _mm512_reduce_add_ps(ab_vec);
-    return 1 - ab;
-}
+#endif // SIMSIMD_TARGET_ARM
 
-__attribute__((target("avx512fp16")))                          //
-__attribute__((target("avx512f"))) inline static simsimd_f32_t //
-simsimd_cos_f16x16_avx512(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
-    __m512 ab_vec = _mm512_set1_ps(0);
-    __m512 a2_vec = _mm512_set1_ps(0);
-    __m512 b2_vec = _mm512_set1_ps(0);
-    for (size_t i = 0; i != d; i += 16) {
-        __m512 a_vec = _mm512_cvtxph_ps(_mm256_loadu_ph(a + i));
-        __m512 b_vec = _mm512_cvtxph_ps(_mm256_loadu_ph(b + i));
-        ab_vec = _mm512_fmadd_ps(a_vec, b_vec, ab_vec);
-        a2_vec = _mm512_fmadd_ps(a_vec, a_vec, a2_vec);
-        b2_vec = _mm512_fmadd_ps(b_vec, b_vec, b2_vec);
-    }
-    simsimd_f32_t ab = _mm512_reduce_add_ps(ab_vec);
-    simsimd_f32_t a2 = _mm512_reduce_add_ps(a2_vec);
-    simsimd_f32_t b2 = _mm512_reduce_add_ps(b2_vec);
-    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
+    return simsimd_cap_serial_k;
 }
 
-__attribute__((target("avx512fp16")))                          //
-__attribute__((target("avx512f"))) inline static simsimd_f32_t //
-simsimd_l2sq_f16x16_avx512(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
-    __m512 sum_vec = _mm512_set1_ps(0);
-    for (size_t i = 0; i != d; i += 16) {
-        __m512 a_vec = _mm512_cvtxph_ps(_mm256_loadu_ph(a + i));
-        __m512 b_vec = _mm512_cvtxph_ps(_mm256_loadu_ph(b + i));
-        __m512 diff_vec = _mm512_sub_ps(a_vec, b_vec);
-        sum_vec = _mm512_fmadd_ps(diff_vec, diff_vec, sum_vec);
+/**
+ *  @brief  Determines the best suited metric implementation based on the given datatype,
+ *          supported and allowed by hardware capabilities.
+ *
+ *  @param kind The kind of metric to be evaluated.
+ *  @param datatype The data type for which the metric needs to be evaluated.
+ *  @param supported The hardware capabilities supported by the CPU.
+ *  @param allowed The hardware capabilities allowed for use.
+ *  @param metric_output Output variable for the selected similarity function.
+ *  @param capability_output Output variable for the utilized hardware capabilities.
+ */
+inline static void simsimd_find_metric_punned( //
+    simsimd_metric_kind_t kind,                //
+    simsimd_datatype_t datatype,               //
+    simsimd_capability_t supported,            //
+    simsimd_capability_t allowed,              //
+    simsimd_metric_punned_t* metric_output,    //
+    simsimd_capability_t* capability_output) {
+
+    simsimd_metric_punned_t* m = metric_output;
+    simsimd_capability_t* c = capability_output;
+    simsimd_capability_t viable = (simsimd_capability_t)(supported & allowed);
+    *m = (simsimd_metric_punned_t)0;
+    *c = (simsimd_capability_t)0;
+
+    // clang-format off
+    switch (datatype) {
+
+    case simsimd_datatype_unknown_k: break;
+    case simsimd_datatype_f64_k: break;
+
+    // Single-precision floating-point vectors
+    case simsimd_datatype_f32_k:
+
+    #if SIMSIMD_TARGET_ARM_NEON
+        if (viable & simsimd_cap_arm_neon_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_neon_f32_ip, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_neon_f32_cos, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_neon_f32_l2sq, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_js_k: *m = (simsimd_metric_punned_t)&simsimd_neon_f32_js, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_kl_k: *m = (simsimd_metric_punned_t)&simsimd_neon_f32_kl, *c = simsimd_cap_arm_neon_k; break;
+            }
+    #endif
+    #if SIMSIMD_TARGET_X86_AVX512
+        if (viable & simsimd_cap_x86_avx512_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_f32_ip, *c = simsimd_cap_x86_avx512_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_f32_cos, *c = simsimd_cap_x86_avx512_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_f32_l2sq, *c = simsimd_cap_x86_avx512_k; break;
+            }
+    #endif
+        if (viable & simsimd_cap_serial_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_serial_f32_ip, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_serial_f32_cos, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_serial_f32_l2sq, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_js_k: *m = (simsimd_metric_punned_t)&simsimd_serial_f32_js, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_kl_k: *m = (simsimd_metric_punned_t)&simsimd_serial_f32_kl, *c = simsimd_cap_serial_k; break;
+            }
+
+        break;
+
+    // Half-precision floating-point vectors
+    case simsimd_datatype_f16_k:
+
+    #if SIMSIMD_TARGET_ARM_NEON
+        if (viable & simsimd_cap_arm_neon_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_neon_f16_ip, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_neon_f16_cos, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_neon_f16_l2sq, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_js_k: *m = (simsimd_metric_punned_t)&simsimd_neon_f16_js, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_kl_k: *m = (simsimd_metric_punned_t)&simsimd_neon_f16_kl, *c = simsimd_cap_arm_neon_k; break;
+            }
+    #endif
+    #if SIMSIMD_TARGET_ARM_SVE
+        if (viable & simsimd_cap_arm_sve_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_sve_f16_ip, *c = simsimd_cap_arm_sve_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_sve_f16_cos, *c = simsimd_cap_arm_sve_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_sve_f16_l2sq, *c = simsimd_cap_arm_sve_k; break;
+            }
+    #endif
+    #if SIMSIMD_TARGET_X86_AVX2
+        if (viable & simsimd_cap_x86_avx2_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_avx2_f16_ip, *c = simsimd_cap_x86_avx2_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_avx2_f16_cos, *c = simsimd_cap_x86_avx2_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_avx2_f16_l2sq, *c = simsimd_cap_x86_avx2_k; break;
+            }
+    #endif
+    #if SIMSIMD_TARGET_X86_AVX512
+        if (viable & simsimd_cap_x86_avx512_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_f16_ip, *c = simsimd_cap_x86_avx512_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_f16_cos, *c = simsimd_cap_x86_avx512_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_f16_l2sq, *c = simsimd_cap_x86_avx512_k; break;
+            }
+    #endif
+
+        if (viable & simsimd_cap_serial_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_serial_f16_ip, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_serial_f16_cos, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_serial_f16_l2sq, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_js_k: *m = (simsimd_metric_punned_t)&simsimd_serial_f16_js, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_kl_k: *m = (simsimd_metric_punned_t)&simsimd_serial_f16_kl, *c = simsimd_cap_serial_k; break;
+            }
+        
+        break;
+
+    // Single-byte integer vectors
+    case simsimd_datatype_i8_k:
+    #if SIMSIMD_TARGET_ARM_NEON
+        if (viable & simsimd_cap_arm_neon_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_neon_i8_ip, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_neon_i8_cos, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_neon_i8_l2sq, *c = simsimd_cap_arm_neon_k; break;
+            }
+    #endif
+    #if SIMSIMD_TARGET_X86_AVX2
+        if (viable & simsimd_cap_x86_avx2_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_avx2_i8_ip, *c = simsimd_cap_x86_avx2_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_avx2_i8_cos, *c = simsimd_cap_x86_avx2_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_avx2_i8_l2sq, *c = simsimd_cap_x86_avx2_k; break;
+            }
+    #endif
+    #if SIMSIMD_TARGET_X86_AVX512
+        if (viable & simsimd_cap_x86_avx512_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_i8_ip, *c = simsimd_cap_x86_avx512_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_i8_cos, *c = simsimd_cap_x86_avx512_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_i8_l2sq, *c = simsimd_cap_x86_avx512_k; break;
+            }
+    #endif
+
+        if (viable & simsimd_cap_serial_k)
+            switch (kind) {
+            case simsimd_metric_ip_k: *m = (simsimd_metric_punned_t)&simsimd_serial_i8_ip, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_cos_k: *m = (simsimd_metric_punned_t)&simsimd_serial_i8_cos, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_l2sq_k: *m = (simsimd_metric_punned_t)&simsimd_serial_i8_l2sq, *c = simsimd_cap_serial_k; break;
+            }
+        
+        break;
+
+    // Binary vectors
+    case simsimd_datatype_b8_k:
+
+    #if SIMSIMD_TARGET_ARM_NEON
+        if (viable & simsimd_cap_arm_neon_k)
+            switch (kind) {
+            case simsimd_metric_hamming_k: *m = (simsimd_metric_punned_t)&simsimd_neon_b8_hamming, *c = simsimd_cap_arm_neon_k; break;
+            case simsimd_metric_jaccard_k: *m = (simsimd_metric_punned_t)&simsimd_neon_b8_jaccard, *c = simsimd_cap_arm_neon_k; break;
+            }
+    #endif
+    #if SIMSIMD_TARGET_ARM_SVE
+        if (viable & simsimd_cap_arm_sve_k)
+            switch (kind) {
+            case simsimd_metric_hamming_k: *m = (simsimd_metric_punned_t)&simsimd_sve_b8_hamming, *c = simsimd_cap_arm_sve_k; break;
+            case simsimd_metric_jaccard_k: *m = (simsimd_metric_punned_t)&simsimd_sve_b8_jaccard, *c = simsimd_cap_arm_sve_k; break;
+            }
+    #endif
+    #if SIMSIMD_TARGET_X86_AVX512
+        if (viable & simsimd_cap_x86_avx512vpopcntdq_k)
+            switch (kind) {
+            case simsimd_metric_hamming_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_b8_hamming, *c = simsimd_cap_x86_avx512vpopcntdq_k; break;
+            case simsimd_metric_jaccard_k: *m = (simsimd_metric_punned_t)&simsimd_avx512_b8_jaccard, *c = simsimd_cap_x86_avx512vpopcntdq_k; break;
+            }
+    #endif
+
+        if (viable & simsimd_cap_serial_k)
+            switch (kind) {
+            case simsimd_metric_hamming_k: *m = (simsimd_metric_punned_t)&simsimd_serial_b8_hamming, *c = simsimd_cap_serial_k; break;
+            case simsimd_metric_jaccard_k: *m = (simsimd_metric_punned_t)&simsimd_serial_b8_jaccard, *c = simsimd_cap_serial_k; break;
+            }
+        
+        break;
     }
-    simsimd_f32_t sum = _mm512_reduce_add_ps(sum_vec);
-    return sum;
-}
-
-__attribute__((target("avx512vpopcntdq")))                     //
-__attribute__((target("avx512vl")))                            //
-__attribute__((target("avx512f"))) inline static simsimd_f32_t //
-simsimd_hamming_b1x128_avx512(uint8_t const* a, uint8_t const* b, size_t d) {
-    size_t words = d / 128;
-    uint64_t const* a64 = (uint64_t const*)(a);
-    uint64_t const* b64 = (uint64_t const*)(b);
-    /// Contains 2x 64-bit integers with running population count sums.
-    __m128i d_vec = _mm_set_epi64x(0, 0);
-    for (size_t i = 0; i != words; i += 2)
-        d_vec = _mm_add_epi64( //
-            d_vec,             //
-            _mm_popcnt_epi64(  //
-                _mm_xor_si128( //
-                    _mm_load_si128((__m128i const*)(a64 + i)), _mm_load_si128((__m128i const*)(b64 + i)))));
-    return _mm_cvtm64_si64(_mm_movepi64_pi64(d_vec)) + _mm_extract_epi64(d_vec, 1);
+    // clang-format on
 }
 
-#endif // SIMSIMD_TARGET_X86_AVX512
-#endif // SIMSIMD_TARGET_X86
-
-inline static simsimd_f32_t //
-simsimd_tanimoto_b1x8_naive(uint8_t const* a, uint8_t const* b, size_t d) {
-    size_t and_count = 0, or_count = 0;
-    uint8_t const* a_end = a + d / 8;
-    // Misaligned prefix
-    for (; a != a_end && (size_t)(a) % 8 != 0; ++a, ++b)
-        and_count += popcount32(*a & *b), or_count += popcount32(*a | *b);
-    // Properly aligned body
-    for (; a + 8 <= a_end; a += 8, b += 8)
-        and_count += popcount64(*(uint64_t*)a & *(uint64_t*)b), or_count += popcount64(*(uint64_t*)a | *(uint64_t*)b);
-    // Misaligned suffix
-    for (; a != a_end; ++a, ++b)
-        and_count += popcount32(*a & *b), or_count += popcount32(*a | *b);
-    return 1 - (simsimd_f32_t)(and_count) / or_count;
+/**
+ *  @brief  Selects the most suitable metric implementation based on the given metric kind, datatype,
+ *          and allowed capabilities. @b Don't call too often and prefer caching the `simsimd_capabilities()`.
+ *
+ *  @param kind The kind of metric to be evaluated.
+ *  @param datatype The data type for which the metric needs to be evaluated.
+ *  @param allowed The hardware capabilities allowed for use.
+ *  @return A function pointer to the selected metric implementation.
+ */
+inline static simsimd_metric_punned_t simsimd_metric_punned( //
+    simsimd_metric_kind_t kind,                              //
+    simsimd_datatype_t datatype,                             //
+    simsimd_capability_t allowed) {
+
+    simsimd_metric_punned_t result = 0;
+    simsimd_capability_t c = simsimd_cap_serial_k;
+    simsimd_capability_t supported = simsimd_capabilities();
+    simsimd_find_metric_punned(kind, datatype, supported, allowed, &result, &c);
+    return result;
 }
 
-#undef popcount32
-#undef popcount64
-
 #ifdef __cplusplus
 }
-#endif
+#endif