usearch 2.21.2 → 2.21.4

package/simsimd/include/simsimd/simsimd.h

@@ -26,17 +26,19 @@
  *
  *  Intel Palm Cove was an irrelevant intermediate release extending Skylake with IFMA and VBMI.
  *  Intel Willow Cove was an irrelevant intermediate release extending Sunny Cove with VP2INTERSECT,
- *  that aren't supported by any other CPU built to date... and those are only available in Tiger Lake laptops.
+ *  which are not supported by other CPUs to date and are only available in Tiger Lake laptops.
  *  Intel Cooper Lake was the only intermediary platform, that supported BF16, but not FP16.
  *  It's mostly used in 4-socket and 8-socket high-memory configurations.
  *
- *  In practical terms, it makes sense to differentiate only 3 AVX512 generations:
+ *  For us, it makes sense to differentiate only these AVX512 generations:
  *  1. Intel Skylake (pre 2019): supports single-precision dot-products.
  *  2. Intel Ice Lake (2019-2021): advanced integer algorithms.
  *  3. AMD Genoa (2023+): brain-floating point support.
  *  4. Intel Sapphire Rapids (2023+): advanced mixed-precision float processing.
  *  5. AMD Turin (2024+): advanced sparse algorithms.
  *
+ *  Beyond those, we support AVX2 for old Haswell generation CPUs, and AVX2+VNNI for modern Sierra generation.
+ *
  *  To list all available macros for x86, take a recent compiler, like GCC 12 and run:
  *       gcc-12 -march=sapphirerapids -dM -E - < /dev/null | egrep "SSE|AVX" | sort
  *  On Arm machines you may want to check for other flags:
@@ -80,7 +82,7 @@
  *    The N2 core is very similar to V2 and is used by Microsoft @b Cobalt.
  *    https://developer.arm.com/Processors/Neoverse%20N2
  *
- *  On Consumer side, Apple is the biggest player with mobile @b A chips and desktop @b M chips.
+ *  On the consumer side, Apple is the biggest player with mobile @b A chips and desktop @b M chips.
  *  The M1 implements Armv8.5-A, both M2 and M3 implement Armv8.6-A, and M4 is expected to have Armv9.1-A.
  */
 
@@ -89,7 +91,7 @@
 
 #define SIMSIMD_VERSION_MAJOR 6
 #define SIMSIMD_VERSION_MINOR 5
-#define SIMSIMD_VERSION_PATCH 1
+#define SIMSIMD_VERSION_PATCH 5
 
 /**
  *  @brief  Removes compile-time dispatching, and replaces it with runtime dispatching.
@@ -116,6 +118,22 @@
 #include <sys/sysctl.h> // `sysctlbyname`
 #endif
 
+// Detect POSIX extensions availability for signal handling.
+// POSIX extensions provide `sigaction`, `sigjmp_buf`, and `sigsetjmp` for safe signal handling.
+// These are needed on Linux ARM for safely testing `mrs` instruction availability.
+#if defined(_SIMSIMD_DEFINED_LINUX) && defined(_POSIX_VERSION)
+#include <setjmp.h> // `sigjmp_buf`, `sigsetjmp`, `siglongjmp`
+#include <signal.h> // `sigaction`, `SIGILL`
+#define _SIMSIMD_HAS_POSIX_EXTENSIONS 1
+#else
+#define _SIMSIMD_HAS_POSIX_EXTENSIONS 0
+#endif
+
+// On Windows ARM, we use IsProcessorFeaturePresent API for capability detection
+#if defined(_SIMSIMD_DEFINED_WINDOWS) && _SIMSIMD_TARGET_ARM
+#include <processthreadsapi.h> // `IsProcessorFeaturePresent`
+#endif
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -454,6 +472,15 @@ SIMSIMD_PUBLIC simsimd_capability_t _simsimd_capabilities_x86(void) {
 #pragma GCC target("arch=armv8.5-a+sve")
 #pragma clang attribute push(__attribute__((target("arch=armv8.5-a+sve"))), apply_to = function)
 
+#if _SIMSIMD_HAS_POSIX_EXTENSIONS
+/** @brief SIGILL handler for `mrs` instruction testing on Linux ARM */
+static sigjmp_buf _simsimd_mrs_test_jump_buffer;
+static void _simsimd_mrs_test_sigill_handler(int sig) {
+    (void)sig; // Unused parameter
+    siglongjmp(_simsimd_mrs_test_jump_buffer, 1);
+}
+#endif
+
 /**
  *  @brief  Function to flush denormalized numbers to zero on Arm CPUs.
  *  @note   This should be called on each thread before any SIMD operations to avoid performance penalties.
@@ -504,6 +531,36 @@ SIMSIMD_PUBLIC simsimd_capability_t _simsimd_capabilities_arm(void) {
 
 #elif defined(_SIMSIMD_DEFINED_LINUX)
 
+    // Depending on the environment, reading system registers may cause SIGILL.
+    // One option to avoid the crash is to use `getauxval(AT_HWCAP)` and `getauxval(AT_HWCAP2)`,
+    // Linux APIs, but those aren't as informative as reading the registers directly.
+    // So before reading the ID registers, we set up a signal handler to catch SIGILL
+    // and probe one of the registers, reverting back to the old signal handler afterwards.
+    //
+    // This issue was originally observed in: https://github.com/ashvardanian/SimSIMD/issues/279
+#if _SIMSIMD_HAS_POSIX_EXTENSIONS
+    struct sigaction action_new, action_old;
+    action_new.sa_handler = _simsimd_mrs_test_sigill_handler;
+    sigemptyset(&action_new.sa_mask);
+    action_new.sa_flags = 0;
+
+    int mrs_works = 0;
+    if (sigaction(SIGILL, &action_new, &action_old) == 0) {
+        if (sigsetjmp(_simsimd_mrs_test_jump_buffer, 1) == 0) {
+            unsigned long midr_value;
+            __asm__ __volatile__("mrs %0, MIDR_EL1" : "=r"(midr_value));
+            mrs_works = 1;
+        }
+        sigaction(SIGILL, &action_old, NULL);
+    }
+
+    // Early exit if `mrs` doesn't work - return conservative NEON-only capabilities
+    if (!mrs_works) return (simsimd_capability_t)(simsimd_cap_neon_k | simsimd_cap_serial_k);
+#else  // _SIMSIMD_HAS_POSIX_EXTENSIONS
+    // Without POSIX signal handlers, fall back to conservative NEON capabilities.
+    return (simsimd_capability_t)(simsimd_cap_neon_k | simsimd_cap_serial_k);
+#endif // _SIMSIMD_HAS_POSIX_EXTENSIONS
+
     // Read CPUID registers directly
     unsigned long id_aa64isar0_el1 = 0, id_aa64isar1_el1 = 0, id_aa64pfr0_el1 = 0, id_aa64zfr0_el1 = 0;
 
@@ -561,8 +618,31 @@ SIMSIMD_PUBLIC simsimd_capability_t _simsimd_capabilities_arm(void) {
         (simsimd_cap_sve2_k * (supports_sve2)) |                                                      //
         (simsimd_cap_sve2p1_k * (supports_sve2p1)) |                                                  //
         (simsimd_cap_serial_k));
-#else // if !_SIMSIMD_DEFINED_LINUX
-    return simsimd_cap_serial_k;
+
+#elif defined(_SIMSIMD_DEFINED_WINDOWS)
+
+    unsigned supports_neon = 0, supports_dp = 0;
+
+    // On Windows ARM, use the `IsProcessorFeaturePresent` API for capability detection.
+    // https://learn.microsoft.com/en-us/windows/win32/api/processthreadsapi/nf-processthreadsapi-isprocessorfeaturepresent
+#if defined(PF_ARM_V8_INSTRUCTIONS_AVAILABLE)
+    supports_neon = IsProcessorFeaturePresent(PF_ARM_V8_INSTRUCTIONS_AVAILABLE);
+#endif
+#if defined(PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE)
+    supports_dp = IsProcessorFeaturePresent(PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE);
+#endif
+
+    // Windows API doesn't provide reliable detection for FP16, BF16.
+    return (simsimd_capability_t)(                                 //
+        (simsimd_cap_neon_k * (supports_neon)) |                   //
+        (simsimd_cap_neon_i8_k * (supports_neon && supports_dp)) | //
+        (simsimd_cap_serial_k));
+
+#else // Unknown platform
+
+    // Conservative fallback for unknown platforms: NEON is mandatory in ARMv8-A (ARM64)
+    return (simsimd_capability_t)(simsimd_cap_neon_k | simsimd_cap_serial_k);
+
 #endif
 }
 

package/simsimd/include/simsimd/sparse.h

@@ -410,7 +410,7 @@ SIMSIMD_PUBLIC void simsimd_intersect_u16_ice(        //
         simsimd_u8_t u8[64];
     } a_vec, b_vec;
 
-    while (a + 32 < a_end && b + 32 < b_end) {
+    while (a + 32 <= a_end && b + 32 <= b_end) {
         a_vec.zmm = _mm512_loadu_si512((__m512i const *)a);
         b_vec.zmm = _mm512_loadu_si512((__m512i const *)b);
 
@@ -422,13 +422,13 @@ SIMSIMD_PUBLIC void simsimd_intersect_u16_ice(        //
         simsimd_u16_t b_max = b_vec.u16[31];
 
         // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && a + 64 < a_end) {
+        while (a_max < b_min && a + 64 <= a_end) {
             a += 32;
             a_vec.zmm = _mm512_loadu_si512((__m512i const *)a);
             a_max = a_vec.u16[31];
         }
         a_min = a_vec.u16[0];
-        while (b_max < a_min && b + 64 < b_end) {
+        while (b_max < a_min && b + 64 <= b_end) {
             b += 32;
             b_vec.zmm = _mm512_loadu_si512((__m512i const *)b);
             b_max = b_vec.u16[31];
@@ -475,7 +475,7 @@ SIMSIMD_PUBLIC void simsimd_intersect_u32_ice(        //
         simsimd_u8_t u8[64];
     } a_vec, b_vec;
 
-    while (a + 16 < a_end && b + 16 < b_end) {
+    while (a + 16 <= a_end && b + 16 <= b_end) {
         a_vec.zmm = _mm512_loadu_si512((__m512i const *)a);
         b_vec.zmm = _mm512_loadu_si512((__m512i const *)b);
 
@@ -487,13 +487,13 @@ SIMSIMD_PUBLIC void simsimd_intersect_u32_ice(        //
         simsimd_u32_t b_max = b_vec.u32[15];
 
         // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && a + 32 < a_end) {
+        while (a_max < b_min && a + 32 <= a_end) {
             a += 16;
             a_vec.zmm = _mm512_loadu_si512((__m512i const *)a);
             a_max = a_vec.u32[15];
         }
         a_min = a_vec.u32[0];
-        while (b_max < a_min && b + 32 < b_end) {
+        while (b_max < a_min && b + 32 <= b_end) {
             b += 16;
             b_vec.zmm = _mm512_loadu_si512((__m512i const *)b);
             b_max = b_vec.u32[15];
@@ -526,11 +526,11 @@ SIMSIMD_PUBLIC void simsimd_intersect_u32_ice(        //
 
 #if SIMSIMD_TARGET_TURIN
 #pragma GCC push_options
-#pragma GCC target("avx2", "avx512f", "avx512vl", "bmi2", "lzcnt", "popcnt", "avx512bw", "avx512vbmi2", "avx512bf16", \
-                   "avx512vnni", "avx512vp2intersect", "avx512dq")
-#pragma clang attribute push(                                                                                                \
-    __attribute__((target(                                                                                                   \
-        "avx2,avx512f,avx512vl,bmi2,lzcnt,popcnt,avx512bw,avx512vbmi2,avx512bf16,avx512vnni,avx512vp2intersect,avx512dq"))), \
+#pragma GCC target("avx2", "avx512f", "avx512vl", "bmi", "bmi2", "lzcnt", "popcnt", "avx512bw", "avx512vbmi2", \
+                   "avx512bf16", "avx512vnni", "avx512vp2intersect", "avx512dq")
+#pragma clang attribute push(                                                                                                    \
+    __attribute__((target(                                                                                                       \
+        "avx2,avx512f,avx512vl,bmi,bmi2,lzcnt,popcnt,avx512bw,avx512vbmi2,avx512bf16,avx512vnni,avx512vp2intersect,avx512dq"))), \
     apply_to = function)
 
 SIMSIMD_PUBLIC void simsimd_intersect_u16_turin(      //
@@ -538,12 +538,6 @@ SIMSIMD_PUBLIC void simsimd_intersect_u16_turin(      //
     simsimd_size_t a_length, simsimd_size_t b_length, //
     simsimd_distance_t *results) {
 
-    // The baseline implementation for very small arrays (2 registers or less) can be quite simple:
-    if (a_length < 64 && b_length < 64) {
-        simsimd_intersect_u16_serial(a, b, a_length, b_length, results);
-        return;
-    }
-
     //! There is no such thing as `_mm512_2intersect_epi16`, only the 32-bit variant!
     //! So instead of jumping through 32 entries at a time, like on Ice Lake, we will
     //! step through 16 entries at a time.
@@ -556,32 +550,13 @@ SIMSIMD_PUBLIC void simsimd_intersect_u16_turin(      //
         simsimd_u8_t u8[32];
     } a_vec, b_vec;
 
-    while (a + 16 < a_end && b + 16 < b_end) {
+    // Broadcast index for last element (hoisted outside loop)
+    __m256i const last_idx = _mm256_set1_epi16(15);
+    while (a + 16 <= a_end && b + 16 <= b_end) {
         a_vec.ymm = _mm256_lddqu_si256((__m256i const *)a);
         b_vec.ymm = _mm256_lddqu_si256((__m256i const *)b);
 
-        // Intersecting registers with `_mm512_2intersect_epi16_mask` involves a lot of shuffling
-        // and comparisons, so we want to avoid it if the slices don't overlap at all..
-        simsimd_u16_t a_min;
-        simsimd_u16_t a_max = a_vec.u16[15];
-        simsimd_u16_t b_min = b_vec.u16[0];
-        simsimd_u16_t b_max = b_vec.u16[15];
-
-        // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && a + 32 < a_end) {
-            a += 16;
-            a_vec.ymm = _mm256_lddqu_si256((__m256i const *)a);
-            a_max = a_vec.u16[15];
-        }
-        a_min = a_vec.u16[0];
-        while (b_max < a_min && b + 32 < b_end) {
-            b += 16;
-            b_vec.ymm = _mm256_lddqu_si256((__m256i const *)b);
-            b_max = b_vec.u16[15];
-        }
-        b_min = b_vec.u16[0];
-
-        // Now we are likely to have some overlap, so we can intersect the registers
+        // Intersect the registers
         __m512i a_i32_vec = _mm512_cvtepu16_epi32(a_vec.ymm);
         __m512i b_i32_vec = _mm512_cvtepu16_epi32(b_vec.ymm);
         __mmask16 a_matches_any_in_b, b_matches_any_in_a;
@@ -592,12 +567,12 @@ SIMSIMD_PUBLIC void simsimd_intersect_u16_turin(      //
         //      _mm512_mask_compressstoreu_epi16(c, a_matches_any_in_b, a_vec);
         c += _mm_popcnt_u32(a_matches_any_in_b); // MSVC has no `_popcnt32`
 
-        __m256i a_last_broadcasted = _mm256_set1_epi16(*(short const *)&a_max);
-        __m256i b_last_broadcasted = _mm256_set1_epi16(*(short const *)&b_max);
+        __m256i a_last_broadcasted = _mm256_permutexvar_epi16(last_idx, a_vec.ymm);
+        __m256i b_last_broadcasted = _mm256_permutexvar_epi16(last_idx, b_vec.ymm);
         __mmask16 a_step_mask = _mm256_cmple_epu16_mask(a_vec.ymm, b_last_broadcasted);
         __mmask16 b_step_mask = _mm256_cmple_epu16_mask(b_vec.ymm, a_last_broadcasted);
-        a += 32 - _lzcnt_u32((simsimd_u32_t)a_step_mask); //? Is this correct? Needs testing!
-        b += 32 - _lzcnt_u32((simsimd_u32_t)b_step_mask);
+        a += _tzcnt_u32(~(simsimd_u32_t)a_step_mask | 0x10000);
+        b += _tzcnt_u32(~(simsimd_u32_t)b_step_mask | 0x10000);
     }
 
     simsimd_intersect_u16_serial(a, b, a_end - a, b_end - b, results);
@@ -609,12 +584,6 @@ SIMSIMD_PUBLIC void simsimd_intersect_u32_turin(      //
     simsimd_size_t a_length, simsimd_size_t b_length, //
     simsimd_distance_t *results) {
 
-    // The baseline implementation for very small arrays (2 registers or less) can be quite simple:
-    if (a_length < 32 && b_length < 32) {
-        simsimd_intersect_u32_serial(a, b, a_length, b_length, results);
-        return;
-    }
-
     simsimd_u32_t const *const a_end = a + a_length;
     simsimd_u32_t const *const b_end = b + b_length;
     simsimd_size_t c = 0;
@@ -624,32 +593,13 @@ SIMSIMD_PUBLIC void simsimd_intersect_u32_turin(      //
         simsimd_u8_t u8[64];
     } a_vec, b_vec;
 
-    while (a + 16 < a_end && b + 16 < b_end) {
+    // Broadcast index for last element (hoisted outside loop)
+    __m512i const last_idx = _mm512_set1_epi32(15);
+    while (a + 16 <= a_end && b + 16 <= b_end) {
         a_vec.zmm = _mm512_loadu_si512((__m512i const *)a);
         b_vec.zmm = _mm512_loadu_si512((__m512i const *)b);
 
-        // Intersecting registers with `_mm512_2intersect_epi32` involves a lot of shuffling
-        // and comparisons, so we want to avoid it if the slices don't overlap at all..
-        simsimd_u32_t a_min;
-        simsimd_u32_t a_max = a_vec.u32[15];
-        simsimd_u32_t b_min = b_vec.u32[0];
-        simsimd_u32_t b_max = b_vec.u32[15];
-
-        // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && a + 32 < a_end) {
-            a += 16;
-            a_vec.zmm = _mm512_loadu_si512((__m512i const *)a);
-            a_max = a_vec.u32[15];
-        }
-        a_min = a_vec.u32[0];
-        while (b_max < a_min && b + 32 < b_end) {
-            b += 16;
-            b_vec.zmm = _mm512_loadu_si512((__m512i const *)b);
-            b_max = b_vec.u32[15];
-        }
-        b_min = b_vec.u32[0];
-
-        // Now we are likely to have some overlap, so we can intersect the registers
+        // Intersect the registers
         __mmask16 a_matches_any_in_b, b_matches_any_in_a;
         _mm512_2intersect_epi32(a_vec.zmm, b_vec.zmm, &a_matches_any_in_b, &b_matches_any_in_a);
 
@@ -658,12 +608,13 @@ SIMSIMD_PUBLIC void simsimd_intersect_u32_turin(      //
         //      _mm512_mask_compressstoreu_epi32(c, a_matches_any_in_b, a_vec);
         c += _mm_popcnt_u32(a_matches_any_in_b); // MSVC has no `_popcnt32`
 
-        __m512i a_last_broadcasted = _mm512_set1_epi32(*(int const *)&a_max);
-        __m512i b_last_broadcasted = _mm512_set1_epi32(*(int const *)&b_max);
+        // Pure SIMD broadcasts - no scalar extraction needed
+        __m512i a_last_broadcasted = _mm512_permutexvar_epi32(last_idx, a_vec.zmm);
+        __m512i b_last_broadcasted = _mm512_permutexvar_epi32(last_idx, b_vec.zmm);
         __mmask16 a_step_mask = _mm512_cmple_epu32_mask(a_vec.zmm, b_last_broadcasted);
         __mmask16 b_step_mask = _mm512_cmple_epu32_mask(b_vec.zmm, a_last_broadcasted);
-        a += 32 - _lzcnt_u32((simsimd_u32_t)a_step_mask);
-        b += 32 - _lzcnt_u32((simsimd_u32_t)b_step_mask);
+        a += _tzcnt_u32(~(simsimd_u32_t)a_step_mask | 0x10000);
+        b += _tzcnt_u32(~(simsimd_u32_t)b_step_mask | 0x10000);
     }
 
     simsimd_intersect_u32_serial(a, b, a_end - a, b_end - b, results);
@@ -696,7 +647,9 @@ SIMSIMD_PUBLIC void simsimd_spdot_weights_u16_turin(                  //
     } a_vec, b_vec, product_vec;
     product_vec.ymmps = _mm256_setzero_ps();
 
-    while (a + 16 < a_end && b + 16 < b_end) {
+    // Broadcast index for last element (hoisted outside loop)
+    __m256i const last_idx = _mm256_set1_epi16(15);
+    while (a + 16 <= a_end && b + 16 <= b_end) {
         a_vec.ymm = _mm256_lddqu_si256((__m256i const *)a);
         b_vec.ymm = _mm256_lddqu_si256((__m256i const *)b);
 
@@ -708,13 +661,13 @@ SIMSIMD_PUBLIC void simsimd_spdot_weights_u16_turin(                  //
         simsimd_u16_t b_max = b_vec.u16[15];
 
         // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && a + 32 < a_end) {
+        while (a_max < b_min && a + 32 <= a_end) {
             a += 16, a_weights += 16;
             a_vec.ymm = _mm256_lddqu_si256((__m256i const *)a);
             a_max = a_vec.u16[15];
         }
         a_min = a_vec.u16[0];
-        while (b_max < a_min && b + 32 < b_end) {
+        while (b_max < a_min && b + 32 <= b_end) {
             b += 16, b_weights += 16;
             b_vec.ymm = _mm256_lddqu_si256((__m256i const *)b);
             b_max = b_vec.u16[15];
@@ -742,12 +695,12 @@ SIMSIMD_PUBLIC void simsimd_spdot_weights_u16_turin(                  //
             product_vec.ymmps = _mm256_dpbf16_ps(product_vec.ymmps, (__m256bh)a_weights_vec, (__m256bh)b_weights_vec);
         }
 
-        __m256i a_last_broadcasted = _mm256_set1_epi16(*(short const *)&a_max);
-        __m256i b_last_broadcasted = _mm256_set1_epi16(*(short const *)&b_max);
+        __m256i a_last_broadcasted = _mm256_permutexvar_epi16(last_idx, a_vec.ymm);
+        __m256i b_last_broadcasted = _mm256_permutexvar_epi16(last_idx, b_vec.ymm);
         __mmask16 a_step_mask = _mm256_cmple_epu16_mask(a_vec.ymm, b_last_broadcasted);
         __mmask16 b_step_mask = _mm256_cmple_epu16_mask(b_vec.ymm, a_last_broadcasted);
-        int a_step = 32 - _lzcnt_u32((simsimd_u32_t)a_step_mask); //? Is this correct? Needs testing!
-        int b_step = 32 - _lzcnt_u32((simsimd_u32_t)b_step_mask);
+        simsimd_size_t a_step = _tzcnt_u32(~(simsimd_u32_t)a_step_mask | 0x10000);
+        simsimd_size_t b_step = _tzcnt_u32(~(simsimd_u32_t)b_step_mask | 0x10000);
         a += a_step, a_weights += a_step;
         b += b_step, b_weights += b_step;
     }
@@ -781,7 +734,9 @@ SIMSIMD_PUBLIC void simsimd_spdot_counts_u16_turin(                 //
     } a_vec, b_vec, product_vec;
     product_vec.ymm = _mm256_setzero_si256();
 
-    while (a + 16 < a_end && b + 16 < b_end) {
+    // Broadcast index for last element (hoisted outside loop)
+    __m256i const last_idx = _mm256_set1_epi16(15);
+    while (a + 16 <= a_end && b + 16 <= b_end) {
         a_vec.ymm = _mm256_lddqu_si256((__m256i const *)a);
         b_vec.ymm = _mm256_lddqu_si256((__m256i const *)b);
 
@@ -793,13 +748,13 @@ SIMSIMD_PUBLIC void simsimd_spdot_counts_u16_turin(                 //
         simsimd_u16_t b_max = b_vec.u16[15];
 
         // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && a + 32 < a_end) {
+        while (a_max < b_min && a + 32 <= a_end) {
             a += 16, a_weights += 16;
             a_vec.ymm = _mm256_lddqu_si256((__m256i const *)a);
             a_max = a_vec.u16[15];
         }
         a_min = a_vec.u16[0];
-        while (b_max < a_min && b + 32 < b_end) {
+        while (b_max < a_min && b + 32 <= b_end) {
             b += 16, b_weights += 16;
             b_vec.ymm = _mm256_lddqu_si256((__m256i const *)b);
             b_max = b_vec.u16[15];
@@ -827,12 +782,12 @@ SIMSIMD_PUBLIC void simsimd_spdot_counts_u16_turin(                 //
             product_vec.ymm = _mm256_dpwssds_epi32(product_vec.ymm, a_weights_vec, b_weights_vec);
         }
 
-        __m256i a_last_broadcasted = _mm256_set1_epi16(*(short const *)&a_max);
-        __m256i b_last_broadcasted = _mm256_set1_epi16(*(short const *)&b_max);
+        __m256i a_last_broadcasted = _mm256_permutexvar_epi16(last_idx, a_vec.ymm);
+        __m256i b_last_broadcasted = _mm256_permutexvar_epi16(last_idx, b_vec.ymm);
         __mmask16 a_step_mask = _mm256_cmple_epu16_mask(a_vec.ymm, b_last_broadcasted);
         __mmask16 b_step_mask = _mm256_cmple_epu16_mask(b_vec.ymm, a_last_broadcasted);
-        int a_step = 32 - _lzcnt_u32((simsimd_u32_t)a_step_mask); //? Is this correct? Needs testing!
-        int b_step = 32 - _lzcnt_u32((simsimd_u32_t)b_step_mask);
+        simsimd_size_t a_step = _tzcnt_u32(~(simsimd_u32_t)a_step_mask | 0x10000);
+        simsimd_size_t b_step = _tzcnt_u32(~(simsimd_u32_t)b_step_mask | 0x10000);
         a += a_step, a_weights += a_step;
         b += b_step, b_weights += b_step;
     }
@@ -925,7 +880,7 @@ SIMSIMD_PUBLIC void simsimd_intersect_u16_neon(       //
     } a_vec, b_vec, c_counts_vec;
     c_counts_vec.u16x8 = vdupq_n_u16(0);
 
-    while (a + 8 < a_end && b + 8 < b_end) {
+    while (a + 8 <= a_end && b + 8 <= b_end) {
         a_vec.u16x8 = vld1q_u16(a);
         b_vec.u16x8 = vld1q_u16(b);
 
@@ -937,13 +892,13 @@ SIMSIMD_PUBLIC void simsimd_intersect_u16_neon(       //
         simsimd_u16_t b_max = b_vec.u16[7];
 
         // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && a + 16 < a_end) {
+        while (a_max < b_min && a + 16 <= a_end) {
             a += 8;
             a_vec.u16x8 = vld1q_u16(a);
             a_max = a_vec.u16[7];
         }
         a_min = a_vec.u16[0];
-        while (b_max < a_min && b + 16 < b_end) {
+        while (b_max < a_min && b + 16 <= b_end) {
             b += 8;
             b_vec.u16x8 = vld1q_u16(b);
             b_max = b_vec.u16[7];
@@ -1008,7 +963,7 @@ SIMSIMD_PUBLIC void simsimd_intersect_u32_neon(       //
     } a_vec, b_vec, c_counts_vec;
     c_counts_vec.u32x4 = vdupq_n_u32(0);
 
-    while (a + 4 < a_end && b + 4 < b_end) {
+    while (a + 4 <= a_end && b + 4 <= b_end) {
         a_vec.u32x4 = vld1q_u32(a);
         b_vec.u32x4 = vld1q_u32(b);
 
@@ -1020,13 +975,13 @@ SIMSIMD_PUBLIC void simsimd_intersect_u32_neon(       //
         simsimd_u32_t b_max = b_vec.u32[3];
 
         // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && a + 8 < a_end) {
+        while (a_max < b_min && a + 8 <= a_end) {
             a += 4;
             a_vec.u32x4 = vld1q_u32(a);
             a_max = a_vec.u32[3];
         }
         a_min = a_vec.u32[0];
-        while (b_max < a_min && b + 8 < b_end) {
+        while (b_max < a_min && b + 8 <= b_end) {
             b += 4;
             b_vec.u32x4 = vld1q_u32(b);
             b_max = b_vec.u32[3];
@@ -1118,14 +1073,14 @@ SIMSIMD_PUBLIC void simsimd_intersect_u16_sve2(     //
         simsimd_u16_t b_max = svlastb(b_progress, b_vec);
 
         // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && (a_idx + register_size) < a_length) {
+        while (a_max < b_min && (a_idx + register_size) <= a_length) {
             a_idx += register_size;
             a_progress = svwhilelt_b16_u64(a_idx, a_length);
             a_vec = svld1_u16(a_progress, a + a_idx);
             a_max = svlastb(a_progress, a_vec);
         }
         a_min = svlasta(svpfalse_b(), a_vec);
-        while (b_max < a_min && (b_idx + register_size) < b_length) {
+        while (b_max < a_min && (b_idx + register_size) <= b_length) {
             b_idx += register_size;
             b_progress = svwhilelt_b16_u64(b_idx, b_length);
             b_vec = svld1_u16(b_progress, b + b_idx);
@@ -1185,14 +1140,14 @@ SIMSIMD_PUBLIC void simsimd_intersect_u32_sve2(simsimd_u32_t const *a, simsimd_u
         simsimd_u32_t b_max = svlastb(b_progress, b_vec);
 
         // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && (a_idx + register_size) < a_length) {
+        while (a_max < b_min && (a_idx + register_size) <= a_length) {
             a_idx += register_size;
             a_progress = svwhilelt_b32_u64(a_idx, a_length);
             a_vec = svld1_u32(a_progress, a + a_idx);
             a_max = svlastb(a_progress, a_vec);
         }
         a_min = svlasta(svpfalse_b(), a_vec);
-        while (b_max < a_min && (b_idx + register_size) < b_length) {
+        while (b_max < a_min && (b_idx + register_size) <= b_length) {
             b_idx += register_size;
             b_progress = svwhilelt_b32_u64(b_idx, b_length);
             b_vec = svld1_u32(b_progress, b + b_idx);
@@ -1284,14 +1239,14 @@ SIMSIMD_PUBLIC void simsimd_spdot_counts_u16_sve2(                  //
         simsimd_u16_t b_max = svlastb(b_progress, b_vec);
 
         // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && (a_idx + register_size) < a_length) {
+        while (a_max < b_min && (a_idx + register_size) <= a_length) {
             a_idx += register_size;
             a_progress = svwhilelt_b16_u64(a_idx, a_length);
             a_vec = svld1_u16(a_progress, a + a_idx);
             a_max = svlastb(a_progress, a_vec);
         }
         a_min = svlasta(svpfalse_b(), a_vec);
-        while (b_max < a_min && (b_idx + register_size) < b_length) {
+        while (b_max < a_min && (b_idx + register_size) <= b_length) {
             b_idx += register_size;
             b_progress = svwhilelt_b16_u64(b_idx, b_length);
             b_vec = svld1_u16(b_progress, b + b_idx);
@@ -1367,14 +1322,14 @@ SIMSIMD_PUBLIC void simsimd_spdot_weights_u16_sve2(                   //
         simsimd_u16_t b_max = svlastb(b_progress, b_vec);
 
         // If the slices don't overlap, advance the appropriate pointer
-        while (a_max < b_min && (a_idx + register_size) < a_length) {
+        while (a_max < b_min && (a_idx + register_size) <= a_length) {
             a_idx += register_size;
             a_progress = svwhilelt_b16_u64(a_idx, a_length);
             a_vec = svld1_u16(a_progress, a + a_idx);
             a_max = svlastb(a_progress, a_vec);
         }
         a_min = svlasta(svpfalse_b(), a_vec);
-        while (b_max < a_min && (b_idx + register_size) < b_length) {
+        while (b_max < a_min && (b_idx + register_size) <= b_length) {
             b_idx += register_size;
             b_progress = svwhilelt_b16_u64(b_idx, b_length);
             b_vec = svld1_u16(b_progress, b + b_idx);

package/simsimd/include/simsimd/types.h

@@ -12,7 +12,7 @@
 #ifndef SIMSIMD_TYPES_H
 #define SIMSIMD_TYPES_H
 
-// Inferring target OS: Windows, MacOS, or Linux
+// Inferring target OS: Windows, macOS, or Linux
 #if defined(WIN32) || defined(_WIN32) || defined(__WIN32__) || defined(__NT__)
 #define _SIMSIMD_DEFINED_WINDOWS 1
 #elif defined(__APPLE__) && defined(__MACH__)
@@ -28,7 +28,7 @@
 // - `SIMSIMD_DYNAMIC` is used for functions that are part of the public API, but are dispatched at runtime.
 //
 // On GCC we mark the functions as `nonnull` informing that none of the arguments can be `NULL`.
-// Marking with `pure` and `const` isn't possible as outputing to a pointer is a "side effect".
+// Marking with `pure` and `const` isn't possible as outputting to a pointer is a "side effect".
 #if defined(_WIN32) || defined(__CYGWIN__)
 #define SIMSIMD_DYNAMIC __declspec(dllexport)
 #define SIMSIMD_PUBLIC inline static
@@ -259,6 +259,7 @@
 #define SIMSIMD_LOG(x) (log(x))
 #endif
 
+// Copy 16 bits (2 bytes) from source to destination
 #if defined(__GNUC__) || defined(__clang__)
 #define SIMSIMD_COPY16(destination_ptr, source_ptr) __builtin_memcpy((destination_ptr), (source_ptr), 2)
 #else
@@ -395,7 +396,7 @@ typedef unsigned short simsimd_bf16_t;
 
 /*
  *  Let's make sure the sizes of the types are as expected.
- *  In C the `_Static_assert` is only available with C 11 and later.
+ *  In C the `_Static_assert` is only available with C11 and later.
  */
 #define SIMSIMD_STATIC_ASSERT(cond, msg) typedef char static_assertion_##msg[(cond) ? 1 : -1]
 SIMSIMD_STATIC_ASSERT(sizeof(simsimd_b8_t) == 1, simsimd_b8_t_must_be_1_byte);

package/simsimd/javascript/fallback.ts

@@ -1,8 +1,8 @@
 /**
- * @brief Computes the inner distance of two vectors (same as dot product).
+ * @brief Computes the inner product of two vectors (dot product).
  * @param {Float64Array|Float32Array} a - The first vector.
  * @param {Float64Array|Float32Array} b - The second vector.
- * @returns {number} The inner distance of vectors a and b.
+ * @returns {number} The inner product of vectors a and b.
  */
 export function inner(a: Float64Array | Float32Array, b: Float64Array | Float32Array): number {
   if (a.length !== b.length) {
@@ -17,10 +17,10 @@ export function inner(a: Float64Array | Float32Array, b: Float64Array | Float32A
 }
 
 /**
- * @brief Computes the inner distance of two vectors (same as inner product).
+ * @brief Computes the dot product of two vectors (same as inner product).
  * @param {Float64Array|Float32Array} a - The first vector.
  * @param {Float64Array|Float32Array} b - The second vector.
- * @returns {number} The inner distance of vectors a and b.
+ * @returns {number} The dot product of vectors a and b.
  */
 export function dot(a: Float64Array | Float32Array, b: Float64Array | Float32Array): number {
   return inner(a, b);
@@ -51,7 +51,7 @@ export function sqeuclidean(
  * @brief Computes the L2 Euclidean distance between two vectors.
  * @param {Float64Array|Float32Array|Int8Array | Uint8Array} a - The first vector.
  * @param {Float64Array|Float32Array|Int8Array | Uint8Array} b - The second vector.
- * @returns {number} The L2 euclidean distance between vectors a and b.
+ * @returns {number} The L2 Euclidean distance between vectors a and b.
  */
 export function euclidean(
   a: Float64Array | Float32Array | Int8Array | Uint8Array,
@@ -96,12 +96,8 @@ export function cosine(
   magnitudeA = Math.sqrt(magnitudeA);
   magnitudeB = Math.sqrt(magnitudeB);
 
-  if (magnitudeA === 0 || magnitudeB === 0) {
-    console.warn(
-      "Warning: One of the magnitudes is zero. Cosine similarity is undefined."
-    );
-    return 0;
-  }
+  if (magnitudeA === 0 && magnitudeB === 0) return 0; // distance when both zero
+  if (magnitudeA === 0 || magnitudeB === 0) return 1; // distance when one is zero
 
   return 1 - dotProduct / (magnitudeA * magnitudeB);
 }
@@ -133,10 +129,10 @@ export const hamming = (a: Uint8Array, b: Uint8Array): number => {
 };
 
 /**
- * @brief Computes the bitwise Jaccard similarity coefficient between two vectors.
+ * @brief Computes the bitwise Jaccard distance between two vectors.
  * @param {Uint8Array} a - The first vector.
  * @param {Uint8Array} b - The second vector.
- * @returns {number} The Jaccard similarity coefficient between vectors a and b.
+ * @returns {number} The Jaccard distance between vectors a and b.
  */
 export const jaccard = (a: Uint8Array, b: Uint8Array): number => {
   if (a.length !== b.length) {
@@ -174,7 +170,7 @@ export const jaccard = (a: Uint8Array, b: Uint8Array): number => {
  * @brief Computes the Kullback-Leibler divergence between two probability distributions.
  * @param {Float64Array|Float32Array} a - The first vector.
  * @param {Float64Array|Float32Array} b - The second vector.
- * @returns {number} The Jaccard similarity coefficient between vectors a and b.
+ * @returns {number} The Kullback-Leibler divergence between vectors a and b.
  */
 export const kullbackleibler = (a: Float64Array | Float32Array, b: Float64Array | Float32Array): number => {
   if (a.length !== b.length) {