usearch 2.10.3 → 2.10.5

package/fp16/cmake/DownloadPSimd.cmake

@@ -0,0 +1,15 @@
+CMAKE_MINIMUM_REQUIRED(VERSION 2.8.12 FATAL_ERROR)
+
+PROJECT(psimd-download NONE)
+
+INCLUDE(ExternalProject)
+ExternalProject_Add(psimd
+	GIT_REPOSITORY https://github.com/Maratyszcza/psimd.git
+	GIT_TAG master
+	SOURCE_DIR "${CMAKE_BINARY_DIR}/psimd-source"
+	BINARY_DIR "${CMAKE_BINARY_DIR}/psimd"
+	CONFIGURE_COMMAND ""
+	BUILD_COMMAND ""
+	INSTALL_COMMAND ""
+	TEST_COMMAND ""
+)

package/fp16/configure.py

@@ -0,0 +1,65 @@
+#!/usr/bin/env python
+
+
+import confu
+parser = confu.standard_parser("FP16 configuration script")
+parser.add_argument("--compare", dest="compare", action="store_true",
+    help="Enable performance comparison with other half-precision implementations")
+
+def main(args):
+    options = parser.parse_args(args)
+    build = confu.Build.from_options(options)
+
+    build.export_cpath("include", ["fp16.h"])
+
+    with build.options(source_dir="test", extra_include_dirs="test", deps=[build.deps.googletest, build.deps.psimd]):
+        fp16_tables = build.cxx("tables.cc")
+        build.unittest("ieee-to-fp32-bits",
+            [build.cxx("ieee-to-fp32-bits.cc"), fp16_tables])
+        build.unittest("ieee-to-fp32-value",
+            [build.cxx("ieee-to-fp32-value.cc"), fp16_tables])
+        build.unittest("ieee-from-fp32-value",
+            [build.cxx("ieee-from-fp32-value.cc"), fp16_tables])
+
+        build.unittest("alt-to-fp32-bits",
+            [build.cxx("alt-to-fp32-bits.cc"), fp16_tables])
+        build.unittest("alt-to-fp32-value",
+            [build.cxx("alt-to-fp32-value.cc"), fp16_tables])
+        build.unittest("alt-from-fp32-value",
+            [build.cxx("alt-from-fp32-value.cc"), fp16_tables])
+
+        if build.target.is_x86_64:
+            stubs = build.peachpy("peachpy/stubs.py")
+            build.unittest("alt-xmm-to-fp32-ymm-avx", [build.cxx("peachpy/alt-xmm-to-fp32-xmm-avx.cc"), stubs])
+            build.unittest("alt-xmm-to-fp32-ymm-avx2", [build.cxx("peachpy/alt-xmm-to-fp32-ymm-avx2.cc"), stubs])
+
+        if not build.target.is_emscripten:
+            build.unittest("ieee-to-fp32-psimd", build.cxx("ieee-to-fp32-psimd.cc"))
+            build.unittest("alt-to-fp32-psimd", build.cxx("alt-to-fp32-psimd.cc"))
+
+            build.unittest("ieee-to-fp32x2-psimd", build.cxx("ieee-to-fp32x2-psimd.cc"))
+            build.unittest("alt-to-fp32x2-psimd", build.cxx("alt-to-fp32x2-psimd.cc"))
+
+        build.unittest("bitcasts", build.cxx("bitcasts.cc"))
+
+    macros = ["BENCHMARK_HAS_NO_INLINE_ASSEMBLY"]
+    if options.compare:
+        macros.append("FP16_COMPARATIVE_BENCHMARKS")
+    with build.options(source_dir="bench", extra_include_dirs=".", macros=macros,
+            deps=[build.deps.googlebenchmark, build.deps.psimd]):
+
+        build.benchmark("ieee-element-bench", build.cxx("ieee-element.cc"))
+        build.benchmark("alt-element-bench", build.cxx("alt-element.cc"))
+
+        build.benchmark("from-ieee-array-bench", build.cxx("from-ieee-array.cc"))
+        build.benchmark("from-alt-array-bench", build.cxx("from-alt-array.cc"))
+
+        build.benchmark("to-ieee-array-bench", build.cxx("to-ieee-array.cc"))
+        build.benchmark("to-alt-array-bench", build.cxx("to-alt-array.cc"))
+
+    return build
+
+
+if __name__ == "__main__":
+    import sys
+    main(sys.argv[1:]).generate()

package/fp16/confu.yaml

@@ -0,0 +1,8 @@
+name: FP16
+title: half-precision floating-point conversion
+license: MIT
+deps:
+  - name: psimd
+    url:  https://github.com/Maratyszcza/psimd.git
+  - name: googletest
+  - name: googlebenchmark

package/fp16/include/fp16/avx.py

@@ -0,0 +1,50 @@
+from peachpy import *
+from peachpy.x86_64 import *
+
+
+def fp16_alt_xmm_to_fp32_xmm(xmm_half):
+	xmm_zero = XMMRegister()
+	VPXOR(xmm_zero, xmm_zero, xmm_zero)
+
+	xmm_word = XMMRegister()
+	VPUNPCKLWD(xmm_word, xmm_zero, xmm_half)
+
+	xmm_shl1_half = XMMRegister()
+	VPADDW(xmm_shl1_half, xmm_half, xmm_half)
+
+	xmm_shl1_nonsign = XMMRegister()
+	VPADDD(xmm_shl1_nonsign, xmm_word, xmm_word)
+
+	sign_mask = Constant.float32x4(-0.0)
+
+	xmm_sign = XMMRegister()
+	VANDPS(xmm_sign, xmm_word, sign_mask)
+
+	xmm_shr3_nonsign = XMMRegister()
+	VPSRLD(xmm_shr3_nonsign, xmm_shl1_nonsign, 4)
+
+	exp_offset = Constant.uint32x4(0x38000000)
+
+	xmm_norm_nonsign = XMMRegister()
+	VPADDD(xmm_norm_nonsign, xmm_shr3_nonsign, exp_offset)
+
+	magic_mask = Constant.uint16x8(0x3E80)
+	xmm_denorm_nonsign = XMMRegister()
+	VPUNPCKLWD(xmm_denorm_nonsign, xmm_shl1_half, magic_mask)
+
+	magic_bias = Constant.float32x4(0.25)
+	VSUBPS(xmm_denorm_nonsign, xmm_denorm_nonsign, magic_bias)
+
+	xmm_denorm_cutoff = XMMRegister()
+	VMOVDQA(xmm_denorm_cutoff, Constant.uint32x4(0x00800000))
+	
+	xmm_denorm_mask = XMMRegister()
+	VPCMPGTD(xmm_denorm_mask, xmm_denorm_cutoff, xmm_shr3_nonsign)
+
+	xmm_nonsign = XMMRegister()
+	VBLENDVPS(xmm_nonsign, xmm_norm_nonsign, xmm_denorm_nonsign, xmm_denorm_mask)
+
+	xmm_float = XMMRegister()
+	VORPS(xmm_float, xmm_nonsign, xmm_sign)
+
+	return xmm_float

package/fp16/include/fp16/avx2.py

@@ -0,0 +1,53 @@
+from peachpy import *
+from peachpy.x86_64 import *
+
+
+def fp16_alt_xmm_to_fp32_ymm(xmm_half):
+	ymm_half = YMMRegister()
+	VPERMQ(ymm_half, xmm_half.as_ymm, 0b01010000)
+
+	ymm_zero = YMMRegister()
+	VPXOR(ymm_zero.as_xmm, ymm_zero.as_xmm, ymm_zero.as_xmm)
+
+	ymm_word = YMMRegister()
+	VPUNPCKLWD(ymm_word, ymm_zero, ymm_half)
+
+	ymm_shl1_half = YMMRegister()
+	VPADDW(ymm_shl1_half, ymm_half, ymm_half)
+
+	ymm_shl1_nonsign = YMMRegister()
+	VPADDD(ymm_shl1_nonsign, ymm_word, ymm_word)
+
+	sign_mask = Constant.float32x8(-0.0)
+
+	ymm_sign = YMMRegister()
+	VANDPS(ymm_sign, ymm_word, sign_mask)
+
+	ymm_shr3_nonsign = YMMRegister()
+	VPSRLD(ymm_shr3_nonsign, ymm_shl1_nonsign, 4)
+
+	exp_offset = Constant.uint32x8(0x38000000)
+
+	ymm_norm_nonsign = YMMRegister()
+	VPADDD(ymm_norm_nonsign, ymm_shr3_nonsign, exp_offset)
+
+	magic_mask = Constant.uint16x16(0x3E80)
+	ymm_denorm_nonsign = YMMRegister()
+	VPUNPCKLWD(ymm_denorm_nonsign, ymm_shl1_half, magic_mask)
+
+	magic_bias = Constant.float32x8(0.25)
+	VSUBPS(ymm_denorm_nonsign, ymm_denorm_nonsign, magic_bias)
+
+	ymm_denorm_cutoff = YMMRegister()
+	VMOVDQA(ymm_denorm_cutoff, Constant.uint32x8(0x00800000))
+	
+	ymm_denorm_mask = YMMRegister()
+	VPCMPGTD(ymm_denorm_mask, ymm_denorm_cutoff, ymm_shr3_nonsign)
+
+	ymm_nonsign = YMMRegister()
+	VBLENDVPS(ymm_nonsign, ymm_norm_nonsign, ymm_denorm_nonsign, ymm_denorm_mask)
+
+	ymm_float = YMMRegister()
+	VORPS(ymm_float, ymm_nonsign, ymm_sign)
+
+	return ymm_float

package/fp16/include/fp16/bitcasts.h

@@ -0,0 +1,92 @@
+#pragma once
+#ifndef FP16_BITCASTS_H
+#define FP16_BITCASTS_H
+
+#if defined(__cplusplus) && (__cplusplus >= 201103L)
+	#include <cstdint>
+#elif !defined(__OPENCL_VERSION__)
+	#include <stdint.h>
+#endif
+
+#if defined(__INTEL_COMPILER)
+	#include <immintrin.h>
+#endif
+
+#if defined(_MSC_VER) && (defined(_M_ARM) || defined(_M_ARM64))
+	#include <intrin.h>
+#endif
+
+
+static inline float fp32_from_bits(uint32_t w) {
+#if defined(__OPENCL_VERSION__)
+	return as_float(w);
+#elif defined(__CUDA_ARCH__)
+	return __uint_as_float((unsigned int) w);
+#elif defined(__INTEL_COMPILER)
+	return _castu32_f32(w);
+#elif defined(_MSC_VER) && (defined(_M_ARM) || defined(_M_ARM64))
+	return _CopyFloatFromInt32((__int32) w);
+#else
+	union {
+		uint32_t as_bits;
+		float as_value;
+	} fp32 = { w };
+	return fp32.as_value;
+#endif
+}
+
+static inline uint32_t fp32_to_bits(float f) {
+#if defined(__OPENCL_VERSION__)
+	return as_uint(f);
+#elif defined(__CUDA_ARCH__)
+	return (uint32_t) __float_as_uint(f);
+#elif defined(__INTEL_COMPILER)
+	return _castf32_u32(f);
+#elif defined(_MSC_VER) && (defined(_M_ARM) || defined(_M_ARM64))
+	return (uint32_t) _CopyInt32FromFloat(f);
+#else
+	union {
+		float as_value;
+		uint32_t as_bits;
+	} fp32 = { f };
+	return fp32.as_bits;
+#endif
+}
+
+static inline double fp64_from_bits(uint64_t w) {
+#if defined(__OPENCL_VERSION__)
+	return as_double(w);
+#elif defined(__CUDA_ARCH__)
+	return __longlong_as_double((long long) w);
+#elif defined(__INTEL_COMPILER)
+	return _castu64_f64(w);
+#elif defined(_MSC_VER) && (defined(_M_ARM) || defined(_M_ARM64))
+	return _CopyDoubleFromInt64((__int64) w);
+#else
+	union {
+		uint64_t as_bits;
+		double as_value;
+	} fp64 = { w };
+	return fp64.as_value;
+#endif
+}
+
+static inline uint64_t fp64_to_bits(double f) {
+#if defined(__OPENCL_VERSION__)
+	return as_ulong(f);
+#elif defined(__CUDA_ARCH__)
+	return (uint64_t) __double_as_longlong(f);
+#elif defined(__INTEL_COMPILER)
+	return _castf64_u64(f);
+#elif defined(_MSC_VER) && (defined(_M_ARM) || defined(_M_ARM64))
+	return (uint64_t) _CopyInt64FromDouble(f);
+#else
+	union {
+		double as_value;
+		uint64_t as_bits;
+	} fp64 = { f };
+	return fp64.as_bits;
+#endif
+}
+
+#endif /* FP16_BITCASTS_H */