usearch 2.1.3 → 2.2.1

package/.github/workflows/prerelease.yml

@@ -148,7 +148,10 @@ jobs:
       - uses: actions/setup-node@v3
         with:
           node-version: 18
-      - run: npm install
+      - run: |
+          export CC=/usr/bin/gcc-12
+          export CXX=/usr/bin/g++-12
+          npm install
       - run: npm ci
       - run: npm test
 
@@ -176,7 +179,10 @@ jobs:
     - name: Setup Gradle
       uses: gradle/gradle-build-action@v2.4.2
     - name: Execute Gradle build
-      run: gradle clean build
+      run:
+        export CC=/usr/bin/gcc-12
+        export CXX=/usr/bin/g++-12
+        gradle clean build
 
   test_swift:
     name: Test ObjC & Swift
@@ -251,7 +257,10 @@ jobs:
           
     - name: Build library
       run: |
-        cd golang && make -C ../c libusearch_c.so
+        cd golang/
+        export CC=/usr/bin/gcc-12
+        export CXX=/usr/bin/g++-12
+        make -C ../c libusearch_c.so
         sudo mv ../c/libusearch_c.so /usr/local/lib/libusearch.a
         sudo mv ../c/usearch.h /usr/local/include/usearch.h
 

package/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "usearch"
-version = "2.1.3"
+version = "2.2.1"
 authors = ["Ash Vardanian <1983160+ashvardanian@users.noreply.github.com>"]
 description = "Smaller & Faster Single-File Vector Search Engine from Unum"
 edition = "2021"

package/conanfile.py

@@ -4,7 +4,7 @@ from conans import ConanFile
 class USearchConan(ConanFile):
 
     name = 'USearch'
-    version = '2.1.3'
+    version = '2.2.1'
     license = 'Apache 2.0'
     url = 'https://github.com/unum-cloud/usearch'
     description = 'Smaller & Faster Single-File Vector Search Engine from Unum'

package/include/usearch/index_plugins.hpp

@@ -42,13 +42,9 @@
 
 #if USEARCH_USE_SIMSIMD
 #if __linux__
-#define SIMSIMD_TARGET_ARM_NEON 1
-#define SIMSIMD_TARGET_X86_AVX2 1
-#define SIMSIMD_TARGET_ARM_SVE 1
-#define SIMSIMD_TARGET_X86_AVX512 1
-#endif
 #include <simsimd/simsimd.h>
 #endif
+#endif
 
 namespace unum {
 namespace usearch {
@@ -133,7 +129,9 @@ enum class isa_kind_t {
     neon_k,
     sve_k,
     avx2_k,
+    avx2f16_k,
     avx512_k,
+    avx512f16_k,
 };
 
 enum class prefetching_kind_t {
@@ -199,6 +197,8 @@ inline char const* isa_name(isa_kind_t isa_kind) noexcept {
     case isa_kind_t::sve_k: return "sve";
     case isa_kind_t::avx2_k: return "avx2";
     case isa_kind_t::avx512_k: return "avx512";
+    case isa_kind_t::avx2f16_k: return "avx2+f16";
+    case isa_kind_t::avx512f16_k: return "avx512+f16";
     default: return "";
     }
 }
@@ -217,12 +217,47 @@ inline bool hardware_supports(isa_kind_t isa_kind) noexcept {
 #endif
 
     // When compiling with GCC, one may use the "built-ins", including ones
-    // designed for CPU capability detection.
-#if defined(USEARCH_DEFINED_X86) && defined(USEARCH_DEFINED_GCC)
-    __builtin_cpu_init();
+    // designed for CPU capability detection, but they are not fully compatible with Clang.
+    // So instead I've decided to add a pinch of inline assembly.
+#if defined(USEARCH_DEFINED_X86)
+    auto check_cpu_feature = [](std::uint64_t feature_mask, int function_id, int register_id) -> bool {
+        std::uint32_t eax, ebx, ecx, edx;
+        // Execute CPUID instruction and store results in eax, ebx, ecx, edx
+        // Setting %ecx to 0 as well
+        __asm__ volatile("cpuid" : "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) : "a"(function_id), "c"(0));
+        std::uint32_t register_value;
+        switch (register_id) {
+        case 0: register_value = eax; break;
+        case 1: register_value = ebx; break;
+        case 2: register_value = ecx; break;
+        case 3: register_value = edx; break;
+        default: return false;
+        }
+
+        return (register_value & feature_mask) != 0;
+    };
+
+    // Check for AVX2 (Function ID 7, EBX register)
+    // https://github.com/llvm/llvm-project/blob/50598f0ff44f3a4e75706f8c53f3380fe7faa896/clang/lib/Headers/cpuid.h#L148
+    bool supports_avx2 = check_cpu_feature(1 << 5, 7, 1);
+
+    // Check for F16C (Function ID 1, ECX register)
+    // https://github.com/llvm/llvm-project/blob/50598f0ff44f3a4e75706f8c53f3380fe7faa896/clang/lib/Headers/cpuid.h#L107
+    bool supports_f16c = check_cpu_feature(1 << 29, 1, 2);
+
+    // Check for AVX512F (Function ID 7, EBX register)
+    // https://github.com/llvm/llvm-project/blob/50598f0ff44f3a4e75706f8c53f3380fe7faa896/clang/lib/Headers/cpuid.h#L155
+    bool supports_avx512f = check_cpu_feature(1 << 16, 7, 1);
+
+    // Check for AVX512FP16 (Function ID 7, EDX register)
+    // https://github.com/llvm/llvm-project/blob/50598f0ff44f3a4e75706f8c53f3380fe7faa896/clang/lib/Headers/cpuid.h#L198C9-L198C23
+    bool supports_avx512fp16 = check_cpu_feature(1 << 23, 7, 3);
+
     switch (isa_kind) {
-    case isa_kind_t::avx2_k: return __builtin_cpu_supports("avx2");
-    case isa_kind_t::avx512_k: return __builtin_cpu_supports("avx512f");
+    case isa_kind_t::avx2f16_k: return supports_avx2 && supports_f16c;
+    case isa_kind_t::avx512f16_k: return supports_avx512fp16 && supports_avx512f;
+    case isa_kind_t::avx2_k: return supports_avx2;
+    case isa_kind_t::avx512_k: return supports_avx512f;
     default: return false;
     }
 #endif
@@ -1404,20 +1439,59 @@ class metric_punned_t {
     static metric_punned_t cos_metric_f16_(std::size_t bytes_per_vector) {
         #if USEARCH_USE_SIMSIMD
         #if SIMSIMD_TARGET_X86_AVX512
-        if (hardware_supports(isa_kind_t::avx512_k) && bytes_per_vector % 32 == 0) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_cos_f16x16_avx512(a, b, bytes_per_vector / 2); }), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::f16_k, isa_kind_t::avx512_k};
+        if (hardware_supports(isa_kind_t::avx512f16_k) && bytes_per_vector % 32 == 0) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_cos_f16x16_avx512(a, b, bytes_per_vector / 2); }), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::f16_k, isa_kind_t::avx512f16_k};
+        #endif
+        #if SIMSIMD_TARGET_X86_AVX2
+        if (hardware_supports(isa_kind_t::avx2f16_k) && bytes_per_vector % 16 == 0) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_cos_f16x8_avx2(a, b, bytes_per_vector / 2); }), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::f16_k, isa_kind_t::avx2f16_k};
         #endif
         #if SIMSIMD_TARGET_ARM_NEON
         if (hardware_supports(isa_kind_t::neon_k) && bytes_per_vector % 8 == 0) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_cos_f16x4_neon(a, b, bytes_per_vector / 2); }), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::f16_k, isa_kind_t::neon_k};
         #endif
+        #if SIMSIMD_TARGET_ARM_SVE
+        if (hardware_supports(isa_kind_t::sve_k)) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_cos_f16_sve(a, b, bytes_per_vector / 4); }), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::f16_k, isa_kind_t::sve_k};
+        #endif
         #endif
         return {to_stl_<metric_cos_gt<f16_t, f32_t>>(bytes_per_vector), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::f16_k, isa_kind_t::auto_k};
     }
 
+    static metric_punned_t ip_metric_f16_(std::size_t bytes_per_vector) {
+        #if USEARCH_USE_SIMSIMD
+        #if SIMSIMD_TARGET_X86_AVX512
+        if (hardware_supports(isa_kind_t::avx512f16_k) && bytes_per_vector % 32 == 0) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_dot_f16x16_avx512(a, b, bytes_per_vector / 2); }), bytes_per_vector, metric_kind_t::ip_k, scalar_kind_t::f16_k, isa_kind_t::avx512f16_k};
+        #endif
+        #if SIMSIMD_TARGET_X86_AVX2
+        if (hardware_supports(isa_kind_t::avx2f16_k) && bytes_per_vector % 16 == 0) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_dot_f16x8_avx2(a, b, bytes_per_vector / 2); }), bytes_per_vector, metric_kind_t::ip_k, scalar_kind_t::f16_k, isa_kind_t::avx2f16_k};
+        #endif
+        #if SIMSIMD_TARGET_ARM_NEON
+        if (hardware_supports(isa_kind_t::neon_k) && bytes_per_vector % 8 == 0) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_dot_f16x4_neon(a, b, bytes_per_vector / 2); }), bytes_per_vector, metric_kind_t::ip_k, scalar_kind_t::f16_k, isa_kind_t::neon_k};
+        #endif
+        #endif
+        return {to_stl_<metric_cos_gt<f16_t, f32_t>>(bytes_per_vector), bytes_per_vector, metric_kind_t::ip_k, scalar_kind_t::f16_k, isa_kind_t::auto_k};
+    }
+
+    static metric_punned_t l2sq_metric_f16_(std::size_t bytes_per_vector) {
+        #if USEARCH_USE_SIMSIMD
+        #if SIMSIMD_TARGET_X86_AVX512
+        if (hardware_supports(isa_kind_t::avx512f16_k) && bytes_per_vector % 32 == 0) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_l2sq_f16x16_avx512(a, b, bytes_per_vector / 2); }), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::f16_k, isa_kind_t::avx512f16_k};
+        #endif
+        #if SIMSIMD_TARGET_X86_AVX2
+        if (hardware_supports(isa_kind_t::avx2f16_k) && bytes_per_vector % 16 == 0) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_l2sq_f16x8_avx2(a, b, bytes_per_vector / 2); }), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::f16_k, isa_kind_t::avx2f16_k};
+        #endif
+        #if SIMSIMD_TARGET_ARM_SVE
+        if (hardware_supports(isa_kind_t::sve_k)) return {pun_stl_<simsimd_f16_t>([=](simsimd_f16_t const* a, simsimd_f16_t const* b) { return simsimd_l2sq_f16_sve(a, b, bytes_per_vector / 4); }), bytes_per_vector, metric_kind_t::l2sq_k, scalar_kind_t::f16_k, isa_kind_t::sve_k};
+        #endif
+        #endif
+        return {to_stl_<metric_l2sq_gt<f16_t, f32_t>>(bytes_per_vector), bytes_per_vector, metric_kind_t::l2sq_k, scalar_kind_t::f16_k, isa_kind_t::auto_k};
+    }    
+
     static metric_punned_t cos_metric_i8_(std::size_t bytes_per_vector) {
         #if USEARCH_USE_SIMSIMD
         #if SIMSIMD_TARGET_ARM_NEON
         if (hardware_supports(isa_kind_t::neon_k) && bytes_per_vector % 16 == 0) return {pun_stl_<int8_t>([=](int8_t const* a, int8_t const* b) { return simsimd_cos_i8x16_neon(a, b, bytes_per_vector); }), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::i8_k, isa_kind_t::neon_k};
         #endif
+        #if SIMSIMD_TARGET_X86_AVX2
+        if (hardware_supports(isa_kind_t::avx2_k) && bytes_per_vector % 32 == 0) return {pun_stl_<int8_t>([=](int8_t const* a, int8_t const* b) { return simsimd_cos_i8x32_avx2(a, b, bytes_per_vector); }), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::i8_k, isa_kind_t::avx2_k};
+        #endif
         #endif
         return {to_stl_<cos_i8_t>(bytes_per_vector), bytes_per_vector, metric_kind_t::cos_k, scalar_kind_t::i8_k, isa_kind_t::auto_k};
     }
@@ -1425,7 +1499,7 @@ class metric_punned_t {
     static metric_punned_t ip_metric_(std::size_t bytes_per_vector, scalar_kind_t scalar_kind) {        
         switch (scalar_kind) { // The two most common numeric types for the most common metric have optimized versions
         case scalar_kind_t::f32_k: return ip_metric_f32_(bytes_per_vector);
-        case scalar_kind_t::f16_k: return cos_metric_f16_(bytes_per_vector); // Dot-product accumulates error, Cosine-distance normalizes it
+        case scalar_kind_t::f16_k: return ip_metric_f16_(bytes_per_vector);
         case scalar_kind_t::i8_k:  return cos_metric_i8_(bytes_per_vector);
         case scalar_kind_t::f64_k: return {to_stl_<metric_ip_gt<f64_t>>(bytes_per_vector), bytes_per_vector, metric_kind_t::ip_k, scalar_kind_t::f64_k, isa_kind_t::auto_k};
         default: return {};
@@ -1435,7 +1509,7 @@ class metric_punned_t {
     static metric_punned_t l2sq_metric_(std::size_t bytes_per_vector, scalar_kind_t scalar_kind) {
         switch (scalar_kind) {
         case scalar_kind_t::i8_k: return {to_stl_<l2sq_i8_t>(bytes_per_vector), bytes_per_vector, metric_kind_t::l2sq_k, scalar_kind_t::i8_k, isa_kind_t::auto_k};
-        case scalar_kind_t::f16_k: return {to_stl_<metric_l2sq_gt<f16_t, f32_t>>(bytes_per_vector), bytes_per_vector, metric_kind_t::l2sq_k, scalar_kind_t::f16_k, isa_kind_t::auto_k};
+        case scalar_kind_t::f16_k: return l2sq_metric_f16_(bytes_per_vector);
         case scalar_kind_t::f32_k: return {to_stl_<metric_l2sq_gt<f32_t>>(bytes_per_vector), bytes_per_vector, metric_kind_t::l2sq_k, scalar_kind_t::f32_k, isa_kind_t::auto_k};
         case scalar_kind_t::f64_k: return {to_stl_<metric_l2sq_gt<f64_t>>(bytes_per_vector), bytes_per_vector, metric_kind_t::l2sq_k, scalar_kind_t::f64_k, isa_kind_t::auto_k};
         default: return {};

package/package.json

@@ -1,6 +1,6 @@
 {
     "name": "usearch",
-    "version": "2.1.3",
+    "version": "2.2.1",
     "description": "Smaller & Faster Single-File Vector Search Engine from Unum",
     "author": "Ash Vardanian",
     "license": "Apache 2.0",

package/python/lib.cpp

@@ -957,6 +957,17 @@ PYBIND11_MODULE(compiled, m) {
           py::arg("metric_pointer") = 0                                    //
     );
 
+    m.def(
+        "hardware_acceleration",
+        [](scalar_kind_t scalar_kind, std::size_t dimensions, metric_kind_t metric_kind) -> bool {
+            return metric_t(dimensions, metric_kind, scalar_kind).isa_kind() != isa_kind_t::auto_k;
+        },
+        py::kw_only(),                                //
+        py::arg("dtype") = scalar_kind_t::f32_k,      //
+        py::arg("ndim") = 0,                          //
+        py::arg("metric_kind") = metric_kind_t::cos_k //
+    );
+
     auto i = py::class_<dense_index_py_t, std::shared_ptr<dense_index_py_t>>(m, "Index");
 
     i.def(py::init(&make_index),                                           //

package/python/usearch/index.py

@@ -29,6 +29,7 @@ from usearch.compiled import (
     index_dense_metadata_from_path as _index_dense_metadata_from_path,
     index_dense_metadata_from_buffer as _index_dense_metadata_from_buffer,
     exact_search as _exact_search,
+    hardware_acceleration as _hardware_acceleration,
 )
 
 # Precompiled symbols that will be exposed
@@ -72,9 +73,17 @@ NoneType = type(None)
 PathOrBuffer = Union[str, os.PathLike, bytes]
 
 
-def _normalize_dtype(dtype, metric: MetricKind = MetricKind.Cos) -> ScalarKind:
+def _normalize_dtype(
+    dtype,
+    ndim: int = 0,
+    metric: MetricKind = MetricKind.Cos,
+) -> ScalarKind:
     if dtype is None or dtype == "":
-        return ScalarKind.B1 if metric in MetricKindBitwise else ScalarKind.F32
+        if metric in MetricKindBitwise:
+            return ScalarKind.B1
+        if _hardware_acceleration(dtype=ScalarKind.F16, ndim=ndim, metric_kind=metric):
+            return ScalarKind.F16
+        return ScalarKind.F32
 
     if isinstance(dtype, ScalarKind):
         return dtype
@@ -491,8 +500,12 @@ class Index:
         :type dtype: Optional[DTypeLike], defaults to None
             For continuous metrics can be: f16, f32, f64, or i8.
             For bitwise metrics it's implementation-defined, and can't change.
+            If nothing is provided, the optimal data type is selected based on the metric
+            kind and hardware support.
             Example: you can use the `f16` index with `f32` vectors in Euclidean space,
-            which will be automatically downcasted.
+            which will be automatically downcasted. Moreover, if `dtype=None` is passed,
+            and hardware supports `f16` SIMD-instructions, this choice will be done for you.
+            You can later double-check the used representation with `index.dtype`.
 
         :param connectivity: Connections per node in HNSW
         :type connectivity: Optional[int], defaults to None
@@ -548,7 +561,7 @@ class Index:
             )
 
         # Validate, that the right scalar type is defined
-        dtype = _normalize_dtype(dtype, self._metric_kind)
+        dtype = _normalize_dtype(dtype, ndim, self._metric_kind)
         self._compiled = _CompiledIndex(
             ndim=ndim,
             dtype=dtype,

package/simsimd/.github/workflows/prerelease.yml

@@ -23,7 +23,7 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        os: [ubuntu-22.04] # macOS-11, windows-2022
+        os: [ubuntu-22.04, macOS-11] # windows-2022
         python-version: ["3.11"]
 
     steps:
@@ -35,7 +35,7 @@ jobs:
           python-version: ${{ matrix.python-version }}
 
       - name: Set up Clang
-        run: brew install llvm
+        run: brew install gcc@12
         if: ${{ matrix.os == 'macOS-11' }}
 
       - name: Set up MinGW
@@ -59,10 +59,8 @@ jobs:
 
       - name: Build locally on MacOS
         run: |
-          export LDFLAGS="-L/usr/local/opt/llvm/lib"
-          export CPPFLAGS="-I/usr/local/opt/llvm/include"
-          export CC=/usr/local/opt/llvm/bin/clang
-          export CXX=/usr/local/opt/llvm/bin/clang++
+          export CC=/usr/local/bin/gcc-12
+          export CXX=/usr/local/bin/g++-12
           python -m pip install .
         if: ${{ matrix.os == 'macOS-11' }}
 

package/simsimd/.github/workflows/release.yml

@@ -57,8 +57,7 @@ jobs:
     needs: versioning
     strategy:
       matrix:
-        os: [ubuntu-20.04] # macOS-11, windows-2022
-
+        os: [ubuntu-20.04, macOS-11] # windows-2022
     steps:
       - uses: actions/checkout@v3
         with:
@@ -76,8 +75,15 @@ jobs:
       - name: Install CIBuildWheel
         run: python -m pip install --no-cache-dir cibuildwheel
 
-      - name: Build wheels
+      - name: Build wheels on Ubuntu
+        run: python -m cibuildwheel
+        if: matrix.os == 'ubuntu-20.04'
+
+      - name: Build wheels on MacOS
         run: python -m cibuildwheel
+        env:
+          CIBW_ENVIRONMENT: CC=/usr/local/bin/gcc-12 CXX=/usr/local/bin/g++-12
+        if: matrix.os == 'macOS-11'
 
       - uses: actions/upload-artifact@v3
         with:

package/simsimd/include/simsimd/simsimd.h

@@ -45,6 +45,9 @@
 #endif
 #endif
 
+#undef SIMSIMD_TARGET_X86
+#undef SIMSIMD_TARGET_X86_AVX2
+#undef SIMSIMD_TARGET_X86_AVX512
 #define SIMSIMD_TARGET_X86 0
 #define SIMSIMD_TARGET_X86_AVX2 0
 #define SIMSIMD_TARGET_X86_AVX512 0
@@ -71,6 +74,9 @@
 #endif
 #endif
 
+#undef SIMSIMD_TARGET_ARM
+#undef SIMSIMD_TARGET_ARM_NEON
+#undef SIMSIMD_TARGET_ARM_SVE
 #define SIMSIMD_TARGET_ARM 0
 #define SIMSIMD_TARGET_ARM_NEON 0
 #define SIMSIMD_TARGET_ARM_SVE 0
@@ -143,7 +149,7 @@ simsimd_cos_f32_sve(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
     simsimd_f32_t ab = svaddv_f32(svptrue_b32(), ab_vec);
     simsimd_f32_t a2 = svaddv_f32(svptrue_b32(), a2_vec);
     simsimd_f32_t b2 = svaddv_f32(svptrue_b32(), b2_vec);
-    return 1 - ab / (sqrt(a2) * sqrt(b2));
+    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
 }
 
 __attribute__((target("+sve"))) inline static simsimd_f32_t //
@@ -160,7 +166,7 @@ simsimd_l2sq_f32_sve(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
         pg_vec = svwhilelt_b32(i, d);
     } while (svptest_any(svptrue_b32(), pg_vec));
     simsimd_f32_t d2 = svaddv_f32(svptrue_b32(), d2_vec);
-    return sqrt(d2);
+    return d2;
 }
 
 __attribute__((target("+sve+fp16"))) inline static simsimd_f32_t //
@@ -184,7 +190,7 @@ simsimd_cos_f16_sve(simsimd_f16_t const* a_enum, simsimd_f16_t const* b_enum, si
     simsimd_f16_t ab = svaddv_f16(svptrue_b16(), ab_vec);
     simsimd_f16_t a2 = svaddv_f16(svptrue_b16(), a2_vec);
     simsimd_f16_t b2 = svaddv_f16(svptrue_b16(), b2_vec);
-    return 1 - ab / (sqrt(a2) * sqrt(b2));
+    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
 }
 
 __attribute__((target("+sve+fp16"))) inline static simsimd_f32_t //
@@ -235,6 +241,18 @@ simsimd_dot_f32x4_neon(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d)
     return 1 - vaddvq_f32(ab_vec);
 }
 
+__attribute__((target("+simd+fp16"))) inline static simsimd_f32_t //
+simsimd_dot_f16x4_neon(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
+
+    float32x4_t ab_vec = vdupq_n_f32(0);
+    for (size_t i = 0; i != d; i += 4) {
+        float32x4_t a_vec = vcvt_f32_f16(vld1_f16((float16_t const*)a + i));
+        float32x4_t b_vec = vcvt_f32_f16(vld1_f16((float16_t const*)b + i));
+        ab_vec = vfmaq_f32(ab_vec, a_vec, b_vec);
+    }
+    return 1 - vaddvq_f32(ab_vec);
+}
+
 __attribute__((target("+simd+fp16"))) inline static simsimd_f32_t //
 simsimd_cos_f16x4_neon(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
 
@@ -252,7 +270,7 @@ simsimd_cos_f16x4_neon(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d)
     simsimd_f32_t ab = vaddvq_f32(ab_vec);
     simsimd_f32_t a2 = vaddvq_f32(a2_vec);
     simsimd_f32_t b2 = vaddvq_f32(b2_vec);
-    return 1 - ab / (sqrt(a2) * sqrt(b2));
+    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
 }
 
 __attribute__((target("+simd"))) inline static simsimd_f32_t //
@@ -290,7 +308,7 @@ simsimd_cos_i8x16_neon(int8_t const* a, int8_t const* b, size_t d) {
     int32_t a2 = vget_lane_s32(vpadd_s32(a2_part, a2_part), 0);
     int32x2_t b2_part = vadd_s32(vget_high_s32(b2_vec), vget_low_s32(b2_vec));
     int32_t b2 = vget_lane_s32(vpadd_s32(b2_part, b2_part), 0);
-    return 1 - ab / (sqrt(a2) * sqrt(b2));
+    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
 }
 
 __attribute__((target("+simd"))) inline static simsimd_f32_t //
@@ -308,7 +326,7 @@ simsimd_l2sq_i8x16_neon(int8_t const* a, int8_t const* b, size_t d) {
 
     int32x2_t d2_part = vadd_s32(vget_high_s32(d2_vec), vget_low_s32(d2_vec));
     int32_t d2 = vget_lane_s32(vpadd_s32(d2_part, d2_part), 0);
-    return sqrt(d2);
+    return d2;
 }
 
 __attribute__((target("+simd"))) inline static simsimd_f32_t //
@@ -327,7 +345,7 @@ simsimd_cos_f32x4_neon(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d)
     simsimd_f32_t ab = vaddvq_f32(ab_vec);
     simsimd_f32_t a2 = vaddvq_f32(a2_vec);
     simsimd_f32_t b2 = vaddvq_f32(b2_vec);
-    return 1 - ab / (sqrt(a2) * sqrt(b2));
+    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
 }
 
 __attribute__((target("+sve"))) inline static simsimd_f32_t //
@@ -349,7 +367,7 @@ simsimd_hamming_b1x128_sve(uint8_t const* a, uint8_t const* b, size_t d) {
 #if SIMSIMD_TARGET_X86
 #if SIMSIMD_TARGET_X86_AVX2
 
-__attribute__((target("avx2"))) //
+__attribute__((target("avx2")))                            //
 __attribute__((target("fma"))) inline static simsimd_f32_t //
 simsimd_dot_f32x4_avx2(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
     __m128 ab_vec = _mm_set1_ps(0);
@@ -362,7 +380,7 @@ simsimd_dot_f32x4_avx2(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d)
     return 1 - ab_union.f;
 }
 
-__attribute__((target("avx2"))) //
+__attribute__((target("avx2")))                            //
 __attribute__((target("fma"))) inline static simsimd_f32_t //
 simsimd_cos_f32x4_avx2(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
 
@@ -385,13 +403,151 @@ simsimd_cos_f32x4_avx2(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d)
     union simsimd_f32i32_t ab_union = {_mm_cvtsi128_si32(_mm_castps_si128(ab_vec))};
     union simsimd_f32i32_t a2_union = {_mm_cvtsi128_si32(_mm_castps_si128(a2_vec))};
     union simsimd_f32i32_t b2_union = {_mm_cvtsi128_si32(_mm_castps_si128(b2_vec))};
-    return 1 - ab_union.f / (sqrt(a2_union.f) * sqrt(b2_union.f));
+    return 1 - ab_union.f / (sqrtf(a2_union.f) * sqrtf(b2_union.f));
+}
+
+__attribute__((target("avx2")))                            //
+__attribute__((target("fma"))) inline static simsimd_f32_t //
+simsimd_l2sq_f32x4_avx2(simsimd_f32_t const* a, simsimd_f32_t const* b, size_t d) {
+    __m128 sum_vec = _mm_set1_ps(0);
+    for (size_t i = 0; i != d; i += 4) {
+        __m128 diff_vec = _mm_sub_ps(_mm_loadu_ps(a + i), _mm_loadu_ps(b + i));
+        sum_vec = _mm_fmadd_ps(diff_vec, diff_vec, sum_vec);
+    }
+    sum_vec = _mm_hadd_ps(sum_vec, sum_vec);
+    sum_vec = _mm_hadd_ps(sum_vec, sum_vec);
+    float result[1];
+    _mm_store_ss(result, sum_vec);
+    return result[0];
+}
+
+__attribute__((target("avx2")))                            //
+__attribute__((target("f16c")))                            //
+__attribute__((target("fma"))) inline static simsimd_f32_t //
+simsimd_dot_f16x8_avx2(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
+    __m256 ab_vec = _mm256_set1_ps(0);
+    for (size_t i = 0; i != d; i += 8) {
+        __m256 a_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(a + i)));
+        __m256 b_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(b + i)));
+        ab_vec = _mm256_fmadd_ps(a_vec, b_vec, ab_vec);
+    }
+    ab_vec = _mm256_add_ps(_mm256_permute2f128_ps(ab_vec, ab_vec, 0x81), ab_vec);
+    ab_vec = _mm256_hadd_ps(ab_vec, ab_vec);
+    ab_vec = _mm256_hadd_ps(ab_vec, ab_vec);
+    float result[1];
+    _mm_store_ss(result, _mm256_castps256_ps128(ab_vec));
+    return 1 - result[0];
+}
+
+__attribute__((target("avx2")))                            //
+__attribute__((target("f16c")))                            //
+__attribute__((target("fma"))) inline static simsimd_f32_t //
+simsimd_cos_f16x8_avx2(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
+    __m256 ab_vec = _mm256_set1_ps(0);
+    __m256 a2_vec = _mm256_set1_ps(0);
+    __m256 b2_vec = _mm256_set1_ps(0);
+    for (size_t i = 0; i != d; i += 8) {
+        __m256 a_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(a + i)));
+        __m256 b_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(b + i)));
+        ab_vec = _mm256_fmadd_ps(a_vec, b_vec, ab_vec);
+        a2_vec = _mm256_fmadd_ps(a_vec, a_vec, a2_vec);
+        b2_vec = _mm256_fmadd_ps(b_vec, b_vec, b2_vec);
+    }
+    ab_vec = _mm256_add_ps(_mm256_permute2f128_ps(ab_vec, ab_vec, 0x81), ab_vec);
+    ab_vec = _mm256_hadd_ps(ab_vec, ab_vec);
+    ab_vec = _mm256_hadd_ps(ab_vec, ab_vec);
+    a2_vec = _mm256_add_ps(_mm256_permute2f128_ps(a2_vec, a2_vec, 0x81), a2_vec);
+    a2_vec = _mm256_hadd_ps(a2_vec, a2_vec);
+    a2_vec = _mm256_hadd_ps(a2_vec, a2_vec);
+    b2_vec = _mm256_add_ps(_mm256_permute2f128_ps(b2_vec, b2_vec, 0x81), b2_vec);
+    b2_vec = _mm256_hadd_ps(b2_vec, b2_vec);
+    b2_vec = _mm256_hadd_ps(b2_vec, b2_vec);
+    float ab_result[1], a2_result[1], b2_result[1];
+    _mm_store_ss(ab_result, _mm256_castps256_ps128(ab_vec));
+    _mm_store_ss(a2_result, _mm256_castps256_ps128(a2_vec));
+    _mm_store_ss(b2_result, _mm256_castps256_ps128(b2_vec));
+    return 1 - ab_result[0] / (sqrtf(a2_result[0]) * sqrtf(b2_result[0]));
+}
+
+__attribute__((target("avx2")))                            //
+__attribute__((target("f16c")))                            //
+__attribute__((target("fma"))) inline static simsimd_f32_t //
+simsimd_l2sq_f16x8_avx2(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
+    __m256 sum_vec = _mm256_set1_ps(0);
+    for (size_t i = 0; i != d; i += 8) {
+        __m256 a_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(a + i)));
+        __m256 b_vec = _mm256_cvtph_ps(_mm_loadu_si128((__m128i const*)(b + i)));
+        __m256 diff_vec = _mm256_sub_ps(a_vec, b_vec);
+        sum_vec = _mm256_fmadd_ps(diff_vec, diff_vec, sum_vec);
+    }
+    sum_vec = _mm256_add_ps(_mm256_permute2f128_ps(sum_vec, sum_vec, 0x81), sum_vec);
+    sum_vec = _mm256_hadd_ps(sum_vec, sum_vec);
+    sum_vec = _mm256_hadd_ps(sum_vec, sum_vec);
+    float result[1];
+    _mm_store_ss(result, _mm256_castps256_ps128(sum_vec));
+    return result[0];
+}
+
+__attribute__((target("avx2"))) //
+inline static simsimd_f32_t
+simsimd_cos_i8x32_avx2(int8_t const* a, int8_t const* b, size_t d) {
+
+    __m256i ab_vec = _mm256_setzero_si256();
+    __m256i a2_vec = _mm256_setzero_si256();
+    __m256i b2_vec = _mm256_setzero_si256();
+
+    for (size_t i = 0; i != d; i += 32) {
+        __m256i a_vec = _mm256_loadu_si256((__m256i const*)(a + i));
+        __m256i b_vec = _mm256_loadu_si256((__m256i const*)(b + i));
+
+        // Multiply and add packed 8-bit integers
+        __m256i ab_part_vec = _mm256_maddubs_epi16(a_vec, b_vec);
+        __m256i a2_part_vec = _mm256_maddubs_epi16(a_vec, a_vec);
+        __m256i b2_part_vec = _mm256_maddubs_epi16(b_vec, b_vec);
+
+        ab_vec = _mm256_add_epi32(ab_vec, ab_part_vec);
+        a2_vec = _mm256_add_epi32(a2_vec, a2_part_vec);
+        b2_vec = _mm256_add_epi32(b2_vec, b2_part_vec);
+    }
+
+    // Horizontal sum across the 256-bit register
+    __m128i ab_low = _mm256_extracti128_si256(ab_vec, 0);
+    __m128i ab_high = _mm256_extracti128_si256(ab_vec, 1);
+    __m128i ab_sum = _mm_add_epi32(ab_low, ab_high);
+
+    __m128i a2_low = _mm256_extracti128_si256(a2_vec, 0);
+    __m128i a2_high = _mm256_extracti128_si256(a2_vec, 1);
+    __m128i a2_sum = _mm_add_epi32(a2_low, a2_high);
+
+    __m128i b2_low = _mm256_extracti128_si256(b2_vec, 0);
+    __m128i b2_high = _mm256_extracti128_si256(b2_vec, 1);
+    __m128i b2_sum = _mm_add_epi32(b2_low, b2_high);
+
+    // Further reduce to a single sum for each vector
+    int ab = _mm_extract_epi32(_mm_hadd_epi32(_mm_hadd_epi32(ab_sum, ab_sum), ab_sum), 0);
+    int a2 = _mm_extract_epi32(_mm_hadd_epi32(_mm_hadd_epi32(a2_sum, a2_sum), a2_sum), 0);
+    int b2 = _mm_extract_epi32(_mm_hadd_epi32(_mm_hadd_epi32(b2_sum, b2_sum), b2_sum), 0);
+
+    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
 }
 
 #endif // SIMSIMD_TARGET_X86_AVX2
 
 #if SIMSIMD_TARGET_X86_AVX512
 
+__attribute__((target("avx512fp16")))                          //
+__attribute__((target("avx512f"))) inline static simsimd_f32_t //
+simsimd_dot_f16x16_avx512(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
+    __m512 ab_vec = _mm512_set1_ps(0);
+    for (size_t i = 0; i != d; i += 16) {
+        __m512 a_vec = _mm512_cvtxph_ps(_mm256_loadu_ph(a + i));
+        __m512 b_vec = _mm512_cvtxph_ps(_mm256_loadu_ph(b + i));
+        ab_vec = _mm512_fmadd_ps(a_vec, b_vec, ab_vec);
+    }
+    simsimd_f32_t ab = _mm512_reduce_add_ps(ab_vec);
+    return 1 - ab;
+}
+
 __attribute__((target("avx512fp16")))                          //
 __attribute__((target("avx512f"))) inline static simsimd_f32_t //
 simsimd_cos_f16x16_avx512(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
@@ -408,7 +564,21 @@ simsimd_cos_f16x16_avx512(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t
     simsimd_f32_t ab = _mm512_reduce_add_ps(ab_vec);
     simsimd_f32_t a2 = _mm512_reduce_add_ps(a2_vec);
     simsimd_f32_t b2 = _mm512_reduce_add_ps(b2_vec);
-    return 1 - ab / (sqrt(a2) * sqrt(b2));
+    return 1 - ab / (sqrtf(a2) * sqrtf(b2));
+}
+
+__attribute__((target("avx512fp16")))                          //
+__attribute__((target("avx512f"))) inline static simsimd_f32_t //
+simsimd_l2sq_f16x16_avx512(simsimd_f16_t const* a, simsimd_f16_t const* b, size_t d) {
+    __m512 sum_vec = _mm512_set1_ps(0);
+    for (size_t i = 0; i != d; i += 16) {
+        __m512 a_vec = _mm512_cvtxph_ps(_mm256_loadu_ph(a + i));
+        __m512 b_vec = _mm512_cvtxph_ps(_mm256_loadu_ph(b + i));
+        __m512 diff_vec = _mm512_sub_ps(a_vec, b_vec);
+        sum_vec = _mm512_fmadd_ps(diff_vec, diff_vec, sum_vec);
+    }
+    simsimd_f32_t sum = _mm512_reduce_add_ps(sum_vec);
+    return sum;
 }
 
 __attribute__((target("avx512vpopcntdq")))                     //

package/simsimd/pyproject.toml

@@ -30,8 +30,9 @@ repair-wheel-command = "auditwheel repair --lib-sdir . -w {dest_dir} {wheel}"
 [tool.cibuildwheel.macos]
 before-build = [
     "rm -rf {project}/build",
+    "brew install gcc@12",
 ]
-archs = ["x86_64", "universal2", "arm64"]
+archs = ["x86_64", "arm64"]
 repair-wheel-command = "delocate-wheel --require-archs {delocate_archs} -w {dest_dir} -v {wheel}"
 
 [tool.cibuildwheel.windows]

package/simsimd/python/lib.c

@@ -58,6 +58,8 @@ PyMODINIT_FUNC PyInit_simsimd(void) {
         return NULL;
 
     PyModule_AddObject(m, "tanimoto_b1x8_naive", distance(&simsimd_tanimoto_b1x8_naive));
+
+    // Specialized:
     PyModule_AddObject(m, "tanimoto_maccs_naive", distance(&simsimd_tanimoto_maccs_naive));
     PyModule_AddObject(m, "tanimoto_conditional_naive", distance(&simsimd_tanimoto_conditional_naive));
 
@@ -66,6 +68,8 @@ PyMODINIT_FUNC PyInit_simsimd(void) {
     PyModule_AddObject(m, "cos_f16x4_neon", distance(&simsimd_cos_f16x4_neon));
     PyModule_AddObject(m, "cos_i8x16_neon", distance(&simsimd_cos_i8x16_neon));
     PyModule_AddObject(m, "cos_f32x4_neon", distance(&simsimd_cos_f32x4_neon));
+
+    // Specialized:
     PyModule_AddObject(m, "tanimoto_maccs_neon", distance(&simsimd_tanimoto_maccs_neon));
 
 #if SIMSIMD_TARGET_ARM_SVE
@@ -76,16 +80,28 @@ PyMODINIT_FUNC PyInit_simsimd(void) {
     PyModule_AddObject(m, "l2sq_f16_sve", distance(&simsimd_l2sq_f16_sve));
     PyModule_AddObject(m, "hamming_b1x8_sve", distance(&simsimd_hamming_b1x8_sve));
     PyModule_AddObject(m, "hamming_b1x128_sve", distance(&simsimd_hamming_b1x128_sve));
+
+    // Specialized:
     PyModule_AddObject(m, "tanimoto_maccs_sve", distance(&simsimd_tanimoto_maccs_sve));
 #endif
 #endif
 
 #if SIMSIMD_TARGET_X86
+    PyModule_AddObject(m, "dot_f32x4_avx2", distance(&simsimd_dot_f32x4_avx2));
     PyModule_AddObject(m, "cos_f32x4_avx2", distance(&simsimd_cos_f32x4_avx2));
+    PyModule_AddObject(m, "l2sq_f32x4_avx2", distance(&simsimd_l2sq_f32x4_avx2));
+    PyModule_AddObject(m, "dot_f16x8_avx2", distance(&simsimd_dot_f16x8_avx2));
+    PyModule_AddObject(m, "cos_f16x8_avx2", distance(&simsimd_cos_f16x8_avx2));
+    PyModule_AddObject(m, "l2sq_f16x8_avx2", distance(&simsimd_l2sq_f16x8_avx2));
 
 #if SIMSIMD_TARGET_X86_AVX512
+    PyModule_AddObject(m, "dot_f16x16_avx512", distance(&simsimd_dot_f16x16_avx512));
     PyModule_AddObject(m, "cos_f16x16_avx512", distance(&simsimd_cos_f16x16_avx512));
+    PyModule_AddObject(m, "l2sq_f16x16_avx512", distance(&simsimd_l2sq_f16x16_avx512));
+
     PyModule_AddObject(m, "hamming_b1x128_avx512", distance(&simsimd_hamming_b1x128_avx512));
+
+    // Specialized:
     PyModule_AddObject(m, "tanimoto_maccs_avx512", distance(&simsimd_tanimoto_maccs_avx512));
 #endif
 #endif

package/wasmer.toml

@@ -1,6 +1,6 @@
 [package]
 name="unum/usearch"
-version="2.1.3"
+version="2.2.1"
 description="Smaller & Faster Single-File Vector Search Engine from Unum"
 license="Apache-2.0"
 readme="README.md"