tirtc-device-builder 0.3.0 → 0.5.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/.codex-plugin/plugin.json +1 -1
- package/CHANGELOG.md +17 -0
- package/README.md +632 -427
- package/package.json +1 -1
- package/skills/tirtc-esp32-builder/SKILL.md +12 -4
- package/skills/tirtc-esp32-builder/USAGE.md +19 -12
- package/skills/tirtc-esp32-builder/assets/developer-intake-prompt.md +53 -0
- package/skills/tirtc-esp32-builder/assets/hardware-ir-v2.example.json +122 -0
- package/skills/tirtc-esp32-builder/assets/report-template.md +15 -0
- package/skills/tirtc-esp32-builder/references/capability-rules.md +45 -16
- package/skills/tirtc-esp32-builder/references/hardware-ir.md +57 -24
- package/skills/tirtc-esp32-builder/references/porting-risks.md +49 -0
- package/skills/tirtc-esp32-builder/references/reporting.md +7 -1
- package/skills/tirtc-esp32-builder/references/workflow.md +18 -9
- package/skills/tirtc-esp32-builder/scripts/hardware_ir.py +800 -51
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@@ -19,11 +19,12 @@ The branch is complete when the new run has its own build and verification evide
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Use this branch when the user supplies a board model, vendor URL, schematic, BOM, pin map, BSP, datasheets, photographs, or peripheral example projects without a verified adapter.
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1. Resolve the full model, module, PCB marking, and hardware revision. Treat different revisions as different boards.
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2. Freeze the user-supplied product contract: selected video profile, audio/stream formats, duplex/AEC policy, supported Wi-Fi credential methods, selected onboarding method, transport staging, output path, and mutation boundary. Use `unknown` where the prompt lacks an answer.
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3. Prefer official schematic/BOM and BSP facts. For a PDF schematic, inspect page labels and net names; prefer an exported netlist, pin CSV, or vendor board definition when available.
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4. Cross-check critical pins, clocks, power enables, reset lines, sensor/codec variants, ESP-IDF version, resource ownership, and onboarding behavior across at least two independent artifacts when possible.
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5. Create the Hardware IR v2. Use `null` for unknown facts and retain contradictory values as an explicit issue instead of selecting one silently. Store concrete board values in the IR/adapter rather than Skill files.
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6. Validate and run the intake assessment. Classify unresolved facts by their next evidence source: source, implementation, build, HIL, or user input. Ask only for `user_blocked` facts that prevent a safe design. SoftAP is optional when another evidenced Wi-Fi credential method is available, keeps credentials outside source, and defines reprovisioning.
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7. When hardware identity, wiring, product contracts, and an evidenced resource plan reach `READY_TO_PORT`, generate the starter and implement the board adapter. Generate a compile-safe adapter by default when remaining uncertainty is implementation-, build-, or HIL-resolvable. Stop at the IR/report only when missing user evidence or an incompatible dependency makes a safe implementation impossible.
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The branch is complete when every supplied artifact maps to an IR fact, provenance entry, contradiction, or declared irrelevant item.
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@@ -55,16 +56,24 @@ The runtime-facing `starter_media` interface stays stable. A reusable board inte
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The adapter owns:
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- camera capture and H.264
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- camera capture and the selected MJPEG/H.264/H.265 media path;
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- microphone capture and audio encoding;
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- downlink audio decode, buffering, codec, amplifier, and I2S playback;
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- DMA buffers, hardware clocks, power, reset, GPIO,
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- DMA buffers, hardware clocks, power, reset, GPIO, refresh/key-frame requests, and realtime task allocation;
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- bounded stop, resource release, and generation-aware flushing.
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The stable modules own stream IDs, negotiated/contracted formats, TiRTC callback copying, connection handles, session generation, and H5/AI sequencing.
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## Verification loop
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Use a bounded loop per layer: diagnose one failing invariant, make the smallest correction, and rerun that layer before moving forward. Stop and report when the remaining failure requires unavailable hardware, credentials, a new SDK binary, a public protocol change, or a user choice.
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Use a bounded loop per layer: diagnose one failing invariant, make the smallest correction, and rerun that layer before moving forward. Change one high-risk variable per HIL comparison. Turn reusable invariants into tests or post-link gates. Stop and report when the remaining failure requires unavailable hardware, credentials, a new SDK binary, a public protocol change, or a user choice.
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Run the assessor once per layer:
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- `--phase intake`: corroborated design evidence; success is `READY_TO_PORT`.
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- `--phase build --artifact-sha256 <sha>`: compile/post-link evidence; success is `BUILD_VERIFIED`.
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- `--phase hil --artifact-sha256 <sha>`: matching L5/L6 runtime evidence; success is `HIL_VERIFIED`.
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No serial authorization is required for L0/L1. When serial, browser, account, service, or network access is unavailable, complete the safe build work and report the affected L2-L7 levels as `SKIP`.
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Do not use successful compilation as evidence for camera frames, speaker output, Web rendering, AI audio, or long-run stability. Bind every runtime conclusion to the tested firmware SHA-256.
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