tasmota-webserial-esptool 9.2.19 → 9.2.21

package/dist/const.d.ts

@@ -1,7 +1,7 @@
 export interface Logger {
-    log(msg: string, ...args: any[]): void;
-    error(msg: string, ...args: any[]): void;
-    debug(msg: string, ...args: any[]): void;
+    log(msg: string, ...args: unknown[]): void;
+    error(msg: string, ...args: unknown[]): void;
+    debug(msg: string, ...args: unknown[]): void;
 }
 export declare const baudRates: number[];
 export declare const FLASH_SIZES: {
@@ -56,8 +56,10 @@ export declare const ESP32_SPI_MISO_DLEN_OFFS = 44;
 export declare const ESP32_SPI_W0_OFFS = 128;
 export declare const ESP32_UART_DATE_REG_ADDR = 1610612856;
 export declare const ESP32_BOOTLOADER_FLASH_OFFSET = 4096;
+export declare const ESP32_APB_CTL_DATE_ADDR: number;
 export declare const ESP32S2_SPI_REG_BASE = 1061167104;
 export declare const ESP32S2_BASEFUSEADDR = 1061265408;
+export declare const ESP32S2_EFUSE_BLOCK1_ADDR: number;
 export declare const ESP32S2_MACFUSEADDR = 1061265476;
 export declare const ESP32S2_SPI_USR_OFFS = 24;
 export declare const ESP32S2_SPI_USR1_OFFS = 28;
@@ -81,6 +83,7 @@ export declare const ESP32S2_UARTDEV_BUF_NO = 1073741076;
 export declare const ESP32S2_UARTDEV_BUF_NO_USB_OTG = 2;
 export declare const ESP32S3_SPI_REG_BASE = 1610620928;
 export declare const ESP32S3_BASEFUSEADDR = 1610641408;
+export declare const ESP32S3_EFUSE_BLOCK1_ADDR: number;
 export declare const ESP32S3_MACFUSEADDR: number;
 export declare const ESP32S3_SPI_USR_OFFS = 24;
 export declare const ESP32S3_SPI_USR1_OFFS = 28;
@@ -105,6 +108,7 @@ export declare const ESP32S3_UARTDEV_BUF_NO_USB_OTG = 3;
 export declare const ESP32S3_UARTDEV_BUF_NO_USB_JTAG_SERIAL = 4;
 export declare const ESP32C2_SPI_REG_BASE = 1610620928;
 export declare const ESP32C2_BASEFUSEADDR = 1610647552;
+export declare const ESP32C2_EFUSE_BLOCK2_ADDR: number;
 export declare const ESP32C2_MACFUSEADDR: number;
 export declare const ESP32C2_SPI_USR_OFFS = 24;
 export declare const ESP32C2_SPI_USR1_OFFS = 28;
@@ -146,6 +150,7 @@ export declare const ESP32C3_EFUSE_RD_MAC_SPI_SYS_3_REG = 1610647632;
 export declare const ESP32C3_EFUSE_RD_MAC_SPI_SYS_5_REG = 1610647640;
 export declare const ESP32C5_SPI_REG_BASE = 1610625024;
 export declare const ESP32C5_BASEFUSEADDR = 1611352064;
+export declare const ESP32C5_EFUSE_BLOCK1_ADDR: number;
 export declare const ESP32C5_MACFUSEADDR: number;
 export declare const ESP32C5_SPI_USR_OFFS = 24;
 export declare const ESP32C5_SPI_USR1_OFFS = 28;
@@ -163,6 +168,7 @@ export declare const ESP32C5_UARTDEV_BUF_NO = 1082520852;
 export declare const ESP32C5_UARTDEV_BUF_NO_USB_JTAG_SERIAL = 3;
 export declare const ESP32C6_SPI_REG_BASE = 1610625024;
 export declare const ESP32C6_BASEFUSEADDR = 1611335680;
+export declare const ESP32C6_EFUSE_BLOCK1_ADDR: number;
 export declare const ESP32C6_MACFUSEADDR: number;
 export declare const ESP32C6_SPI_USR_OFFS = 24;
 export declare const ESP32C6_SPI_USR1_OFFS = 28;
@@ -190,6 +196,7 @@ export declare const ESP32C5_C6_RTC_CNTL_SWD_AUTO_FEED_EN: number;
 export declare const ESP32C5_C6_RTC_CNTL_SWD_WPROTECT_REG: number;
 export declare const ESP32C61_SPI_REG_BASE = 1610625024;
 export declare const ESP32C61_BASEFUSEADDR = 1611352064;
+export declare const ESP32C61_EFUSE_BLOCK1_ADDR: number;
 export declare const ESP32C61_MACFUSEADDR: number;
 export declare const ESP32C61_SPI_USR_OFFS = 24;
 export declare const ESP32C61_SPI_USR1_OFFS = 28;
@@ -205,6 +212,7 @@ export declare const ESP32C61_UARTDEV_BUF_NO_USB_JTAG_SERIAL_REV_LE2 = 3;
 export declare const ESP32C61_UARTDEV_BUF_NO_USB_JTAG_SERIAL_REV_GT2 = 4;
 export declare const ESP32H2_SPI_REG_BASE = 1610625024;
 export declare const ESP32H2_BASEFUSEADDR = 1611335680;
+export declare const ESP32H2_EFUSE_BLOCK1_ADDR: number;
 export declare const ESP32H2_MACFUSEADDR: number;
 export declare const ESP32H2_SPI_USR_OFFS = 24;
 export declare const ESP32H2_SPI_USR1_OFFS = 28;
@@ -224,6 +232,7 @@ export declare const ESP32H2_UARTDEV_BUF_NO = 1082457852;
 export declare const ESP32H2_UARTDEV_BUF_NO_USB_JTAG_SERIAL = 3;
 export declare const ESP32H4_SPI_REG_BASE = 1611239424;
 export declare const ESP32H4_BASEFUSEADDR = 1611339776;
+export declare const ESP32H4_EFUSE_BLOCK1_ADDR: number;
 export declare const ESP32H4_MACFUSEADDR: number;
 export declare const ESP32H4_SPI_USR_OFFS = 24;
 export declare const ESP32H4_SPI_USR1_OFFS = 28;
@@ -243,6 +252,7 @@ export declare const ESP32H4_UARTDEV_BUF_NO = 1082652032;
 export declare const ESP32H4_UARTDEV_BUF_NO_USB_JTAG_SERIAL = 3;
 export declare const ESP32H21_SPI_REG_BASE = 1610625024;
 export declare const ESP32H21_BASEFUSEADDR = 1611350016;
+export declare const ESP32H21_EFUSE_BLOCK1_ADDR: number;
 export declare const ESP32H21_MACFUSEADDR: number;
 export declare const ESP32H21_SPI_USR_OFFS = 24;
 export declare const ESP32H21_SPI_USR1_OFFS = 28;

package/dist/const.js

@@ -75,8 +75,10 @@ export const ESP32_SPI_MISO_DLEN_OFFS = 0x2c;
 export const ESP32_SPI_W0_OFFS = 0x80;
 export const ESP32_UART_DATE_REG_ADDR = 0x60000078;
 export const ESP32_BOOTLOADER_FLASH_OFFSET = 0x1000;
+export const ESP32_APB_CTL_DATE_ADDR = 0x3ff66000 + 0x7c;
 export const ESP32S2_SPI_REG_BASE = 0x3f402000;
 export const ESP32S2_BASEFUSEADDR = 0x3f41a000;
+export const ESP32S2_EFUSE_BLOCK1_ADDR = ESP32S2_BASEFUSEADDR + 0x044;
 export const ESP32S2_MACFUSEADDR = 0x3f41a044;
 export const ESP32S2_SPI_USR_OFFS = 0x18;
 export const ESP32S2_SPI_USR1_OFFS = 0x1c;
@@ -102,6 +104,7 @@ export const ESP32S2_UARTDEV_BUF_NO = 0x3ffffd14; // Variable in ROM .bss which
 export const ESP32S2_UARTDEV_BUF_NO_USB_OTG = 2; // Value of the above indicating that USB-OTG is in use
 export const ESP32S3_SPI_REG_BASE = 0x60002000;
 export const ESP32S3_BASEFUSEADDR = 0x60007000;
+export const ESP32S3_EFUSE_BLOCK1_ADDR = ESP32S3_BASEFUSEADDR + 0x044;
 export const ESP32S3_MACFUSEADDR = 0x60007000 + 0x044;
 export const ESP32S3_SPI_USR_OFFS = 0x18;
 export const ESP32S3_SPI_USR1_OFFS = 0x1c;
@@ -128,6 +131,7 @@ export const ESP32S3_UARTDEV_BUF_NO_USB_OTG = 3; // The above var when USB-OTG i
 export const ESP32S3_UARTDEV_BUF_NO_USB_JTAG_SERIAL = 4; // The above var when USB-JTAG/Serial is used
 export const ESP32C2_SPI_REG_BASE = 0x60002000;
 export const ESP32C2_BASEFUSEADDR = 0x60008800;
+export const ESP32C2_EFUSE_BLOCK2_ADDR = ESP32C2_BASEFUSEADDR + 0x040;
 export const ESP32C2_MACFUSEADDR = ESP32C2_BASEFUSEADDR + 0x040;
 export const ESP32C2_SPI_USR_OFFS = 0x18;
 export const ESP32C2_SPI_USR1_OFFS = 0x1c;
@@ -174,6 +178,7 @@ export const ESP32C3_EFUSE_RD_MAC_SPI_SYS_3_REG = 0x60008850;
 export const ESP32C3_EFUSE_RD_MAC_SPI_SYS_5_REG = 0x60008858;
 export const ESP32C5_SPI_REG_BASE = 0x60003000;
 export const ESP32C5_BASEFUSEADDR = 0x600b4800;
+export const ESP32C5_EFUSE_BLOCK1_ADDR = ESP32C5_BASEFUSEADDR + 0x044;
 export const ESP32C5_MACFUSEADDR = 0x600b4800 + 0x044;
 export const ESP32C5_SPI_USR_OFFS = 0x18;
 export const ESP32C5_SPI_USR1_OFFS = 0x1c;
@@ -193,6 +198,7 @@ export const ESP32C5_UARTDEV_BUF_NO = 0x4085f514; // Variable in ROM .bss which
 export const ESP32C5_UARTDEV_BUF_NO_USB_JTAG_SERIAL = 3; // The above var when USB-JTAG/Serial is used
 export const ESP32C6_SPI_REG_BASE = 0x60003000;
 export const ESP32C6_BASEFUSEADDR = 0x600b0800;
+export const ESP32C6_EFUSE_BLOCK1_ADDR = ESP32C6_BASEFUSEADDR + 0x044;
 export const ESP32C6_MACFUSEADDR = 0x600b0800 + 0x044;
 export const ESP32C6_SPI_USR_OFFS = 0x18;
 export const ESP32C6_SPI_USR1_OFFS = 0x1c;
@@ -223,6 +229,7 @@ export const ESP32C5_C6_RTC_CNTL_SWD_AUTO_FEED_EN = 1 << 18;
 export const ESP32C5_C6_RTC_CNTL_SWD_WPROTECT_REG = ESP32C5_C6_DR_REG_LP_WDT_BASE + 0x0020; // LP_WDT_SWD_WPROTECT_REG
 export const ESP32C61_SPI_REG_BASE = 0x60003000;
 export const ESP32C61_BASEFUSEADDR = 0x600b4800;
+export const ESP32C61_EFUSE_BLOCK1_ADDR = ESP32C61_BASEFUSEADDR + 0x044;
 export const ESP32C61_MACFUSEADDR = 0x600b4800 + 0x044;
 export const ESP32C61_SPI_USR_OFFS = 0x18;
 export const ESP32C61_SPI_USR1_OFFS = 0x1c;
@@ -239,6 +246,7 @@ export const ESP32C61_UARTDEV_BUF_NO_USB_JTAG_SERIAL_REV_LE2 = 3; // revision <=
 export const ESP32C61_UARTDEV_BUF_NO_USB_JTAG_SERIAL_REV_GT2 = 4; // revision > 2
 export const ESP32H2_SPI_REG_BASE = 0x60003000;
 export const ESP32H2_BASEFUSEADDR = 0x600b0800;
+export const ESP32H2_EFUSE_BLOCK1_ADDR = ESP32H2_BASEFUSEADDR + 0x044;
 export const ESP32H2_MACFUSEADDR = 0x600b0800 + 0x044;
 export const ESP32H2_SPI_USR_OFFS = 0x18;
 export const ESP32H2_SPI_USR1_OFFS = 0x1c;
@@ -260,6 +268,7 @@ export const ESP32H2_UARTDEV_BUF_NO = 0x4084fefc; // Variable in ROM .bss which
 export const ESP32H2_UARTDEV_BUF_NO_USB_JTAG_SERIAL = 3; // The above var when USB-JTAG/Serial is used
 export const ESP32H4_SPI_REG_BASE = 0x60099000;
 export const ESP32H4_BASEFUSEADDR = 0x600b1800;
+export const ESP32H4_EFUSE_BLOCK1_ADDR = ESP32H4_BASEFUSEADDR + 0x044;
 export const ESP32H4_MACFUSEADDR = 0x600b1800 + 0x044;
 export const ESP32H4_SPI_USR_OFFS = 0x18;
 export const ESP32H4_SPI_USR1_OFFS = 0x1c;
@@ -281,6 +290,7 @@ export const ESP32H4_UARTDEV_BUF_NO = 0x4087f580; // Variable in ROM .bss which
 export const ESP32H4_UARTDEV_BUF_NO_USB_JTAG_SERIAL = 3; // The above var when USB-JTAG/Serial is used
 export const ESP32H21_SPI_REG_BASE = 0x60003000;
 export const ESP32H21_BASEFUSEADDR = 0x600b4000;
+export const ESP32H21_EFUSE_BLOCK1_ADDR = ESP32H21_BASEFUSEADDR + 0x044;
 export const ESP32H21_MACFUSEADDR = 0x600b4000 + 0x044;
 export const ESP32H21_SPI_USR_OFFS = 0x18;
 export const ESP32H21_SPI_USR1_OFFS = 0x1c;

package/dist/esp_loader.d.ts

@@ -84,9 +84,6 @@ export declare class ESPLoader extends EventTarget {
      * Detect chip type using GET_SECURITY_INFO (for newer chips) or magic value (for older chips)
      */
     detectChip(): Promise<void>;
-    /**
-     * Get chip revision for ESP32-P4
-     */
     getChipRevision(): Promise<number>;
     /**
      * Power on the flash chip for ESP32-P4 Rev 301 (ECO6)
@@ -113,16 +110,11 @@ export declare class ESPLoader extends EventTarget {
      * Reads data from the input stream and places it in the inputBuffer
      */
     readLoop(): Promise<void>;
-    sleep(ms?: number): Promise<unknown>;
     state_DTR: boolean;
     state_RTS: boolean;
     setRTS(state: boolean): Promise<void>;
     setDTR(state: boolean): Promise<void>;
     setDTRandRTS(dtr: boolean, rts: boolean): Promise<void>;
-    /**
-     * Helper function to run a sequence of signal changes
-     * Automatically detects WebUSB vs Web Serial and calls appropriate methods
-     */
     private runSignalSequence;
     /**
      * @name hardResetUSBJTAGSerial
@@ -190,27 +182,26 @@ export declare class ESPLoader extends EventTarget {
     connectWithResetStrategies(): Promise<void>;
     /**
      * @name watchdogReset
-     * Watchdog reset for ESP32-S2/S3/C3 with USB-OTG or USB-JTAG/Serial
+     * Watchdog reset for ESP32-S2/S3/P4 with USB-OTG or USB-JTAG/Serial
      * Uses RTC watchdog timer to reset the chip - works when DTR/RTS signals are not available
      * This is an alias for rtcWdtResetChipSpecific() for backwards compatibility
+     * Note: ESP32-C3, ESP32-C5, ESP32-C6 do NOT boot correctly after WDT reset
      */
     watchdogReset(): Promise<void>;
     /**
-     * Get chip revision for ESP32-C3
-     * Reads from EFUSE registers and calculates revision
-     */
-    getChipRevisionC3(): Promise<number>;
-    /**
-     * RTC watchdog timer reset for ESP32-S2, ESP32-S3, ESP32-C3, ESP32-C5, ESP32-C6, and ESP32-P4
+     * RTC watchdog timer reset for ESP32-S2, ESP32-S3, and ESP32-P4
      * Uses specific registers for each chip family
-     * Note: ESP32-H2 does NOT support WDT reset
+     * Note: ESP32-C3 does NOT boot correctly after WDT reset
+     * Note: ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2 do NOT support WDT reset (no usable RTC WDT path)
      */
     rtcWdtResetChipSpecific(): Promise<void>;
     /**
-     * Helper: USB-based WDT reset
-     * Returns true if WDT reset was performed, false otherwise
+     * Reset device from bootloader mode to firmware mode
+     * Automatically selects the correct reset strategy based on USB connection type
+     * @param clearForceDownloadFlag - If true, clears the force download boot flag (USB-OTG only)
+     * @returns true if port will change (USB-OTG), false otherwise
      */
-    private tryUsbWdtReset;
+    resetToFirmwareMode(clearForceDownloadFlag?: boolean): Promise<boolean>;
     hardReset(bootloader?: boolean): Promise<void>;
     /**
      * @name macAddr
@@ -258,8 +249,8 @@ export declare class ESPLoader extends EventTarget {
     checksum(data: number[], state?: number): number;
     getC5CrystalFreqRomExpect(): Promise<number>;
     getC5CrystalFreqDetected(): Promise<number>;
-    private setBaudrateC5Rom;
     setBaudrate(baud: number): Promise<void>;
+    private setBaudrateC5Rom;
     reconfigurePort(baud: number): Promise<void>;
     /**
      * @name syncWithTimeout
@@ -355,10 +346,6 @@ export declare class ESPLoader extends EventTarget {
     private get _writeChain();
     private set _writeChain(value);
     writeToStream(data: number[]): Promise<void>;
-    getUsbMode(): Promise<{
-        mode: "uart" | "usb-jtag-serial" | "usb-otg";
-        uartNo: number;
-    }>;
     disconnect(): Promise<void>;
     /**
      * @name releaseReaderWriter
@@ -380,6 +367,22 @@ export declare class ESPLoader extends EventTarget {
      * @returns true if USB-JTAG or USB-OTG, false if external serial chip
      */
     detectUsbConnectionType(): Promise<boolean>;
+    getUsbMode(): Promise<{
+        mode: "uart" | "usb-jtag-serial" | "usb-otg";
+        uartNo: number;
+    }>;
+    /**
+     * Check if the current chip supports USB-JTAG or USB-OTG
+     * @returns true if chip has native USB support (JTAG or OTG)
+     */
+    supportsNativeUsb(): boolean;
+    /**
+     * @name _ensureStreamsReady
+     * After a hardware reset, ensure port streams are available.
+     * On WebUSB, recreates streams since they break after reset.
+     * On Web Serial, waits for streams to become available.
+     */
+    private _ensureStreamsReady;
     /**
      * @name enterConsoleMode
      * Prepare device for console mode by resetting to firmware
@@ -387,12 +390,6 @@ export declare class ESPLoader extends EventTarget {
      * @returns true if port was closed (USB-JTAG), false if port stays open (serial chip)
      */
     enterConsoleMode(): Promise<boolean>;
-    /**
-     * @name _resetToFirmwareIfNeeded
-     * Reset device from bootloader to firmware when switching to console mode
-     * Detects USB-JTAG/Serial and USB-OTG devices and performs appropriate reset
-     * @returns true if reconnect was performed, false otherwise
-     */
     /**
      * @name _clearForceDownloadBootIfNeeded
      * Read and clear the force download boot flag if it is set
@@ -401,6 +398,12 @@ export declare class ESPLoader extends EventTarget {
      * Returns true if the flag was cleared, false if it was already clear
      */
     private _clearForceDownloadBootIfNeeded;
+    /**
+     * @name _resetToFirmwareIfNeeded
+     * Reset device from bootloader to firmware when switching to console mode
+     * Detects USB-JTAG/Serial and USB-OTG devices and performs appropriate reset
+     * @returns true if reconnect was performed, false otherwise
+     */
     private _resetToFirmwareIfNeeded;
     /**
      * @name reconnectAndResume
@@ -436,6 +439,15 @@ export declare class ESPLoader extends EventTarget {
      * This is a hardware limitation - use isConsoleResetSupported() to check first.
      */
     resetInConsoleMode(): Promise<void>;
+    /**
+     * @name syncAndWdtReset
+     * Open a new bootloader port, sync with ROM (no stub, no reset strategies), and fire WDT reset.
+     * This is used for ESP32-S2 USB-OTG devices which require WDT reset to switch modes.
+     * After WDT reset the port will re-enumerate again.
+     * The user must select the new port after this method is called.
+     * @param newPort - The bootloader port selected by the user
+     */
+    syncAndWdtReset(newPort: SerialPort): Promise<void>;
     /**
      * @name drainInputBuffer
      * Actively drain the input buffer by reading data for a specified time.