sliccy 3.40.1 → 3.40.3

package/dist/ui/assets/{esp32-z35G3TbR.js → esp32-BTVUAltJ.js}

@@ -1 +1 @@
-import{Jt as e}from"./main-BxzufWem.js";import{t}from"./rom-eeWiO07Z.js";var n=e({ESP32ROM:()=>r}),r=class extends t{constructor(){super(...arguments),this.CHIP_NAME=`ESP32`,this.IMAGE_CHIP_ID=0,this.EFUSE_RD_REG_BASE=1073061888,this.DR_REG_SYSCON_BASE=1073111040,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612856,this.XTAL_CLK_DIVIDER=1,this.IROM_MAP_START=1074593792,this.IROM_MAP_END=1077936128,this.DROM_MAP_START=1061158912,this.DROM_MAP_END=1065353216,this.MEMORY_MAP=[[0,65536,`PADDING`],[1061158912,1065353216,`DROM`],[1065353216,1069547520,`EXTRAM_DATA`],[1073217536,1073225728,`RTC_DRAM`],[1073283072,1073741824,`BYTE_ACCESSIBLE`],[1073405952,1073741824,`DRAM`],[1073610752,1073741820,`DIRAM_DRAM`],[1073741824,1074200576,`IROM`],[1074200576,1074233344,`CACHE_PRO`],[1074233344,1074266112,`CACHE_APP`],[1074266112,1074397184,`IRAM`],[1074397184,1074528252,`DIRAM_IRAM`],[1074528256,1074536448,`RTC_IRAM`],[1074593792,1077936128,`IROM`],[1342177280,1342185472,`RTC_DATA`]],this.FLASH_SIZES={"1MB":0,"2MB":16,"4MB":32,"8MB":48,"16MB":64,"32MB":80,"64MB":96,"128MB":112},this.FLASH_FREQUENCY={"80m":15,"40m":0,"26m":1,"20m":2},this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=4096,this.SPI_REG_BASE=1072963584,this.SPI_USR_OFFS=28,this.SPI_USR1_OFFS=32,this.SPI_USR2_OFFS=36,this.SPI_W0_OFFS=128,this.SPI_MOSI_DLEN_OFFS=40,this.SPI_MISO_DLEN_OFFS=44}async readEfuse(e,t){let n=this.EFUSE_RD_REG_BASE+4*t;return e.debug(`Read efuse `+n),await e.readReg(n)}async getPkgVersion(e){let t=await this.readEfuse(e,3),n=t>>9&7;return n+=(t>>2&1)<<3,n}async getChipRevision(e){let t=await this.readEfuse(e,3),n=await this.readEfuse(e,5),r=await e.readReg(this.DR_REG_SYSCON_BASE+124),i=t>>15&1,a=n>>20&1,o=r>>31&1;return i==0?0:a==0?1:o==0?2:3}async getChipDescription(e){let t=[`ESP32-D0WDQ6`,`ESP32-D0WD`,`ESP32-D2WD`,``,`ESP32-U4WDH`,`ESP32-PICO-D4`,`ESP32-PICO-V3-02`],n=``,r=await this.getPkgVersion(e),i=await this.getChipRevision(e),a=i==3;return await this.readEfuse(e,3)&1&&(t[0]=`ESP32-S0WDQ6`,t[1]=`ESP32-S0WD`),a&&(t[5]=`ESP32-PICO-V3`),n=r>=0&&r<=6?t[r]:`Unknown ESP32`,a&&(r===0||r===1)&&(n+=`-V3`),n+` (revision `+i+`)`}async getChipFeatures(e){let t=[`Wi-Fi`],n=await this.readEfuse(e,3);n&2||t.push(` BT`),n&1?t.push(` Single Core`):t.push(` Dual Core`),n&8192&&(n&4096?t.push(` 160MHz`):t.push(` 240MHz`));let r=await this.getPkgVersion(e);[2,4,5,6].indexOf(r)!==-1&&t.push(` Embedded Flash`),r===6&&t.push(` Embedded PSRAM`),await this.readEfuse(e,4)>>8&31&&t.push(` VRef calibration in efuse`),n>>14&1&&t.push(` BLK3 partially reserved`);let i=await this.readEfuse(e,6)&3;return t.push(` Coding Scheme `+[`None`,`3/4`,`Repeat (UNSUPPORTED)`,`Invalid`][i]),t}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await this.readEfuse(e,1);t>>>=0;let n=await this.readEfuse(e,2);n>>>=0;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}};export{n,r as t};
+import{r as e}from"./chunk-CMxvf4Kt.js";import{t}from"./rom-eeWiO07Z.js";var n=e({ESP32ROM:()=>r}),r=class extends t{constructor(){super(...arguments),this.CHIP_NAME=`ESP32`,this.IMAGE_CHIP_ID=0,this.EFUSE_RD_REG_BASE=1073061888,this.DR_REG_SYSCON_BASE=1073111040,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612856,this.XTAL_CLK_DIVIDER=1,this.IROM_MAP_START=1074593792,this.IROM_MAP_END=1077936128,this.DROM_MAP_START=1061158912,this.DROM_MAP_END=1065353216,this.MEMORY_MAP=[[0,65536,`PADDING`],[1061158912,1065353216,`DROM`],[1065353216,1069547520,`EXTRAM_DATA`],[1073217536,1073225728,`RTC_DRAM`],[1073283072,1073741824,`BYTE_ACCESSIBLE`],[1073405952,1073741824,`DRAM`],[1073610752,1073741820,`DIRAM_DRAM`],[1073741824,1074200576,`IROM`],[1074200576,1074233344,`CACHE_PRO`],[1074233344,1074266112,`CACHE_APP`],[1074266112,1074397184,`IRAM`],[1074397184,1074528252,`DIRAM_IRAM`],[1074528256,1074536448,`RTC_IRAM`],[1074593792,1077936128,`IROM`],[1342177280,1342185472,`RTC_DATA`]],this.FLASH_SIZES={"1MB":0,"2MB":16,"4MB":32,"8MB":48,"16MB":64,"32MB":80,"64MB":96,"128MB":112},this.FLASH_FREQUENCY={"80m":15,"40m":0,"26m":1,"20m":2},this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=4096,this.SPI_REG_BASE=1072963584,this.SPI_USR_OFFS=28,this.SPI_USR1_OFFS=32,this.SPI_USR2_OFFS=36,this.SPI_W0_OFFS=128,this.SPI_MOSI_DLEN_OFFS=40,this.SPI_MISO_DLEN_OFFS=44}async readEfuse(e,t){let n=this.EFUSE_RD_REG_BASE+4*t;return e.debug(`Read efuse `+n),await e.readReg(n)}async getPkgVersion(e){let t=await this.readEfuse(e,3),n=t>>9&7;return n+=(t>>2&1)<<3,n}async getChipRevision(e){let t=await this.readEfuse(e,3),n=await this.readEfuse(e,5),r=await e.readReg(this.DR_REG_SYSCON_BASE+124),i=t>>15&1,a=n>>20&1,o=r>>31&1;return i==0?0:a==0?1:o==0?2:3}async getChipDescription(e){let t=[`ESP32-D0WDQ6`,`ESP32-D0WD`,`ESP32-D2WD`,``,`ESP32-U4WDH`,`ESP32-PICO-D4`,`ESP32-PICO-V3-02`],n=``,r=await this.getPkgVersion(e),i=await this.getChipRevision(e),a=i==3;return await this.readEfuse(e,3)&1&&(t[0]=`ESP32-S0WDQ6`,t[1]=`ESP32-S0WD`),a&&(t[5]=`ESP32-PICO-V3`),n=r>=0&&r<=6?t[r]:`Unknown ESP32`,a&&(r===0||r===1)&&(n+=`-V3`),n+` (revision `+i+`)`}async getChipFeatures(e){let t=[`Wi-Fi`],n=await this.readEfuse(e,3);n&2||t.push(` BT`),n&1?t.push(` Single Core`):t.push(` Dual Core`),n&8192&&(n&4096?t.push(` 160MHz`):t.push(` 240MHz`));let r=await this.getPkgVersion(e);[2,4,5,6].indexOf(r)!==-1&&t.push(` Embedded Flash`),r===6&&t.push(` Embedded PSRAM`),await this.readEfuse(e,4)>>8&31&&t.push(` VRef calibration in efuse`),n>>14&1&&t.push(` BLK3 partially reserved`);let i=await this.readEfuse(e,6)&3;return t.push(` Coding Scheme `+[`None`,`3/4`,`Repeat (UNSUPPORTED)`,`Invalid`][i]),t}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await this.readEfuse(e,1);t>>>=0;let n=await this.readEfuse(e,2);n>>>=0;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}};export{n,r as t};

package/dist/ui/assets/esp32-CatgC_Vd.js

@@ -0,0 +1 @@
+import{n as e}from"./chunk-aKtaBQYM.js";import{t}from"./rom-eeWiO07Z.js";var n=e({ESP32ROM:()=>r}),r=class extends t{constructor(){super(...arguments),this.CHIP_NAME=`ESP32`,this.IMAGE_CHIP_ID=0,this.EFUSE_RD_REG_BASE=1073061888,this.DR_REG_SYSCON_BASE=1073111040,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612856,this.XTAL_CLK_DIVIDER=1,this.IROM_MAP_START=1074593792,this.IROM_MAP_END=1077936128,this.DROM_MAP_START=1061158912,this.DROM_MAP_END=1065353216,this.MEMORY_MAP=[[0,65536,`PADDING`],[1061158912,1065353216,`DROM`],[1065353216,1069547520,`EXTRAM_DATA`],[1073217536,1073225728,`RTC_DRAM`],[1073283072,1073741824,`BYTE_ACCESSIBLE`],[1073405952,1073741824,`DRAM`],[1073610752,1073741820,`DIRAM_DRAM`],[1073741824,1074200576,`IROM`],[1074200576,1074233344,`CACHE_PRO`],[1074233344,1074266112,`CACHE_APP`],[1074266112,1074397184,`IRAM`],[1074397184,1074528252,`DIRAM_IRAM`],[1074528256,1074536448,`RTC_IRAM`],[1074593792,1077936128,`IROM`],[1342177280,1342185472,`RTC_DATA`]],this.FLASH_SIZES={"1MB":0,"2MB":16,"4MB":32,"8MB":48,"16MB":64,"32MB":80,"64MB":96,"128MB":112},this.FLASH_FREQUENCY={"80m":15,"40m":0,"26m":1,"20m":2},this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=4096,this.SPI_REG_BASE=1072963584,this.SPI_USR_OFFS=28,this.SPI_USR1_OFFS=32,this.SPI_USR2_OFFS=36,this.SPI_W0_OFFS=128,this.SPI_MOSI_DLEN_OFFS=40,this.SPI_MISO_DLEN_OFFS=44}async readEfuse(e,t){let n=this.EFUSE_RD_REG_BASE+4*t;return e.debug(`Read efuse `+n),await e.readReg(n)}async getPkgVersion(e){let t=await this.readEfuse(e,3),n=t>>9&7;return n+=(t>>2&1)<<3,n}async getChipRevision(e){let t=await this.readEfuse(e,3),n=await this.readEfuse(e,5),r=await e.readReg(this.DR_REG_SYSCON_BASE+124),i=t>>15&1,a=n>>20&1,o=r>>31&1;return i==0?0:a==0?1:o==0?2:3}async getChipDescription(e){let t=[`ESP32-D0WDQ6`,`ESP32-D0WD`,`ESP32-D2WD`,``,`ESP32-U4WDH`,`ESP32-PICO-D4`,`ESP32-PICO-V3-02`],n=``,r=await this.getPkgVersion(e),i=await this.getChipRevision(e),a=i==3;return await this.readEfuse(e,3)&1&&(t[0]=`ESP32-S0WDQ6`,t[1]=`ESP32-S0WD`),a&&(t[5]=`ESP32-PICO-V3`),n=r>=0&&r<=6?t[r]:`Unknown ESP32`,a&&(r===0||r===1)&&(n+=`-V3`),n+` (revision `+i+`)`}async getChipFeatures(e){let t=[`Wi-Fi`],n=await this.readEfuse(e,3);n&2||t.push(` BT`),n&1?t.push(` Single Core`):t.push(` Dual Core`),n&8192&&(n&4096?t.push(` 160MHz`):t.push(` 240MHz`));let r=await this.getPkgVersion(e);[2,4,5,6].indexOf(r)!==-1&&t.push(` Embedded Flash`),r===6&&t.push(` Embedded PSRAM`),await this.readEfuse(e,4)>>8&31&&t.push(` VRef calibration in efuse`),n>>14&1&&t.push(` BLK3 partially reserved`);let i=await this.readEfuse(e,6)&3;return t.push(` Coding Scheme `+[`None`,`3/4`,`Repeat (UNSUPPORTED)`,`Invalid`][i]),t}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await this.readEfuse(e,1);t>>>=0;let n=await this.readEfuse(e,2);n>>>=0;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}};export{n,r as t};

package/dist/ui/assets/{esp32c2-gLxOsZif.js → esp32c2-CpROmlB0.js}

@@ -1 +1 @@
-import{t as e}from"./esp32c3-CtBZCzN8.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C2`,this.IMAGE_CHIP_ID=12,this.EFUSE_BASE=1610647552,this.MAC_EFUSE_REG=this.EFUSE_BASE+64,this.UART_CLKDIV_REG=1610612756,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.XTAL_CLK_DIVIDER=1,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1111490560,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1010827264,`DROM`],[1070202880,1070465024,`DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1072693248,1073020928,`DROM_MASK`],[1073741824,1074331648,`IROM_MASK`],[1107296256,1111490560,`IROM`],[1077395456,1077673984,`IRAM`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+64+4;return await e.readReg(t)>>22&7}async getChipRevision(e){let t=this.EFUSE_BASE+64+4;return(await e.readReg(t)&3<<20)>>20}async getChipDescription(e){let t,n=await this.getPkgVersion(e);t=n===0||n===1?`ESP32-C2`:`unknown ESP32-C2`;let r=await this.getChipRevision(e);return t+=` (revision `+r+`)`,t}async getChipFeatures(e){return[`Wi-Fi`,`BLE`]}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}async changeBaudRate(e){await this.getCrystalFreq(e)===26&&e.changeBaud()}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32C2ROM};
+import{t as e}from"./esp32c3-heViyR1Q.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C2`,this.IMAGE_CHIP_ID=12,this.EFUSE_BASE=1610647552,this.MAC_EFUSE_REG=this.EFUSE_BASE+64,this.UART_CLKDIV_REG=1610612756,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.XTAL_CLK_DIVIDER=1,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1111490560,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1010827264,`DROM`],[1070202880,1070465024,`DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1072693248,1073020928,`DROM_MASK`],[1073741824,1074331648,`IROM_MASK`],[1107296256,1111490560,`IROM`],[1077395456,1077673984,`IRAM`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+64+4;return await e.readReg(t)>>22&7}async getChipRevision(e){let t=this.EFUSE_BASE+64+4;return(await e.readReg(t)&3<<20)>>20}async getChipDescription(e){let t,n=await this.getPkgVersion(e);t=n===0||n===1?`ESP32-C2`:`unknown ESP32-C2`;let r=await this.getChipRevision(e);return t+=` (revision `+r+`)`,t}async getChipFeatures(e){return[`Wi-Fi`,`BLE`]}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}async changeBaudRate(e){await this.getCrystalFreq(e)===26&&e.changeBaud()}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32C2ROM};

package/dist/ui/assets/{esp32c2-pl5qy6El.js → esp32c2-Cvhq9547.js}

@@ -1 +1 @@
-import{t as e}from"./esp32c3-P3fd2u0V.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C2`,this.IMAGE_CHIP_ID=12,this.EFUSE_BASE=1610647552,this.MAC_EFUSE_REG=this.EFUSE_BASE+64,this.UART_CLKDIV_REG=1610612756,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.XTAL_CLK_DIVIDER=1,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1111490560,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1010827264,`DROM`],[1070202880,1070465024,`DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1072693248,1073020928,`DROM_MASK`],[1073741824,1074331648,`IROM_MASK`],[1107296256,1111490560,`IROM`],[1077395456,1077673984,`IRAM`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+64+4;return await e.readReg(t)>>22&7}async getChipRevision(e){let t=this.EFUSE_BASE+64+4;return(await e.readReg(t)&3<<20)>>20}async getChipDescription(e){let t,n=await this.getPkgVersion(e);t=n===0||n===1?`ESP32-C2`:`unknown ESP32-C2`;let r=await this.getChipRevision(e);return t+=` (revision `+r+`)`,t}async getChipFeatures(e){return[`Wi-Fi`,`BLE`]}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}async changeBaudRate(e){await this.getCrystalFreq(e)===26&&e.changeBaud()}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32C2ROM};
+import{t as e}from"./esp32c3-D9lOBWYZ.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C2`,this.IMAGE_CHIP_ID=12,this.EFUSE_BASE=1610647552,this.MAC_EFUSE_REG=this.EFUSE_BASE+64,this.UART_CLKDIV_REG=1610612756,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.XTAL_CLK_DIVIDER=1,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1111490560,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1010827264,`DROM`],[1070202880,1070465024,`DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1072693248,1073020928,`DROM_MASK`],[1073741824,1074331648,`IROM_MASK`],[1107296256,1111490560,`IROM`],[1077395456,1077673984,`IRAM`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+64+4;return await e.readReg(t)>>22&7}async getChipRevision(e){let t=this.EFUSE_BASE+64+4;return(await e.readReg(t)&3<<20)>>20}async getChipDescription(e){let t,n=await this.getPkgVersion(e);t=n===0||n===1?`ESP32-C2`:`unknown ESP32-C2`;let r=await this.getChipRevision(e);return t+=` (revision `+r+`)`,t}async getChipFeatures(e){return[`Wi-Fi`,`BLE`]}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}async changeBaudRate(e){await this.getCrystalFreq(e)===26&&e.changeBaud()}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32C2ROM};

package/dist/ui/assets/{esp32c3-P3fd2u0V.js → esp32c3-D9lOBWYZ.js}

@@ -1 +1 @@
-import{Jt as e}from"./main-BxzufWem.js";import{t}from"./esp32-z35G3TbR.js";var n=e({ESP32C3ROM:()=>r}),r=class extends t{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C3`,this.IMAGE_CHIP_ID=5,this.EFUSE_BASE=1610647552,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1015021568,`DROM`],[1070071808,1070465024,`DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1072693248,1072824320,`DROM_MASK`],[1073741824,1074135040,`IROM_MASK`],[1107296256,1115684864,`IROM`],[1077395456,1077805056,`IRAM`],[1342177280,1342185472,`RTC_IRAM`],[1342177280,1342185472,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>21&7}async getChipRevision(e){let t=this.EFUSE_BASE+68+12;return(await e.readReg(t)&7<<18)>>18}async getMinorChipVersion(e){let t=this.EFUSE_BASE+68+20,n=await e.readReg(t)>>23&1,r=this.EFUSE_BASE+68+12,i=await e.readReg(r)>>18&7;return(n<<3)+i}async getMajorChipVersion(e){let t=this.EFUSE_BASE+68+20;return await e.readReg(t)>>24&3}async getChipDescription(e){let t={0:`ESP32-C3 (QFN32)`,1:`ESP8685 (QFN28)`,2:`ESP32-C3 AZ (QFN32)`,3:`ESP8686 (QFN24)`},n=await this.getPkgVersion(e),r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${t[n]||`Unknown ESP32-C3`} (revision v${r}.${i})`}async getFlashCap(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>27&7}async getFlashVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`XMC`,2:`GD`,3:`FM`,4:`TT`,5:`ZBIT`}[await e.readReg(t)>>0&7]||``}async getChipFeatures(e){let t=[`Wi-Fi`,`BLE`],n={0:null,1:`Embedded Flash 4MB`,2:`Embedded Flash 2MB`,3:`Embedded Flash 1MB`,4:`Embedded Flash 8MB`},r=await this.getFlashCap(e),i=await this.getFlashVendor(e),a=n[r],o=a===void 0?`Unknown Embedded Flash`:a;return a!==null&&t.push(`${o} (${i})`),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{n,r as t};
+import{r as e}from"./chunk-CMxvf4Kt.js";import{t}from"./esp32-BTVUAltJ.js";var n=e({ESP32C3ROM:()=>r}),r=class extends t{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C3`,this.IMAGE_CHIP_ID=5,this.EFUSE_BASE=1610647552,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1015021568,`DROM`],[1070071808,1070465024,`DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1072693248,1072824320,`DROM_MASK`],[1073741824,1074135040,`IROM_MASK`],[1107296256,1115684864,`IROM`],[1077395456,1077805056,`IRAM`],[1342177280,1342185472,`RTC_IRAM`],[1342177280,1342185472,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>21&7}async getChipRevision(e){let t=this.EFUSE_BASE+68+12;return(await e.readReg(t)&7<<18)>>18}async getMinorChipVersion(e){let t=this.EFUSE_BASE+68+20,n=await e.readReg(t)>>23&1,r=this.EFUSE_BASE+68+12,i=await e.readReg(r)>>18&7;return(n<<3)+i}async getMajorChipVersion(e){let t=this.EFUSE_BASE+68+20;return await e.readReg(t)>>24&3}async getChipDescription(e){let t={0:`ESP32-C3 (QFN32)`,1:`ESP8685 (QFN28)`,2:`ESP32-C3 AZ (QFN32)`,3:`ESP8686 (QFN24)`},n=await this.getPkgVersion(e),r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${t[n]||`Unknown ESP32-C3`} (revision v${r}.${i})`}async getFlashCap(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>27&7}async getFlashVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`XMC`,2:`GD`,3:`FM`,4:`TT`,5:`ZBIT`}[await e.readReg(t)>>0&7]||``}async getChipFeatures(e){let t=[`Wi-Fi`,`BLE`],n={0:null,1:`Embedded Flash 4MB`,2:`Embedded Flash 2MB`,3:`Embedded Flash 1MB`,4:`Embedded Flash 8MB`},r=await this.getFlashCap(e),i=await this.getFlashVendor(e),a=n[r],o=a===void 0?`Unknown Embedded Flash`:a;return a!==null&&t.push(`${o} (${i})`),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{n,r as t};

package/dist/ui/assets/esp32c3-heViyR1Q.js

@@ -0,0 +1 @@
+import{n as e}from"./chunk-aKtaBQYM.js";import{t}from"./esp32-CatgC_Vd.js";var n=e({ESP32C3ROM:()=>r}),r=class extends t{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C3`,this.IMAGE_CHIP_ID=5,this.EFUSE_BASE=1610647552,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1015021568,`DROM`],[1070071808,1070465024,`DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1072693248,1072824320,`DROM_MASK`],[1073741824,1074135040,`IROM_MASK`],[1107296256,1115684864,`IROM`],[1077395456,1077805056,`IRAM`],[1342177280,1342185472,`RTC_IRAM`],[1342177280,1342185472,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>21&7}async getChipRevision(e){let t=this.EFUSE_BASE+68+12;return(await e.readReg(t)&7<<18)>>18}async getMinorChipVersion(e){let t=this.EFUSE_BASE+68+20,n=await e.readReg(t)>>23&1,r=this.EFUSE_BASE+68+12,i=await e.readReg(r)>>18&7;return(n<<3)+i}async getMajorChipVersion(e){let t=this.EFUSE_BASE+68+20;return await e.readReg(t)>>24&3}async getChipDescription(e){let t={0:`ESP32-C3 (QFN32)`,1:`ESP8685 (QFN28)`,2:`ESP32-C3 AZ (QFN32)`,3:`ESP8686 (QFN24)`},n=await this.getPkgVersion(e),r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${t[n]||`Unknown ESP32-C3`} (revision v${r}.${i})`}async getFlashCap(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>27&7}async getFlashVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`XMC`,2:`GD`,3:`FM`,4:`TT`,5:`ZBIT`}[await e.readReg(t)>>0&7]||``}async getChipFeatures(e){let t=[`Wi-Fi`,`BLE`],n={0:null,1:`Embedded Flash 4MB`,2:`Embedded Flash 2MB`,3:`Embedded Flash 1MB`,4:`Embedded Flash 8MB`},r=await this.getFlashCap(e),i=await this.getFlashVendor(e),a=n[r],o=a===void 0?`Unknown Embedded Flash`:a;return a!==null&&t.push(`${o} (${i})`),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{n,r as t};

package/dist/ui/assets/{esp32c5-B1WV7eXo.js → esp32c5-D2poFXyG.js}

@@ -1 +1 @@
-import{ESP32C6ROM as e}from"./esp32c6-roW5XaV9.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C5`,this.IMAGE_CHIP_ID=23,this.BOOTLOADER_FLASH_OFFSET=8192,this.EFUSE_BASE=1611352064,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1610612756,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG=this.EFUSE_BASE+52,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT=10,this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY=2,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=22,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=27,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=5,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=10,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=15,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1140850688,this.DROM_MAP_START=1107296256,this.DROM_MAP_END=1140850688,this.PCR_SYSCLK_CONF_REG=1611227408,this.PCR_SYSCLK_XTAL_FREQ_V=127<<24,this.PCR_SYSCLK_XTAL_FREQ_S=24,this.XTAL_CLK_DIVIDER=1,this.UARTDEV_BUF_NO=1082520852,this.CHIP_DETECT_MAGIC_VALUE=[285294703,1675706479,1607549039],this.FLASH_FREQUENCY={"80m":15,"40m":0,"20m":2},this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1140850688,`DROM`],[1082130432,1082523648,`DRAM`],[1082130432,1082523648,`BYTE_ACCESSIBLE`],[1073979392,1074003968,`DROM_MASK`],[1073741824,1073979392,`IROM_MASK`],[1107296256,1140850688,`IROM`],[1082130432,1082523648,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=4145808195,this.EFUSE_MAX_KEY=5,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`,15:`XTS_AES_128_PSRAM_KEY`,16:`ECDSA_KEY_P192`,17:`ECDSA_KEY_P384_L`,18:`ECDSA_KEY_P384_H`}}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>26&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>0&15}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>4&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-C5`:`unknown ESP32-C5`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`Wi-Fi 6 (dual-band)`,`BT 5 (LE)`,`IEEE802.15.4`,`Single Core + LP Core`,`240MHz`]}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>45?48:n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}async getCrystalFreqRomExpect(e){return(await e.readReg(this.PCR_SYSCLK_CONF_REG)&this.PCR_SYSCLK_XTAL_FREQ_V)>>this.PCR_SYSCLK_XTAL_FREQ_S}async getKeyBlockPurpose(e,t){if(t<0||t>this.EFUSE_MAX_KEY)throw Error(`Valid key block numbers must be in range 0-${this.EFUSE_MAX_KEY}`);let[n,r]=[[this.EFUSE_PURPOSE_KEY0_REG,this.EFUSE_PURPOSE_KEY0_SHIFT],[this.EFUSE_PURPOSE_KEY1_REG,this.EFUSE_PURPOSE_KEY1_SHIFT],[this.EFUSE_PURPOSE_KEY2_REG,this.EFUSE_PURPOSE_KEY2_SHIFT],[this.EFUSE_PURPOSE_KEY3_REG,this.EFUSE_PURPOSE_KEY3_SHIFT],[this.EFUSE_PURPOSE_KEY4_REG,this.EFUSE_PURPOSE_KEY4_SHIFT],[this.EFUSE_PURPOSE_KEY5_REG,this.EFUSE_PURPOSE_KEY5_SHIFT]][t];return await e.readReg(n)>>r&31}async isFlashEncryptionKeyValid(e){let t=[];for(let n=0;n<=this.EFUSE_MAX_KEY;n++){let r=await this.getKeyBlockPurpose(e,n);t.push(r)}return t.some(e=>e===this.PURPOSE_VAL_XTS_AES128_KEY)?!0:(await e.readReg(this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG)>>this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT&this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY)!==0}checkSpiConnection(e,t){if(!t.every(e=>e>=0&&e<=28))throw Error(`SPI Pin numbers must be in the range 0-28.`);t.some(e=>e===13||e===14)&&e.info(`GPIO pins 13 and 14 are used by USB-Serial/JTAG, consider using other pins for SPI flash connection.`)}async usesUsbJtagSerial(e){let t=this.UARTDEV_BUF_NO;return(await e.readReg(t)&255)==3}async watchdogReset(e){throw e.info(`Hard resetting with a watchdog...`),Error(`watchdogReset not yet implemented for ESP32-C5`)}async changeBaud(e){if(!e.IS_STUB){let t=await this.getCrystalFreqRomExpect(e),n=await this.getCrystalFreq(e);e.info(`ROM expects crystal freq: ${t} MHz, detected ${n} MHz.`),(n===48&&t===40||n===40&&t===48)&&e.info(`Crystal frequency mismatch detected. Baud rate adjustment may be needed but is not fully implemented in this version.`)}await e.changeBaud()}};export{t as ESP32C5ROM};
+import{ESP32C6ROM as e}from"./esp32c6-Ct3LxBMw.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C5`,this.IMAGE_CHIP_ID=23,this.BOOTLOADER_FLASH_OFFSET=8192,this.EFUSE_BASE=1611352064,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1610612756,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG=this.EFUSE_BASE+52,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT=10,this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY=2,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=22,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=27,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=5,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=10,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=15,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1140850688,this.DROM_MAP_START=1107296256,this.DROM_MAP_END=1140850688,this.PCR_SYSCLK_CONF_REG=1611227408,this.PCR_SYSCLK_XTAL_FREQ_V=127<<24,this.PCR_SYSCLK_XTAL_FREQ_S=24,this.XTAL_CLK_DIVIDER=1,this.UARTDEV_BUF_NO=1082520852,this.CHIP_DETECT_MAGIC_VALUE=[285294703,1675706479,1607549039],this.FLASH_FREQUENCY={"80m":15,"40m":0,"20m":2},this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1140850688,`DROM`],[1082130432,1082523648,`DRAM`],[1082130432,1082523648,`BYTE_ACCESSIBLE`],[1073979392,1074003968,`DROM_MASK`],[1073741824,1073979392,`IROM_MASK`],[1107296256,1140850688,`IROM`],[1082130432,1082523648,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=4145808195,this.EFUSE_MAX_KEY=5,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`,15:`XTS_AES_128_PSRAM_KEY`,16:`ECDSA_KEY_P192`,17:`ECDSA_KEY_P384_L`,18:`ECDSA_KEY_P384_H`}}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>26&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>0&15}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>4&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-C5`:`unknown ESP32-C5`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`Wi-Fi 6 (dual-band)`,`BT 5 (LE)`,`IEEE802.15.4`,`Single Core + LP Core`,`240MHz`]}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>45?48:n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}async getCrystalFreqRomExpect(e){return(await e.readReg(this.PCR_SYSCLK_CONF_REG)&this.PCR_SYSCLK_XTAL_FREQ_V)>>this.PCR_SYSCLK_XTAL_FREQ_S}async getKeyBlockPurpose(e,t){if(t<0||t>this.EFUSE_MAX_KEY)throw Error(`Valid key block numbers must be in range 0-${this.EFUSE_MAX_KEY}`);let[n,r]=[[this.EFUSE_PURPOSE_KEY0_REG,this.EFUSE_PURPOSE_KEY0_SHIFT],[this.EFUSE_PURPOSE_KEY1_REG,this.EFUSE_PURPOSE_KEY1_SHIFT],[this.EFUSE_PURPOSE_KEY2_REG,this.EFUSE_PURPOSE_KEY2_SHIFT],[this.EFUSE_PURPOSE_KEY3_REG,this.EFUSE_PURPOSE_KEY3_SHIFT],[this.EFUSE_PURPOSE_KEY4_REG,this.EFUSE_PURPOSE_KEY4_SHIFT],[this.EFUSE_PURPOSE_KEY5_REG,this.EFUSE_PURPOSE_KEY5_SHIFT]][t];return await e.readReg(n)>>r&31}async isFlashEncryptionKeyValid(e){let t=[];for(let n=0;n<=this.EFUSE_MAX_KEY;n++){let r=await this.getKeyBlockPurpose(e,n);t.push(r)}return t.some(e=>e===this.PURPOSE_VAL_XTS_AES128_KEY)?!0:(await e.readReg(this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG)>>this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT&this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY)!==0}checkSpiConnection(e,t){if(!t.every(e=>e>=0&&e<=28))throw Error(`SPI Pin numbers must be in the range 0-28.`);t.some(e=>e===13||e===14)&&e.info(`GPIO pins 13 and 14 are used by USB-Serial/JTAG, consider using other pins for SPI flash connection.`)}async usesUsbJtagSerial(e){let t=this.UARTDEV_BUF_NO;return(await e.readReg(t)&255)==3}async watchdogReset(e){throw e.info(`Hard resetting with a watchdog...`),Error(`watchdogReset not yet implemented for ESP32-C5`)}async changeBaud(e){if(!e.IS_STUB){let t=await this.getCrystalFreqRomExpect(e),n=await this.getCrystalFreq(e);e.info(`ROM expects crystal freq: ${t} MHz, detected ${n} MHz.`),(n===48&&t===40||n===40&&t===48)&&e.info(`Crystal frequency mismatch detected. Baud rate adjustment may be needed but is not fully implemented in this version.`)}await e.changeBaud()}};export{t as ESP32C5ROM};

package/dist/ui/assets/{esp32c5-VtJmrubf.js → esp32c5-KJSqwo2Q.js}

@@ -1 +1 @@
-import{ESP32C6ROM as e}from"./esp32c6-B-u1dpSJ.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C5`,this.IMAGE_CHIP_ID=23,this.BOOTLOADER_FLASH_OFFSET=8192,this.EFUSE_BASE=1611352064,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1610612756,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG=this.EFUSE_BASE+52,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT=10,this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY=2,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=22,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=27,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=5,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=10,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=15,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1140850688,this.DROM_MAP_START=1107296256,this.DROM_MAP_END=1140850688,this.PCR_SYSCLK_CONF_REG=1611227408,this.PCR_SYSCLK_XTAL_FREQ_V=127<<24,this.PCR_SYSCLK_XTAL_FREQ_S=24,this.XTAL_CLK_DIVIDER=1,this.UARTDEV_BUF_NO=1082520852,this.CHIP_DETECT_MAGIC_VALUE=[285294703,1675706479,1607549039],this.FLASH_FREQUENCY={"80m":15,"40m":0,"20m":2},this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1140850688,`DROM`],[1082130432,1082523648,`DRAM`],[1082130432,1082523648,`BYTE_ACCESSIBLE`],[1073979392,1074003968,`DROM_MASK`],[1073741824,1073979392,`IROM_MASK`],[1107296256,1140850688,`IROM`],[1082130432,1082523648,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=4145808195,this.EFUSE_MAX_KEY=5,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`,15:`XTS_AES_128_PSRAM_KEY`,16:`ECDSA_KEY_P192`,17:`ECDSA_KEY_P384_L`,18:`ECDSA_KEY_P384_H`}}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>26&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>0&15}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>4&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-C5`:`unknown ESP32-C5`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`Wi-Fi 6 (dual-band)`,`BT 5 (LE)`,`IEEE802.15.4`,`Single Core + LP Core`,`240MHz`]}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>45?48:n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}async getCrystalFreqRomExpect(e){return(await e.readReg(this.PCR_SYSCLK_CONF_REG)&this.PCR_SYSCLK_XTAL_FREQ_V)>>this.PCR_SYSCLK_XTAL_FREQ_S}async getKeyBlockPurpose(e,t){if(t<0||t>this.EFUSE_MAX_KEY)throw Error(`Valid key block numbers must be in range 0-${this.EFUSE_MAX_KEY}`);let[n,r]=[[this.EFUSE_PURPOSE_KEY0_REG,this.EFUSE_PURPOSE_KEY0_SHIFT],[this.EFUSE_PURPOSE_KEY1_REG,this.EFUSE_PURPOSE_KEY1_SHIFT],[this.EFUSE_PURPOSE_KEY2_REG,this.EFUSE_PURPOSE_KEY2_SHIFT],[this.EFUSE_PURPOSE_KEY3_REG,this.EFUSE_PURPOSE_KEY3_SHIFT],[this.EFUSE_PURPOSE_KEY4_REG,this.EFUSE_PURPOSE_KEY4_SHIFT],[this.EFUSE_PURPOSE_KEY5_REG,this.EFUSE_PURPOSE_KEY5_SHIFT]][t];return await e.readReg(n)>>r&31}async isFlashEncryptionKeyValid(e){let t=[];for(let n=0;n<=this.EFUSE_MAX_KEY;n++){let r=await this.getKeyBlockPurpose(e,n);t.push(r)}return t.some(e=>e===this.PURPOSE_VAL_XTS_AES128_KEY)?!0:(await e.readReg(this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG)>>this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT&this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY)!==0}checkSpiConnection(e,t){if(!t.every(e=>e>=0&&e<=28))throw Error(`SPI Pin numbers must be in the range 0-28.`);t.some(e=>e===13||e===14)&&e.info(`GPIO pins 13 and 14 are used by USB-Serial/JTAG, consider using other pins for SPI flash connection.`)}async usesUsbJtagSerial(e){let t=this.UARTDEV_BUF_NO;return(await e.readReg(t)&255)==3}async watchdogReset(e){throw e.info(`Hard resetting with a watchdog...`),Error(`watchdogReset not yet implemented for ESP32-C5`)}async changeBaud(e){if(!e.IS_STUB){let t=await this.getCrystalFreqRomExpect(e),n=await this.getCrystalFreq(e);e.info(`ROM expects crystal freq: ${t} MHz, detected ${n} MHz.`),(n===48&&t===40||n===40&&t===48)&&e.info(`Crystal frequency mismatch detected. Baud rate adjustment may be needed but is not fully implemented in this version.`)}await e.changeBaud()}};export{t as ESP32C5ROM};
+import{ESP32C6ROM as e}from"./esp32c6-BMEnOhZ6.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C5`,this.IMAGE_CHIP_ID=23,this.BOOTLOADER_FLASH_OFFSET=8192,this.EFUSE_BASE=1611352064,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1610612756,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG=this.EFUSE_BASE+52,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT=10,this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY=2,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=22,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=27,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=5,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=10,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=15,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1140850688,this.DROM_MAP_START=1107296256,this.DROM_MAP_END=1140850688,this.PCR_SYSCLK_CONF_REG=1611227408,this.PCR_SYSCLK_XTAL_FREQ_V=127<<24,this.PCR_SYSCLK_XTAL_FREQ_S=24,this.XTAL_CLK_DIVIDER=1,this.UARTDEV_BUF_NO=1082520852,this.CHIP_DETECT_MAGIC_VALUE=[285294703,1675706479,1607549039],this.FLASH_FREQUENCY={"80m":15,"40m":0,"20m":2},this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1140850688,`DROM`],[1082130432,1082523648,`DRAM`],[1082130432,1082523648,`BYTE_ACCESSIBLE`],[1073979392,1074003968,`DROM_MASK`],[1073741824,1073979392,`IROM_MASK`],[1107296256,1140850688,`IROM`],[1082130432,1082523648,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=4145808195,this.EFUSE_MAX_KEY=5,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`,15:`XTS_AES_128_PSRAM_KEY`,16:`ECDSA_KEY_P192`,17:`ECDSA_KEY_P384_L`,18:`ECDSA_KEY_P384_H`}}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>26&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>0&15}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>4&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-C5`:`unknown ESP32-C5`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`Wi-Fi 6 (dual-band)`,`BT 5 (LE)`,`IEEE802.15.4`,`Single Core + LP Core`,`240MHz`]}async getCrystalFreq(e){let t=await e.readReg(this.UART_CLKDIV_REG)&this.UART_CLKDIV_MASK,n=e.transport.baudrate*t/1e6/this.XTAL_CLK_DIVIDER,r;return r=n>45?48:n>33?40:26,Math.abs(r-n)>1&&e.info(`WARNING: Unsupported crystal in use`),r}async getCrystalFreqRomExpect(e){return(await e.readReg(this.PCR_SYSCLK_CONF_REG)&this.PCR_SYSCLK_XTAL_FREQ_V)>>this.PCR_SYSCLK_XTAL_FREQ_S}async getKeyBlockPurpose(e,t){if(t<0||t>this.EFUSE_MAX_KEY)throw Error(`Valid key block numbers must be in range 0-${this.EFUSE_MAX_KEY}`);let[n,r]=[[this.EFUSE_PURPOSE_KEY0_REG,this.EFUSE_PURPOSE_KEY0_SHIFT],[this.EFUSE_PURPOSE_KEY1_REG,this.EFUSE_PURPOSE_KEY1_SHIFT],[this.EFUSE_PURPOSE_KEY2_REG,this.EFUSE_PURPOSE_KEY2_SHIFT],[this.EFUSE_PURPOSE_KEY3_REG,this.EFUSE_PURPOSE_KEY3_SHIFT],[this.EFUSE_PURPOSE_KEY4_REG,this.EFUSE_PURPOSE_KEY4_SHIFT],[this.EFUSE_PURPOSE_KEY5_REG,this.EFUSE_PURPOSE_KEY5_SHIFT]][t];return await e.readReg(n)>>r&31}async isFlashEncryptionKeyValid(e){let t=[];for(let n=0;n<=this.EFUSE_MAX_KEY;n++){let r=await this.getKeyBlockPurpose(e,n);t.push(r)}return t.some(e=>e===this.PURPOSE_VAL_XTS_AES128_KEY)?!0:(await e.readReg(this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG)>>this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT&this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY)!==0}checkSpiConnection(e,t){if(!t.every(e=>e>=0&&e<=28))throw Error(`SPI Pin numbers must be in the range 0-28.`);t.some(e=>e===13||e===14)&&e.info(`GPIO pins 13 and 14 are used by USB-Serial/JTAG, consider using other pins for SPI flash connection.`)}async usesUsbJtagSerial(e){let t=this.UARTDEV_BUF_NO;return(await e.readReg(t)&255)==3}async watchdogReset(e){throw e.info(`Hard resetting with a watchdog...`),Error(`watchdogReset not yet implemented for ESP32-C5`)}async changeBaud(e){if(!e.IS_STUB){let t=await this.getCrystalFreqRomExpect(e),n=await this.getCrystalFreq(e);e.info(`ROM expects crystal freq: ${t} MHz, detected ${n} MHz.`),(n===48&&t===40||n===40&&t===48)&&e.info(`Crystal frequency mismatch detected. Baud rate adjustment may be needed but is not fully implemented in this version.`)}await e.changeBaud()}};export{t as ESP32C5ROM};

package/dist/ui/assets/{esp32c6-B-u1dpSJ.js → esp32c6-BMEnOhZ6.js}

@@ -1 +1 @@
-import{t as e}from"./esp32c3-CtBZCzN8.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C6`,this.IMAGE_CHIP_ID=13,this.EFUSE_BASE=1611335680,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1124073472,`DROM`],[1082130432,1082654720,`DRAM`],[1082130432,1082654720,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1107296256,1124073472,`IROM`],[1082130432,1082654720,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>21&7}async getChipRevision(e){let t=this.EFUSE_BASE+68+12;return(await e.readReg(t)&7<<18)>>18}async getChipDescription(e){let t;t=await this.getPkgVersion(e)===0?`ESP32-C6`:`unknown ESP32-C6`;let n=await this.getChipRevision(e);return t+=` (revision `+n+`)`,t}async getChipFeatures(e){return[`Wi-Fi 6`,`BT 5`,`IEEE802.15.4`]}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32C6ROM};
+import{t as e}from"./esp32c3-heViyR1Q.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C6`,this.IMAGE_CHIP_ID=13,this.EFUSE_BASE=1611335680,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1124073472,`DROM`],[1082130432,1082654720,`DRAM`],[1082130432,1082654720,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1107296256,1124073472,`IROM`],[1082130432,1082654720,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>21&7}async getChipRevision(e){let t=this.EFUSE_BASE+68+12;return(await e.readReg(t)&7<<18)>>18}async getChipDescription(e){let t;t=await this.getPkgVersion(e)===0?`ESP32-C6`:`unknown ESP32-C6`;let n=await this.getChipRevision(e);return t+=` (revision `+n+`)`,t}async getChipFeatures(e){return[`Wi-Fi 6`,`BT 5`,`IEEE802.15.4`]}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32C6ROM};

package/dist/ui/assets/{esp32c6-roW5XaV9.js → esp32c6-Ct3LxBMw.js}

@@ -1 +1 @@
-import{t as e}from"./esp32c3-P3fd2u0V.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C6`,this.IMAGE_CHIP_ID=13,this.EFUSE_BASE=1611335680,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1124073472,`DROM`],[1082130432,1082654720,`DRAM`],[1082130432,1082654720,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1107296256,1124073472,`IROM`],[1082130432,1082654720,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>21&7}async getChipRevision(e){let t=this.EFUSE_BASE+68+12;return(await e.readReg(t)&7<<18)>>18}async getChipDescription(e){let t;t=await this.getPkgVersion(e)===0?`ESP32-C6`:`unknown ESP32-C6`;let n=await this.getChipRevision(e);return t+=` (revision `+n+`)`,t}async getChipFeatures(e){return[`Wi-Fi 6`,`BT 5`,`IEEE802.15.4`]}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32C6ROM};
+import{t as e}from"./esp32c3-D9lOBWYZ.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C6`,this.IMAGE_CHIP_ID=13,this.EFUSE_BASE=1611335680,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1124073472,`DROM`],[1082130432,1082654720,`DRAM`],[1082130432,1082654720,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1107296256,1124073472,`IROM`],[1082130432,1082654720,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>21&7}async getChipRevision(e){let t=this.EFUSE_BASE+68+12;return(await e.readReg(t)&7<<18)>>18}async getChipDescription(e){let t;t=await this.getPkgVersion(e)===0?`ESP32-C6`:`unknown ESP32-C6`;let n=await this.getChipRevision(e);return t+=` (revision `+n+`)`,t}async getChipFeatures(e){return[`Wi-Fi 6`,`BT 5`,`IEEE802.15.4`]}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32C6ROM};

package/dist/ui/assets/{esp32c61-BEqxfS6j.js → esp32c61-BsudQf3e.js}

@@ -1 +1 @@
-import{ESP32C6ROM as e}from"./esp32c6-B-u1dpSJ.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C61`,this.IMAGE_CHIP_ID=20,this.CHIP_DETECT_MAGIC_VALUE=[871374959,606167151],this.UART_DATE_REG_ADDR=1610612860,this.EFUSE_BASE=1611352064,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=0,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=4,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY2_SHIFT=8,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY3_SHIFT=12,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY4_SHIFT=16,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY5_SHIFT=20,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+48,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<23,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+52,this.EFUSE_SECURE_BOOT_EN_MASK=1<<26,this.FLASH_FREQUENCY={"80m":15,"40m":0,"20m":2},this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1098907648,1107296256,`DROM`],[1082130432,1082523648,`DRAM`],[1082130432,1082523648,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1090519040,1098907648,`IROM`],[1082130432,1082523648,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=2010665156,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`,13:`XTS_AES_256_KEY_1_PSRAM`,14:`XTS_AES_256_KEY_2_PSRAM`,15:`XTS_AES_128_KEY_PSRAM`}}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>26&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>0&15}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>4&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-C61`:`unknown ESP32-C61`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`WiFi 6`,`BT 5`]}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}};export{t as ESP32C61ROM};
+import{ESP32C6ROM as e}from"./esp32c6-Ct3LxBMw.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C61`,this.IMAGE_CHIP_ID=20,this.CHIP_DETECT_MAGIC_VALUE=[871374959,606167151],this.UART_DATE_REG_ADDR=1610612860,this.EFUSE_BASE=1611352064,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=0,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=4,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY2_SHIFT=8,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY3_SHIFT=12,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY4_SHIFT=16,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY5_SHIFT=20,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+48,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<23,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+52,this.EFUSE_SECURE_BOOT_EN_MASK=1<<26,this.FLASH_FREQUENCY={"80m":15,"40m":0,"20m":2},this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1098907648,1107296256,`DROM`],[1082130432,1082523648,`DRAM`],[1082130432,1082523648,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1090519040,1098907648,`IROM`],[1082130432,1082523648,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=2010665156,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`,13:`XTS_AES_256_KEY_1_PSRAM`,14:`XTS_AES_256_KEY_2_PSRAM`,15:`XTS_AES_128_KEY_PSRAM`}}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>26&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>0&15}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>4&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-C61`:`unknown ESP32-C61`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`WiFi 6`,`BT 5`]}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}};export{t as ESP32C61ROM};

package/dist/ui/assets/{esp32c61-e_DudgN9.js → esp32c61-sRp43nbI.js}

@@ -1 +1 @@
-import{ESP32C6ROM as e}from"./esp32c6-roW5XaV9.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C61`,this.IMAGE_CHIP_ID=20,this.CHIP_DETECT_MAGIC_VALUE=[871374959,606167151],this.UART_DATE_REG_ADDR=1610612860,this.EFUSE_BASE=1611352064,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=0,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=4,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY2_SHIFT=8,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY3_SHIFT=12,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY4_SHIFT=16,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY5_SHIFT=20,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+48,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<23,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+52,this.EFUSE_SECURE_BOOT_EN_MASK=1<<26,this.FLASH_FREQUENCY={"80m":15,"40m":0,"20m":2},this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1098907648,1107296256,`DROM`],[1082130432,1082523648,`DRAM`],[1082130432,1082523648,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1090519040,1098907648,`IROM`],[1082130432,1082523648,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=2010665156,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`,13:`XTS_AES_256_KEY_1_PSRAM`,14:`XTS_AES_256_KEY_2_PSRAM`,15:`XTS_AES_128_KEY_PSRAM`}}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>26&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>0&15}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>4&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-C61`:`unknown ESP32-C61`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`WiFi 6`,`BT 5`]}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}};export{t as ESP32C61ROM};
+import{ESP32C6ROM as e}from"./esp32c6-BMEnOhZ6.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-C61`,this.IMAGE_CHIP_ID=20,this.CHIP_DETECT_MAGIC_VALUE=[871374959,606167151],this.UART_DATE_REG_ADDR=1610612860,this.EFUSE_BASE=1611352064,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=0,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=4,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY2_SHIFT=8,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY3_SHIFT=12,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY4_SHIFT=16,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY5_SHIFT=20,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+48,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<23,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+52,this.EFUSE_SECURE_BOOT_EN_MASK=1<<26,this.FLASH_FREQUENCY={"80m":15,"40m":0,"20m":2},this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1098907648,1107296256,`DROM`],[1082130432,1082523648,`DRAM`],[1082130432,1082523648,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1090519040,1098907648,`IROM`],[1082130432,1082523648,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=2010665156,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`,13:`XTS_AES_256_KEY_1_PSRAM`,14:`XTS_AES_256_KEY_2_PSRAM`,15:`XTS_AES_128_KEY_PSRAM`}}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>26&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>0&15}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+8)>>4&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-C61`:`unknown ESP32-C61`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`WiFi 6`,`BT 5`]}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}};export{t as ESP32C61ROM};

package/dist/ui/assets/{esp32h2-BNSoMBaR.js → esp32h2-BKv-WORi.js}

@@ -1 +1 @@
-import{ESP32C6ROM as e}from"./esp32c6-roW5XaV9.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-H2`,this.IMAGE_CHIP_ID=16,this.EFUSE_BASE=1611335680,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.USB_RAM_BLOCK=2048,this.UARTDEV_BUF_NO_USB=3,this.UARTDEV_BUF_NO=1070526796,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1124073472,`DROM`],[1082130432,1082654720,`DRAM`],[1082130432,1082654720,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1107296256,1124073472,`IROM`],[1082130432,1082654720,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+16)>>0&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&7}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-H2`:`unknown ESP32-H2`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`BT 5 (LE)`,`IEEE802.15.4`,`Single Core`,`96MHz`]}async getCrystalFreq(e){return 32}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async postConnect(e){let t=await e.readReg(this.UARTDEV_BUF_NO)&255;e.debug(`In _post_connect `+t),t==this.UARTDEV_BUF_NO_USB&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32H2ROM};
+import{ESP32C6ROM as e}from"./esp32c6-BMEnOhZ6.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-H2`,this.IMAGE_CHIP_ID=16,this.EFUSE_BASE=1611335680,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.USB_RAM_BLOCK=2048,this.UARTDEV_BUF_NO_USB=3,this.UARTDEV_BUF_NO=1070526796,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1124073472,`DROM`],[1082130432,1082654720,`DRAM`],[1082130432,1082654720,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1107296256,1124073472,`IROM`],[1082130432,1082654720,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+16)>>0&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&7}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-H2`:`unknown ESP32-H2`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`BT 5 (LE)`,`IEEE802.15.4`,`Single Core`,`96MHz`]}async getCrystalFreq(e){return 32}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async postConnect(e){let t=await e.readReg(this.UARTDEV_BUF_NO)&255;e.debug(`In _post_connect `+t),t==this.UARTDEV_BUF_NO_USB&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32H2ROM};

package/dist/ui/assets/{esp32h2-DfHWoI2F.js → esp32h2-CPO25efF.js}

@@ -1 +1 @@
-import{ESP32C6ROM as e}from"./esp32c6-B-u1dpSJ.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-H2`,this.IMAGE_CHIP_ID=16,this.EFUSE_BASE=1611335680,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.USB_RAM_BLOCK=2048,this.UARTDEV_BUF_NO_USB=3,this.UARTDEV_BUF_NO=1070526796,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1124073472,`DROM`],[1082130432,1082654720,`DRAM`],[1082130432,1082654720,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1107296256,1124073472,`IROM`],[1082130432,1082654720,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+16)>>0&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&7}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-H2`:`unknown ESP32-H2`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`BT 5 (LE)`,`IEEE802.15.4`,`Single Core`,`96MHz`]}async getCrystalFreq(e){return 32}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async postConnect(e){let t=await e.readReg(this.UARTDEV_BUF_NO)&255;e.debug(`In _post_connect `+t),t==this.UARTDEV_BUF_NO_USB&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32H2ROM};
+import{ESP32C6ROM as e}from"./esp32c6-Ct3LxBMw.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-H2`,this.IMAGE_CHIP_ID=16,this.EFUSE_BASE=1611335680,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.UART_CLKDIV_REG=1072955412,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612860,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.USB_RAM_BLOCK=2048,this.UARTDEV_BUF_NO_USB=3,this.UARTDEV_BUF_NO=1070526796,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1115684864,this.MEMORY_MAP=[[0,65536,`PADDING`],[1107296256,1124073472,`DROM`],[1082130432,1082654720,`DRAM`],[1082130432,1082654720,`BYTE_ACCESSIBLE`],[1074048e3,1074069504,`DROM_MASK`],[1073741824,1074048e3,`IROM_MASK`],[1107296256,1124073472,`IROM`],[1082130432,1082654720,`IRAM`],[1342177280,1342193664,`RTC_IRAM`],[1342177280,1342193664,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]]}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+16)>>0&7}async getMinorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&7}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&3}async getChipDescription(e){let t=await this.getPkgVersion(e),n;n=t===0?`ESP32-H2`:`unknown ESP32-H2`;let r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${n} (revision v${r}.${i})`}async getChipFeatures(e){return[`BT 5 (LE)`,`IEEE802.15.4`,`Single Core`,`96MHz`]}async getCrystalFreq(e){return 32}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async postConnect(e){let t=await e.readReg(this.UARTDEV_BUF_NO)&255;e.debug(`In _post_connect `+t),t==this.UARTDEV_BUF_NO_USB&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32H2ROM};

package/dist/ui/assets/{esp32p4-B28QO5xI.js → esp32p4-GHiT8voO.js}

@@ -1 +1 @@
-import{t as e}from"./esp32-z35G3TbR.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-P4`,this.IMAGE_CHIP_ID=18,this.IROM_MAP_START=1073741824,this.IROM_MAP_END=1275068416,this.DROM_MAP_START=1073741824,this.DROM_MAP_END=1275068416,this.BOOTLOADER_FLASH_OFFSET=8192,this.CHIP_DETECT_MAGIC_VALUE=[0,182303440],this.UART_DATE_REG_ADDR=1343004812,this.EFUSE_BASE=1343410176,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.SPI_REG_BASE=1342754816,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.SPI_ADDR_REG_MSB=!1,this.USES_MAGIC_VALUE=!1,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG=this.EFUSE_BASE+52,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT=9,this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY=2,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=24,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=28,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=4,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=8,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=12,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.PURPOSE_VAL_XTS_AES256_KEY_1=2,this.PURPOSE_VAL_XTS_AES256_KEY_2=3,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.SUPPORTS_ENCRYPTED_FLASH=!0,this.FLASH_ENCRYPTED_WRITE_ALIGN=16,this.USB_RAM_BLOCK=2048,this.GPIO_STRAP_REG=1343094840,this.GPIO_STRAP_SPI_BOOT_MASK=8,this.RTC_CNTL_OPTION1_REG=1343291400,this.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK=4,this.DR_REG_LPAON_BASE=1343291392,this.DR_REG_PMU_BASE=this.DR_REG_LPAON_BASE+20480,this.DR_REG_LP_SYS_BASE=this.DR_REG_LPAON_BASE+0,this.LP_SYSTEM_REG_ANA_XPD_PAD_GROUP_REG=this.DR_REG_LP_SYS_BASE+268,this.PMU_EXT_LDO_P0_0P1A_ANA_REG=this.DR_REG_PMU_BASE+444,this.PMU_ANA_0P1A_EN_CUR_LIM_0=1<<27,this.PMU_EXT_LDO_P0_0P1A_REG=this.DR_REG_PMU_BASE+440,this.PMU_0P1A_TARGET0_0=255<<23,this.PMU_0P1A_FORCE_TIEH_SEL_0=128,this.PMU_DATE_REG=this.DR_REG_PMU_BASE+1020,this.UARTDEV_BUF_NO_USB_OTG=5,this.UARTDEV_BUF_NO_USB_JTAG_SERIAL=6,this.DR_REG_LP_WDT_BASE=1343315968,this.RTC_CNTL_WDTCONFIG0_REG=this.DR_REG_LP_WDT_BASE+0,this.RTC_CNTL_WDTCONFIG1_REG=this.DR_REG_LP_WDT_BASE+4,this.RTC_CNTL_WDTWPROTECT_REG=this.DR_REG_LP_WDT_BASE+24,this.RTC_CNTL_WDT_WKEY=1356348065,this.RTC_CNTL_SWD_CONF_REG=this.DR_REG_LP_WDT_BASE+28,this.RTC_CNTL_SWD_AUTO_FEED_EN=1<<18,this.RTC_CNTL_SWD_WPROTECT_REG=this.DR_REG_LP_WDT_BASE+32,this.RTC_CNTL_SWD_WKEY=1356348065,this.MEMORY_MAP=[[0,65536,`PADDING`],[1073741824,1275068416,`DROM`],[1341128704,1341784064,`DRAM`],[1341128704,1341784064,`BYTE_ACCESSIBLE`],[1337982976,1338114048,`DROM_MASK`],[1337982976,1338114048,`IROM_MASK`],[1073741824,1275068416,`IROM`],[1341128704,1341784064,`IRAM`],[1343258624,1343291392,`RTC_IRAM`],[1343258624,1343291392,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=1026592404,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`}}async getPkgVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8;return await e.readReg(t)>>20&7}async getMinorChipVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8;return await e.readReg(t)>>0&15}async getMajorChipVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8,n=await e.readReg(t);return(n>>23&1)<<2|n>>4&3}async getChipRevision(e){let t=await this.getMajorChipVersion(e),n=await this.getMinorChipVersion(e);return t*100+n}async getStubJsonPath(e){return await this.getChipRevision(e)<300?`./targets/stub_flasher/stub_flasher_32p4rc1.json`:`./targets/stub_flasher/stub_flasher_32p4.json`}async getChipDescription(e){return`${{0:`ESP32-P4`}[await this.getPkgVersion(e)]||`Unknown ESP32-P4`} (revision v${await this.getMajorChipVersion(e)}.${await this.getMinorChipVersion(e)})`}async getChipFeatures(e){return[`High-Performance MCU`]}async getCrystalFreq(e){return 40}async getFlashVoltage(e){}async overrideVddsdio(e){e.debug(`VDD_SDIO overrides are not supported for ESP32-P4`)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}async getFlashCryptConfig(e){}async getSecureBootEnabled(e){return(await e.readReg(this.EFUSE_SECURE_BOOT_EN_REG)&this.EFUSE_SECURE_BOOT_EN_MASK)!==0}async getUartdevBufNo(e){return(await this.getChipRevision(e)<300?1341390512:1341914800)+24}async usesUsbOtg(e){let t=await this.getUartdevBufNo(e);return(await e.readReg(t)&255)===this.UARTDEV_BUF_NO_USB_OTG}async usesUsbJtagSerial(e){let t=await this.getUartdevBufNo(e);return(await e.readReg(t)&255)===this.UARTDEV_BUF_NO_USB_JTAG_SERIAL}async getKeyBlockPurpose(e,t){if(t<0||t>this.EFUSE_MAX_KEY){e.debug(`Valid key block numbers must be in range 0-${this.EFUSE_MAX_KEY}`);return}let[n,r]=[[this.EFUSE_PURPOSE_KEY0_REG,this.EFUSE_PURPOSE_KEY0_SHIFT],[this.EFUSE_PURPOSE_KEY1_REG,this.EFUSE_PURPOSE_KEY1_SHIFT],[this.EFUSE_PURPOSE_KEY2_REG,this.EFUSE_PURPOSE_KEY2_SHIFT],[this.EFUSE_PURPOSE_KEY3_REG,this.EFUSE_PURPOSE_KEY3_SHIFT],[this.EFUSE_PURPOSE_KEY4_REG,this.EFUSE_PURPOSE_KEY4_SHIFT],[this.EFUSE_PURPOSE_KEY5_REG,this.EFUSE_PURPOSE_KEY5_SHIFT]][t];return await e.readReg(n)>>r&15}async isFlashEncryptionKeyValid(e){let t=[];for(let n=0;n<=this.EFUSE_MAX_KEY;n++){let r=await this.getKeyBlockPurpose(e,n);t.push(r)}return t.some(e=>e===this.PURPOSE_VAL_XTS_AES128_KEY)||t.some(e=>e===this.PURPOSE_VAL_XTS_AES256_KEY_1)&&t.some(e=>e===this.PURPOSE_VAL_XTS_AES256_KEY_2)?!0:(await e.readReg(this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG)>>this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT&this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY)!==0}async postConnect(e){await this.usesUsbOtg(e)&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK),e.IS_STUB||await this.disableWatchdogs(e)}async disableWatchdogs(e){if(await this.usesUsbJtagSerial(e)){await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,this.RTC_CNTL_WDT_WKEY),await e.writeReg(this.RTC_CNTL_WDTCONFIG0_REG,0),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,0),await e.writeReg(this.RTC_CNTL_SWD_WPROTECT_REG,this.RTC_CNTL_SWD_WKEY);let t=await e.readReg(this.RTC_CNTL_SWD_CONF_REG);await e.writeReg(this.RTC_CNTL_SWD_CONF_REG,t|this.RTC_CNTL_SWD_AUTO_FEED_EN),await e.writeReg(this.RTC_CNTL_SWD_WPROTECT_REG,0)}}checkSpiConnection(e,t){if(!t.every(e=>e>=0&&e<=54))throw Error(`SPI Pin numbers must be in the range 0-54.`);t.some(e=>e===24||e===25)&&e.debug(`GPIO pins 24 and 25 are used by USB-Serial/JTAG, consider using other pins for SPI flash connection.`)}async watchdogReset(e){e.info(`Hard resetting with a watchdog...`),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,this.RTC_CNTL_WDT_WKEY),await e.writeReg(this.RTC_CNTL_WDTCONFIG1_REG,2e3),await e.writeReg(this.RTC_CNTL_WDTCONFIG0_REG,-805306110),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,0),await new Promise(e=>setTimeout(e,500))}async powerOnFlash(e){if(await this.getChipRevision(e)<=300)return;await e.writeReg(this.LP_SYSTEM_REG_ANA_XPD_PAD_GROUP_REG,1),await new Promise(e=>setTimeout(e,10));let t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG);await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG,t|this.PMU_ANA_0P1A_EN_CUR_LIM_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t|this.PMU_0P1A_FORCE_TIEH_SEL_0),t=await e.readReg(this.PMU_DATE_REG),await e.writeReg(this.PMU_DATE_REG,t|3),await new Promise(e=>setTimeout(e,50)),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG,t&~this.PMU_ANA_0P1A_EN_CUR_LIM_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t&~this.PMU_0P1A_TARGET0_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t|128),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t&~this.PMU_0P1A_FORCE_TIEH_SEL_0),await new Promise(e=>setTimeout(e,1800))}};export{t as ESP32P4ROM};
+import{t as e}from"./esp32-BTVUAltJ.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-P4`,this.IMAGE_CHIP_ID=18,this.IROM_MAP_START=1073741824,this.IROM_MAP_END=1275068416,this.DROM_MAP_START=1073741824,this.DROM_MAP_END=1275068416,this.BOOTLOADER_FLASH_OFFSET=8192,this.CHIP_DETECT_MAGIC_VALUE=[0,182303440],this.UART_DATE_REG_ADDR=1343004812,this.EFUSE_BASE=1343410176,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.SPI_REG_BASE=1342754816,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.SPI_ADDR_REG_MSB=!1,this.USES_MAGIC_VALUE=!1,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG=this.EFUSE_BASE+52,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT=9,this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY=2,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=24,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=28,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=4,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=8,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=12,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.PURPOSE_VAL_XTS_AES256_KEY_1=2,this.PURPOSE_VAL_XTS_AES256_KEY_2=3,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.SUPPORTS_ENCRYPTED_FLASH=!0,this.FLASH_ENCRYPTED_WRITE_ALIGN=16,this.USB_RAM_BLOCK=2048,this.GPIO_STRAP_REG=1343094840,this.GPIO_STRAP_SPI_BOOT_MASK=8,this.RTC_CNTL_OPTION1_REG=1343291400,this.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK=4,this.DR_REG_LPAON_BASE=1343291392,this.DR_REG_PMU_BASE=this.DR_REG_LPAON_BASE+20480,this.DR_REG_LP_SYS_BASE=this.DR_REG_LPAON_BASE+0,this.LP_SYSTEM_REG_ANA_XPD_PAD_GROUP_REG=this.DR_REG_LP_SYS_BASE+268,this.PMU_EXT_LDO_P0_0P1A_ANA_REG=this.DR_REG_PMU_BASE+444,this.PMU_ANA_0P1A_EN_CUR_LIM_0=1<<27,this.PMU_EXT_LDO_P0_0P1A_REG=this.DR_REG_PMU_BASE+440,this.PMU_0P1A_TARGET0_0=255<<23,this.PMU_0P1A_FORCE_TIEH_SEL_0=128,this.PMU_DATE_REG=this.DR_REG_PMU_BASE+1020,this.UARTDEV_BUF_NO_USB_OTG=5,this.UARTDEV_BUF_NO_USB_JTAG_SERIAL=6,this.DR_REG_LP_WDT_BASE=1343315968,this.RTC_CNTL_WDTCONFIG0_REG=this.DR_REG_LP_WDT_BASE+0,this.RTC_CNTL_WDTCONFIG1_REG=this.DR_REG_LP_WDT_BASE+4,this.RTC_CNTL_WDTWPROTECT_REG=this.DR_REG_LP_WDT_BASE+24,this.RTC_CNTL_WDT_WKEY=1356348065,this.RTC_CNTL_SWD_CONF_REG=this.DR_REG_LP_WDT_BASE+28,this.RTC_CNTL_SWD_AUTO_FEED_EN=1<<18,this.RTC_CNTL_SWD_WPROTECT_REG=this.DR_REG_LP_WDT_BASE+32,this.RTC_CNTL_SWD_WKEY=1356348065,this.MEMORY_MAP=[[0,65536,`PADDING`],[1073741824,1275068416,`DROM`],[1341128704,1341784064,`DRAM`],[1341128704,1341784064,`BYTE_ACCESSIBLE`],[1337982976,1338114048,`DROM_MASK`],[1337982976,1338114048,`IROM_MASK`],[1073741824,1275068416,`IROM`],[1341128704,1341784064,`IRAM`],[1343258624,1343291392,`RTC_IRAM`],[1343258624,1343291392,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=1026592404,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`}}async getPkgVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8;return await e.readReg(t)>>20&7}async getMinorChipVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8;return await e.readReg(t)>>0&15}async getMajorChipVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8,n=await e.readReg(t);return(n>>23&1)<<2|n>>4&3}async getChipRevision(e){let t=await this.getMajorChipVersion(e),n=await this.getMinorChipVersion(e);return t*100+n}async getStubJsonPath(e){return await this.getChipRevision(e)<300?`./targets/stub_flasher/stub_flasher_32p4rc1.json`:`./targets/stub_flasher/stub_flasher_32p4.json`}async getChipDescription(e){return`${{0:`ESP32-P4`}[await this.getPkgVersion(e)]||`Unknown ESP32-P4`} (revision v${await this.getMajorChipVersion(e)}.${await this.getMinorChipVersion(e)})`}async getChipFeatures(e){return[`High-Performance MCU`]}async getCrystalFreq(e){return 40}async getFlashVoltage(e){}async overrideVddsdio(e){e.debug(`VDD_SDIO overrides are not supported for ESP32-P4`)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}async getFlashCryptConfig(e){}async getSecureBootEnabled(e){return(await e.readReg(this.EFUSE_SECURE_BOOT_EN_REG)&this.EFUSE_SECURE_BOOT_EN_MASK)!==0}async getUartdevBufNo(e){return(await this.getChipRevision(e)<300?1341390512:1341914800)+24}async usesUsbOtg(e){let t=await this.getUartdevBufNo(e);return(await e.readReg(t)&255)===this.UARTDEV_BUF_NO_USB_OTG}async usesUsbJtagSerial(e){let t=await this.getUartdevBufNo(e);return(await e.readReg(t)&255)===this.UARTDEV_BUF_NO_USB_JTAG_SERIAL}async getKeyBlockPurpose(e,t){if(t<0||t>this.EFUSE_MAX_KEY){e.debug(`Valid key block numbers must be in range 0-${this.EFUSE_MAX_KEY}`);return}let[n,r]=[[this.EFUSE_PURPOSE_KEY0_REG,this.EFUSE_PURPOSE_KEY0_SHIFT],[this.EFUSE_PURPOSE_KEY1_REG,this.EFUSE_PURPOSE_KEY1_SHIFT],[this.EFUSE_PURPOSE_KEY2_REG,this.EFUSE_PURPOSE_KEY2_SHIFT],[this.EFUSE_PURPOSE_KEY3_REG,this.EFUSE_PURPOSE_KEY3_SHIFT],[this.EFUSE_PURPOSE_KEY4_REG,this.EFUSE_PURPOSE_KEY4_SHIFT],[this.EFUSE_PURPOSE_KEY5_REG,this.EFUSE_PURPOSE_KEY5_SHIFT]][t];return await e.readReg(n)>>r&15}async isFlashEncryptionKeyValid(e){let t=[];for(let n=0;n<=this.EFUSE_MAX_KEY;n++){let r=await this.getKeyBlockPurpose(e,n);t.push(r)}return t.some(e=>e===this.PURPOSE_VAL_XTS_AES128_KEY)||t.some(e=>e===this.PURPOSE_VAL_XTS_AES256_KEY_1)&&t.some(e=>e===this.PURPOSE_VAL_XTS_AES256_KEY_2)?!0:(await e.readReg(this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG)>>this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT&this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY)!==0}async postConnect(e){await this.usesUsbOtg(e)&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK),e.IS_STUB||await this.disableWatchdogs(e)}async disableWatchdogs(e){if(await this.usesUsbJtagSerial(e)){await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,this.RTC_CNTL_WDT_WKEY),await e.writeReg(this.RTC_CNTL_WDTCONFIG0_REG,0),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,0),await e.writeReg(this.RTC_CNTL_SWD_WPROTECT_REG,this.RTC_CNTL_SWD_WKEY);let t=await e.readReg(this.RTC_CNTL_SWD_CONF_REG);await e.writeReg(this.RTC_CNTL_SWD_CONF_REG,t|this.RTC_CNTL_SWD_AUTO_FEED_EN),await e.writeReg(this.RTC_CNTL_SWD_WPROTECT_REG,0)}}checkSpiConnection(e,t){if(!t.every(e=>e>=0&&e<=54))throw Error(`SPI Pin numbers must be in the range 0-54.`);t.some(e=>e===24||e===25)&&e.debug(`GPIO pins 24 and 25 are used by USB-Serial/JTAG, consider using other pins for SPI flash connection.`)}async watchdogReset(e){e.info(`Hard resetting with a watchdog...`),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,this.RTC_CNTL_WDT_WKEY),await e.writeReg(this.RTC_CNTL_WDTCONFIG1_REG,2e3),await e.writeReg(this.RTC_CNTL_WDTCONFIG0_REG,-805306110),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,0),await new Promise(e=>setTimeout(e,500))}async powerOnFlash(e){if(await this.getChipRevision(e)<=300)return;await e.writeReg(this.LP_SYSTEM_REG_ANA_XPD_PAD_GROUP_REG,1),await new Promise(e=>setTimeout(e,10));let t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG);await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG,t|this.PMU_ANA_0P1A_EN_CUR_LIM_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t|this.PMU_0P1A_FORCE_TIEH_SEL_0),t=await e.readReg(this.PMU_DATE_REG),await e.writeReg(this.PMU_DATE_REG,t|3),await new Promise(e=>setTimeout(e,50)),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG,t&~this.PMU_ANA_0P1A_EN_CUR_LIM_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t&~this.PMU_0P1A_TARGET0_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t|128),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t&~this.PMU_0P1A_FORCE_TIEH_SEL_0),await new Promise(e=>setTimeout(e,1800))}};export{t as ESP32P4ROM};

package/dist/ui/assets/{esp32p4-oT03skoL.js → esp32p4-g1tFG0sh.js}

@@ -1 +1 @@
-import{t as e}from"./esp32-UFl3lGuU.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-P4`,this.IMAGE_CHIP_ID=18,this.IROM_MAP_START=1073741824,this.IROM_MAP_END=1275068416,this.DROM_MAP_START=1073741824,this.DROM_MAP_END=1275068416,this.BOOTLOADER_FLASH_OFFSET=8192,this.CHIP_DETECT_MAGIC_VALUE=[0,182303440],this.UART_DATE_REG_ADDR=1343004812,this.EFUSE_BASE=1343410176,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.SPI_REG_BASE=1342754816,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.SPI_ADDR_REG_MSB=!1,this.USES_MAGIC_VALUE=!1,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG=this.EFUSE_BASE+52,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT=9,this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY=2,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=24,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=28,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=4,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=8,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=12,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.PURPOSE_VAL_XTS_AES256_KEY_1=2,this.PURPOSE_VAL_XTS_AES256_KEY_2=3,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.SUPPORTS_ENCRYPTED_FLASH=!0,this.FLASH_ENCRYPTED_WRITE_ALIGN=16,this.USB_RAM_BLOCK=2048,this.GPIO_STRAP_REG=1343094840,this.GPIO_STRAP_SPI_BOOT_MASK=8,this.RTC_CNTL_OPTION1_REG=1343291400,this.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK=4,this.DR_REG_LPAON_BASE=1343291392,this.DR_REG_PMU_BASE=this.DR_REG_LPAON_BASE+20480,this.DR_REG_LP_SYS_BASE=this.DR_REG_LPAON_BASE+0,this.LP_SYSTEM_REG_ANA_XPD_PAD_GROUP_REG=this.DR_REG_LP_SYS_BASE+268,this.PMU_EXT_LDO_P0_0P1A_ANA_REG=this.DR_REG_PMU_BASE+444,this.PMU_ANA_0P1A_EN_CUR_LIM_0=1<<27,this.PMU_EXT_LDO_P0_0P1A_REG=this.DR_REG_PMU_BASE+440,this.PMU_0P1A_TARGET0_0=255<<23,this.PMU_0P1A_FORCE_TIEH_SEL_0=128,this.PMU_DATE_REG=this.DR_REG_PMU_BASE+1020,this.UARTDEV_BUF_NO_USB_OTG=5,this.UARTDEV_BUF_NO_USB_JTAG_SERIAL=6,this.DR_REG_LP_WDT_BASE=1343315968,this.RTC_CNTL_WDTCONFIG0_REG=this.DR_REG_LP_WDT_BASE+0,this.RTC_CNTL_WDTCONFIG1_REG=this.DR_REG_LP_WDT_BASE+4,this.RTC_CNTL_WDTWPROTECT_REG=this.DR_REG_LP_WDT_BASE+24,this.RTC_CNTL_WDT_WKEY=1356348065,this.RTC_CNTL_SWD_CONF_REG=this.DR_REG_LP_WDT_BASE+28,this.RTC_CNTL_SWD_AUTO_FEED_EN=1<<18,this.RTC_CNTL_SWD_WPROTECT_REG=this.DR_REG_LP_WDT_BASE+32,this.RTC_CNTL_SWD_WKEY=1356348065,this.MEMORY_MAP=[[0,65536,`PADDING`],[1073741824,1275068416,`DROM`],[1341128704,1341784064,`DRAM`],[1341128704,1341784064,`BYTE_ACCESSIBLE`],[1337982976,1338114048,`DROM_MASK`],[1337982976,1338114048,`IROM_MASK`],[1073741824,1275068416,`IROM`],[1341128704,1341784064,`IRAM`],[1343258624,1343291392,`RTC_IRAM`],[1343258624,1343291392,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=1026592404,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`}}async getPkgVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8;return await e.readReg(t)>>20&7}async getMinorChipVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8;return await e.readReg(t)>>0&15}async getMajorChipVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8,n=await e.readReg(t);return(n>>23&1)<<2|n>>4&3}async getChipRevision(e){let t=await this.getMajorChipVersion(e),n=await this.getMinorChipVersion(e);return t*100+n}async getStubJsonPath(e){return await this.getChipRevision(e)<300?`./targets/stub_flasher/stub_flasher_32p4rc1.json`:`./targets/stub_flasher/stub_flasher_32p4.json`}async getChipDescription(e){return`${{0:`ESP32-P4`}[await this.getPkgVersion(e)]||`Unknown ESP32-P4`} (revision v${await this.getMajorChipVersion(e)}.${await this.getMinorChipVersion(e)})`}async getChipFeatures(e){return[`High-Performance MCU`]}async getCrystalFreq(e){return 40}async getFlashVoltage(e){}async overrideVddsdio(e){e.debug(`VDD_SDIO overrides are not supported for ESP32-P4`)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}async getFlashCryptConfig(e){}async getSecureBootEnabled(e){return(await e.readReg(this.EFUSE_SECURE_BOOT_EN_REG)&this.EFUSE_SECURE_BOOT_EN_MASK)!==0}async getUartdevBufNo(e){return(await this.getChipRevision(e)<300?1341390512:1341914800)+24}async usesUsbOtg(e){let t=await this.getUartdevBufNo(e);return(await e.readReg(t)&255)===this.UARTDEV_BUF_NO_USB_OTG}async usesUsbJtagSerial(e){let t=await this.getUartdevBufNo(e);return(await e.readReg(t)&255)===this.UARTDEV_BUF_NO_USB_JTAG_SERIAL}async getKeyBlockPurpose(e,t){if(t<0||t>this.EFUSE_MAX_KEY){e.debug(`Valid key block numbers must be in range 0-${this.EFUSE_MAX_KEY}`);return}let[n,r]=[[this.EFUSE_PURPOSE_KEY0_REG,this.EFUSE_PURPOSE_KEY0_SHIFT],[this.EFUSE_PURPOSE_KEY1_REG,this.EFUSE_PURPOSE_KEY1_SHIFT],[this.EFUSE_PURPOSE_KEY2_REG,this.EFUSE_PURPOSE_KEY2_SHIFT],[this.EFUSE_PURPOSE_KEY3_REG,this.EFUSE_PURPOSE_KEY3_SHIFT],[this.EFUSE_PURPOSE_KEY4_REG,this.EFUSE_PURPOSE_KEY4_SHIFT],[this.EFUSE_PURPOSE_KEY5_REG,this.EFUSE_PURPOSE_KEY5_SHIFT]][t];return await e.readReg(n)>>r&15}async isFlashEncryptionKeyValid(e){let t=[];for(let n=0;n<=this.EFUSE_MAX_KEY;n++){let r=await this.getKeyBlockPurpose(e,n);t.push(r)}return t.some(e=>e===this.PURPOSE_VAL_XTS_AES128_KEY)||t.some(e=>e===this.PURPOSE_VAL_XTS_AES256_KEY_1)&&t.some(e=>e===this.PURPOSE_VAL_XTS_AES256_KEY_2)?!0:(await e.readReg(this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG)>>this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT&this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY)!==0}async postConnect(e){await this.usesUsbOtg(e)&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK),e.IS_STUB||await this.disableWatchdogs(e)}async disableWatchdogs(e){if(await this.usesUsbJtagSerial(e)){await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,this.RTC_CNTL_WDT_WKEY),await e.writeReg(this.RTC_CNTL_WDTCONFIG0_REG,0),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,0),await e.writeReg(this.RTC_CNTL_SWD_WPROTECT_REG,this.RTC_CNTL_SWD_WKEY);let t=await e.readReg(this.RTC_CNTL_SWD_CONF_REG);await e.writeReg(this.RTC_CNTL_SWD_CONF_REG,t|this.RTC_CNTL_SWD_AUTO_FEED_EN),await e.writeReg(this.RTC_CNTL_SWD_WPROTECT_REG,0)}}checkSpiConnection(e,t){if(!t.every(e=>e>=0&&e<=54))throw Error(`SPI Pin numbers must be in the range 0-54.`);t.some(e=>e===24||e===25)&&e.debug(`GPIO pins 24 and 25 are used by USB-Serial/JTAG, consider using other pins for SPI flash connection.`)}async watchdogReset(e){e.info(`Hard resetting with a watchdog...`),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,this.RTC_CNTL_WDT_WKEY),await e.writeReg(this.RTC_CNTL_WDTCONFIG1_REG,2e3),await e.writeReg(this.RTC_CNTL_WDTCONFIG0_REG,-805306110),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,0),await new Promise(e=>setTimeout(e,500))}async powerOnFlash(e){if(await this.getChipRevision(e)<=300)return;await e.writeReg(this.LP_SYSTEM_REG_ANA_XPD_PAD_GROUP_REG,1),await new Promise(e=>setTimeout(e,10));let t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG);await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG,t|this.PMU_ANA_0P1A_EN_CUR_LIM_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t|this.PMU_0P1A_FORCE_TIEH_SEL_0),t=await e.readReg(this.PMU_DATE_REG),await e.writeReg(this.PMU_DATE_REG,t|3),await new Promise(e=>setTimeout(e,50)),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG,t&~this.PMU_ANA_0P1A_EN_CUR_LIM_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t&~this.PMU_0P1A_TARGET0_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t|128),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t&~this.PMU_0P1A_FORCE_TIEH_SEL_0),await new Promise(e=>setTimeout(e,1800))}};export{t as ESP32P4ROM};
+import{t as e}from"./esp32-CatgC_Vd.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-P4`,this.IMAGE_CHIP_ID=18,this.IROM_MAP_START=1073741824,this.IROM_MAP_END=1275068416,this.DROM_MAP_START=1073741824,this.DROM_MAP_END=1275068416,this.BOOTLOADER_FLASH_OFFSET=8192,this.CHIP_DETECT_MAGIC_VALUE=[0,182303440],this.UART_DATE_REG_ADDR=1343004812,this.EFUSE_BASE=1343410176,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.SPI_REG_BASE=1342754816,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.SPI_ADDR_REG_MSB=!1,this.USES_MAGIC_VALUE=!1,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG=this.EFUSE_BASE+52,this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT=9,this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY=2,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=24,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=28,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=4,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=8,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=12,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<20,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.PURPOSE_VAL_XTS_AES256_KEY_1=2,this.PURPOSE_VAL_XTS_AES256_KEY_2=3,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.SUPPORTS_ENCRYPTED_FLASH=!0,this.FLASH_ENCRYPTED_WRITE_ALIGN=16,this.USB_RAM_BLOCK=2048,this.GPIO_STRAP_REG=1343094840,this.GPIO_STRAP_SPI_BOOT_MASK=8,this.RTC_CNTL_OPTION1_REG=1343291400,this.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK=4,this.DR_REG_LPAON_BASE=1343291392,this.DR_REG_PMU_BASE=this.DR_REG_LPAON_BASE+20480,this.DR_REG_LP_SYS_BASE=this.DR_REG_LPAON_BASE+0,this.LP_SYSTEM_REG_ANA_XPD_PAD_GROUP_REG=this.DR_REG_LP_SYS_BASE+268,this.PMU_EXT_LDO_P0_0P1A_ANA_REG=this.DR_REG_PMU_BASE+444,this.PMU_ANA_0P1A_EN_CUR_LIM_0=1<<27,this.PMU_EXT_LDO_P0_0P1A_REG=this.DR_REG_PMU_BASE+440,this.PMU_0P1A_TARGET0_0=255<<23,this.PMU_0P1A_FORCE_TIEH_SEL_0=128,this.PMU_DATE_REG=this.DR_REG_PMU_BASE+1020,this.UARTDEV_BUF_NO_USB_OTG=5,this.UARTDEV_BUF_NO_USB_JTAG_SERIAL=6,this.DR_REG_LP_WDT_BASE=1343315968,this.RTC_CNTL_WDTCONFIG0_REG=this.DR_REG_LP_WDT_BASE+0,this.RTC_CNTL_WDTCONFIG1_REG=this.DR_REG_LP_WDT_BASE+4,this.RTC_CNTL_WDTWPROTECT_REG=this.DR_REG_LP_WDT_BASE+24,this.RTC_CNTL_WDT_WKEY=1356348065,this.RTC_CNTL_SWD_CONF_REG=this.DR_REG_LP_WDT_BASE+28,this.RTC_CNTL_SWD_AUTO_FEED_EN=1<<18,this.RTC_CNTL_SWD_WPROTECT_REG=this.DR_REG_LP_WDT_BASE+32,this.RTC_CNTL_SWD_WKEY=1356348065,this.MEMORY_MAP=[[0,65536,`PADDING`],[1073741824,1275068416,`DROM`],[1341128704,1341784064,`DRAM`],[1341128704,1341784064,`BYTE_ACCESSIBLE`],[1337982976,1338114048,`DROM_MASK`],[1337982976,1338114048,`IROM_MASK`],[1073741824,1275068416,`IROM`],[1341128704,1341784064,`IRAM`],[1343258624,1343291392,`RTC_IRAM`],[1343258624,1343291392,`RTC_DRAM`],[1611653120,1611661312,`MEM_INTERNAL2`]],this.UF2_FAMILY_ID=1026592404,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`ECDSA_KEY`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`,12:`KM_INIT_KEY`}}async getPkgVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8;return await e.readReg(t)>>20&7}async getMinorChipVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8;return await e.readReg(t)>>0&15}async getMajorChipVersion(e){let t=this.EFUSE_BLOCK1_ADDR+8,n=await e.readReg(t);return(n>>23&1)<<2|n>>4&3}async getChipRevision(e){let t=await this.getMajorChipVersion(e),n=await this.getMinorChipVersion(e);return t*100+n}async getStubJsonPath(e){return await this.getChipRevision(e)<300?`./targets/stub_flasher/stub_flasher_32p4rc1.json`:`./targets/stub_flasher/stub_flasher_32p4.json`}async getChipDescription(e){return`${{0:`ESP32-P4`}[await this.getPkgVersion(e)]||`Unknown ESP32-P4`} (revision v${await this.getMajorChipVersion(e)}.${await this.getMinorChipVersion(e)})`}async getChipFeatures(e){return[`High-Performance MCU`]}async getCrystalFreq(e){return 40}async getFlashVoltage(e){}async overrideVddsdio(e){e.debug(`VDD_SDIO overrides are not supported for ESP32-P4`)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}async getFlashCryptConfig(e){}async getSecureBootEnabled(e){return(await e.readReg(this.EFUSE_SECURE_BOOT_EN_REG)&this.EFUSE_SECURE_BOOT_EN_MASK)!==0}async getUartdevBufNo(e){return(await this.getChipRevision(e)<300?1341390512:1341914800)+24}async usesUsbOtg(e){let t=await this.getUartdevBufNo(e);return(await e.readReg(t)&255)===this.UARTDEV_BUF_NO_USB_OTG}async usesUsbJtagSerial(e){let t=await this.getUartdevBufNo(e);return(await e.readReg(t)&255)===this.UARTDEV_BUF_NO_USB_JTAG_SERIAL}async getKeyBlockPurpose(e,t){if(t<0||t>this.EFUSE_MAX_KEY){e.debug(`Valid key block numbers must be in range 0-${this.EFUSE_MAX_KEY}`);return}let[n,r]=[[this.EFUSE_PURPOSE_KEY0_REG,this.EFUSE_PURPOSE_KEY0_SHIFT],[this.EFUSE_PURPOSE_KEY1_REG,this.EFUSE_PURPOSE_KEY1_SHIFT],[this.EFUSE_PURPOSE_KEY2_REG,this.EFUSE_PURPOSE_KEY2_SHIFT],[this.EFUSE_PURPOSE_KEY3_REG,this.EFUSE_PURPOSE_KEY3_SHIFT],[this.EFUSE_PURPOSE_KEY4_REG,this.EFUSE_PURPOSE_KEY4_SHIFT],[this.EFUSE_PURPOSE_KEY5_REG,this.EFUSE_PURPOSE_KEY5_SHIFT]][t];return await e.readReg(n)>>r&15}async isFlashEncryptionKeyValid(e){let t=[];for(let n=0;n<=this.EFUSE_MAX_KEY;n++){let r=await this.getKeyBlockPurpose(e,n);t.push(r)}return t.some(e=>e===this.PURPOSE_VAL_XTS_AES128_KEY)||t.some(e=>e===this.PURPOSE_VAL_XTS_AES256_KEY_1)&&t.some(e=>e===this.PURPOSE_VAL_XTS_AES256_KEY_2)?!0:(await e.readReg(this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_REG)>>this.EFUSE_FORCE_USE_KEY_MANAGER_KEY_SHIFT&this.FORCE_USE_KEY_MANAGER_VAL_XTS_AES_KEY)!==0}async postConnect(e){await this.usesUsbOtg(e)&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK),e.IS_STUB||await this.disableWatchdogs(e)}async disableWatchdogs(e){if(await this.usesUsbJtagSerial(e)){await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,this.RTC_CNTL_WDT_WKEY),await e.writeReg(this.RTC_CNTL_WDTCONFIG0_REG,0),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,0),await e.writeReg(this.RTC_CNTL_SWD_WPROTECT_REG,this.RTC_CNTL_SWD_WKEY);let t=await e.readReg(this.RTC_CNTL_SWD_CONF_REG);await e.writeReg(this.RTC_CNTL_SWD_CONF_REG,t|this.RTC_CNTL_SWD_AUTO_FEED_EN),await e.writeReg(this.RTC_CNTL_SWD_WPROTECT_REG,0)}}checkSpiConnection(e,t){if(!t.every(e=>e>=0&&e<=54))throw Error(`SPI Pin numbers must be in the range 0-54.`);t.some(e=>e===24||e===25)&&e.debug(`GPIO pins 24 and 25 are used by USB-Serial/JTAG, consider using other pins for SPI flash connection.`)}async watchdogReset(e){e.info(`Hard resetting with a watchdog...`),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,this.RTC_CNTL_WDT_WKEY),await e.writeReg(this.RTC_CNTL_WDTCONFIG1_REG,2e3),await e.writeReg(this.RTC_CNTL_WDTCONFIG0_REG,-805306110),await e.writeReg(this.RTC_CNTL_WDTWPROTECT_REG,0),await new Promise(e=>setTimeout(e,500))}async powerOnFlash(e){if(await this.getChipRevision(e)<=300)return;await e.writeReg(this.LP_SYSTEM_REG_ANA_XPD_PAD_GROUP_REG,1),await new Promise(e=>setTimeout(e,10));let t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG);await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG,t|this.PMU_ANA_0P1A_EN_CUR_LIM_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t|this.PMU_0P1A_FORCE_TIEH_SEL_0),t=await e.readReg(this.PMU_DATE_REG),await e.writeReg(this.PMU_DATE_REG,t|3),await new Promise(e=>setTimeout(e,50)),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_ANA_REG,t&~this.PMU_ANA_0P1A_EN_CUR_LIM_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t&~this.PMU_0P1A_TARGET0_0),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t|128),t=await e.readReg(this.PMU_EXT_LDO_P0_0P1A_REG),await e.writeReg(this.PMU_EXT_LDO_P0_0P1A_REG,t&~this.PMU_0P1A_FORCE_TIEH_SEL_0),await new Promise(e=>setTimeout(e,1800))}};export{t as ESP32P4ROM};

package/dist/ui/assets/{esp32s2-PvYKf6wY.js → esp32s2-BE2gO68i.js}

@@ -1 +1 @@
-import{t as e}from"./esp32-z35G3TbR.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-S2`,this.IMAGE_CHIP_ID=2,this.IROM_MAP_START=1074266112,this.IROM_MAP_END=1085800448,this.DROM_MAP_START=1056964608,this.DROM_MAP_END=1061093376,this.CHIP_DETECT_MAGIC_VALUE=[1990],this.SPI_REG_BASE=1061167104,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.SPI_ADDR_REG_MSB=!1,this.MAC_EFUSE_REG=1061265476,this.UART_CLKDIV_REG=1061158932,this.SUPPORTS_ENCRYPTED_FLASH=!0,this.FLASH_ENCRYPTED_WRITE_ALIGN=16,this.EFUSE_BASE=1061265408,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.EFUSE_BLOCK2_ADDR=this.EFUSE_BASE+92,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=24,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=28,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=4,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=8,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=12,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<19,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.EFUSE_RD_REPEAT_DATA3_REG=this.EFUSE_BASE+60,this.EFUSE_RD_REPEAT_DATA3_REG_FLASH_TYPE_MASK=512,this.PURPOSE_VAL_XTS_AES256_KEY_1=2,this.PURPOSE_VAL_XTS_AES256_KEY_2=3,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.UARTDEV_BUF_NO=1073741076,this.UARTDEV_BUF_NO_USB_OTG=2,this.USB_RAM_BLOCK=2048,this.GPIO_STRAP_REG=1061175352,this.GPIO_STRAP_SPI_BOOT_MASK=8,this.GPIO_STRAP_VDDSPI_MASK=16,this.RTC_CNTL_OPTION1_REG=1061191976,this.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK=1,this.RTCCNTL_BASE_REG=1061191680,this.RTC_CNTL_WDTCONFIG0_REG=this.RTCCNTL_BASE_REG+148,this.RTC_CNTL_WDTCONFIG1_REG=this.RTCCNTL_BASE_REG+152,this.RTC_CNTL_WDTWPROTECT_REG=this.RTCCNTL_BASE_REG+172,this.RTC_CNTL_WDT_WKEY=1356348065,this.MEMORY_MAP=[[0,65536,`PADDING`],[1056964608,1073217536,`DROM`],[1062207488,1073217536,`EXTRAM_DATA`],[1073340416,1073348608,`RTC_DRAM`],[1073340416,1073741824,`BYTE_ACCESSIBLE`],[1073340416,1074208768,`MEM_INTERNAL`],[1073414144,1073741824,`DRAM`],[1073741824,1073848576,`IROM_MASK`],[1073872896,1074200576,`IRAM`],[1074200576,1074208768,`RTC_IRAM`],[1074266112,1082130432,`IROM`],[1342177280,1342185472,`RTC_DATA`]],this.EFUSE_VDD_SPI_REG=this.EFUSE_BASE+52,this.VDD_SPI_XPD=16,this.VDD_SPI_TIEH=32,this.VDD_SPI_FORCE=64,this.UF2_FAMILY_ID=3218951918,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`RESERVED`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`},this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612856,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=4096}async getPkgVersion(e){let t=this.EFUSE_BLOCK1_ADDR+16;return await e.readReg(t)>>0&15}async getMinorChipVersion(e){let t=await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>20&1,n=await e.readReg(this.EFUSE_BLOCK1_ADDR+16)>>4&7;return(t<<3)+n}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&3}async getFlashVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&15}async getChipDescription(e){let t={0:`ESP32-S2`,1:`ESP32-S2FH2`,2:`ESP32-S2FH4`,102:`ESP32-S2FNR2`,100:`ESP32-S2R2`},n=await this.getFlashCap(e)+await this.getPsramCap(e)*100,r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${t[n]||`unknown ESP32-S2`} (revision v${r}.${i})`}async getFlashCap(e){return await this.getFlashVersion(e)}async getPsramVersion(e){let t=this.EFUSE_BLOCK1_ADDR+12;return await e.readReg(t)>>28&15}async getPsramCap(e){return await this.getPsramVersion(e)}async getBlock2Version(e){let t=this.EFUSE_BLOCK2_ADDR+16;return await e.readReg(t)>>4&7}async getChipFeatures(e){let t=[`Wi-Fi`],n={0:`No Embedded Flash`,1:`Embedded Flash 2MB`,2:`Embedded Flash 4MB`}[await this.getFlashCap(e)]||`Unknown Embedded Flash`;t.push(n);let r={0:`No Embedded Flash`,1:`Embedded PSRAM 2MB`,2:`Embedded PSRAM 4MB`}[await this.getPsramCap(e)]||`Unknown Embedded PSRAM`;t.push(r);let i={0:`No calibration in BLK2 of efuse`,1:`ADC and temperature sensor calibration in BLK2 of efuse V1`,2:`ADC and temperature sensor calibration in BLK2 of efuse V2`}[await this.getBlock2Version(e)]||`Unknown Calibration in BLK2`;return t.push(i),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}async usingUsbOtg(e){return(await e.readReg(this.UARTDEV_BUF_NO)&255)===this.UARTDEV_BUF_NO_USB_OTG}async postConnect(e){let t=await this.usingUsbOtg(e);e.debug(`In _post_connect using USB OTG ?`+t),t&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}};export{t as ESP32S2ROM};
+import{t as e}from"./esp32-CatgC_Vd.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-S2`,this.IMAGE_CHIP_ID=2,this.IROM_MAP_START=1074266112,this.IROM_MAP_END=1085800448,this.DROM_MAP_START=1056964608,this.DROM_MAP_END=1061093376,this.CHIP_DETECT_MAGIC_VALUE=[1990],this.SPI_REG_BASE=1061167104,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.SPI_ADDR_REG_MSB=!1,this.MAC_EFUSE_REG=1061265476,this.UART_CLKDIV_REG=1061158932,this.SUPPORTS_ENCRYPTED_FLASH=!0,this.FLASH_ENCRYPTED_WRITE_ALIGN=16,this.EFUSE_BASE=1061265408,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.EFUSE_BLOCK2_ADDR=this.EFUSE_BASE+92,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=24,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=28,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=4,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=8,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=12,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<19,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.EFUSE_RD_REPEAT_DATA3_REG=this.EFUSE_BASE+60,this.EFUSE_RD_REPEAT_DATA3_REG_FLASH_TYPE_MASK=512,this.PURPOSE_VAL_XTS_AES256_KEY_1=2,this.PURPOSE_VAL_XTS_AES256_KEY_2=3,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.UARTDEV_BUF_NO=1073741076,this.UARTDEV_BUF_NO_USB_OTG=2,this.USB_RAM_BLOCK=2048,this.GPIO_STRAP_REG=1061175352,this.GPIO_STRAP_SPI_BOOT_MASK=8,this.GPIO_STRAP_VDDSPI_MASK=16,this.RTC_CNTL_OPTION1_REG=1061191976,this.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK=1,this.RTCCNTL_BASE_REG=1061191680,this.RTC_CNTL_WDTCONFIG0_REG=this.RTCCNTL_BASE_REG+148,this.RTC_CNTL_WDTCONFIG1_REG=this.RTCCNTL_BASE_REG+152,this.RTC_CNTL_WDTWPROTECT_REG=this.RTCCNTL_BASE_REG+172,this.RTC_CNTL_WDT_WKEY=1356348065,this.MEMORY_MAP=[[0,65536,`PADDING`],[1056964608,1073217536,`DROM`],[1062207488,1073217536,`EXTRAM_DATA`],[1073340416,1073348608,`RTC_DRAM`],[1073340416,1073741824,`BYTE_ACCESSIBLE`],[1073340416,1074208768,`MEM_INTERNAL`],[1073414144,1073741824,`DRAM`],[1073741824,1073848576,`IROM_MASK`],[1073872896,1074200576,`IRAM`],[1074200576,1074208768,`RTC_IRAM`],[1074266112,1082130432,`IROM`],[1342177280,1342185472,`RTC_DATA`]],this.EFUSE_VDD_SPI_REG=this.EFUSE_BASE+52,this.VDD_SPI_XPD=16,this.VDD_SPI_TIEH=32,this.VDD_SPI_FORCE=64,this.UF2_FAMILY_ID=3218951918,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`RESERVED`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`},this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612856,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=4096}async getPkgVersion(e){let t=this.EFUSE_BLOCK1_ADDR+16;return await e.readReg(t)>>0&15}async getMinorChipVersion(e){let t=await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>20&1,n=await e.readReg(this.EFUSE_BLOCK1_ADDR+16)>>4&7;return(t<<3)+n}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&3}async getFlashVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&15}async getChipDescription(e){let t={0:`ESP32-S2`,1:`ESP32-S2FH2`,2:`ESP32-S2FH4`,102:`ESP32-S2FNR2`,100:`ESP32-S2R2`},n=await this.getFlashCap(e)+await this.getPsramCap(e)*100,r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${t[n]||`unknown ESP32-S2`} (revision v${r}.${i})`}async getFlashCap(e){return await this.getFlashVersion(e)}async getPsramVersion(e){let t=this.EFUSE_BLOCK1_ADDR+12;return await e.readReg(t)>>28&15}async getPsramCap(e){return await this.getPsramVersion(e)}async getBlock2Version(e){let t=this.EFUSE_BLOCK2_ADDR+16;return await e.readReg(t)>>4&7}async getChipFeatures(e){let t=[`Wi-Fi`],n={0:`No Embedded Flash`,1:`Embedded Flash 2MB`,2:`Embedded Flash 4MB`}[await this.getFlashCap(e)]||`Unknown Embedded Flash`;t.push(n);let r={0:`No Embedded Flash`,1:`Embedded PSRAM 2MB`,2:`Embedded PSRAM 4MB`}[await this.getPsramCap(e)]||`Unknown Embedded PSRAM`;t.push(r);let i={0:`No calibration in BLK2 of efuse`,1:`ADC and temperature sensor calibration in BLK2 of efuse V1`,2:`ADC and temperature sensor calibration in BLK2 of efuse V2`}[await this.getBlock2Version(e)]||`Unknown Calibration in BLK2`;return t.push(i),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}async usingUsbOtg(e){return(await e.readReg(this.UARTDEV_BUF_NO)&255)===this.UARTDEV_BUF_NO_USB_OTG}async postConnect(e){let t=await this.usingUsbOtg(e);e.debug(`In _post_connect using USB OTG ?`+t),t&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}};export{t as ESP32S2ROM};

package/dist/ui/assets/{esp32s2-B4ccaXVM.js → esp32s2-DrH4e7iJ.js}

@@ -1 +1 @@
-import{t as e}from"./esp32-UFl3lGuU.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-S2`,this.IMAGE_CHIP_ID=2,this.IROM_MAP_START=1074266112,this.IROM_MAP_END=1085800448,this.DROM_MAP_START=1056964608,this.DROM_MAP_END=1061093376,this.CHIP_DETECT_MAGIC_VALUE=[1990],this.SPI_REG_BASE=1061167104,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.SPI_ADDR_REG_MSB=!1,this.MAC_EFUSE_REG=1061265476,this.UART_CLKDIV_REG=1061158932,this.SUPPORTS_ENCRYPTED_FLASH=!0,this.FLASH_ENCRYPTED_WRITE_ALIGN=16,this.EFUSE_BASE=1061265408,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.EFUSE_BLOCK2_ADDR=this.EFUSE_BASE+92,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=24,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=28,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=4,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=8,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=12,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<19,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.EFUSE_RD_REPEAT_DATA3_REG=this.EFUSE_BASE+60,this.EFUSE_RD_REPEAT_DATA3_REG_FLASH_TYPE_MASK=512,this.PURPOSE_VAL_XTS_AES256_KEY_1=2,this.PURPOSE_VAL_XTS_AES256_KEY_2=3,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.UARTDEV_BUF_NO=1073741076,this.UARTDEV_BUF_NO_USB_OTG=2,this.USB_RAM_BLOCK=2048,this.GPIO_STRAP_REG=1061175352,this.GPIO_STRAP_SPI_BOOT_MASK=8,this.GPIO_STRAP_VDDSPI_MASK=16,this.RTC_CNTL_OPTION1_REG=1061191976,this.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK=1,this.RTCCNTL_BASE_REG=1061191680,this.RTC_CNTL_WDTCONFIG0_REG=this.RTCCNTL_BASE_REG+148,this.RTC_CNTL_WDTCONFIG1_REG=this.RTCCNTL_BASE_REG+152,this.RTC_CNTL_WDTWPROTECT_REG=this.RTCCNTL_BASE_REG+172,this.RTC_CNTL_WDT_WKEY=1356348065,this.MEMORY_MAP=[[0,65536,`PADDING`],[1056964608,1073217536,`DROM`],[1062207488,1073217536,`EXTRAM_DATA`],[1073340416,1073348608,`RTC_DRAM`],[1073340416,1073741824,`BYTE_ACCESSIBLE`],[1073340416,1074208768,`MEM_INTERNAL`],[1073414144,1073741824,`DRAM`],[1073741824,1073848576,`IROM_MASK`],[1073872896,1074200576,`IRAM`],[1074200576,1074208768,`RTC_IRAM`],[1074266112,1082130432,`IROM`],[1342177280,1342185472,`RTC_DATA`]],this.EFUSE_VDD_SPI_REG=this.EFUSE_BASE+52,this.VDD_SPI_XPD=16,this.VDD_SPI_TIEH=32,this.VDD_SPI_FORCE=64,this.UF2_FAMILY_ID=3218951918,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`RESERVED`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`},this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612856,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=4096}async getPkgVersion(e){let t=this.EFUSE_BLOCK1_ADDR+16;return await e.readReg(t)>>0&15}async getMinorChipVersion(e){let t=await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>20&1,n=await e.readReg(this.EFUSE_BLOCK1_ADDR+16)>>4&7;return(t<<3)+n}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&3}async getFlashVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&15}async getChipDescription(e){let t={0:`ESP32-S2`,1:`ESP32-S2FH2`,2:`ESP32-S2FH4`,102:`ESP32-S2FNR2`,100:`ESP32-S2R2`},n=await this.getFlashCap(e)+await this.getPsramCap(e)*100,r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${t[n]||`unknown ESP32-S2`} (revision v${r}.${i})`}async getFlashCap(e){return await this.getFlashVersion(e)}async getPsramVersion(e){let t=this.EFUSE_BLOCK1_ADDR+12;return await e.readReg(t)>>28&15}async getPsramCap(e){return await this.getPsramVersion(e)}async getBlock2Version(e){let t=this.EFUSE_BLOCK2_ADDR+16;return await e.readReg(t)>>4&7}async getChipFeatures(e){let t=[`Wi-Fi`],n={0:`No Embedded Flash`,1:`Embedded Flash 2MB`,2:`Embedded Flash 4MB`}[await this.getFlashCap(e)]||`Unknown Embedded Flash`;t.push(n);let r={0:`No Embedded Flash`,1:`Embedded PSRAM 2MB`,2:`Embedded PSRAM 4MB`}[await this.getPsramCap(e)]||`Unknown Embedded PSRAM`;t.push(r);let i={0:`No calibration in BLK2 of efuse`,1:`ADC and temperature sensor calibration in BLK2 of efuse V1`,2:`ADC and temperature sensor calibration in BLK2 of efuse V2`}[await this.getBlock2Version(e)]||`Unknown Calibration in BLK2`;return t.push(i),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}async usingUsbOtg(e){return(await e.readReg(this.UARTDEV_BUF_NO)&255)===this.UARTDEV_BUF_NO_USB_OTG}async postConnect(e){let t=await this.usingUsbOtg(e);e.debug(`In _post_connect using USB OTG ?`+t),t&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}};export{t as ESP32S2ROM};
+import{t as e}from"./esp32-BTVUAltJ.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-S2`,this.IMAGE_CHIP_ID=2,this.IROM_MAP_START=1074266112,this.IROM_MAP_END=1085800448,this.DROM_MAP_START=1056964608,this.DROM_MAP_END=1061093376,this.CHIP_DETECT_MAGIC_VALUE=[1990],this.SPI_REG_BASE=1061167104,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.SPI_ADDR_REG_MSB=!1,this.MAC_EFUSE_REG=1061265476,this.UART_CLKDIV_REG=1061158932,this.SUPPORTS_ENCRYPTED_FLASH=!0,this.FLASH_ENCRYPTED_WRITE_ALIGN=16,this.EFUSE_BASE=1061265408,this.EFUSE_RD_REG_BASE=this.EFUSE_BASE+48,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.EFUSE_BLOCK2_ADDR=this.EFUSE_BASE+92,this.EFUSE_PURPOSE_KEY0_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY0_SHIFT=24,this.EFUSE_PURPOSE_KEY1_REG=this.EFUSE_BASE+52,this.EFUSE_PURPOSE_KEY1_SHIFT=28,this.EFUSE_PURPOSE_KEY2_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY2_SHIFT=0,this.EFUSE_PURPOSE_KEY3_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY3_SHIFT=4,this.EFUSE_PURPOSE_KEY4_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY4_SHIFT=8,this.EFUSE_PURPOSE_KEY5_REG=this.EFUSE_BASE+56,this.EFUSE_PURPOSE_KEY5_SHIFT=12,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG=this.EFUSE_RD_REG_BASE,this.EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT=1<<19,this.EFUSE_SPI_BOOT_CRYPT_CNT_REG=this.EFUSE_BASE+52,this.EFUSE_SPI_BOOT_CRYPT_CNT_MASK=7<<18,this.EFUSE_SECURE_BOOT_EN_REG=this.EFUSE_BASE+56,this.EFUSE_SECURE_BOOT_EN_MASK=1<<20,this.EFUSE_RD_REPEAT_DATA3_REG=this.EFUSE_BASE+60,this.EFUSE_RD_REPEAT_DATA3_REG_FLASH_TYPE_MASK=512,this.PURPOSE_VAL_XTS_AES256_KEY_1=2,this.PURPOSE_VAL_XTS_AES256_KEY_2=3,this.PURPOSE_VAL_XTS_AES128_KEY=4,this.UARTDEV_BUF_NO=1073741076,this.UARTDEV_BUF_NO_USB_OTG=2,this.USB_RAM_BLOCK=2048,this.GPIO_STRAP_REG=1061175352,this.GPIO_STRAP_SPI_BOOT_MASK=8,this.GPIO_STRAP_VDDSPI_MASK=16,this.RTC_CNTL_OPTION1_REG=1061191976,this.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK=1,this.RTCCNTL_BASE_REG=1061191680,this.RTC_CNTL_WDTCONFIG0_REG=this.RTCCNTL_BASE_REG+148,this.RTC_CNTL_WDTCONFIG1_REG=this.RTCCNTL_BASE_REG+152,this.RTC_CNTL_WDTWPROTECT_REG=this.RTCCNTL_BASE_REG+172,this.RTC_CNTL_WDT_WKEY=1356348065,this.MEMORY_MAP=[[0,65536,`PADDING`],[1056964608,1073217536,`DROM`],[1062207488,1073217536,`EXTRAM_DATA`],[1073340416,1073348608,`RTC_DRAM`],[1073340416,1073741824,`BYTE_ACCESSIBLE`],[1073340416,1074208768,`MEM_INTERNAL`],[1073414144,1073741824,`DRAM`],[1073741824,1073848576,`IROM_MASK`],[1073872896,1074200576,`IRAM`],[1074200576,1074208768,`RTC_IRAM`],[1074266112,1082130432,`IROM`],[1342177280,1342185472,`RTC_DATA`]],this.EFUSE_VDD_SPI_REG=this.EFUSE_BASE+52,this.VDD_SPI_XPD=16,this.VDD_SPI_TIEH=32,this.VDD_SPI_FORCE=64,this.UF2_FAMILY_ID=3218951918,this.EFUSE_MAX_KEY=5,this.KEY_PURPOSES={0:`USER/EMPTY`,1:`RESERVED`,2:`XTS_AES_256_KEY_1`,3:`XTS_AES_256_KEY_2`,4:`XTS_AES_128_KEY`,5:`HMAC_DOWN_ALL`,6:`HMAC_DOWN_JTAG`,7:`HMAC_DOWN_DIGITAL_SIGNATURE`,8:`HMAC_UP`,9:`SECURE_BOOT_DIGEST0`,10:`SECURE_BOOT_DIGEST1`,11:`SECURE_BOOT_DIGEST2`},this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612856,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=4096}async getPkgVersion(e){let t=this.EFUSE_BLOCK1_ADDR+16;return await e.readReg(t)>>0&15}async getMinorChipVersion(e){let t=await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>20&1,n=await e.readReg(this.EFUSE_BLOCK1_ADDR+16)>>4&7;return(t<<3)+n}async getMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&3}async getFlashVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&15}async getChipDescription(e){let t={0:`ESP32-S2`,1:`ESP32-S2FH2`,2:`ESP32-S2FH4`,102:`ESP32-S2FNR2`,100:`ESP32-S2R2`},n=await this.getFlashCap(e)+await this.getPsramCap(e)*100,r=await this.getMajorChipVersion(e),i=await this.getMinorChipVersion(e);return`${t[n]||`unknown ESP32-S2`} (revision v${r}.${i})`}async getFlashCap(e){return await this.getFlashVersion(e)}async getPsramVersion(e){let t=this.EFUSE_BLOCK1_ADDR+12;return await e.readReg(t)>>28&15}async getPsramCap(e){return await this.getPsramVersion(e)}async getBlock2Version(e){let t=this.EFUSE_BLOCK2_ADDR+16;return await e.readReg(t)>>4&7}async getChipFeatures(e){let t=[`Wi-Fi`],n={0:`No Embedded Flash`,1:`Embedded Flash 2MB`,2:`Embedded Flash 4MB`}[await this.getFlashCap(e)]||`Unknown Embedded Flash`;t.push(n);let r={0:`No Embedded Flash`,1:`Embedded PSRAM 2MB`,2:`Embedded PSRAM 4MB`}[await this.getPsramCap(e)]||`Unknown Embedded PSRAM`;t.push(r);let i={0:`No calibration in BLK2 of efuse`,1:`ADC and temperature sensor calibration in BLK2 of efuse V1`,2:`ADC and temperature sensor calibration in BLK2 of efuse V2`}[await this.getBlock2Version(e)]||`Unknown Calibration in BLK2`;return t.push(i),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}async usingUsbOtg(e){return(await e.readReg(this.UARTDEV_BUF_NO)&255)===this.UARTDEV_BUF_NO_USB_OTG}async postConnect(e){let t=await this.usingUsbOtg(e);e.debug(`In _post_connect using USB OTG ?`+t),t&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}};export{t as ESP32S2ROM};

package/dist/ui/assets/{esp32s3-BEGROUfT.js → esp32s3-BHbeScNz.js}

@@ -1 +1 @@
-import{t as e}from"./esp32-UFl3lGuU.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-S3`,this.IMAGE_CHIP_ID=9,this.EFUSE_BASE=1610641408,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.EFUSE_BLOCK2_ADDR=this.EFUSE_BASE+92,this.UART_CLKDIV_REG=1610612756,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612864,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.USB_RAM_BLOCK=2048,this.UARTDEV_BUF_NO_USB=3,this.UARTDEV_BUF_NO=1070526796,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1140850688,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1023410176,`DROM`],[1023410176,1040187392,`EXTRAM_DATA`],[1611653120,1611661312,`RTC_DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1070104576,1077813248,`MEM_INTERNAL`],[1070104576,1070596096,`DRAM`],[1073741824,1073848576,`IROM_MASK`],[1077346304,1077805056,`IRAM`],[1611653120,1611661312,`RTC_IRAM`],[1107296256,1115684864,`IROM`],[1342177280,1342185472,`RTC_DATA`]]}async getChipDescription(e){let t=await this.getMajorChipVersion(e),n=await this.getMinorChipVersion(e);return`${{0:`ESP32-S3 (QFN56)`,1:`ESP32-S3-PICO-1 (LGA56)`}[await this.getPkgVersion(e)]||`unknown ESP32-S3`} (revision v${t}.${n})`}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&7}async getRawMinorChipVersion(e){let t=await e.readReg(this.EFUSE_BLOCK1_ADDR+20)>>23&1,n=await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&7;return(t<<3)+n}async getMinorChipVersion(e){let t=await this.getRawMinorChipVersion(e);return await this.isEco0(e,t)?0:this.getRawMinorChipVersion(e)}async getRawMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+20)>>24&3}async getMajorChipVersion(e){let t=await this.getRawMinorChipVersion(e);return await this.isEco0(e,t)?0:this.getRawMajorChipVersion(e)}async getBlkVersionMajor(e){return await e.readReg(this.EFUSE_BLOCK2_ADDR+16)>>0&3}async getBlkVersionMinor(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>24&7}async isEco0(e,t){return(t&7)==0&&await this.getBlkVersionMajor(e)===1&&await this.getBlkVersionMinor(e)===1}async getFlashCap(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>27&7}async getFlashVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`XMC`,2:`GD`,3:`FM`,4:`TT`,5:`BY`}[await e.readReg(t)>>0&7]||``}async getPsramCap(e){let t=this.EFUSE_BASE+68+16;return await e.readReg(t)>>3&3}async getPsramVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`AP_3v3`,2:`AP_1v8`}[await e.readReg(t)>>7&3]||``}async getChipFeatures(e){let t=[`Wi-Fi`,`BLE`],n={0:null,1:`Embedded Flash 8MB`,2:`Embedded Flash 4MB`},r=await this.getFlashCap(e),i=await this.getFlashVendor(e),a=n[r],o=a===void 0?`Unknown Embedded Flash`:a;a!==null&&t.push(`${o} (${i})`);let s={0:null,1:`Embedded PSRAM 8MB`,2:`Embedded PSRAM 2MB`},c=await this.getPsramCap(e),l=await this.getPsramVendor(e),u=s[c],d=u===void 0?`Unknown Embedded PSRAM`:u;return u!==null&&t.push(`${d} (${l})`),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async postConnect(e){let t=await e.readReg(this.UARTDEV_BUF_NO)&255;e.debug(`In _post_connect `+t),t==this.UARTDEV_BUF_NO_USB&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32S3ROM};
+import{t as e}from"./esp32-BTVUAltJ.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-S3`,this.IMAGE_CHIP_ID=9,this.EFUSE_BASE=1610641408,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.EFUSE_BLOCK2_ADDR=this.EFUSE_BASE+92,this.UART_CLKDIV_REG=1610612756,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612864,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.USB_RAM_BLOCK=2048,this.UARTDEV_BUF_NO_USB=3,this.UARTDEV_BUF_NO=1070526796,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1140850688,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1023410176,`DROM`],[1023410176,1040187392,`EXTRAM_DATA`],[1611653120,1611661312,`RTC_DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1070104576,1077813248,`MEM_INTERNAL`],[1070104576,1070596096,`DRAM`],[1073741824,1073848576,`IROM_MASK`],[1077346304,1077805056,`IRAM`],[1611653120,1611661312,`RTC_IRAM`],[1107296256,1115684864,`IROM`],[1342177280,1342185472,`RTC_DATA`]]}async getChipDescription(e){let t=await this.getMajorChipVersion(e),n=await this.getMinorChipVersion(e);return`${{0:`ESP32-S3 (QFN56)`,1:`ESP32-S3-PICO-1 (LGA56)`}[await this.getPkgVersion(e)]||`unknown ESP32-S3`} (revision v${t}.${n})`}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&7}async getRawMinorChipVersion(e){let t=await e.readReg(this.EFUSE_BLOCK1_ADDR+20)>>23&1,n=await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&7;return(t<<3)+n}async getMinorChipVersion(e){let t=await this.getRawMinorChipVersion(e);return await this.isEco0(e,t)?0:this.getRawMinorChipVersion(e)}async getRawMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+20)>>24&3}async getMajorChipVersion(e){let t=await this.getRawMinorChipVersion(e);return await this.isEco0(e,t)?0:this.getRawMajorChipVersion(e)}async getBlkVersionMajor(e){return await e.readReg(this.EFUSE_BLOCK2_ADDR+16)>>0&3}async getBlkVersionMinor(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>24&7}async isEco0(e,t){return(t&7)==0&&await this.getBlkVersionMajor(e)===1&&await this.getBlkVersionMinor(e)===1}async getFlashCap(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>27&7}async getFlashVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`XMC`,2:`GD`,3:`FM`,4:`TT`,5:`BY`}[await e.readReg(t)>>0&7]||``}async getPsramCap(e){let t=this.EFUSE_BASE+68+16;return await e.readReg(t)>>3&3}async getPsramVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`AP_3v3`,2:`AP_1v8`}[await e.readReg(t)>>7&3]||``}async getChipFeatures(e){let t=[`Wi-Fi`,`BLE`],n={0:null,1:`Embedded Flash 8MB`,2:`Embedded Flash 4MB`},r=await this.getFlashCap(e),i=await this.getFlashVendor(e),a=n[r],o=a===void 0?`Unknown Embedded Flash`:a;a!==null&&t.push(`${o} (${i})`);let s={0:null,1:`Embedded PSRAM 8MB`,2:`Embedded PSRAM 2MB`},c=await this.getPsramCap(e),l=await this.getPsramVendor(e),u=s[c],d=u===void 0?`Unknown Embedded PSRAM`:u;return u!==null&&t.push(`${d} (${l})`),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async postConnect(e){let t=await e.readReg(this.UARTDEV_BUF_NO)&255;e.debug(`In _post_connect `+t),t==this.UARTDEV_BUF_NO_USB&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32S3ROM};

package/dist/ui/assets/{esp32s3-BR5mq9LB.js → esp32s3-CjMu3q4c.js}

@@ -1 +1 @@
-import{t as e}from"./esp32-z35G3TbR.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-S3`,this.IMAGE_CHIP_ID=9,this.EFUSE_BASE=1610641408,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.EFUSE_BLOCK2_ADDR=this.EFUSE_BASE+92,this.UART_CLKDIV_REG=1610612756,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612864,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.USB_RAM_BLOCK=2048,this.UARTDEV_BUF_NO_USB=3,this.UARTDEV_BUF_NO=1070526796,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1140850688,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1023410176,`DROM`],[1023410176,1040187392,`EXTRAM_DATA`],[1611653120,1611661312,`RTC_DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1070104576,1077813248,`MEM_INTERNAL`],[1070104576,1070596096,`DRAM`],[1073741824,1073848576,`IROM_MASK`],[1077346304,1077805056,`IRAM`],[1611653120,1611661312,`RTC_IRAM`],[1107296256,1115684864,`IROM`],[1342177280,1342185472,`RTC_DATA`]]}async getChipDescription(e){let t=await this.getMajorChipVersion(e),n=await this.getMinorChipVersion(e);return`${{0:`ESP32-S3 (QFN56)`,1:`ESP32-S3-PICO-1 (LGA56)`}[await this.getPkgVersion(e)]||`unknown ESP32-S3`} (revision v${t}.${n})`}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&7}async getRawMinorChipVersion(e){let t=await e.readReg(this.EFUSE_BLOCK1_ADDR+20)>>23&1,n=await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&7;return(t<<3)+n}async getMinorChipVersion(e){let t=await this.getRawMinorChipVersion(e);return await this.isEco0(e,t)?0:this.getRawMinorChipVersion(e)}async getRawMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+20)>>24&3}async getMajorChipVersion(e){let t=await this.getRawMinorChipVersion(e);return await this.isEco0(e,t)?0:this.getRawMajorChipVersion(e)}async getBlkVersionMajor(e){return await e.readReg(this.EFUSE_BLOCK2_ADDR+16)>>0&3}async getBlkVersionMinor(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>24&7}async isEco0(e,t){return(t&7)==0&&await this.getBlkVersionMajor(e)===1&&await this.getBlkVersionMinor(e)===1}async getFlashCap(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>27&7}async getFlashVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`XMC`,2:`GD`,3:`FM`,4:`TT`,5:`BY`}[await e.readReg(t)>>0&7]||``}async getPsramCap(e){let t=this.EFUSE_BASE+68+16;return await e.readReg(t)>>3&3}async getPsramVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`AP_3v3`,2:`AP_1v8`}[await e.readReg(t)>>7&3]||``}async getChipFeatures(e){let t=[`Wi-Fi`,`BLE`],n={0:null,1:`Embedded Flash 8MB`,2:`Embedded Flash 4MB`},r=await this.getFlashCap(e),i=await this.getFlashVendor(e),a=n[r],o=a===void 0?`Unknown Embedded Flash`:a;a!==null&&t.push(`${o} (${i})`);let s={0:null,1:`Embedded PSRAM 8MB`,2:`Embedded PSRAM 2MB`},c=await this.getPsramCap(e),l=await this.getPsramVendor(e),u=s[c],d=u===void 0?`Unknown Embedded PSRAM`:u;return u!==null&&t.push(`${d} (${l})`),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async postConnect(e){let t=await e.readReg(this.UARTDEV_BUF_NO)&255;e.debug(`In _post_connect `+t),t==this.UARTDEV_BUF_NO_USB&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32S3ROM};
+import{t as e}from"./esp32-CatgC_Vd.js";var t=class extends e{constructor(){super(...arguments),this.CHIP_NAME=`ESP32-S3`,this.IMAGE_CHIP_ID=9,this.EFUSE_BASE=1610641408,this.MAC_EFUSE_REG=this.EFUSE_BASE+68,this.EFUSE_BLOCK1_ADDR=this.EFUSE_BASE+68,this.EFUSE_BLOCK2_ADDR=this.EFUSE_BASE+92,this.UART_CLKDIV_REG=1610612756,this.UART_CLKDIV_MASK=1048575,this.UART_DATE_REG_ADDR=1610612864,this.FLASH_WRITE_SIZE=1024,this.BOOTLOADER_FLASH_OFFSET=0,this.SPI_REG_BASE=1610620928,this.SPI_USR_OFFS=24,this.SPI_USR1_OFFS=28,this.SPI_USR2_OFFS=32,this.SPI_MOSI_DLEN_OFFS=36,this.SPI_MISO_DLEN_OFFS=40,this.SPI_W0_OFFS=88,this.USB_RAM_BLOCK=2048,this.UARTDEV_BUF_NO_USB=3,this.UARTDEV_BUF_NO=1070526796,this.IROM_MAP_START=1107296256,this.IROM_MAP_END=1140850688,this.MEMORY_MAP=[[0,65536,`PADDING`],[1006632960,1023410176,`DROM`],[1023410176,1040187392,`EXTRAM_DATA`],[1611653120,1611661312,`RTC_DRAM`],[1070104576,1070596096,`BYTE_ACCESSIBLE`],[1070104576,1077813248,`MEM_INTERNAL`],[1070104576,1070596096,`DRAM`],[1073741824,1073848576,`IROM_MASK`],[1077346304,1077805056,`IRAM`],[1611653120,1611661312,`RTC_IRAM`],[1107296256,1115684864,`IROM`],[1342177280,1342185472,`RTC_DATA`]]}async getChipDescription(e){let t=await this.getMajorChipVersion(e),n=await this.getMinorChipVersion(e);return`${{0:`ESP32-S3 (QFN56)`,1:`ESP32-S3-PICO-1 (LGA56)`}[await this.getPkgVersion(e)]||`unknown ESP32-S3`} (revision v${t}.${n})`}async getPkgVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>21&7}async getRawMinorChipVersion(e){let t=await e.readReg(this.EFUSE_BLOCK1_ADDR+20)>>23&1,n=await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>18&7;return(t<<3)+n}async getMinorChipVersion(e){let t=await this.getRawMinorChipVersion(e);return await this.isEco0(e,t)?0:this.getRawMinorChipVersion(e)}async getRawMajorChipVersion(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+20)>>24&3}async getMajorChipVersion(e){let t=await this.getRawMinorChipVersion(e);return await this.isEco0(e,t)?0:this.getRawMajorChipVersion(e)}async getBlkVersionMajor(e){return await e.readReg(this.EFUSE_BLOCK2_ADDR+16)>>0&3}async getBlkVersionMinor(e){return await e.readReg(this.EFUSE_BLOCK1_ADDR+12)>>24&7}async isEco0(e,t){return(t&7)==0&&await this.getBlkVersionMajor(e)===1&&await this.getBlkVersionMinor(e)===1}async getFlashCap(e){let t=this.EFUSE_BASE+68+12;return await e.readReg(t)>>27&7}async getFlashVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`XMC`,2:`GD`,3:`FM`,4:`TT`,5:`BY`}[await e.readReg(t)>>0&7]||``}async getPsramCap(e){let t=this.EFUSE_BASE+68+16;return await e.readReg(t)>>3&3}async getPsramVendor(e){let t=this.EFUSE_BASE+68+16;return{1:`AP_3v3`,2:`AP_1v8`}[await e.readReg(t)>>7&3]||``}async getChipFeatures(e){let t=[`Wi-Fi`,`BLE`],n={0:null,1:`Embedded Flash 8MB`,2:`Embedded Flash 4MB`},r=await this.getFlashCap(e),i=await this.getFlashVendor(e),a=n[r],o=a===void 0?`Unknown Embedded Flash`:a;a!==null&&t.push(`${o} (${i})`);let s={0:null,1:`Embedded PSRAM 8MB`,2:`Embedded PSRAM 2MB`},c=await this.getPsramCap(e),l=await this.getPsramVendor(e),u=s[c],d=u===void 0?`Unknown Embedded PSRAM`:u;return u!==null&&t.push(`${d} (${l})`),t}async getCrystalFreq(e){return 40}_d2h(e){let t=(+e).toString(16);return t.length===1?`0`+t:t}async postConnect(e){let t=await e.readReg(this.UARTDEV_BUF_NO)&255;e.debug(`In _post_connect `+t),t==this.UARTDEV_BUF_NO_USB&&(e.ESP_RAM_BLOCK=this.USB_RAM_BLOCK)}async readMac(e){let t=await e.readReg(this.MAC_EFUSE_REG);t>>>=0;let n=await e.readReg(this.MAC_EFUSE_REG+4);n=n>>>0&65535;let r=new Uint8Array(6);return r[0]=n>>8&255,r[1]=n&255,r[2]=t>>24&255,r[3]=t>>16&255,r[4]=t>>8&255,r[5]=t&255,this._d2h(r[0])+`:`+this._d2h(r[1])+`:`+this._d2h(r[2])+`:`+this._d2h(r[3])+`:`+this._d2h(r[4])+`:`+this._d2h(r[5])}getEraseSize(e,t){return t}};export{t as ESP32S3ROM};

package/dist/ui/assets/esp8266-BPLrOmN4.js

@@ -0,0 +1 @@
+import{t as e}from"./esptool-operations-CiX8mbpu.js";export{e as ESP8266ROM};

package/dist/ui/assets/esp8266-DNz2CP4r.js

@@ -0,0 +1 @@
+import{t as e}from"./esptool-operations-SV6FPHJC.js";export{e as ESP8266ROM};