schematex 0.8.3 → 0.9.1

package/dist/{chunk-JIJWGHRN.cjs → chunk-FJVQGBPU.cjs}

@@ -2034,6 +2034,22 @@ var GROUND_TYPES = /* @__PURE__ */ new Set([
   "gnd_digital"
 ]);
 var NC_NET = /_nc\d+$/;
+var CONVENTIONAL_OPEN_NET = [
+  // power rails: vcc vdd vee vss vbat vbus vref vcore avcc avdd dvdd dvss agnd dgnd
+  /^(vcc|vdd|vee|vss|vbat|vbus|vref|vcore|avcc|avdd|dvdd|dvss|agnd|dgnd)\d*$/i,
+  // voltage-literal rails: +5V, -12v, 3.3V, 3V3, 1V8
+  /^[+-]?\d+(\.\d+)?v$/i,
+  /^\d+v\d+$/i,
+  // I/O ports: in, out, input, output, vin, vout, io (optionally numbered)
+  /^(v?in|v?out|input|output|io)\d*$/i,
+  // compound port suffixes: pwm_in, sig_out, audio_in2
+  /(^|[_.])(in|out|input|output)\d*$/i,
+  // serial/control pins broken out to headers: sda1, tx, clk, rst …
+  /^(sda|scl|tx|rx|txd|rxd|clk|sck|xtal|mosi|miso|cs|ss|en|rst|reset|nrst|int|irq|pwm)\d*$/i
+];
+function isConventionalOpenNet(id) {
+  return CONVENTIONAL_OPEN_NET.some((re) => re.test(id));
+}
 function componentIdOfAnchor(anchor) {
   const dot = anchor.lastIndexOf(".");
   return dot < 0 ? anchor : anchor.slice(0, dot);
@@ -2110,6 +2126,7 @@ function lintCircuit(text2) {
     if (net.id === "GND") continue;
     if (NC_NET.test(net.id)) continue;
     if (net.anchors.length !== 1) continue;
+    if (isConventionalOpenNet(net.id)) continue;
     const comp = compById.get(componentIdOfAnchor(net.anchors[0]));
     if (comp && INTENTIONAL_SINGLE_PIN.has(comp.componentType)) continue;
     const lower = net.id.toLowerCase();
@@ -2699,5 +2716,5 @@ exports.lintCircuit = lintCircuit;
 exports.parseCircuit = parseCircuit;
 exports.parseNetlist = parseNetlist;
 exports.renderCircuit = renderCircuit;
-//# sourceMappingURL=chunk-JIJWGHRN.cjs.map
-//# sourceMappingURL=chunk-JIJWGHRN.cjs.map
+//# sourceMappingURL=chunk-FJVQGBPU.cjs.map
+//# sourceMappingURL=chunk-FJVQGBPU.cjs.map