romdevtools 0.16.0 → 0.21.0

package/src/toolchains/cc65/presets/nes/chr-rom.cfg

@@ -0,0 +1,83 @@
+# NES CHR-ROM linker config preset for romdev (cc65-C with FIXED tile art).
+#
+# Use this when you write NES homebrew in C AND ship your pattern tables as a
+# fixed 8KB CHR-ROM blob (vs chr-ram-runtime, which has the CPU upload tiles to
+# CHR-RAM at runtime). The cartridge is NROM-256: 32KB PRG + 8KB CHR-ROM.
+#
+# DIFFERENCE FROM chr-ram-runtime.cfg:
+#   - Adds a ROM2 memory area (8KB CHR-ROM bank) + a CHARS segment. Put your
+#     tile data in `.segment "CHARS"` (e.g. `.incbin "tiles.chr"`); it lands in
+#     the CHR-ROM bank the PPU reads pattern tables from directly.
+#   - The companion crt0 (chr-rom.crt0.s) emits an iNES header with byte 5 = 1
+#     (one 8KB CHR-ROM bank) and does NOT clear CHR-RAM (there is none).
+#
+# To use this preset:
+#   1. linkerConfig: "chr-rom" on build({output:'rom'})  (pulls in chr-rom.crt0.s)
+#   2. Supply your tile art: a source with `.segment "CHARS"` + `.incbin
+#      "tiles.chr"`, plus the blob via binaryIncludePaths:{ "tiles.chr": path }.
+#      The CHARS segment must total exactly 8192 bytes (fill is on, so a short
+#      blob is padded; an over-long one errors).
+#   3. For a DIFFERENT cart config (NROM-128, >8KB CHR, a mapper, vertical
+#      mirroring), don't use this preset — use the parametric `inesHeader`
+#      build option instead (it generates the header + .cfg for any NROM shape).
+#
+# This is the cc65-C-with-segments shape. To rebuild a COMMERCIAL game from its
+# disassembly (one flat CODE blob with embedded vectors), use `inesHeader`.
+
+SYMBOLS {
+    __STACKSIZE__: type = weak, value = $0300;
+}
+MEMORY {
+    ZP:     file = "", start = $0002, size = $001A, type = rw, define = yes;
+
+    # iNES Cartridge Header — emitted by chr-rom.crt0.s (HEADER segment).
+    HEADER: file = %O, start = $0000, size = $0010, fill = yes;
+
+    # PRG-ROM: 2 × 16K = 32K (NROM-256).
+    ROM0:   file = %O, start = $8000, size = $7FFA, fill = yes, define = yes;
+
+    # Hardware vectors at end of PRG.
+    ROMV:   file = %O, start = $FFFA, size = $0006, fill = yes;
+
+    # CHR-ROM: one 8K bank. The PPU reads pattern tables straight from here —
+    # this is the whole point of the CHR-ROM preset.
+    ROM2:   file = %O, start = $0000, size = $2000, fill = yes, define = yes;
+
+    SRAM:   file = "", start = $0500, size = __STACKSIZE__, define = yes;
+
+    # BSS / DATA live in real RAM ($0300-$04FF, 512 bytes). NROM (mapper 0)
+    # with no battery has $6000-$7FFF UNMAPPED — don't put BSS there.
+    RAM:    file = "", start = $0300, size = $0200, define = yes;
+
+    # Shadow OAM at $0200 (page 2). NMI handler DMAs it to PPU sprite RAM.
+    OAM:    file = "", start = $0200, size = $0100;
+}
+SEGMENTS {
+    ZEROPAGE: load = ZP,              type = zp;
+    HEADER:   load = HEADER,          type = ro;
+    STARTUP:  load = ROM0,            type = ro,  define   = yes;
+    LOWCODE:  load = ROM0,            type = ro,  optional = yes;
+    ONCE:     load = ROM0,            type = ro,  optional = yes;
+    CODE:     load = ROM0,            type = ro,  define   = yes;
+    RODATA:   load = ROM0,            type = ro,  define   = yes;
+    DATA:     load = ROM0, run = RAM, type = rw,  define   = yes;
+    VECTORS:  load = ROMV,            type = rw;
+    CHARS:    load = ROM2,            type = ro;
+    BSS:      load = RAM,             type = bss, define   = yes;
+    OAM:      load = OAM,             type = bss, optional = yes;
+}
+FEATURES {
+    CONDES: type    = constructor,
+            label   = __CONSTRUCTOR_TABLE__,
+            count   = __CONSTRUCTOR_COUNT__,
+            segment = ONCE;
+    CONDES: type    = destructor,
+            label   = __DESTRUCTOR_TABLE__,
+            count   = __DESTRUCTOR_COUNT__,
+            segment = RODATA;
+    CONDES: type    = interruptor,
+            label   = __INTERRUPTOR_TABLE__,
+            count   = __INTERRUPTOR_COUNT__,
+            segment = RODATA,
+            import  = __CALLIRQ__;
+}

package/src/toolchains/cc65/presets/nes/chr-rom.crt0.s

@@ -0,0 +1,153 @@
+; crt0 for NES CHR-ROM mode + nes_runtime NMI handler.
+;
+; Companion to the linkerConfig:"chr-rom" preset. Identical to
+; chr-ram-runtime.crt0.s EXCEPT:
+;   - the iNES header sets byte 5 = 1 (one 8KB CHR-ROM bank), and
+;   - there is NO CHR-RAM clear loop — pattern tables come from the CHR-ROM
+;     bank (the CHARS segment / ROM2 area) the PPU reads directly.
+;
+; The NMI handler is the canonical sprite-engine sequence (OAM DMA + VRAM-queue
+; flush + scroll + PPUCTRL), same as the CHR-RAM runtime.
+;
+; Loaded silently by the linkerConfig:"chr-rom" preset.
+
+        .export         _exit
+        .export         __STARTUP__ : absolute = 1
+        .export         start
+        .export         nmi
+        .export         irq
+        .export         _shadow_oam
+
+        .import         initlib, donelib, callmain
+        .import         _main, zerobss, copydata
+        .import         __RAM_START__, __RAM_SIZE__
+        .import         __SRAM_START__, __SRAM_SIZE__
+        .import         _vram_queue_flush
+        .import         _scroll_x, _scroll_y, _ppuctrl_value, _nmi_counter
+        .importzp       c_sp
+
+; ------------------------------------------------------------------------
+; 16-byte iNES header — CHR-ROM (byte 5 = 1 → one 8KB CHR-ROM bank).
+
+.segment "HEADER"
+        .byte   $4e, $45, $53, $1a   ; "NES" + EOF
+        .byte   2                    ; PRG-ROM banks (16K each) → 32K
+        .byte   1                    ; CHR-ROM banks (8K each)  → 8K CHR-ROM
+        .byte   %00000001            ; flags6 — vertical mirroring
+        .byte   %00000000            ; flags7 — mapper hi nybble
+        .byte   0, 0, 0, 0, 0, 0, 0, 0
+
+; ------------------------------------------------------------------------
+.segment "STARTUP"
+
+start:
+        sei
+        cld
+        ldx     #$ff
+        txs
+
+        ; Disable everything that could fire during init.
+        lda     #0
+        sta     $2000           ; disable NMI
+        sta     $2001           ; disable rendering
+        sta     $4010           ; disable DMC IRQ
+        sta     $4015           ; disable APU channels
+        bit     $2002           ; clear vblank flag
+
+        ; Wait two VBlanks before touching the PPU (standard NES init).
+@vbl1:  bit     $2002
+        bpl     @vbl1
+@vbl2:  bit     $2002
+        bpl     @vbl2
+
+        ; Initialise shadow_oam to Y=$FF (off-screen) before anything else.
+        ldx     #0
+        lda     #$ff
+@oam:   sta     _shadow_oam,x
+        inx
+        bne     @oam
+
+        ; NO CHR-RAM clear — pattern tables live in the CHR-ROM bank (CHARS).
+        ; Just point PPUADDR at the palette ($3F00) ready for the caller.
+        bit     $2002           ; reset PPUADDR latch
+        lda     #$3F
+        sta     $2006
+        lda     #$00
+        sta     $2006
+
+        ; Clear BSS + copy DATA (cc65 conventions).
+        jsr     zerobss
+        jsr     copydata
+
+        ; Set up cc65's C parameter stack pointer.
+        lda     #<(__SRAM_START__ + __SRAM_SIZE__)
+        ldx     #>(__SRAM_START__ + __SRAM_SIZE__)
+        sta     c_sp
+        stx     c_sp+1
+
+        jsr     initlib
+        jsr     callmain
+
+_exit:  jsr     donelib
+        jmp     start
+
+; ------------------------------------------------------------------------
+; NMI handler — runs every vblank when ppuctrl bit 7 is set.
+
+.segment "STARTUP"
+
+nmi:
+        pha
+        txa
+        pha
+        tya
+        pha
+
+        ; OAM DMA: copy 256 bytes from $0200 to PPU OAM. Takes 513 cycles.
+        lda     #$00
+        sta     $2003           ; PPU OAMADDR = 0
+        lda     #$02            ; high byte of $0200
+        sta     $4014           ; PPU OAMDMA — kicks off the copy
+
+        ; Flush the VRAM queue (nametable/palette writes game code stashed).
+        jsr     _vram_queue_flush
+
+        ; Reset PPUADDR to $2000 so the PPU doesn't sample random VRAM as BG.
+        bit     $2002
+        lda     #$20
+        sta     $2006
+        lda     #$00
+        sta     $2006
+
+        ; Set scroll (two PPUSCROLL writes: x then y).
+        lda     _scroll_x
+        sta     $2005
+        lda     _scroll_y
+        sta     $2005
+
+        ; Re-enable NMI + base nametable + pattern-table bits via cached PPUCTRL.
+        lda     _ppuctrl_value
+        sta     $2000
+
+        ; Tick the frame counter so ppu_wait_nmi can return.
+        inc     _nmi_counter
+
+        pla
+        tay
+        pla
+        tax
+        pla
+        rti
+
+irq:    rti
+
+; ------------------------------------------------------------------------
+; Shadow OAM at $0200 — the NMI handler DMAs this to the PPU each frame.
+.segment "OAM"
+_shadow_oam: .res 256
+
+; ------------------------------------------------------------------------
+.segment "VECTORS"
+        .word   nmi             ; $FFFA
+        .word   start           ; $FFFC
+        .word   irq             ; $FFFE

package/src/toolchains/common/reassemble.js

@@ -67,7 +67,7 @@ function firstDiff(a, b) {
 //   m68k (genesis)                            → objdump → m68k-elf-as/ld/objcopy
 //   arm (gba)                                 → objdump → arm-none-eabi-as/ld/objcopy
 
-const CPU_FAMILY = {
+export const CPU_FAMILY = {
   nes: "6502", c64: "6502", atari2600: "6502", atari7800: "6502", lynx: "6502",
   snes: "65816",
   sms: "z80", gg: "z80", msx: "z80",
@@ -254,7 +254,15 @@ async function reassembleGnuNative(disasm, startAddress, original, tools, family
     if (!pinned) { const n = codeIdx.find((i) => !forced.has(i)); if (n == null) break; forced.add(n); }
   }
   // Floor: clean all-`.byte` (proven byte-exact, no labels to perturb layout).
-  const rows = [".section .text", ".global _start", "_start:"];
+  // Mirror build()'s `.org` for the no-link (z80/gbz80) path: without it,
+  // objcopy emits the section from file offset 0, and assemble()'s
+  // `bin.slice(startAddress, …)` then returns bytes that are `startAddress`-short
+  // (empty for a $4000/$8000-based region) — so any non-zero-org region (MSX
+  // $4010, GB bank1 $4000, …) silently fails the floor. The linked path sets the
+  // origin via the link script, so it must NOT carry a redundant `.org`.
+  const rows = [".section .text", ".global _start"];
+  if (tools.noLink) rows.push(`.org 0x${startAddress.toString(16)}`);
+  rows.push("_start:");
   for (let i = 0; i < original.length; i += 16) rows.push("\t.byte " + Array.from(original.slice(i, i + 16)).map((b) => "0x" + b.toString(16).padStart(2, "0")).join(","));
   const r = await assemble(rows.join("\n") + "\n");
   const ok = r.ok && r.bytes.length === original.length && firstDiff(original, r.bytes) < 0;