react-native-update 10.34.1 → 10.34.3

package/harmony/pushy/src/main/cpp/lzma/Asm/x86/7zAsm.asm

@@ -0,0 +1,341 @@
+; 7zAsm.asm -- ASM macros
+; 2023-12-08 : Igor Pavlov : Public domain
+
+
+; UASM can require these changes
+; OPTION FRAMEPRESERVEFLAGS:ON
+; OPTION PROLOGUE:NONE
+; OPTION EPILOGUE:NONE
+
+ifdef @wordsize
+; @wordsize is defined only in JWASM and ASMC and is not defined in MASM
+; @wordsize eq 8 for 64-bit x64
+; @wordsize eq 2 for 32-bit x86
+if @wordsize eq 8
+  x64 equ 1
+endif
+else
+ifdef RAX
+  x64 equ 1
+endif
+endif
+
+
+ifdef x64
+  IS_X64 equ 1
+else
+  IS_X64 equ 0
+endif
+
+ifdef ABI_LINUX
+  IS_LINUX equ 1
+else
+  IS_LINUX equ 0
+endif
+
+ifndef x64
+; Use ABI_CDECL for x86 (32-bit) only
+; if ABI_CDECL is not defined, we use fastcall abi
+ifdef ABI_CDECL
+  IS_CDECL equ 1
+else
+  IS_CDECL equ 0
+endif
+endif
+
+OPTION PROLOGUE:NONE
+OPTION EPILOGUE:NONE
+
+MY_ASM_START macro
+  ifdef x64
+    .code
+  else
+    .386
+    .model flat
+    _TEXT$00 SEGMENT PARA PUBLIC 'CODE'
+  endif
+endm
+
+MY_PROC macro name:req, numParams:req
+  align 16
+  proc_numParams = numParams
+  if (IS_X64 gt 0)
+    proc_name equ name
+  elseif (IS_LINUX gt 0)
+    proc_name equ name
+  elseif (IS_CDECL gt 0)
+    proc_name equ @CatStr(_,name)
+  else
+    proc_name equ @CatStr(@,name,@, %numParams * 4)
+  endif
+  proc_name PROC
+endm
+
+MY_ENDP macro
+    if (IS_X64 gt 0)
+        ret
+    elseif (IS_CDECL gt 0)
+        ret
+    elseif (proc_numParams LT 3)
+        ret
+    else
+        ret (proc_numParams - 2) * 4
+    endif
+  proc_name ENDP
+endm
+
+
+ifdef x64
+  REG_SIZE equ 8
+  REG_LOGAR_SIZE equ 3
+else
+  REG_SIZE equ 4
+  REG_LOGAR_SIZE equ 2
+endif
+
+  x0 equ EAX
+  x1 equ ECX
+  x2 equ EDX
+  x3 equ EBX
+  x4 equ ESP
+  x5 equ EBP
+  x6 equ ESI
+  x7 equ EDI
+
+  x0_W equ AX
+  x1_W equ CX
+  x2_W equ DX
+  x3_W equ BX
+
+  x5_W equ BP
+  x6_W equ SI
+  x7_W equ DI
+
+  x0_L equ AL
+  x1_L equ CL
+  x2_L equ DL
+  x3_L equ BL
+
+  x0_H equ AH
+  x1_H equ CH
+  x2_H equ DH
+  x3_H equ BH
+
+;  r0_L equ AL
+;  r1_L equ CL
+;  r2_L equ DL
+;  r3_L equ BL
+
+;  r0_H equ AH
+;  r1_H equ CH
+;  r2_H equ DH
+;  r3_H equ BH
+
+
+ifdef x64
+  x5_L equ BPL
+  x6_L equ SIL
+  x7_L equ DIL
+  x8_L equ r8b
+  x9_L equ r9b
+  x10_L equ r10b
+  x11_L equ r11b
+  x12_L equ r12b
+  x13_L equ r13b
+  x14_L equ r14b
+  x15_L equ r15b
+
+  r0 equ RAX
+  r1 equ RCX
+  r2 equ RDX
+  r3 equ RBX
+  r4 equ RSP
+  r5 equ RBP
+  r6 equ RSI
+  r7 equ RDI
+  x8 equ r8d
+  x9 equ r9d
+  x10 equ r10d
+  x11 equ r11d
+  x12 equ r12d
+  x13 equ r13d
+  x14 equ r14d
+  x15 equ r15d
+else
+  r0 equ x0
+  r1 equ x1
+  r2 equ x2
+  r3 equ x3
+  r4 equ x4
+  r5 equ x5
+  r6 equ x6
+  r7 equ x7
+endif
+
+  x0_R equ r0
+  x1_R equ r1
+  x2_R equ r2
+  x3_R equ r3
+  x4_R equ r4
+  x5_R equ r5
+  x6_R equ r6
+  x7_R equ r7
+  x8_R equ r8
+  x9_R equ r9
+  x10_R equ r10
+  x11_R equ r11
+  x12_R equ r12
+  x13_R equ r13
+  x14_R equ r14
+  x15_R equ r15
+
+ifdef x64
+ifdef ABI_LINUX
+
+MY_PUSH_2_REGS macro
+    push    r3
+    push    r5
+endm
+
+MY_POP_2_REGS macro
+    pop     r5
+    pop     r3
+endm
+
+endif
+endif
+
+
+MY_PUSH_4_REGS macro
+    push    r3
+    push    r5
+    push    r6
+    push    r7
+endm
+
+MY_POP_4_REGS macro
+    pop     r7
+    pop     r6
+    pop     r5
+    pop     r3
+endm
+
+
+; for fastcall and for WIN-x64
+REG_PARAM_0_x   equ x1
+REG_PARAM_0     equ r1
+REG_PARAM_1_x   equ x2
+REG_PARAM_1     equ r2
+
+ifndef x64
+; for x86-fastcall
+
+REG_ABI_PARAM_0_x equ REG_PARAM_0_x
+REG_ABI_PARAM_0   equ REG_PARAM_0
+REG_ABI_PARAM_1_x equ REG_PARAM_1_x
+REG_ABI_PARAM_1   equ REG_PARAM_1
+
+MY_PUSH_PRESERVED_ABI_REGS_UP_TO_INCLUDING_R11 macro
+        MY_PUSH_4_REGS
+endm
+
+MY_POP_PRESERVED_ABI_REGS_UP_TO_INCLUDING_R11 macro
+        MY_POP_4_REGS
+endm
+
+else
+; x64
+
+if  (IS_LINUX eq 0)
+
+; for WIN-x64:
+REG_PARAM_2_x   equ x8
+REG_PARAM_2     equ r8
+REG_PARAM_3     equ r9
+
+REG_ABI_PARAM_0_x equ REG_PARAM_0_x
+REG_ABI_PARAM_0   equ REG_PARAM_0
+REG_ABI_PARAM_1_x equ REG_PARAM_1_x
+REG_ABI_PARAM_1   equ REG_PARAM_1
+REG_ABI_PARAM_2_x equ REG_PARAM_2_x
+REG_ABI_PARAM_2   equ REG_PARAM_2
+REG_ABI_PARAM_3   equ REG_PARAM_3
+
+else
+; for LINUX-x64:
+REG_LINUX_PARAM_0_x equ x7
+REG_LINUX_PARAM_0   equ r7
+REG_LINUX_PARAM_1_x equ x6
+REG_LINUX_PARAM_1   equ r6
+REG_LINUX_PARAM_2   equ r2
+REG_LINUX_PARAM_3   equ r1
+REG_LINUX_PARAM_4_x equ x8
+REG_LINUX_PARAM_4   equ r8
+REG_LINUX_PARAM_5   equ r9
+
+REG_ABI_PARAM_0_x equ REG_LINUX_PARAM_0_x
+REG_ABI_PARAM_0   equ REG_LINUX_PARAM_0
+REG_ABI_PARAM_1_x equ REG_LINUX_PARAM_1_x
+REG_ABI_PARAM_1   equ REG_LINUX_PARAM_1
+REG_ABI_PARAM_2   equ REG_LINUX_PARAM_2
+REG_ABI_PARAM_3   equ REG_LINUX_PARAM_3
+REG_ABI_PARAM_4_x equ REG_LINUX_PARAM_4_x
+REG_ABI_PARAM_4   equ REG_LINUX_PARAM_4
+REG_ABI_PARAM_5   equ REG_LINUX_PARAM_5
+
+MY_ABI_LINUX_TO_WIN_2 macro
+        mov     r2, r6
+        mov     r1, r7
+endm
+
+MY_ABI_LINUX_TO_WIN_3 macro
+        mov     r8, r2
+        mov     r2, r6
+        mov     r1, r7
+endm
+
+MY_ABI_LINUX_TO_WIN_4 macro
+        mov     r9, r1
+        mov     r8, r2
+        mov     r2, r6
+        mov     r1, r7
+endm
+
+endif ; IS_LINUX
+
+
+MY_PUSH_PRESERVED_ABI_REGS_UP_TO_INCLUDING_R11 macro
+    if  (IS_LINUX gt 0)
+        MY_PUSH_2_REGS
+    else
+        MY_PUSH_4_REGS
+    endif
+endm
+
+MY_POP_PRESERVED_ABI_REGS_UP_TO_INCLUDING_R11 macro
+    if  (IS_LINUX gt 0)
+        MY_POP_2_REGS
+    else
+        MY_POP_4_REGS
+    endif
+endm
+
+
+MY_PUSH_PRESERVED_ABI_REGS macro
+    MY_PUSH_PRESERVED_ABI_REGS_UP_TO_INCLUDING_R11
+        push    r12
+        push    r13
+        push    r14
+        push    r15
+endm
+
+
+MY_POP_PRESERVED_ABI_REGS macro
+        pop     r15
+        pop     r14
+        pop     r13
+        pop     r12
+    MY_POP_PRESERVED_ABI_REGS_UP_TO_INCLUDING_R11
+endm
+
+endif ; x64

package/harmony/pushy/src/main/cpp/lzma/Asm/x86/7zCrcOpt.asm

@@ -0,0 +1,258 @@
+; 7zCrcOpt.asm -- CRC32 calculation : optimized version
+; 2023-12-08 : Igor Pavlov : Public domain
+
+include 7zAsm.asm
+
+MY_ASM_START
+
+NUM_WORDS       equ     3
+UNROLL_CNT      equ     2
+
+if (NUM_WORDS lt 1) or (NUM_WORDS gt 64)
+.err <NUM_WORDS_IS_INCORRECT>
+endif
+if (UNROLL_CNT lt 1)
+.err <UNROLL_CNT_IS_INCORRECT>
+endif
+
+rD      equ  r2
+rD_x    equ  x2
+rN      equ  r7
+rT      equ  r5
+
+ifndef x64
+    if (IS_CDECL gt 0)
+        crc_OFFS    equ (REG_SIZE * 5)
+        data_OFFS   equ (REG_SIZE + crc_OFFS)
+        size_OFFS   equ (REG_SIZE + data_OFFS)
+    else
+        size_OFFS   equ (REG_SIZE * 5)
+    endif
+        table_OFFS  equ (REG_SIZE + size_OFFS)
+endif
+
+; rN + rD is same speed as rD, but we reduce one instruction in loop
+SRCDAT_1        equ     rN + rD * 1 + 1 *
+SRCDAT_4        equ     rN + rD * 1 + 4 *
+
+CRC macro op:req, dest:req, src:req, t:req
+        op      dest, dword ptr [rT + @CatStr(src, _R) * 4 + 0400h * (t)]
+endm
+
+CRC_XOR macro dest:req, src:req, t:req
+        CRC     xor, dest, src, t
+endm
+
+CRC_MOV macro dest:req, src:req, t:req
+        CRC     mov, dest, src, t
+endm
+
+MOVZXLO macro dest:req, src:req
+        movzx   dest, @CatStr(src, _L)
+endm
+
+MOVZXHI macro dest:req, src:req
+        movzx   dest, @CatStr(src, _H)
+endm
+
+; movzx x0, x0_L - is slow in some cpus (ivb), if same register for src and dest
+; movzx x3, x0_L sometimes is 0   cycles latency (not always)
+; movzx x3, x0_L sometimes is 0.5 cycles latency
+; movzx x3, x0_H is 2 cycles latency in some cpus
+
+CRC1b macro
+        movzx   x6, byte ptr [rD]
+        MOVZXLO x3, x0
+        inc     rD
+        shr     x0, 8
+        xor     x6, x3
+        CRC_XOR x0, x6, 0
+        dec     rN
+endm
+
+LOAD_1 macro dest:req, t:req, iter:req, index:req
+        movzx   dest, byte ptr [SRCDAT_1 (4 * (NUM_WORDS - 1 - t + iter * NUM_WORDS) + index)]
+endm
+
+LOAD_2 macro dest:req, t:req, iter:req, index:req
+        movzx   dest, word ptr [SRCDAT_1 (4 * (NUM_WORDS - 1 - t + iter * NUM_WORDS) + index)]
+endm
+
+CRC_QUAD macro nn, t:req, iter:req
+ifdef x64
+        ; paired memory loads give 1-3% speed gain, but it uses more registers
+        LOAD_2  x3, t, iter, 0
+        LOAD_2  x9, t, iter, 2
+        MOVZXLO x6, x3
+        shr     x3, 8
+        CRC_XOR nn, x6, t * 4 + 3
+        MOVZXLO x6, x9
+        shr     x9, 8
+        CRC_XOR nn, x3, t * 4 + 2
+        CRC_XOR nn, x6, t * 4 + 1
+        CRC_XOR nn, x9, t * 4 + 0
+elseif 0
+        LOAD_2  x3, t, iter, 0
+        MOVZXLO x6, x3
+        shr     x3, 8
+        CRC_XOR nn, x6, t * 4 + 3
+        CRC_XOR nn, x3, t * 4 + 2
+        LOAD_2  x3, t, iter, 2
+        MOVZXLO x6, x3
+        shr     x3, 8
+        CRC_XOR nn, x6, t * 4 + 1
+        CRC_XOR nn, x3, t * 4 + 0
+elseif 0
+        LOAD_1  x3, t, iter, 0
+        LOAD_1  x6, t, iter, 1
+        CRC_XOR nn, x3, t * 4 + 3
+        CRC_XOR nn, x6, t * 4 + 2
+        LOAD_1  x3, t, iter, 2
+        LOAD_1  x6, t, iter, 3
+        CRC_XOR nn, x3, t * 4 + 1
+        CRC_XOR nn, x6, t * 4 + 0
+else
+        ; 32-bit load is better if there is only one read port (core2)
+        ; but that code can be slower if there are 2 read ports (snb)
+        mov     x3, dword ptr [SRCDAT_1 (4 * (NUM_WORDS - 1 - t + iter *  NUM_WORDS) + 0)]
+        MOVZXLO x6, x3
+        CRC_XOR nn, x6, t * 4 + 3
+        MOVZXHI x6, x3
+        shr     x3, 16
+        CRC_XOR nn, x6, t * 4 + 2
+        MOVZXLO x6, x3
+        shr     x3, 8
+        CRC_XOR nn, x6, t * 4 + 1
+        CRC_XOR nn, x3, t * 4 + 0
+endif
+endm
+
+
+LAST    equ     (4 * (NUM_WORDS - 1))
+
+CRC_ITER macro qq, nn, iter
+        mov     nn, [SRCDAT_4 (NUM_WORDS * (1 + iter))]
+
+    i = 0
+    rept NUM_WORDS - 1
+        CRC_QUAD nn, i, iter
+        i = i + 1
+    endm
+
+        MOVZXLO x6, qq
+        mov     x3, qq
+        shr     x3, 24
+        CRC_XOR nn, x6, LAST + 3
+        CRC_XOR nn, x3, LAST + 0
+        ror     qq, 16
+        MOVZXLO x6, qq
+        shr     qq, 24
+        CRC_XOR nn, x6, LAST + 1
+if ((UNROLL_CNT and 1) eq 1) and (iter eq (UNROLL_CNT - 1))
+        CRC_MOV qq, qq, LAST + 2
+        xor     qq, nn
+else
+        CRC_XOR nn, qq, LAST + 2
+endif
+endm
+
+
+; + 4 for prefetching next 4-bytes after current iteration
+NUM_BYTES_LIMIT equ     (NUM_WORDS * 4 * UNROLL_CNT + 4)
+ALIGN_MASK      equ     3
+
+
+; MY_PROC @CatStr(CrcUpdateT, 12), 4
+MY_PROC @CatStr(CrcUpdateT, %(NUM_WORDS * 4)), 4
+        MY_PUSH_PRESERVED_ABI_REGS_UP_TO_INCLUDING_R11
+    ifdef x64
+        mov     x0, REG_ABI_PARAM_0_x   ; x0 = x1(win) / x7(linux)
+        mov     rT, REG_ABI_PARAM_3     ; r5 = r9(win) / x1(linux)
+        mov     rN, REG_ABI_PARAM_2     ; r7 = r8(win) / r2(linux)
+        ; mov     rD, REG_ABI_PARAM_1     ; r2 = r2(win)
+      if  (IS_LINUX gt 0)
+        mov     rD, REG_ABI_PARAM_1     ; r2 = r6
+      endif
+    else
+      if  (IS_CDECL gt 0)
+        mov     x0, [r4 + crc_OFFS]
+        mov     rD, [r4 + data_OFFS]
+      else
+        mov     x0, REG_ABI_PARAM_0_x
+      endif
+        mov     rN, [r4 + size_OFFS]
+        mov     rT, [r4 + table_OFFS]
+    endif
+    
+        cmp     rN, NUM_BYTES_LIMIT + ALIGN_MASK
+        jb      crc_end
+@@:
+        test    rD_x, ALIGN_MASK    ; test    rD, ALIGN_MASK
+        jz      @F
+        CRC1b
+        jmp     @B
+@@:
+        xor     x0, dword ptr [rD]
+        lea     rN, [rD + rN * 1 - (NUM_BYTES_LIMIT - 1)]
+        sub     rD, rN
+
+align 16
+@@:
+unr_index = 0
+while unr_index lt UNROLL_CNT
+    if (unr_index and 1) eq 0
+        CRC_ITER x0, x1, unr_index
+    else
+        CRC_ITER x1, x0, unr_index
+    endif
+        unr_index = unr_index + 1
+endm
+
+        add     rD, NUM_WORDS * 4 * UNROLL_CNT
+        jnc     @B
+
+if 0
+        ; byte verson
+        add     rD, rN
+        xor     x0, dword ptr [rD]
+        add     rN, NUM_BYTES_LIMIT - 1
+else
+        ; 4-byte version
+        add     rN, 4 * NUM_WORDS * UNROLL_CNT
+        sub     rD, 4 * NUM_WORDS * UNROLL_CNT
+@@:
+        MOVZXLO x3, x0
+        MOVZXHI x1, x0
+        shr     x0, 16
+        MOVZXLO x6, x0
+        shr     x0, 8
+        CRC_MOV x0, x0, 0
+        CRC_XOR x0, x3, 3
+        CRC_XOR x0, x1, 2
+        CRC_XOR x0, x6, 1
+
+        add     rD, 4
+if (NUM_WORDS * UNROLL_CNT) ne 1
+        jc      @F
+        xor     x0, [SRCDAT_4 0]
+        jmp     @B
+@@:
+endif
+        add     rD, rN
+        add     rN, 4 - 1
+        
+endif
+        
+        sub     rN, rD
+crc_end:
+        test    rN, rN
+        jz      func_end
+@@:
+        CRC1b
+        jnz     @B
+
+func_end:
+        MY_POP_PRESERVED_ABI_REGS_UP_TO_INCLUDING_R11
+MY_ENDP
+
+end