react-native-executorch 0.10.5 → 0.10.7

package/third-party/common/phonemis/src/third-party/xsimd/config/xsimd_cpuid.hpp

@@ -0,0 +1,144 @@
+/***************************************************************************
+ * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and         *
+ * Martin Renou                                                             *
+ * Copyright (c) QuantStack                                                 *
+ * Copyright (c) Serge Guelton                                              *
+ *                                                                          *
+ * Distributed under the terms of the BSD 3-Clause License.                 *
+ *                                                                          *
+ * The full license is in the file LICENSE, distributed with this software. *
+ ****************************************************************************/
+
+#ifndef XSIMD_CPUID_HPP
+#define XSIMD_CPUID_HPP
+
+#include "../types/xsimd_all_registers.hpp"
+#include "./xsimd_cpu_features.hpp"
+#include "./xsimd_macros.hpp"
+
+namespace xsimd
+{
+    namespace detail
+    {
+        struct supported_arch
+        {
+
+#define ARCH_FIELD_EX(arch, field_name) \
+    unsigned field_name = 0;            \
+    XSIMD_INLINE bool has(::xsimd::arch) const { return this->field_name; }
+
+#define ARCH_FIELD_EX_REUSE(arch, field_name) \
+    XSIMD_INLINE bool has(::xsimd::arch) const { return this->field_name; }
+
+#define ARCH_FIELD(name) ARCH_FIELD_EX(name, name)
+
+            ARCH_FIELD(sse2)
+            ARCH_FIELD(sse3)
+
+            ARCH_FIELD(ssse3)
+            ARCH_FIELD(sse4_1)
+            ARCH_FIELD(sse4_2)
+            // ARCH_FIELD(sse4a)
+            ARCH_FIELD_EX(fma3<::xsimd::sse4_2>, fma3_sse42)
+            ARCH_FIELD(fma4)
+            // ARCH_FIELD(xop)
+            ARCH_FIELD(avx)
+            ARCH_FIELD_EX(fma3<::xsimd::avx>, fma3_avx)
+            ARCH_FIELD(avx2)
+            ARCH_FIELD(avxvnni)
+            ARCH_FIELD_EX(fma3<::xsimd::avx2>, fma3_avx2)
+            ARCH_FIELD(avx512f)
+            ARCH_FIELD(avx512cd)
+            ARCH_FIELD(avx512dq)
+            ARCH_FIELD(avx512bw)
+            ARCH_FIELD(avx512er)
+            ARCH_FIELD(avx512pf)
+            ARCH_FIELD(avx512ifma)
+            ARCH_FIELD(avx512vbmi)
+            ARCH_FIELD(avx512vbmi2)
+            ARCH_FIELD_EX(avx512vnni<::xsimd::avx512bw>, avx512vnni_bw)
+            ARCH_FIELD_EX(avx512vnni<::xsimd::avx512vbmi2>, avx512vnni_vbmi2)
+            ARCH_FIELD(neon)
+            ARCH_FIELD(neon64)
+            ARCH_FIELD_EX(i8mm<::xsimd::neon64>, i8mm_neon64)
+            ARCH_FIELD_EX(detail::sve<512>, sve512)
+            ARCH_FIELD_EX(detail::sve<256>, sve256)
+            ARCH_FIELD_EX(detail::sve<128>, sve128)
+            ARCH_FIELD_EX(detail::rvv<512>, rvv512)
+            ARCH_FIELD_EX(detail::rvv<256>, rvv256)
+            ARCH_FIELD_EX(detail::rvv<128>, rvv128)
+            ARCH_FIELD(wasm)
+            ARCH_FIELD(vsx)
+            ARCH_FIELD(vxe)
+
+#undef ARCH_FIELD
+
+            XSIMD_INLINE supported_arch() noexcept
+            {
+#if XSIMD_WITH_WASM
+                wasm = 1;
+#endif
+
+                const auto cpu = xsimd::cpu_features();
+
+                vxe = cpu.vxe();
+
+                vsx = cpu.vsx();
+
+                rvv128 = cpu.rvv() && (cpu.rvv_size_bytes() >= (128 / 8));
+                rvv256 = cpu.rvv() && (cpu.rvv_size_bytes() >= (256 / 8));
+                rvv512 = cpu.rvv() && (cpu.rvv_size_bytes() >= (512 / 8));
+
+                neon = cpu.neon();
+                neon64 = cpu.neon64();
+                i8mm_neon64 = cpu.neon64() && cpu.i8mm();
+
+                // Running SVE128 on a SVE256 machine is more tricky than the x86 equivalent
+                // of running SSE code on an AVX machine and requires to explicitly change the
+                // vector length using `prctl` (per thread setting).
+                // This is something we have not tested and not integrated in xsimd so the safe
+                // default is to assume only one valid SVE width at runtime.
+                sve128 = cpu.sve() && (cpu.sve_size_bytes() * 8 == 128);
+                sve256 = cpu.sve() && (cpu.sve_size_bytes() * 8 == 256);
+                sve512 = cpu.sve() && (cpu.sve_size_bytes() * 8 == 512);
+
+                sse2 = cpu.sse2();
+                sse3 = cpu.sse3();
+                ssse3 = cpu.ssse3();
+                sse4_1 = cpu.sse4_1();
+                sse4_2 = cpu.sse4_2();
+                fma3_sse42 = cpu.fma3();
+
+                // sse4a not implemented in cpu_id yet
+                // xop not implemented in cpu_id yet
+
+                avx = cpu.avx();
+                fma3_avx = avx && fma3_sse42;
+                fma4 = cpu.fma4();
+                avx2 = cpu.avx2();
+                avxvnni = cpu.avxvnni();
+                fma3_avx2 = avx2 && fma3_sse42;
+
+                avx512f = cpu.avx512f();
+                avx512cd = cpu.avx512cd();
+                avx512dq = cpu.avx512dq();
+                avx512bw = cpu.avx512bw();
+                avx512er = cpu.avx512er();
+                avx512pf = cpu.avx512pf();
+                avx512ifma = cpu.avx512ifma();
+                avx512vbmi = cpu.avx512vbmi();
+                avx512vbmi2 = cpu.avx512vbmi2();
+                avx512vnni_bw = cpu.avx512vnni_bw();
+                avx512vnni_vbmi2 = avx512vbmi2 && avx512vnni_bw;
+            }
+        };
+    } // namespace detail
+
+    XSIMD_INLINE detail::supported_arch available_architectures() noexcept
+    {
+        static detail::supported_arch supported;
+        return supported;
+    }
+}
+
+#endif

package/third-party/common/phonemis/src/third-party/xsimd/config/xsimd_getauxval.hpp

@@ -0,0 +1,159 @@
+/***************************************************************************
+ * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and         *
+ * Martin Renou                                                             *
+ * Copyright (c) QuantStack                                                 *
+ * Copyright (c) Serge Guelton                                              *
+ *                                                                          *
+ * Distributed under the terms of the BSD 3-Clause License.                 *
+ *                                                                          *
+ * The full license is in the file LICENSE, distributed with this software. *
+ ***************************************************************************/
+
+#ifndef XSIMD_GETAUXVAL_HPP
+#define XSIMD_GETAUXVAL_HPP
+
+#include "../utils/bits.hpp"
+#include "./xsimd_config.hpp"
+
+#if XSIMD_HAVE_LINUX_GETAUXVAL
+#include <sys/auxv.h> // getauxval
+#endif
+
+namespace xsimd
+{
+    namespace detail
+    {
+        using linux_getauxval_t = unsigned long;
+
+        inline linux_getauxval_t linux_getauxval(linux_getauxval_t type) noexcept;
+    }
+
+    /*
+     * Holds the value of a Linux auxiliary vector entry (e.g. AT_HWCAP).
+     *
+     * On Linux systems, the kernel exposes some CPU features through the
+     * auxiliary vector, which can be queried via `getauxval(AT_HWCAP)`.
+     * Well defined on all platforms, and will return always falsw on
+     * non-linux platforms.
+     *
+     * Usage:
+     *   auto hwcap = linux_auxval::read(AT_HWCAP);
+     *   bool neon = hwcap.has_feature(HWCAP_NEON);
+     *
+     * @see https://www.kernel.org/doc/Documentation/arm64/elf_hwcaps.txt
+     */
+    class linux_auxval
+    {
+    private:
+        using getauxval_t = detail::linux_getauxval_t;
+
+    public:
+        constexpr linux_auxval() noexcept = default;
+
+        inline static linux_auxval read(getauxval_t type) noexcept
+        {
+            return linux_auxval(detail::linux_getauxval(type));
+        }
+
+        constexpr bool has_feature(getauxval_t feat) const noexcept
+        {
+            return (m_auxval & feat) == feat;
+        }
+
+    private:
+        getauxval_t m_auxval = {};
+
+        constexpr explicit linux_auxval(getauxval_t v) noexcept
+            : m_auxval(v)
+        {
+        }
+    };
+
+    class linux_hwcap_backend
+    {
+    public:
+        inline linux_auxval hwcap() const noexcept;
+
+        inline linux_auxval hwcap2() const noexcept;
+
+    private:
+        enum class status
+        {
+            hwcap_valid = 0,
+            hwcap2_valid = 1,
+        };
+
+        using status_bitset = utils::uint_bitset<status, std::uint32_t>;
+
+        mutable status_bitset m_status {};
+        mutable xsimd::linux_auxval m_hwcap {};
+        mutable xsimd::linux_auxval m_hwcap2 {};
+    };
+
+    class linux_hwcap_backend_noop
+    {
+    public:
+        inline linux_auxval hwcap() const noexcept { return {}; }
+
+        inline linux_auxval hwcap2() const noexcept { return {}; }
+    };
+
+#if XSIMD_HAVE_LINUX_GETAUXVAL
+    using linux_hwcap_backend_default = linux_hwcap_backend;
+#else
+    // Contrary to CPUID that is only used on one architecture, HWCAP are
+    // available on multiple architectures with different meaning for the
+    // different bit fields.
+    // We use the Linux `HWCAP` constants directly to avoid repetition, so
+    // we could not use a default implementation without already being on
+    // Linux anyways.
+    struct linux_hwcap_backend_default
+    {
+    };
+#endif
+
+    /********************
+     *  Implementation  *
+     ********************/
+
+    namespace detail
+    {
+#if XSIMD_HAVE_LINUX_GETAUXVAL
+        inline linux_getauxval_t linux_getauxval(linux_getauxval_t type) noexcept
+        {
+            return getauxval(type);
+        }
+#else
+        inline linux_getauxval_t linux_getauxval(linux_getauxval_t) noexcept
+        {
+            return {}; // All bits set to 0
+        }
+#endif
+    }
+
+    inline linux_auxval linux_hwcap_backend::hwcap() const noexcept
+    {
+        if (!m_status.bit_is_set<status::hwcap_valid>())
+        {
+#if XSIMD_HAVE_LINUX_GETAUXVAL
+            m_hwcap = linux_auxval::read(AT_HWCAP);
+#endif
+            m_status.set_bit<status::hwcap_valid>();
+        }
+        return m_hwcap;
+    }
+
+    inline linux_auxval linux_hwcap_backend::hwcap2() const noexcept
+    {
+        if (!m_status.bit_is_set<status::hwcap2_valid>())
+        {
+#if XSIMD_HAVE_LINUX_GETAUXVAL
+            m_hwcap2 = linux_auxval::read(AT_HWCAP2);
+#endif
+            m_status.set_bit<status::hwcap2_valid>();
+        }
+        return m_hwcap2;
+    }
+}
+
+#endif

package/third-party/common/phonemis/src/third-party/xsimd/config/xsimd_macros.hpp

@@ -0,0 +1,78 @@
+/***************************************************************************
+ * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and         *
+ * Martin Renou                                                             *
+ * Copyright (c) QuantStack                                                 *
+ * Copyright (c) Serge Guelton                                              *
+ *                                                                          *
+ * Distributed under the terms of the BSD 3-Clause License.                 *
+ *                                                                          *
+ * The full license is in the file LICENSE, distributed with this software. *
+ ****************************************************************************/
+
+#ifndef XSIMD_MACROS_HPP
+#define XSIMD_MACROS_HPP
+
+#include "./xsimd_config.hpp"
+
+#if defined(__VEC__)
+#define XSIMD_INLINE inline
+#elif defined __has_attribute
+#if __has_attribute(always_inline)
+#define XSIMD_INLINE inline __attribute__((always_inline))
+#else
+#define XSIMD_INLINE inline
+#endif
+#elif defined(_MSC_VER)
+#define XSIMD_INLINE inline __forceinline
+#else
+#define XSIMD_INLINE inline
+#endif
+
+#define XSIMD_CONCAT_INNER(a, b) a##b
+#define XSIMD_CONCAT(a, b) XSIMD_CONCAT_INNER(a, b)
+
+#if defined(__FAST_MATH__)
+#define XSIMD_NO_DENORMALS
+#define XSIMD_NO_INFINITIES
+#define XSIMD_NO_NANS
+#endif
+
+#if defined(__has_cpp_attribute)
+// if this check passes, then the compiler supports feature test macros
+#if __has_cpp_attribute(nodiscard) >= 201603L
+// if this check passes, then the compiler supports [[nodiscard]] without a message
+#define XSIMD_NO_DISCARD [[nodiscard]]
+#endif
+#endif
+
+#if !defined(XSIMD_NO_DISCARD) && XSIMD_CPP_VERSION >= 201703L
+// this means that the previous tests failed, but we are using C++17 or higher
+#define XSIMD_NO_DISCARD [[nodiscard]]
+#endif
+
+#if !defined(XSIMD_NO_DISCARD) && (defined(__GNUC__) || defined(__clang__))
+// this means that the previous checks failed, but we are using GCC or Clang
+#define XSIMD_NO_DISCARD __attribute__((warn_unused_result))
+#endif
+
+#if !defined(XSIMD_NO_DISCARD)
+// this means that all the previous checks failed, so we fallback to doing nothing
+#define XSIMD_NO_DISCARD
+#endif
+
+#ifdef __cpp_if_constexpr
+// this means that the compiler supports the `if constexpr` construct
+#define XSIMD_IF_CONSTEXPR if constexpr
+#endif
+
+#if !defined(XSIMD_IF_CONSTEXPR) && XSIMD_CPP_VERSION >= 201703L
+// this means that the previous test failed, but we are using C++17 or higher
+#define XSIMD_IF_CONSTEXPR if constexpr
+#endif
+
+#if !defined(XSIMD_IF_CONSTEXPR)
+// this means that all the previous checks failed, so we fallback to a normal `if`
+#define XSIMD_IF_CONSTEXPR if
+#endif
+
+#endif