pi-mega-compact 0.20.47 → 0.20.48

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
@@ -0,0 +1,36 @@
1
+ /**
2
+ * config/vector-cortex-enc0f.ts — ENC-0f p95 + marginal-RSS qualification gate.
3
+ *
4
+ * Extracted from vector-cortex.ts so that file stays under the 300-line soft
5
+ * limit (soft-as-hard gate), exactly as vector-cortex-enc0a.ts / enc0b.ts /
6
+ * enc0c.ts / enc0d.ts / enc0e.ts and the VC8C/VC9A-D/ML5A-E/DEDUP_ATTR
7
+ * siblings were. vector-cortex.ts re-exports the flag below and root
8
+ * src/config.ts re-exports it, so no consumer import path changes.
9
+ *
10
+ * ENC-0f closes HG-5 (RSS margin) with a real asset: the qualification gate
11
+ * that admits the ENC-0d-promoted trained asset to mode A. The gate runs the
12
+ * ML5-B bench under --expose-gc and asserts p95 ≤ ENCODER_LATENCY_P95_MS
13
+ * (40 ms @ 512 tokens / 4 threads), marginal RSS ≤ ENCODER_RSS_BUDGET_BYTES
14
+ * (150 MiB, baseline-subtracted), determinism (distinct digests == 1), and
15
+ * the opset-21 handshake. On pass it emits a QualificationV1 record that flips
16
+ * the runtime to qualified mode A; on any failure the asset stays demoted.
17
+ *
18
+ * `MEGACOMPACT_ENC_0F=0` disables the gate entirely: no qualification gate
19
+ * runs, no QualificationV1 record is written for the real trained asset, and
20
+ * the runtime keeps serving the ENC-0d survivor. Flag-off is byte-identical to
21
+ * the predecessor. The flag MUST also be a dashboard SETTINGS toggle (visible
22
+ * in config UI, never in EXCLUDED_SETTINGS).
23
+ *
24
+ * Pi-agnostic, dependency-free (PREVENT-PI-004 / PREVENT-011).
25
+ */
26
+ import { sprintFlag } from "./vector-cortex-flag.js";
27
+ /**
28
+ * ENC-0f — p95 + marginal-RSS qualification gate for the real trained asset.
29
+ * Default ON. `MEGACOMPACT_ENC_0F=0` disables and is byte-identical to the
30
+ * predecessor (ENC-0e): no qualification gate runs, no QualificationV1 record
31
+ * is written for the real trained asset, and the runtime keeps serving the
32
+ * ENC-0d survivor. This flag MUST also be a dashboard SETTINGS toggle (visible
33
+ * in config UI, never in EXCLUDED_SETTINGS), mirroring
34
+ * ENC_0A/ENC_0B/ENC_0C/ENC_0D/ENC_0E.
35
+ */
36
+ export const ENC_0F_ENABLED = () => sprintFlag("MEGACOMPACT_ENC_0F");
@@ -30,5 +30,6 @@ export { ENC_0B_ENABLED } from "./vector-cortex-enc0b.js";
30
30
  export { ENC_0C_ENABLED } from "./vector-cortex-enc0c.js";
31
31
  export { ENC_0D_ENABLED } from "./vector-cortex-enc0d.js";
32
32
  export { ENC_0E_ENABLED } from "./vector-cortex-enc0e.js";
33
+ export { ENC_0F_ENABLED } from "./vector-cortex-enc0f.js";
33
34
  // Breaker constants (TRIAD_RESILIENCE.md §breaker) extracted to vector-cortex-breakers.ts.
34
35
  export { BREAKER_WINDOW_MS, BREAKER_MIN_ATTEMPTS, BREAKER_PERF_FAILURES, BREAKER_PERF_FAILURE_RATE, BREAKER_CORRECTNESS_FAILURES, BREAKER_COOLDOWN_MS, BREAKER_PROBE_COUNT, BREAKER_RETRY_BASE_MS, BREAKER_RETRY_CAP_MS, BREAKER_RETRY_JITTER, BREAKER_HYSTERESIS_FAILURE_RATE, BREAKER_HYSTERESIS_BUDGET_P95_MS, BREAKER_MIN_HEALTHY_RESIDENCE_MS, } from "./vector-cortex-breakers.js";
package/dist/config.js CHANGED
@@ -114,4 +114,4 @@ export const NEW_UI = () => ragEnabled("MEGACOMPACT_NEW_UI");
114
114
  // default ON, `=0`/`_DISABLED` off. Re-exported from src/config/vector-cortex.ts
115
115
  // so root consumers share one source of truth.
116
116
  // ---------------------------------------------------------------------------
117
- export { VC0A_ENABLED, VC0B_ENABLED, VC1A_ENABLED, VC0C_ENABLED, VC1B_ENABLED, VC1C_ENABLED, VC2A_ENABLED, VC2B_ENABLED, VC2C_ENABLED, VC3A_ENABLED, VC3B_ENABLED, VC3C_ENABLED, VC4A_ENABLED, VC4B_ENABLED, VC4C_ENABLED, VC5A_ENABLED, VC5B_ENABLED, VC5C_ENABLED, VC6A_ENABLED, VC6B_ENABLED, VC6C_ENABLED, VC7A_ENABLED, VC7B_ENABLED, VC7C_ENABLED, VC8A_ENABLED, VC8B_ENABLED, VC8C_ENABLED, VC9A_ENABLED, VC9B_ENABLED, VC9C_ENABLED, VC9D_ENABLED, PCC_ENABLED, ML5A_ENABLED, ML5B_ENABLED, ML5C_ENABLED, ML5D_ENABLED, ML5E_ENABLED, DEDUP_ATTR_ENABLED, ENC_0A_ENABLED, ENC_0B_ENABLED, ENC_0C_ENABLED, ENC_0D_ENABLED, ENC_0E_ENABLED, BREAKER_WINDOW_MS, BREAKER_MIN_ATTEMPTS, BREAKER_PERF_FAILURES, BREAKER_PERF_FAILURE_RATE, BREAKER_CORRECTNESS_FAILURES, BREAKER_COOLDOWN_MS, BREAKER_PROBE_COUNT, BREAKER_RETRY_BASE_MS, BREAKER_RETRY_CAP_MS, BREAKER_RETRY_JITTER, BREAKER_HYSTERESIS_FAILURE_RATE, BREAKER_HYSTERESIS_BUDGET_P95_MS, BREAKER_MIN_HEALTHY_RESIDENCE_MS, } from "./config/vector-cortex.js";
117
+ export { VC0A_ENABLED, VC0B_ENABLED, VC1A_ENABLED, VC0C_ENABLED, VC1B_ENABLED, VC1C_ENABLED, VC2A_ENABLED, VC2B_ENABLED, VC2C_ENABLED, VC3A_ENABLED, VC3B_ENABLED, VC3C_ENABLED, VC4A_ENABLED, VC4B_ENABLED, VC4C_ENABLED, VC5A_ENABLED, VC5B_ENABLED, VC5C_ENABLED, VC6A_ENABLED, VC6B_ENABLED, VC6C_ENABLED, VC7A_ENABLED, VC7B_ENABLED, VC7C_ENABLED, VC8A_ENABLED, VC8B_ENABLED, VC8C_ENABLED, VC9A_ENABLED, VC9B_ENABLED, VC9C_ENABLED, VC9D_ENABLED, PCC_ENABLED, ML5A_ENABLED, ML5B_ENABLED, ML5C_ENABLED, ML5D_ENABLED, ML5E_ENABLED, DEDUP_ATTR_ENABLED, ENC_0A_ENABLED, ENC_0B_ENABLED, ENC_0C_ENABLED, ENC_0D_ENABLED, ENC_0E_ENABLED, ENC_0F_ENABLED, BREAKER_WINDOW_MS, BREAKER_MIN_ATTEMPTS, BREAKER_PERF_FAILURES, BREAKER_PERF_FAILURE_RATE, BREAKER_CORRECTNESS_FAILURES, BREAKER_COOLDOWN_MS, BREAKER_PROBE_COUNT, BREAKER_RETRY_BASE_MS, BREAKER_RETRY_CAP_MS, BREAKER_RETRY_JITTER, BREAKER_HYSTERESIS_FAILURE_RATE, BREAKER_HYSTERESIS_BUDGET_P95_MS, BREAKER_MIN_HEALTHY_RESIDENCE_MS, } from "./config/vector-cortex.js";
@@ -63,5 +63,6 @@ export const VECTOR_CORTEX_SETTINGS = {
63
63
  boolDirect("MEGACOMPACT_ENC_0C", "ENC-0c Five-Head Supervision Transfer", "ENC-0c five-head supervision transfer on the frozen bge-small trunk: when a developer-trained head candidate is staged under ~/.pi/mega-compact-encoder/candidates/, the five heads serve the trained weights. OFF = no candidate is loaded, the heads serve byte-identical ENC-0b survivor defaults.", true),
64
64
  boolDirect("MEGACOMPACT_ENC_0D", "ENC-0d Real-Asset Promotion Gate", "ENC-0d promotion gate over real trained assets: accepts a {color} real candidate manifest (the ENC-0c trained head weights + the ENC-0b trunk), digest-verifies every staged byte, and atomically swaps the shipped manifest to a green candidate with rollback-to-previous on qualification failure. OFF = accepts no candidate, swaps nothing, emits nothing, shipped manifest stays at the ENC-0c survivor.", true),
65
65
  boolDirect("MEGACOMPACT_ENC_0E", "ENC-0e darwin-x64 Demotion Reason", "ENC-0e darwin-x64 explicit demotion: on an Intel Mac the runtime demotes to WASM (no native binary upstream); this surfaces a deterministic reason on the runtime-selection event and the Setup Cortex blockers card so an operator sees why mode A is unreachable. OFF = no demotion reason on the event and no Setup card row (the ML5-C WASM demotion itself remains the default, byte-identical predecessor).", true),
66
+ boolDirect("MEGACOMPACT_ENC_0F", "ENC-0f p95 + marginal-RSS Qualification Gate", "ENC-0f p95 + marginal-RSS qualification gate (real trained asset → mode A): runs the ENC-0d-promoted trained asset through the bench under --expose-gc, asserts p95 ≤ 40 ms @ 512/4 threads, marginal RSS ≤ 150 MiB (baseline-subtracted), determinism, and opset-21; on pass emits QualificationV1 + flips runtime to qualified mode A, on failure asset stays demoted to mode B. OFF = no qualification gate runs, no QualificationV1 written, runtime keeps serving the ENC-0d survivor (byte-identical predecessor).", true),
66
67
  ],
67
68
  };
@@ -0,0 +1,36 @@
1
+ /**
2
+ * config/vector-cortex-enc0f.ts — ENC-0f p95 + marginal-RSS qualification gate.
3
+ *
4
+ * Extracted from vector-cortex.ts so that file stays under the 300-line soft
5
+ * limit (soft-as-hard gate), exactly as vector-cortex-enc0a.ts / enc0b.ts /
6
+ * enc0c.ts / enc0d.ts / enc0e.ts and the VC8C/VC9A-D/ML5A-E/DEDUP_ATTR
7
+ * siblings were. vector-cortex.ts re-exports the flag below and root
8
+ * src/config.ts re-exports it, so no consumer import path changes.
9
+ *
10
+ * ENC-0f closes HG-5 (RSS margin) with a real asset: the qualification gate
11
+ * that admits the ENC-0d-promoted trained asset to mode A. The gate runs the
12
+ * ML5-B bench under --expose-gc and asserts p95 ≤ ENCODER_LATENCY_P95_MS
13
+ * (40 ms @ 512 tokens / 4 threads), marginal RSS ≤ ENCODER_RSS_BUDGET_BYTES
14
+ * (150 MiB, baseline-subtracted), determinism (distinct digests == 1), and
15
+ * the opset-21 handshake. On pass it emits a QualificationV1 record that flips
16
+ * the runtime to qualified mode A; on any failure the asset stays demoted.
17
+ *
18
+ * `MEGACOMPACT_ENC_0F=0` disables the gate entirely: no qualification gate
19
+ * runs, no QualificationV1 record is written for the real trained asset, and
20
+ * the runtime keeps serving the ENC-0d survivor. Flag-off is byte-identical to
21
+ * the predecessor. The flag MUST also be a dashboard SETTINGS toggle (visible
22
+ * in config UI, never in EXCLUDED_SETTINGS).
23
+ *
24
+ * Pi-agnostic, dependency-free (PREVENT-PI-004 / PREVENT-011).
25
+ */
26
+ import { sprintFlag } from "./vector-cortex-flag.js";
27
+ /**
28
+ * ENC-0f — p95 + marginal-RSS qualification gate for the real trained asset.
29
+ * Default ON. `MEGACOMPACT_ENC_0F=0` disables and is byte-identical to the
30
+ * predecessor (ENC-0e): no qualification gate runs, no QualificationV1 record
31
+ * is written for the real trained asset, and the runtime keeps serving the
32
+ * ENC-0d survivor. This flag MUST also be a dashboard SETTINGS toggle (visible
33
+ * in config UI, never in EXCLUDED_SETTINGS), mirroring
34
+ * ENC_0A/ENC_0B/ENC_0C/ENC_0D/ENC_0E.
35
+ */
36
+ export const ENC_0F_ENABLED = () => sprintFlag("MEGACOMPACT_ENC_0F");
@@ -30,5 +30,6 @@ export { ENC_0B_ENABLED } from "./vector-cortex-enc0b.js";
30
30
  export { ENC_0C_ENABLED } from "./vector-cortex-enc0c.js";
31
31
  export { ENC_0D_ENABLED } from "./vector-cortex-enc0d.js";
32
32
  export { ENC_0E_ENABLED } from "./vector-cortex-enc0e.js";
33
+ export { ENC_0F_ENABLED } from "./vector-cortex-enc0f.js";
33
34
  // Breaker constants (TRIAD_RESILIENCE.md §breaker) extracted to vector-cortex-breakers.ts.
34
35
  export { BREAKER_WINDOW_MS, BREAKER_MIN_ATTEMPTS, BREAKER_PERF_FAILURES, BREAKER_PERF_FAILURE_RATE, BREAKER_CORRECTNESS_FAILURES, BREAKER_COOLDOWN_MS, BREAKER_PROBE_COUNT, BREAKER_RETRY_BASE_MS, BREAKER_RETRY_CAP_MS, BREAKER_RETRY_JITTER, BREAKER_HYSTERESIS_FAILURE_RATE, BREAKER_HYSTERESIS_BUDGET_P95_MS, BREAKER_MIN_HEALTHY_RESIDENCE_MS, } from "./vector-cortex-breakers.js";
@@ -114,4 +114,4 @@ export const NEW_UI = () => ragEnabled("MEGACOMPACT_NEW_UI");
114
114
  // default ON, `=0`/`_DISABLED` off. Re-exported from src/config/vector-cortex.ts
115
115
  // so root consumers share one source of truth.
116
116
  // ---------------------------------------------------------------------------
117
- export { VC0A_ENABLED, VC0B_ENABLED, VC1A_ENABLED, VC0C_ENABLED, VC1B_ENABLED, VC1C_ENABLED, VC2A_ENABLED, VC2B_ENABLED, VC2C_ENABLED, VC3A_ENABLED, VC3B_ENABLED, VC3C_ENABLED, VC4A_ENABLED, VC4B_ENABLED, VC4C_ENABLED, VC5A_ENABLED, VC5B_ENABLED, VC5C_ENABLED, VC6A_ENABLED, VC6B_ENABLED, VC6C_ENABLED, VC7A_ENABLED, VC7B_ENABLED, VC7C_ENABLED, VC8A_ENABLED, VC8B_ENABLED, VC8C_ENABLED, VC9A_ENABLED, VC9B_ENABLED, VC9C_ENABLED, VC9D_ENABLED, PCC_ENABLED, ML5A_ENABLED, ML5B_ENABLED, ML5C_ENABLED, ML5D_ENABLED, ML5E_ENABLED, DEDUP_ATTR_ENABLED, ENC_0A_ENABLED, ENC_0B_ENABLED, ENC_0C_ENABLED, ENC_0D_ENABLED, ENC_0E_ENABLED, BREAKER_WINDOW_MS, BREAKER_MIN_ATTEMPTS, BREAKER_PERF_FAILURES, BREAKER_PERF_FAILURE_RATE, BREAKER_CORRECTNESS_FAILURES, BREAKER_COOLDOWN_MS, BREAKER_PROBE_COUNT, BREAKER_RETRY_BASE_MS, BREAKER_RETRY_CAP_MS, BREAKER_RETRY_JITTER, BREAKER_HYSTERESIS_FAILURE_RATE, BREAKER_HYSTERESIS_BUDGET_P95_MS, BREAKER_MIN_HEALTHY_RESIDENCE_MS, } from "./config/vector-cortex.js";
117
+ export { VC0A_ENABLED, VC0B_ENABLED, VC1A_ENABLED, VC0C_ENABLED, VC1B_ENABLED, VC1C_ENABLED, VC2A_ENABLED, VC2B_ENABLED, VC2C_ENABLED, VC3A_ENABLED, VC3B_ENABLED, VC3C_ENABLED, VC4A_ENABLED, VC4B_ENABLED, VC4C_ENABLED, VC5A_ENABLED, VC5B_ENABLED, VC5C_ENABLED, VC6A_ENABLED, VC6B_ENABLED, VC6C_ENABLED, VC7A_ENABLED, VC7B_ENABLED, VC7C_ENABLED, VC8A_ENABLED, VC8B_ENABLED, VC8C_ENABLED, VC9A_ENABLED, VC9B_ENABLED, VC9C_ENABLED, VC9D_ENABLED, PCC_ENABLED, ML5A_ENABLED, ML5B_ENABLED, ML5C_ENABLED, ML5D_ENABLED, ML5E_ENABLED, DEDUP_ATTR_ENABLED, ENC_0A_ENABLED, ENC_0B_ENABLED, ENC_0C_ENABLED, ENC_0D_ENABLED, ENC_0E_ENABLED, ENC_0F_ENABLED, BREAKER_WINDOW_MS, BREAKER_MIN_ATTEMPTS, BREAKER_PERF_FAILURES, BREAKER_PERF_FAILURE_RATE, BREAKER_CORRECTNESS_FAILURES, BREAKER_COOLDOWN_MS, BREAKER_PROBE_COUNT, BREAKER_RETRY_BASE_MS, BREAKER_RETRY_CAP_MS, BREAKER_RETRY_JITTER, BREAKER_HYSTERESIS_FAILURE_RATE, BREAKER_HYSTERESIS_BUDGET_P95_MS, BREAKER_MIN_HEALTHY_RESIDENCE_MS, } from "./config/vector-cortex.js";
@@ -0,0 +1,50 @@
1
+ /**
2
+ * vector-cortex/encoder/qualify.ts — ENC-0f pure qualification function.
3
+ *
4
+ * Constructs a {@link QualificationV1} record from a {@link BenchResultV1} by
5
+ * asserting four independent gates (latency, marginal-RSS, determinism, opset)
6
+ * plus the bench's own conjunctive `gates.all`. A gated-off bench can NEVER be
7
+ * swept into mode A by a sub-threshold p95 alone — `bench_gates_not_green`
8
+ * forces `"failed"` regardless of the sub-threshold values.
9
+ *
10
+ * Pure (TRIAD_RESILIENCE §pure): no `any` (PREVENT-011), no casts, no clock, no
11
+ * storage, no network (PREVENT-PI-004). Thresholds are sourced from
12
+ * {@link ENCODER_LATENCY_P95_MS} / {@link ENCODER_RSS_BUDGET_BYTES} /
13
+ * {@link ENCODER_OPSET} — never magic numbers.
14
+ */
15
+ import { ENCODER_LATENCY_P95_MS, ENCODER_RSS_BUDGET_BYTES, ENCODER_OPSET, } from "./types.js";
16
+ /**
17
+ * Qualify a bench result against the four independent gates + the bench's own
18
+ * conjunctive gate. Returns a QualificationV1 with `verdict:"qualified"` only
19
+ * when ALL gates pass and `bench.gates.all` is true.
20
+ */
21
+ export function qualifyEncodedAsset(bench, platform) {
22
+ const reasons = [];
23
+ if (bench.p95Ms !== null && bench.p95Ms > ENCODER_LATENCY_P95_MS) {
24
+ reasons.push("latency");
25
+ }
26
+ if (bench.rssMarginalMib !== null &&
27
+ bench.rssMarginalMib * 1024 * 1024 > ENCODER_RSS_BUDGET_BYTES) {
28
+ reasons.push("rss");
29
+ }
30
+ if (!bench.deterministic) {
31
+ reasons.push("determinism");
32
+ }
33
+ if (bench.opset !== null && bench.opset !== ENCODER_OPSET) {
34
+ reasons.push("opset");
35
+ }
36
+ if (!bench.gates.all && !reasons.includes("bench_gates_not_green")) {
37
+ reasons.push("bench_gates_not_green");
38
+ }
39
+ const verdict = reasons.length === 0 && bench.gates.all ? "qualified" : "failed";
40
+ return {
41
+ schema: "qualification-v1",
42
+ verdict,
43
+ reasons,
44
+ platform,
45
+ p95Ms: bench.p95Ms ?? 0,
46
+ rssMib: bench.rssMarginalMib ?? 0,
47
+ opset: bench.opset ?? 0,
48
+ digest: bench.digest ?? "",
49
+ };
50
+ }
@@ -0,0 +1,50 @@
1
+ /**
2
+ * vector-cortex/encoder/qualify.ts — ENC-0f pure qualification function.
3
+ *
4
+ * Constructs a {@link QualificationV1} record from a {@link BenchResultV1} by
5
+ * asserting four independent gates (latency, marginal-RSS, determinism, opset)
6
+ * plus the bench's own conjunctive `gates.all`. A gated-off bench can NEVER be
7
+ * swept into mode A by a sub-threshold p95 alone — `bench_gates_not_green`
8
+ * forces `"failed"` regardless of the sub-threshold values.
9
+ *
10
+ * Pure (TRIAD_RESILIENCE §pure): no `any` (PREVENT-011), no casts, no clock, no
11
+ * storage, no network (PREVENT-PI-004). Thresholds are sourced from
12
+ * {@link ENCODER_LATENCY_P95_MS} / {@link ENCODER_RSS_BUDGET_BYTES} /
13
+ * {@link ENCODER_OPSET} — never magic numbers.
14
+ */
15
+ import { ENCODER_LATENCY_P95_MS, ENCODER_RSS_BUDGET_BYTES, ENCODER_OPSET, } from "./types.js";
16
+ /**
17
+ * Qualify a bench result against the four independent gates + the bench's own
18
+ * conjunctive gate. Returns a QualificationV1 with `verdict:"qualified"` only
19
+ * when ALL gates pass and `bench.gates.all` is true.
20
+ */
21
+ export function qualifyEncodedAsset(bench, platform) {
22
+ const reasons = [];
23
+ if (bench.p95Ms !== null && bench.p95Ms > ENCODER_LATENCY_P95_MS) {
24
+ reasons.push("latency");
25
+ }
26
+ if (bench.rssMarginalMib !== null &&
27
+ bench.rssMarginalMib * 1024 * 1024 > ENCODER_RSS_BUDGET_BYTES) {
28
+ reasons.push("rss");
29
+ }
30
+ if (!bench.deterministic) {
31
+ reasons.push("determinism");
32
+ }
33
+ if (bench.opset !== null && bench.opset !== ENCODER_OPSET) {
34
+ reasons.push("opset");
35
+ }
36
+ if (!bench.gates.all && !reasons.includes("bench_gates_not_green")) {
37
+ reasons.push("bench_gates_not_green");
38
+ }
39
+ const verdict = reasons.length === 0 && bench.gates.all ? "qualified" : "failed";
40
+ return {
41
+ schema: "qualification-v1",
42
+ verdict,
43
+ reasons,
44
+ platform,
45
+ p95Ms: bench.p95Ms ?? 0,
46
+ rssMib: bench.rssMarginalMib ?? 0,
47
+ opset: bench.opset ?? 0,
48
+ digest: bench.digest ?? "",
49
+ };
50
+ }
@@ -282,5 +282,11 @@ export const VECTOR_CORTEX_SETTINGS: SettingGroup = {
282
282
  "ENC-0e darwin-x64 explicit demotion: on an Intel Mac the runtime demotes to WASM (no native binary upstream); this surfaces a deterministic reason on the runtime-selection event and the Setup Cortex blockers card so an operator sees why mode A is unreachable. OFF = no demotion reason on the event and no Setup card row (the ML5-C WASM demotion itself remains the default, byte-identical predecessor).",
283
283
  true,
284
284
  ),
285
+ boolDirect(
286
+ "MEGACOMPACT_ENC_0F",
287
+ "ENC-0f p95 + marginal-RSS Qualification Gate",
288
+ "ENC-0f p95 + marginal-RSS qualification gate (real trained asset → mode A): runs the ENC-0d-promoted trained asset through the bench under --expose-gc, asserts p95 ≤ 40 ms @ 512/4 threads, marginal RSS ≤ 150 MiB (baseline-subtracted), determinism, and opset-21; on pass emits QualificationV1 + flips runtime to qualified mode A, on failure asset stays demoted to mode B. OFF = no qualification gate runs, no QualificationV1 written, runtime keeps serving the ENC-0d survivor (byte-identical predecessor).",
289
+ true,
290
+ ),
285
291
  ],
286
292
  };
package/package.json CHANGED
@@ -1,6 +1,6 @@
1
1
  {
2
2
  "name": "pi-mega-compact",
3
- "version": "0.20.47",
3
+ "version": "0.20.48",
4
4
  "description": "Layered, local, vector-backed context compressor for pi — supersede/collapse/cluster compaction with deduped inline recall.",
5
5
  "type": "module",
6
6
  "license": "BSD-3-Clause",
@@ -0,0 +1,38 @@
1
+ /**
2
+ * config/vector-cortex-enc0f.ts — ENC-0f p95 + marginal-RSS qualification gate.
3
+ *
4
+ * Extracted from vector-cortex.ts so that file stays under the 300-line soft
5
+ * limit (soft-as-hard gate), exactly as vector-cortex-enc0a.ts / enc0b.ts /
6
+ * enc0c.ts / enc0d.ts / enc0e.ts and the VC8C/VC9A-D/ML5A-E/DEDUP_ATTR
7
+ * siblings were. vector-cortex.ts re-exports the flag below and root
8
+ * src/config.ts re-exports it, so no consumer import path changes.
9
+ *
10
+ * ENC-0f closes HG-5 (RSS margin) with a real asset: the qualification gate
11
+ * that admits the ENC-0d-promoted trained asset to mode A. The gate runs the
12
+ * ML5-B bench under --expose-gc and asserts p95 ≤ ENCODER_LATENCY_P95_MS
13
+ * (40 ms @ 512 tokens / 4 threads), marginal RSS ≤ ENCODER_RSS_BUDGET_BYTES
14
+ * (150 MiB, baseline-subtracted), determinism (distinct digests == 1), and
15
+ * the opset-21 handshake. On pass it emits a QualificationV1 record that flips
16
+ * the runtime to qualified mode A; on any failure the asset stays demoted.
17
+ *
18
+ * `MEGACOMPACT_ENC_0F=0` disables the gate entirely: no qualification gate
19
+ * runs, no QualificationV1 record is written for the real trained asset, and
20
+ * the runtime keeps serving the ENC-0d survivor. Flag-off is byte-identical to
21
+ * the predecessor. The flag MUST also be a dashboard SETTINGS toggle (visible
22
+ * in config UI, never in EXCLUDED_SETTINGS).
23
+ *
24
+ * Pi-agnostic, dependency-free (PREVENT-PI-004 / PREVENT-011).
25
+ */
26
+
27
+ import { sprintFlag } from "./vector-cortex-flag.js";
28
+
29
+ /**
30
+ * ENC-0f — p95 + marginal-RSS qualification gate for the real trained asset.
31
+ * Default ON. `MEGACOMPACT_ENC_0F=0` disables and is byte-identical to the
32
+ * predecessor (ENC-0e): no qualification gate runs, no QualificationV1 record
33
+ * is written for the real trained asset, and the runtime keeps serving the
34
+ * ENC-0d survivor. This flag MUST also be a dashboard SETTINGS toggle (visible
35
+ * in config UI, never in EXCLUDED_SETTINGS), mirroring
36
+ * ENC_0A/ENC_0B/ENC_0C/ENC_0D/ENC_0E.
37
+ */
38
+ export const ENC_0F_ENABLED = (): boolean => sprintFlag("MEGACOMPACT_ENC_0F");
@@ -60,6 +60,7 @@ export { ENC_0B_ENABLED } from "./vector-cortex-enc0b.js";
60
60
  export { ENC_0C_ENABLED } from "./vector-cortex-enc0c.js";
61
61
  export { ENC_0D_ENABLED } from "./vector-cortex-enc0d.js";
62
62
  export { ENC_0E_ENABLED } from "./vector-cortex-enc0e.js";
63
+ export { ENC_0F_ENABLED } from "./vector-cortex-enc0f.js";
63
64
  // Breaker constants (TRIAD_RESILIENCE.md §breaker) extracted to vector-cortex-breakers.ts.
64
65
  export {
65
66
  BREAKER_WINDOW_MS,
package/src/config.ts CHANGED
@@ -194,6 +194,7 @@ export {
194
194
  ENC_0C_ENABLED,
195
195
  ENC_0D_ENABLED,
196
196
  ENC_0E_ENABLED,
197
+ ENC_0F_ENABLED,
197
198
  BREAKER_WINDOW_MS,
198
199
  BREAKER_MIN_ATTEMPTS,
199
200
  BREAKER_PERF_FAILURES,
@@ -0,0 +1,83 @@
1
+ /**
2
+ * vector-cortex/encoder/qualify.ts — ENC-0f pure qualification function.
3
+ *
4
+ * Constructs a {@link QualificationV1} record from a {@link BenchResultV1} by
5
+ * asserting four independent gates (latency, marginal-RSS, determinism, opset)
6
+ * plus the bench's own conjunctive `gates.all`. A gated-off bench can NEVER be
7
+ * swept into mode A by a sub-threshold p95 alone — `bench_gates_not_green`
8
+ * forces `"failed"` regardless of the sub-threshold values.
9
+ *
10
+ * Pure (TRIAD_RESILIENCE §pure): no `any` (PREVENT-011), no casts, no clock, no
11
+ * storage, no network (PREVENT-PI-004). Thresholds are sourced from
12
+ * {@link ENCODER_LATENCY_P95_MS} / {@link ENCODER_RSS_BUDGET_BYTES} /
13
+ * {@link ENCODER_OPSET} — never magic numbers.
14
+ */
15
+
16
+ import type { BenchResultV1 } from "./bench-export.js";
17
+ import {
18
+ ENCODER_LATENCY_P95_MS,
19
+ ENCODER_RSS_BUDGET_BYTES,
20
+ ENCODER_OPSET,
21
+ } from "./types.js";
22
+
23
+ /** The qualification verdict for a real trained encoder asset. */
24
+ export interface QualificationV1 {
25
+ readonly schema: "qualification-v1";
26
+ readonly verdict: "qualified" | "failed";
27
+ readonly reasons: string[];
28
+ readonly platform: string;
29
+ readonly p95Ms: number;
30
+ readonly rssMib: number;
31
+ readonly opset: number;
32
+ /** SHA-256 hex of the bench run's embedding output (never payload content). */
33
+ readonly digest: string;
34
+ }
35
+
36
+ /**
37
+ * Qualify a bench result against the four independent gates + the bench's own
38
+ * conjunctive gate. Returns a QualificationV1 with `verdict:"qualified"` only
39
+ * when ALL gates pass and `bench.gates.all` is true.
40
+ */
41
+ export function qualifyEncodedAsset(
42
+ bench: BenchResultV1,
43
+ platform: string,
44
+ ): QualificationV1 {
45
+ const reasons: string[] = [];
46
+
47
+ if (bench.p95Ms !== null && bench.p95Ms > ENCODER_LATENCY_P95_MS) {
48
+ reasons.push("latency");
49
+ }
50
+
51
+ if (
52
+ bench.rssMarginalMib !== null &&
53
+ bench.rssMarginalMib * 1024 * 1024 > ENCODER_RSS_BUDGET_BYTES
54
+ ) {
55
+ reasons.push("rss");
56
+ }
57
+
58
+ if (!bench.deterministic) {
59
+ reasons.push("determinism");
60
+ }
61
+
62
+ if (bench.opset !== null && bench.opset !== ENCODER_OPSET) {
63
+ reasons.push("opset");
64
+ }
65
+
66
+ if (!bench.gates.all && !reasons.includes("bench_gates_not_green")) {
67
+ reasons.push("bench_gates_not_green");
68
+ }
69
+
70
+ const verdict: "qualified" | "failed" =
71
+ reasons.length === 0 && bench.gates.all ? "qualified" : "failed";
72
+
73
+ return {
74
+ schema: "qualification-v1",
75
+ verdict,
76
+ reasons,
77
+ platform,
78
+ p95Ms: bench.p95Ms ?? 0,
79
+ rssMib: bench.rssMarginalMib ?? 0,
80
+ opset: bench.opset ?? 0,
81
+ digest: bench.digest ?? "",
82
+ };
83
+ }