numkong 7.0.0 → 7.4.1

package/include/numkong/cast/icelake.h

@@ -6,11 +6,11 @@
  *
  *  @section ice_cast_instructions AVX-512 VBMI2 Instructions
  *
- *      Intrinsic                   Instruction                     Ice         Genoa
- *      _mm512_permutex2var_epi16   VPERMI2W (ZMM, ZMM, ZMM)        3cy @ p5    2cy @ p12
- *      _mm512_test_epi16_mask      VPTESTMW (k, ZMM, ZMM)          3cy @ p5    2cy @ p01
- *      _mm512_mask_mov_epi16       VMOVDQU16 (ZMM{k}, ZMM)         1cy @ p05   1cy @ p05
- *      _mm512_cvtepi16_epi8        VPMOVWB (YMM, ZMM)              3cy @ p5    2cy @ p12
+ *      Intrinsic                  Instruction               Icelake    Genoa
+ *      _mm512_permutex2var_epi16  VPERMI2W (ZMM, ZMM, ZMM)  3cy @ p5   2cy @ p12
+ *      _mm512_test_epi16_mask     VPTESTMW (k, ZMM, ZMM)    3cy @ p5   2cy @ p01
+ *      _mm512_mask_mov_epi16      VMOVDQU16 (ZMM{k}, ZMM)   1cy @ p05  1cy @ p05
+ *      _mm512_cvtepi16_epi8       VPMOVWB (YMM, ZMM)        3cy @ p5   2cy @ p12
  *
  *  Ice Lake's AVX-512 VBMI2 enables efficient 128-entry LUT lookups via dual VPERMI2W operations.
  *  FP8-to-BF16/F16 conversions use 4 ZMM LUT registers with VPTESTMW for range selection, achieving
@@ -37,7 +37,7 @@ extern "C" {
 #pragma GCC target("avx2", "avx512f", "avx512vl", "avx512bw", "avx512dq", "f16c", "fma", "bmi", "bmi2")
 #endif
 
-#pragma region - Vectorized Conversions
+#pragma region Vectorized Conversions
 
 /** @brief Convert 32x e4m3 → 32x bf16 via arithmetic + 8-entry subnormal LUT (AVX-512BW).
  *  E4M3 format: S EEEE MMM (bias=7). BF16: S EEEEEEEE MMMMMMM (bias=127).
@@ -72,7 +72,12 @@ NK_INTERNAL __m512i nk_e4m3x32_to_bf16x32_icelake_(__m256i e4m3x32) {
 
     // Apply sign: shift E4M3 bit 7 to BF16 bit 15
     sign_i16x32 = _mm512_slli_epi16(sign_i16x32, 8);
-    return _mm512_or_si512(result_abs_i16x32, sign_i16x32);
+    __m512i result_i16x32 = _mm512_or_si512(result_abs_i16x32, sign_i16x32);
+
+    // NaN: E4M3FN has NaN only at magnitude 0x7F → BF16 quiet NaN (0x7FC0)
+    __mmask32 is_nan = _mm512_cmpeq_epi16_mask(lower7_i16x32, _mm512_set1_epi16(0x7F));
+    __m512i nan_i16x32 = _mm512_or_si512(sign_i16x32, _mm512_set1_epi16(0x7FC0));
+    return _mm512_mask_blend_epi16(is_nan, result_i16x32, nan_i16x32);
 }
 
 /** @brief Convert 32x e5m2 → 32x bf16 via arithmetic + 4-entry subnormal LUT (AVX-512BW).
@@ -268,14 +273,14 @@ NK_INTERNAL __m256i nk_bf16x32_to_e4m3x32_icelake_(__m512i bf16x32) {
     // bf16 to f32 is just left shift by 16
     __m512i bf16_low_i32x16 = _mm512_cvtepu16_epi32(_mm512_castsi512_si256(bf16x32));
     __m512i bf16_high_i32x16 = _mm512_cvtepu16_epi32(_mm512_extracti32x8_epi32(bf16x32, 1));
-    __m512 f32_low = _mm512_castsi512_ps(_mm512_slli_epi32(bf16_low_i32x16, 16));
-    __m512 f32_high = _mm512_castsi512_ps(_mm512_slli_epi32(bf16_high_i32x16, 16));
-    __m512 abs_f32_low = _mm512_and_ps(f32_low, _mm512_castsi512_ps(_mm512_set1_epi32(0x7FFFFFFF)));
-    __m512 abs_f32_high = _mm512_and_ps(f32_high, _mm512_castsi512_ps(_mm512_set1_epi32(0x7FFFFFFF)));
-    __m512 scaled_low = _mm512_mul_ps(abs_f32_low, _mm512_set1_ps(512.0f));
-    __m512 scaled_high = _mm512_mul_ps(abs_f32_high, _mm512_set1_ps(512.0f));
-    __m512i subnorm_mant_low_i32x16 = _mm512_cvtps_epi32(scaled_low);
-    __m512i subnorm_mant_high_i32x16 = _mm512_cvtps_epi32(scaled_high);
+    __m512 f32_low_f32x16 = _mm512_castsi512_ps(_mm512_slli_epi32(bf16_low_i32x16, 16));
+    __m512 f32_high_f32x16 = _mm512_castsi512_ps(_mm512_slli_epi32(bf16_high_i32x16, 16));
+    __m512 abs_f32_low_f32x16 = _mm512_and_ps(f32_low_f32x16, _mm512_castsi512_ps(_mm512_set1_epi32(0x7FFFFFFF)));
+    __m512 abs_f32_high_f32x16 = _mm512_and_ps(f32_high_f32x16, _mm512_castsi512_ps(_mm512_set1_epi32(0x7FFFFFFF)));
+    __m512 scaled_low_f32x16 = _mm512_mul_ps(abs_f32_low_f32x16, _mm512_set1_ps(512.0f));
+    __m512 scaled_high_f32x16 = _mm512_mul_ps(abs_f32_high_f32x16, _mm512_set1_ps(512.0f));
+    __m512i subnorm_mant_low_i32x16 = _mm512_cvtps_epi32(scaled_low_f32x16);
+    __m512i subnorm_mant_high_i32x16 = _mm512_cvtps_epi32(scaled_high_f32x16);
     __m256i subnorm_mant_low_i16x16 = _mm512_cvtepi32_epi16(subnorm_mant_low_i32x16);
     __m256i subnorm_mant_high_i16x16 = _mm512_cvtepi32_epi16(subnorm_mant_high_i32x16);
     __m512i subnorm_mantissa_i16x32 = _mm512_inserti64x4(_mm512_castsi256_si512(subnorm_mant_low_i16x16),
@@ -328,14 +333,14 @@ NK_INTERNAL __m256i nk_bf16x32_to_e5m2x32_icelake_(__m512i bf16x32) {
     // Subnormal path: compute via f32 to get correct rounding
     __m512i bf16_low_i32x16 = _mm512_cvtepu16_epi32(_mm512_castsi512_si256(bf16x32));
     __m512i bf16_high_i32x16 = _mm512_cvtepu16_epi32(_mm512_extracti32x8_epi32(bf16x32, 1));
-    __m512 f32_low = _mm512_castsi512_ps(_mm512_slli_epi32(bf16_low_i32x16, 16));
-    __m512 f32_high = _mm512_castsi512_ps(_mm512_slli_epi32(bf16_high_i32x16, 16));
-    __m512 abs_f32_low = _mm512_and_ps(f32_low, _mm512_castsi512_ps(_mm512_set1_epi32(0x7FFFFFFF)));
-    __m512 abs_f32_high = _mm512_and_ps(f32_high, _mm512_castsi512_ps(_mm512_set1_epi32(0x7FFFFFFF)));
-    __m512 scaled_low = _mm512_mul_ps(abs_f32_low, _mm512_set1_ps(65536.0f));
-    __m512 scaled_high = _mm512_mul_ps(abs_f32_high, _mm512_set1_ps(65536.0f));
-    __m512i subnorm_mant_low_i32x16 = _mm512_cvtps_epi32(scaled_low);
-    __m512i subnorm_mant_high_i32x16 = _mm512_cvtps_epi32(scaled_high);
+    __m512 f32_low_f32x16 = _mm512_castsi512_ps(_mm512_slli_epi32(bf16_low_i32x16, 16));
+    __m512 f32_high_f32x16 = _mm512_castsi512_ps(_mm512_slli_epi32(bf16_high_i32x16, 16));
+    __m512 abs_f32_low_f32x16 = _mm512_and_ps(f32_low_f32x16, _mm512_castsi512_ps(_mm512_set1_epi32(0x7FFFFFFF)));
+    __m512 abs_f32_high_f32x16 = _mm512_and_ps(f32_high_f32x16, _mm512_castsi512_ps(_mm512_set1_epi32(0x7FFFFFFF)));
+    __m512 scaled_low_f32x16 = _mm512_mul_ps(abs_f32_low_f32x16, _mm512_set1_ps(65536.0f));
+    __m512 scaled_high_f32x16 = _mm512_mul_ps(abs_f32_high_f32x16, _mm512_set1_ps(65536.0f));
+    __m512i subnorm_mant_low_i32x16 = _mm512_cvtps_epi32(scaled_low_f32x16);
+    __m512i subnorm_mant_high_i32x16 = _mm512_cvtps_epi32(scaled_high_f32x16);
     __m256i subnorm_mant_low_i16x16 = _mm512_cvtepi32_epi16(subnorm_mant_low_i32x16);
     __m256i subnorm_mant_high_i16x16 = _mm512_cvtepi32_epi16(subnorm_mant_high_i32x16);
     __m512i subnorm_mantissa_i16x32 = _mm512_inserti64x4(_mm512_castsi256_si512(subnorm_mant_low_i16x16),
@@ -362,8 +367,8 @@ NK_INTERNAL void nk_load_e4m3x32_to_bf16x32_icelake_(void const *src, nk_b512_ve
 /** @brief Partial load n e4m3 elements from memory and convert to bf16 (Ice Lake AVX-512BW). */
 NK_INTERNAL void nk_partial_load_e4m3x32_to_bf16x32_icelake_(void const *src, nk_b512_vec_t *dst, nk_size_t n) {
     __mmask32 mask = (__mmask32)_bzhi_u32(0xFFFFFFFF, (unsigned int)n);
-    __m256i e4m3_partial = _mm256_maskz_loadu_epi8(mask, src);
-    dst->zmm = nk_e4m3x32_to_bf16x32_icelake_(e4m3_partial);
+    __m256i e4m3_partial_i8x32 = _mm256_maskz_loadu_epi8(mask, src);
+    dst->zmm = nk_e4m3x32_to_bf16x32_icelake_(e4m3_partial_i8x32);
 }
 
 /** @brief Load 32x e5m2 from memory and convert to 32x bf16 (Ice Lake AVX-512BW). */
@@ -374,8 +379,8 @@ NK_INTERNAL void nk_load_e5m2x32_to_bf16x32_icelake_(void const *src, nk_b512_ve
 /** @brief Partial load n e5m2 elements from memory and convert to bf16 (Ice Lake AVX-512BW). */
 NK_INTERNAL void nk_partial_load_e5m2x32_to_bf16x32_icelake_(void const *src, nk_b512_vec_t *dst, nk_size_t n) {
     __mmask32 mask = (__mmask32)_bzhi_u32(0xFFFFFFFF, (unsigned int)n);
-    __m256i e5m2_partial = _mm256_maskz_loadu_epi8(mask, src);
-    dst->zmm = nk_e5m2x32_to_bf16x32_icelake_(e5m2_partial);
+    __m256i e5m2_partial_i8x32 = _mm256_maskz_loadu_epi8(mask, src);
+    dst->zmm = nk_e5m2x32_to_bf16x32_icelake_(e5m2_partial_i8x32);
 }
 
 /** @brief Load 32x e2m3 from memory and convert to 32x bf16 (Ice Lake AVX-512BW). */
@@ -386,8 +391,8 @@ NK_INTERNAL void nk_load_e2m3x32_to_bf16x32_icelake_(void const *src, nk_b512_ve
 /** @brief Partial load n e2m3 elements from memory and convert to bf16 (Ice Lake AVX-512BW). */
 NK_INTERNAL void nk_partial_load_e2m3x32_to_bf16x32_icelake_(void const *src, nk_b512_vec_t *dst, nk_size_t n) {
     __mmask32 mask = (__mmask32)_bzhi_u32(0xFFFFFFFF, (unsigned int)n);
-    __m256i e2m3_partial = _mm256_maskz_loadu_epi8(mask, src);
-    dst->zmm = nk_e2m3x32_to_bf16x32_icelake_(e2m3_partial);
+    __m256i e2m3_partial_i8x32 = _mm256_maskz_loadu_epi8(mask, src);
+    dst->zmm = nk_e2m3x32_to_bf16x32_icelake_(e2m3_partial_i8x32);
 }
 
 /** @brief Load 32x e3m2 from memory and convert to 32x bf16 (Ice Lake AVX-512BW). */
@@ -398,13 +403,13 @@ NK_INTERNAL void nk_load_e3m2x32_to_bf16x32_icelake_(void const *src, nk_b512_ve
 /** @brief Partial load n e3m2 elements from memory and convert to bf16 (Ice Lake AVX-512BW). */
 NK_INTERNAL void nk_partial_load_e3m2x32_to_bf16x32_icelake_(void const *src, nk_b512_vec_t *dst, nk_size_t n) {
     __mmask32 mask = (__mmask32)_bzhi_u32(0xFFFFFFFF, (unsigned int)n);
-    __m256i e3m2_partial = _mm256_maskz_loadu_epi8(mask, src);
-    dst->zmm = nk_e3m2x32_to_bf16x32_icelake_(e3m2_partial);
+    __m256i e3m2_partial_i8x32 = _mm256_maskz_loadu_epi8(mask, src);
+    dst->zmm = nk_e3m2x32_to_bf16x32_icelake_(e3m2_partial_i8x32);
 }
 
-#pragma endregion - Vectorized Conversions
+#pragma endregion Vectorized Conversions
 
-#pragma region - Public API
+#pragma region Public API
 
 NK_PUBLIC void nk_cast_icelake(void const *from, nk_dtype_t from_type, nk_size_t n, void *to, nk_dtype_t to_type) {
     // Group 1: Conversions to bf16 (e4m3 → bf16, e5m2 → bf16)
@@ -428,9 +433,9 @@ NK_PUBLIC void nk_cast_icelake(void const *from, nk_dtype_t from_type, nk_size_t
         for (nk_size_t idx = 0; idx < n; idx += 32) {
             nk_size_t remaining = n - idx;
             __mmask32 mask = (remaining >= 32) ? 0xFFFFFFFF : _bzhi_u32(0xFFFFFFFF, (unsigned)remaining);
-            __m512i in_bf16x32 = _mm512_maskz_loadu_epi16(mask, from_ptr + idx);
-            __m256i out_f8x32 = (to_type == nk_e4m3_k) ? nk_bf16x32_to_e4m3x32_icelake_(in_bf16x32)
-                                                       : nk_bf16x32_to_e5m2x32_icelake_(in_bf16x32);
+            __m512i in_bf16x32_i16x32 = _mm512_maskz_loadu_epi16(mask, from_ptr + idx);
+            __m256i out_f8x32 = (to_type == nk_e4m3_k) ? nk_bf16x32_to_e4m3x32_icelake_(in_bf16x32_i16x32)
+                                                       : nk_bf16x32_to_e5m2x32_icelake_(in_bf16x32_i16x32);
             _mm256_mask_storeu_epi8(to_ptr + idx, mask, out_f8x32);
         }
     }
@@ -453,7 +458,7 @@ NK_PUBLIC void nk_cast_icelake(void const *from, nk_dtype_t from_type, nk_size_t
     else nk_cast_skylake(from, from_type, n, to, to_type);
 }
 
-#pragma endregion - Public API
+#pragma endregion Public API
 
 #if defined(__clang__)
 #pragma clang attribute pop

package/include/numkong/cast/loongsonasx.h

@@ -0,0 +1,252 @@
+/**
+ *  @brief SIMD-accelerated Type Conversions and Load/Store Helpers for LoongArch LASX (256-bit).
+ *  @file include/numkong/cast/loongsonasx.h
+ *  @author Ash Vardanian
+ *  @date March 23, 2026
+ *
+ *  @sa include/numkong/cast.h
+ *
+ *  @section loongsonasx_cast_instructions Key LASX Load/Store Instructions
+ *
+ *      Intrinsic                      Instruction       Description
+ *      __lasx_xvld(ptr, 0)            XVLD              256-bit aligned/unaligned load
+ *      __lasx_xvst(v, ptr, 0)         XVST              256-bit aligned/unaligned store
+ *      __lasx_xvreplgr2vr_w(bits)     XVREPLGR2VR.W     Broadcast i32 to 8 lanes
+ *      __lasx_xvreplgr2vr_d(bits)     XVREPLGR2VR.D     Broadcast i64 to 4 lanes
+ *      __lasx_xvffint_s_w(v)          XVFFINT.S.W       4x i32 -> f32 (per 128-bit lane)
+ *      __lasx_xvfrsqrt_s(v)           XVFRSQRT.S        f32 full-precision reciprocal sqrt
+ *      __lasx_xvfsqrt_s(v)            XVFSQRT.S         f32 full-precision sqrt
+ *      __lasx_xvfsqrt_d(v)            XVFSQRT.D         f64 full-precision sqrt
+ *
+ *  LASX is a 256-bit extension; all vector registers are 256-bit `__m256i`. For 128-bit
+ *  `nk_b128_vec_t` operations, `__lasx_xvld` safely loads into the low 128 bits (the high
+ *  128 bits are zeroed or undefined depending on context). For 128-bit stores we use `memcpy`
+ *  to avoid writing beyond the intended 16 bytes. Partial loads/stores delegate to serial
+ *  helpers since LASX lacks masked load/store instructions.
+ */
+#ifndef NK_CAST_LOONGSONASX_H
+#define NK_CAST_LOONGSONASX_H
+
+#if NK_TARGET_LOONGARCH_
+#if NK_TARGET_LOONGSONASX
+
+#include "numkong/types.h"
+#include "numkong/cast/serial.h"        // `nk_partial_load_b32x4_serial_`, `nk_partial_load_b64x4_serial_`
+#include "numkong/scalar/loongsonasx.h" // `nk_xvreplgr2vr_s_128_`, `nk_xvfreplgr2vr_s_`
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#pragma region Type Punned Loads and Stores
+
+/**
+ *  LSX and LASX share the same physical register file, so widening __m128i → __m256i and
+ *  extracting __m256i → __m128i are no-ops on hardware. Empty inline asm with "f" constraints
+ *  avoids the stack round-trip that union punning causes on GCC 14.
+ *  Named after x86 `_mm256_castsi128_si256` / `_mm256_castsi256_si128` / `_mm256_castps256_ps128`.
+ */
+NK_INTERNAL __m256i nk_lasx_castsi128_si256_(__m128i low_i64x2) {
+    __m256i wide_i64x4;
+    __asm__("" : "=f"(wide_i64x4) : "f"(low_i64x2));
+    return wide_i64x4;
+}
+NK_INTERNAL __m128i nk_lasx_castsi256_si128_(__m256i wide_i64x4) {
+    __m128i low_i64x2;
+    __asm__("" : "=f"(low_i64x2) : "f"(wide_i64x4));
+    return low_i64x2;
+}
+NK_INTERNAL __m128 nk_lasx_castps256_ps128_(__m256 wide_f32x8) {
+    __m128 low_f32x4;
+    __asm__("" : "=f"(low_f32x4) : "f"(wide_f32x8));
+    return low_f32x4;
+}
+
+/** @brief Type-agnostic 256-bit full load (LASX). */
+NK_INTERNAL void nk_load_b256_loongsonasx_(void const *src, nk_b256_vec_t *dst) { dst->ymm = __lasx_xvld(src, 0); }
+
+/** @brief Type-agnostic 256-bit full store (LASX). */
+NK_INTERNAL void nk_store_b256_loongsonasx_(nk_b256_vec_t const *src, void *dst) { __lasx_xvst(src->ymm, dst, 0); }
+
+/** @brief Type-agnostic 128-bit full load (LSX subset of LASX). */
+NK_INTERNAL void nk_load_b128_loongsonasx_(void const *src, nk_b128_vec_t *dst) { dst->xmm = __lsx_vld(src, 0); }
+
+/** @brief Type-agnostic 128-bit full store (LSX subset of LASX). */
+NK_INTERNAL void nk_store_b128_loongsonasx_(nk_b128_vec_t const *src, void *dst) { __lsx_vst(src->xmm, dst, 0); }
+
+/** @brief Convert 8 × bf16 → 8 × f32 by interleaving with zero so bf16 lands in upper 16 bits (LASX).
+ *
+ *  Duplicates the 128-bit input into both lanes, then `xvilvl_h(bf16, zero)` places each bf16
+ *  value in the high 16 bits of a 32-bit slot — which is valid f32 with no shift needed.
+ *  `xvpermi_q` combines the low-element and high-element halves into a single register.
+ */
+NK_INTERNAL __m256i nk_bf16x8_to_f32x8_loongsonasx_(__m128i bf16_i16x8) {
+    __m256i duped_bf16x16 = __lasx_xvpermi_q(nk_lasx_castsi128_si256_(bf16_i16x8), nk_lasx_castsi128_si256_(bf16_i16x8),
+                                             0x00);
+    __m256i zero_i16x16 = __lasx_xvreplgr2vr_h(0);
+    __m256i low_f32x8 = __lasx_xvilvl_h(duped_bf16x16, zero_i16x16);
+    __m256i high_f32x8 = __lasx_xvilvh_h(duped_bf16x16, zero_i16x16);
+    return __lasx_xvpermi_q(high_f32x8, low_f32x8, 0x20);
+}
+
+/** @brief Load 8 × bf16 from memory, convert to 8 × f32, store in 256-bit vector (LASX). */
+NK_INTERNAL void nk_load_bf16x8_to_f32x8_loongsonasx_(void const *src, nk_b256_vec_t *dst) {
+    dst->ymm = nk_bf16x8_to_f32x8_loongsonasx_(__lsx_vld(src, 0));
+}
+
+/** @brief Partial load for bf16 elements (up to 8) with conversion to f32 (LASX). */
+NK_INTERNAL void nk_partial_load_bf16x8_to_f32x8_loongsonasx_(nk_bf16_t const *src, nk_b256_vec_t *dst, nk_size_t n) {
+    nk_b128_vec_t vec;
+    nk_partial_load_b16x8_serial_(src, &vec, n);
+    dst->ymm = nk_bf16x8_to_f32x8_loongsonasx_(vec.xmm);
+}
+
+/** @brief Convert 8 × f16 → 8 × f32 via native LASX hardware conversion. */
+NK_INTERNAL __m256i nk_f16x8_to_f32x8_loongsonasx_(__m128i f16_i16x8) {
+    __m256i duped_f16x16 = __lasx_xvpermi_q(nk_lasx_castsi128_si256_(f16_i16x8), nk_lasx_castsi128_si256_(f16_i16x8),
+                                            0x00);
+    __m256i low_f32x8 = (__m256i)__lasx_xvfcvtl_s_h(duped_f16x16);
+    __m256i high_f32x8 = (__m256i)__lasx_xvfcvth_s_h(duped_f16x16);
+    return __lasx_xvpermi_q(high_f32x8, low_f32x8, 0x20);
+}
+
+/** @brief Load 8 × f16 from memory, convert to 8 × f32 via native LASX conversion. */
+NK_INTERNAL void nk_load_f16x8_to_f32x8_loongsonasx_(void const *src, nk_b256_vec_t *dst) {
+    dst->ymm = nk_f16x8_to_f32x8_loongsonasx_(__lsx_vld(src, 0));
+}
+
+/** @brief Partial load for f16 elements (up to 8) with conversion to f32 (LASX). */
+NK_INTERNAL void nk_partial_load_f16x8_to_f32x8_loongsonasx_(nk_f16_t const *src, nk_b256_vec_t *dst, nk_size_t n) {
+    nk_b128_vec_t vec;
+    nk_partial_load_b16x8_serial_(src, &vec, n);
+    dst->ymm = nk_f16x8_to_f32x8_loongsonasx_(vec.xmm);
+}
+
+#pragma endregion Type Punned Loads and Stores
+
+#pragma region Vectorized From Dot Helpers
+
+/** @brief Safe square root of 8 floats with zero-clamping for numerical stability (LASX 256-bit). */
+NK_INTERNAL __m256 nk_sqrt_f32x8_loongsonasx_(__m256 x_f32x8) {
+    __m256 zero_f32x8 = (__m256)__lasx_xvreplgr2vr_w(0);
+    return __lasx_xvfsqrt_s(__lasx_xvfmax_s(x_f32x8, zero_f32x8));
+}
+
+/** @brief Safe square root of 4 floats with zero-clamping for numerical stability (LSX 128-bit). */
+NK_INTERNAL __m128 nk_sqrt_f32x4_loongsonasx_(__m128 x_f32x4) {
+    __m128 zero_f32x4 = (__m128)__lsx_vreplgr2vr_w(0);
+    return __lsx_vfsqrt_s(__lsx_vfmax_s(x_f32x4, zero_f32x4));
+}
+
+/** @brief Angular from_dot: computes 1 − dot × rsqrt(query_sumsq × target_sumsq) for 4 pairs (LSX 128-bit f32). */
+NK_INTERNAL void nk_angular_through_f32_from_dot_loongsonasx_(nk_b128_vec_t dots, nk_f32_t query_sumsq,
+                                                              nk_b128_vec_t target_sumsqs, nk_b128_vec_t *results) {
+    __m128 dots_f32x4 = dots.xmm_ps;
+    __m128 query_sumsq_f32x4 = nk_xvreplgr2vr_s_128_(query_sumsq);
+    __m128 products_f32x4 = __lsx_vfmul_s(query_sumsq_f32x4, target_sumsqs.xmm_ps);
+    __m128 rsqrt_f32x4 = __lsx_vfrsqrt_s(products_f32x4);
+    __m128 normalized_f32x4 = __lsx_vfmul_s(dots_f32x4, rsqrt_f32x4);
+    __m128 one_f32x4 = nk_xvreplgr2vr_s_128_(1.0f);
+    __m128 angular_f32x4 = __lsx_vfsub_s(one_f32x4, normalized_f32x4);
+    __m128 zero_f32x4 = (__m128)__lsx_vreplgr2vr_w(0);
+    results->xmm_ps = __lsx_vfmax_s(angular_f32x4, zero_f32x4);
+}
+
+/** @brief Euclidean from_dot: computes √(query_sumsq + target_sumsq − 2 × dot) for 4 pairs (LSX 128-bit f32). */
+NK_INTERNAL void nk_euclidean_through_f32_from_dot_loongsonasx_(nk_b128_vec_t dots, nk_f32_t query_sumsq,
+                                                                nk_b128_vec_t target_sumsqs, nk_b128_vec_t *results) {
+    __m128 dots_f32x4 = dots.xmm_ps;
+    __m128 query_sumsq_f32x4 = nk_xvreplgr2vr_s_128_(query_sumsq);
+    __m128 sum_sq_f32x4 = __lsx_vfadd_s(query_sumsq_f32x4, target_sumsqs.xmm_ps);
+    __m128 two_f32x4 = nk_xvreplgr2vr_s_128_(2.0f);
+    // dist_sq = sum_sq − 2 × dots = -(2 × dots − sum_sq)
+    __m128 dist_sq_f32x4 = __lsx_vfnmsub_s(two_f32x4, dots_f32x4, sum_sq_f32x4);
+    results->xmm_ps = nk_sqrt_f32x4_loongsonasx_(dist_sq_f32x4);
+}
+
+/** @brief Angular from_dot for native f64: 1 − dot / √(query_sumsq × target_sumsq) for 4 pairs (LASX 256-bit). */
+NK_INTERNAL void nk_angular_through_f64_from_dot_loongsonasx_(nk_b256_vec_t dots, nk_f64_t query_sumsq,
+                                                              nk_b256_vec_t target_sumsqs, nk_b256_vec_t *results) {
+    __m256d dots_f64x4 = dots.ymm_pd;
+    __m256d query_sumsq_f64x4 = nk_xvfreplgr2vr_d_(query_sumsq);
+    __m256d products_f64x4 = __lasx_xvfmul_d(query_sumsq_f64x4, target_sumsqs.ymm_pd);
+    __m256d sqrt_products_f64x4 = __lasx_xvfsqrt_d(products_f64x4);
+    __m256d normalized_f64x4 = __lasx_xvfdiv_d(dots_f64x4, sqrt_products_f64x4);
+    __m256d one_f64x4 = nk_xvfreplgr2vr_d_(1.0);
+    __m256d angular_f64x4 = __lasx_xvfsub_d(one_f64x4, normalized_f64x4);
+    __m256d zero_f64x4 = (__m256d)__lasx_xvreplgr2vr_d(0);
+    results->ymm_pd = __lasx_xvfmax_d(angular_f64x4, zero_f64x4);
+}
+
+/** @brief Euclidean from_dot for native f64: √(query_sumsq + target_sumsq − 2 × dot) for 4 pairs (LASX 256-bit). */
+NK_INTERNAL void nk_euclidean_through_f64_from_dot_loongsonasx_(nk_b256_vec_t dots, nk_f64_t query_sumsq,
+                                                                nk_b256_vec_t target_sumsqs, nk_b256_vec_t *results) {
+    __m256d dots_f64x4 = dots.ymm_pd;
+    __m256d query_sumsq_f64x4 = nk_xvfreplgr2vr_d_(query_sumsq);
+    __m256d sum_sq_f64x4 = __lasx_xvfadd_d(query_sumsq_f64x4, target_sumsqs.ymm_pd);
+    __m256d two_f64x4 = nk_xvfreplgr2vr_d_(2.0);
+    // dist_sq = sum_sq − 2 × dots = -(2 × dots − sum_sq)
+    __m256d dist_sq_f64x4 = __lasx_xvfnmsub_d(two_f64x4, dots_f64x4, sum_sq_f64x4);
+    __m256d zero_f64x4 = (__m256d)__lasx_xvreplgr2vr_d(0);
+    results->ymm_pd = __lasx_xvfsqrt_d(__lasx_xvfmax_d(dist_sq_f64x4, zero_f64x4));
+}
+
+/** @brief Angular from_dot for i32 accumulators: cast i32 → f32, rsqrt+NR, clamp. 4 pairs (LSX 128-bit). */
+NK_INTERNAL void nk_angular_through_i32_from_dot_loongsonasx_(nk_b128_vec_t dots, nk_i32_t query_sumsq,
+                                                              nk_b128_vec_t target_sumsqs, nk_b128_vec_t *results) {
+    __m128 dots_f32x4 = __lsx_vffint_s_w(dots.xmm);
+    __m128 query_sumsq_f32x4 = nk_xvreplgr2vr_s_128_((nk_f32_t)query_sumsq);
+    __m128 products_f32x4 = __lsx_vfmul_s(query_sumsq_f32x4, __lsx_vffint_s_w(target_sumsqs.xmm));
+    __m128 rsqrt_f32x4 = __lsx_vfrsqrt_s(products_f32x4);
+    __m128 normalized_f32x4 = __lsx_vfmul_s(dots_f32x4, rsqrt_f32x4);
+    __m128 one_f32x4 = nk_xvreplgr2vr_s_128_(1.0f);
+    __m128 angular_f32x4 = __lsx_vfsub_s(one_f32x4, normalized_f32x4);
+    __m128 zero_f32x4 = (__m128)__lsx_vreplgr2vr_w(0);
+    results->xmm_ps = __lsx_vfmax_s(angular_f32x4, zero_f32x4);
+}
+
+/** @brief Euclidean from_dot for i32 accumulators: cast i32 → f32, then √(a² + b² − 2ab). 4 pairs (LSX 128-bit). */
+NK_INTERNAL void nk_euclidean_through_i32_from_dot_loongsonasx_(nk_b128_vec_t dots, nk_i32_t query_sumsq,
+                                                                nk_b128_vec_t target_sumsqs, nk_b128_vec_t *results) {
+    __m128 dots_f32x4 = __lsx_vffint_s_w(dots.xmm);
+    __m128 query_sumsq_f32x4 = nk_xvreplgr2vr_s_128_((nk_f32_t)query_sumsq);
+    __m128 sum_sq_f32x4 = __lsx_vfadd_s(query_sumsq_f32x4, __lsx_vffint_s_w(target_sumsqs.xmm));
+    __m128 two_f32x4 = nk_xvreplgr2vr_s_128_(2.0f);
+    __m128 dist_sq_f32x4 = __lsx_vfnmsub_s(two_f32x4, dots_f32x4, sum_sq_f32x4);
+    results->xmm_ps = nk_sqrt_f32x4_loongsonasx_(dist_sq_f32x4);
+}
+
+/** @brief Angular from_dot for u32 accumulators: cast u32 → f32, rsqrt+NR, clamp. 4 pairs (LSX 128-bit). */
+NK_INTERNAL void nk_angular_through_u32_from_dot_loongsonasx_(nk_b128_vec_t dots, nk_u32_t query_sumsq,
+                                                              nk_b128_vec_t target_sumsqs, nk_b128_vec_t *results) {
+    __m128 dots_f32x4 = __lsx_vffint_s_w(dots.xmm);
+    __m128 query_sumsq_f32x4 = nk_xvreplgr2vr_s_128_((nk_f32_t)query_sumsq);
+    __m128 products_f32x4 = __lsx_vfmul_s(query_sumsq_f32x4, __lsx_vffint_s_w(target_sumsqs.xmm));
+    __m128 rsqrt_f32x4 = __lsx_vfrsqrt_s(products_f32x4);
+    __m128 normalized_f32x4 = __lsx_vfmul_s(dots_f32x4, rsqrt_f32x4);
+    __m128 one_f32x4 = nk_xvreplgr2vr_s_128_(1.0f);
+    __m128 angular_f32x4 = __lsx_vfsub_s(one_f32x4, normalized_f32x4);
+    __m128 zero_f32x4 = (__m128)__lsx_vreplgr2vr_w(0);
+    results->xmm_ps = __lsx_vfmax_s(angular_f32x4, zero_f32x4);
+}
+
+/** @brief Euclidean from_dot for u32 accumulators: cast u32 → f32, then √(a² + b² − 2ab). 4 pairs (LSX 128-bit). */
+NK_INTERNAL void nk_euclidean_through_u32_from_dot_loongsonasx_(nk_b128_vec_t dots, nk_u32_t query_sumsq,
+                                                                nk_b128_vec_t target_sumsqs, nk_b128_vec_t *results) {
+    __m128 dots_f32x4 = __lsx_vffint_s_w(dots.xmm);
+    __m128 query_sumsq_f32x4 = nk_xvreplgr2vr_s_128_((nk_f32_t)query_sumsq);
+    __m128 sum_sq_f32x4 = __lsx_vfadd_s(query_sumsq_f32x4, __lsx_vffint_s_w(target_sumsqs.xmm));
+    __m128 two_f32x4 = nk_xvreplgr2vr_s_128_(2.0f);
+    __m128 dist_sq_f32x4 = __lsx_vfnmsub_s(two_f32x4, dots_f32x4, sum_sq_f32x4);
+    results->xmm_ps = nk_sqrt_f32x4_loongsonasx_(dist_sq_f32x4);
+}
+
+#pragma endregion Vectorized From Dot Helpers
+
+#if defined(__cplusplus)
+} // extern "C"
+#endif
+
+#endif // NK_TARGET_LOONGSONASX
+#endif // NK_TARGET_LOONGARCH_
+#endif // NK_CAST_LOONGSONASX_H