llvm-runtime-resources-darwin 0.0.0 → 22.1.8

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (350) hide show
  1. package/LICENSE +201 -0
  2. package/NOTICE +33 -0
  3. package/include/__clang_cuda_builtin_vars.h +121 -0
  4. package/include/__clang_cuda_cmath.h +512 -0
  5. package/include/__clang_cuda_complex_builtins.h +229 -0
  6. package/include/__clang_cuda_device_functions.h +1572 -0
  7. package/include/__clang_cuda_intrinsics.h +994 -0
  8. package/include/__clang_cuda_libdevice_declares.h +468 -0
  9. package/include/__clang_cuda_math.h +353 -0
  10. package/include/__clang_cuda_math_forward_declares.h +284 -0
  11. package/include/__clang_cuda_runtime_wrapper.h +522 -0
  12. package/include/__clang_cuda_texture_intrinsics.h +1177 -0
  13. package/include/__clang_hip_cmath.h +848 -0
  14. package/include/__clang_hip_libdevice_declares.h +340 -0
  15. package/include/__clang_hip_math.h +1405 -0
  16. package/include/__clang_hip_runtime_wrapper.h +165 -0
  17. package/include/__clang_hip_stdlib.h +43 -0
  18. package/include/__clang_spirv_builtins.h +217 -0
  19. package/include/__float_float.h +176 -0
  20. package/include/__float_header_macro.h +12 -0
  21. package/include/__float_infinity_nan.h +20 -0
  22. package/include/__stdarg___gnuc_va_list.h +13 -0
  23. package/include/__stdarg___va_copy.h +12 -0
  24. package/include/__stdarg_header_macro.h +12 -0
  25. package/include/__stdarg_va_arg.h +22 -0
  26. package/include/__stdarg_va_copy.h +12 -0
  27. package/include/__stdarg_va_list.h +13 -0
  28. package/include/__stddef_header_macro.h +12 -0
  29. package/include/__stddef_max_align_t.h +27 -0
  30. package/include/__stddef_null.h +29 -0
  31. package/include/__stddef_nullptr_t.h +29 -0
  32. package/include/__stddef_offsetof.h +17 -0
  33. package/include/__stddef_ptrdiff_t.h +20 -0
  34. package/include/__stddef_rsize_t.h +20 -0
  35. package/include/__stddef_size_t.h +20 -0
  36. package/include/__stddef_unreachable.h +21 -0
  37. package/include/__stddef_wchar_t.h +28 -0
  38. package/include/__stddef_wint_t.h +15 -0
  39. package/include/__wmmintrin_aes.h +140 -0
  40. package/include/__wmmintrin_pclmul.h +48 -0
  41. package/include/adcintrin.h +165 -0
  42. package/include/adxintrin.h +107 -0
  43. package/include/altivec.h +19364 -0
  44. package/include/amdgpuintrin.h +191 -0
  45. package/include/ammintrin.h +183 -0
  46. package/include/amo.h +131 -0
  47. package/include/amxavx512intrin.h +596 -0
  48. package/include/amxcomplexintrin.h +167 -0
  49. package/include/amxfp16intrin.h +93 -0
  50. package/include/amxfp8intrin.h +230 -0
  51. package/include/amxintrin.h +492 -0
  52. package/include/amxmovrsintrin.h +48 -0
  53. package/include/amxtf32intrin.h +108 -0
  54. package/include/andes_vector.h +16 -0
  55. package/include/arm64intr.h +35 -0
  56. package/include/arm_acle.h +865 -0
  57. package/include/arm_bf16.h +20 -0
  58. package/include/arm_cde.h +410 -0
  59. package/include/arm_cmse.h +217 -0
  60. package/include/arm_fp16.h +596 -0
  61. package/include/arm_mve.h +19187 -0
  62. package/include/arm_neon.h +74183 -0
  63. package/include/arm_neon_sve_bridge.h +182 -0
  64. package/include/arm_sme.h +3741 -0
  65. package/include/arm_sve.h +32278 -0
  66. package/include/arm_vector_types.h +432 -0
  67. package/include/armintr.h +31 -0
  68. package/include/avx10_2_512bf16intrin.h +568 -0
  69. package/include/avx10_2_512convertintrin.h +322 -0
  70. package/include/avx10_2_512minmaxintrin.h +127 -0
  71. package/include/avx10_2_512niintrin.h +314 -0
  72. package/include/avx10_2_512satcvtdsintrin.h +307 -0
  73. package/include/avx10_2_512satcvtintrin.h +301 -0
  74. package/include/avx10_2bf16intrin.h +1094 -0
  75. package/include/avx10_2convertintrin.h +3257 -0
  76. package/include/avx10_2copyintrin.h +66 -0
  77. package/include/avx10_2minmaxintrin.h +232 -0
  78. package/include/avx10_2niintrin.h +409 -0
  79. package/include/avx10_2satcvtdsintrin.h +376 -0
  80. package/include/avx10_2satcvtintrin.h +312 -0
  81. package/include/avx2intrin.h +5191 -0
  82. package/include/avx512bf16intrin.h +292 -0
  83. package/include/avx512bitalgintrin.h +75 -0
  84. package/include/avx512bwintrin.h +1895 -0
  85. package/include/avx512cdintrin.h +112 -0
  86. package/include/avx512dqintrin.h +1350 -0
  87. package/include/avx512fintrin.h +9378 -0
  88. package/include/avx512fp16intrin.h +3355 -0
  89. package/include/avx512ifmaintrin.h +68 -0
  90. package/include/avx512ifmavlintrin.h +138 -0
  91. package/include/avx512vbmi2intrin.h +368 -0
  92. package/include/avx512vbmiintrin.h +98 -0
  93. package/include/avx512vbmivlintrin.h +179 -0
  94. package/include/avx512vlbf16intrin.h +527 -0
  95. package/include/avx512vlbitalgintrin.h +135 -0
  96. package/include/avx512vlbwintrin.h +3064 -0
  97. package/include/avx512vlcdintrin.h +202 -0
  98. package/include/avx512vldqintrin.h +1156 -0
  99. package/include/avx512vlfp16intrin.h +2090 -0
  100. package/include/avx512vlintrin.h +8083 -0
  101. package/include/avx512vlvbmi2intrin.h +710 -0
  102. package/include/avx512vlvnniintrin.h +313 -0
  103. package/include/avx512vlvp2intersectintrin.h +123 -0
  104. package/include/avx512vnniintrin.h +116 -0
  105. package/include/avx512vp2intersectintrin.h +77 -0
  106. package/include/avx512vpopcntdqintrin.h +62 -0
  107. package/include/avx512vpopcntdqvlintrin.h +105 -0
  108. package/include/avxifmaintrin.h +193 -0
  109. package/include/avxintrin.h +5064 -0
  110. package/include/avxneconvertintrin.h +484 -0
  111. package/include/avxvnniint16intrin.h +451 -0
  112. package/include/avxvnniint8intrin.h +454 -0
  113. package/include/avxvnniintrin.h +233 -0
  114. package/include/bmi2intrin.h +253 -0
  115. package/include/bmiintrin.h +604 -0
  116. package/include/builtins.h +19 -0
  117. package/include/cet.h +66 -0
  118. package/include/cetintrin.h +115 -0
  119. package/include/cldemoteintrin.h +36 -0
  120. package/include/clflushoptintrin.h +36 -0
  121. package/include/clwbintrin.h +38 -0
  122. package/include/clzerointrin.h +38 -0
  123. package/include/cmpccxaddintrin.h +70 -0
  124. package/include/cpuid.h +451 -0
  125. package/include/crc32intrin.h +100 -0
  126. package/include/cuda_wrappers/__utility/declval.h +28 -0
  127. package/include/cuda_wrappers/algorithm +116 -0
  128. package/include/cuda_wrappers/bits/basic_string.h +9 -0
  129. package/include/cuda_wrappers/bits/basic_string.tcc +9 -0
  130. package/include/cuda_wrappers/bits/c++config.h +61 -0
  131. package/include/cuda_wrappers/bits/shared_ptr_base.h +9 -0
  132. package/include/cuda_wrappers/cmath +44 -0
  133. package/include/cuda_wrappers/complex +90 -0
  134. package/include/cuda_wrappers/new +108 -0
  135. package/include/emmintrin.h +4940 -0
  136. package/include/enqcmdintrin.h +63 -0
  137. package/include/f16cintrin.h +176 -0
  138. package/include/float.h +48 -0
  139. package/include/fma4intrin.h +220 -0
  140. package/include/fmaintrin.h +826 -0
  141. package/include/fuzzer/FuzzedDataProvider.h +397 -0
  142. package/include/fxsrintrin.h +91 -0
  143. package/include/gfniintrin.h +238 -0
  144. package/include/gpuintrin.h +330 -0
  145. package/include/hexagon_circ_brev_intrinsics.h +298 -0
  146. package/include/hexagon_protos.h +8439 -0
  147. package/include/hexagon_types.h +2628 -0
  148. package/include/hresetintrin.h +49 -0
  149. package/include/htmintrin.h +212 -0
  150. package/include/htmxlintrin.h +345 -0
  151. package/include/hvx_hexagon_protos.h +5399 -0
  152. package/include/ia32intrin.h +863 -0
  153. package/include/immintrin.h +595 -0
  154. package/include/intrin.h +491 -0
  155. package/include/intrin0.h +256 -0
  156. package/include/inttypes.h +101 -0
  157. package/include/invpcidintrin.h +23 -0
  158. package/include/iso646.h +31 -0
  159. package/include/keylockerintrin.h +518 -0
  160. package/include/larchintrin.h +260 -0
  161. package/include/lasxintrin.h +3999 -0
  162. package/include/limits.h +133 -0
  163. package/include/llvm_libc_wrappers/assert.h +32 -0
  164. package/include/llvm_libc_wrappers/ctype.h +28 -0
  165. package/include/llvm_libc_wrappers/inttypes.h +32 -0
  166. package/include/llvm_libc_wrappers/stdio.h +52 -0
  167. package/include/llvm_libc_wrappers/stdlib.h +32 -0
  168. package/include/llvm_libc_wrappers/string.h +28 -0
  169. package/include/llvm_libc_wrappers/time.h +28 -0
  170. package/include/llvm_offload_wrappers/__llvm_offload.h +31 -0
  171. package/include/llvm_offload_wrappers/__llvm_offload_device.h +10 -0
  172. package/include/llvm_offload_wrappers/__llvm_offload_host.h +15 -0
  173. package/include/lsxintrin.h +3752 -0
  174. package/include/lwpintrin.h +136 -0
  175. package/include/lzcntintrin.h +109 -0
  176. package/include/mm3dnow.h +22 -0
  177. package/include/mm_malloc.h +67 -0
  178. package/include/mmintrin.h +1541 -0
  179. package/include/module.modulemap +360 -0
  180. package/include/movdirintrin.h +49 -0
  181. package/include/movrs_avx10_2_512intrin.h +98 -0
  182. package/include/movrs_avx10_2intrin.h +174 -0
  183. package/include/movrsintrin.h +59 -0
  184. package/include/msa.h +573 -0
  185. package/include/mwaitxintrin.h +62 -0
  186. package/include/nmmintrin.h +20 -0
  187. package/include/nvptxintrin.h +219 -0
  188. package/include/opencl-c-base.h +758 -0
  189. package/include/opencl-c.h +18676 -0
  190. package/include/openmp_wrappers/__clang_openmp_device_functions.h +104 -0
  191. package/include/openmp_wrappers/cmath +132 -0
  192. package/include/openmp_wrappers/complex +55 -0
  193. package/include/openmp_wrappers/complex.h +35 -0
  194. package/include/openmp_wrappers/complex_cmath.h +393 -0
  195. package/include/openmp_wrappers/math.h +61 -0
  196. package/include/openmp_wrappers/new +48 -0
  197. package/include/pconfigintrin.h +40 -0
  198. package/include/pkuintrin.h +34 -0
  199. package/include/pmmintrin.h +302 -0
  200. package/include/popcntintrin.h +59 -0
  201. package/include/ppc_wrappers/bmi2intrin.h +134 -0
  202. package/include/ppc_wrappers/bmiintrin.h +165 -0
  203. package/include/ppc_wrappers/emmintrin.h +2269 -0
  204. package/include/ppc_wrappers/immintrin.h +27 -0
  205. package/include/ppc_wrappers/mm_malloc.h +45 -0
  206. package/include/ppc_wrappers/mmintrin.h +1453 -0
  207. package/include/ppc_wrappers/nmmintrin.h +26 -0
  208. package/include/ppc_wrappers/pmmintrin.h +145 -0
  209. package/include/ppc_wrappers/smmintrin.h +683 -0
  210. package/include/ppc_wrappers/tmmintrin.h +453 -0
  211. package/include/ppc_wrappers/x86gprintrin.h +17 -0
  212. package/include/ppc_wrappers/x86intrin.h +28 -0
  213. package/include/ppc_wrappers/xmmintrin.h +1827 -0
  214. package/include/prfchiintrin.h +61 -0
  215. package/include/prfchwintrin.h +57 -0
  216. package/include/profile/InstrProfData.inc +1001 -0
  217. package/include/profile/instr_prof_interface.h +88 -0
  218. package/include/ptrauth.h +407 -0
  219. package/include/ptwriteintrin.h +37 -0
  220. package/include/raointintrin.h +203 -0
  221. package/include/rdpruintrin.h +57 -0
  222. package/include/rdseedintrin.h +105 -0
  223. package/include/riscv_bitmanip.h +195 -0
  224. package/include/riscv_corev_alu.h +128 -0
  225. package/include/riscv_crypto.h +170 -0
  226. package/include/riscv_mips.h +34 -0
  227. package/include/riscv_nds.h +89 -0
  228. package/include/riscv_ntlh.h +26 -0
  229. package/include/riscv_vector.h +422 -0
  230. package/include/rtmintrin.h +45 -0
  231. package/include/s390intrin.h +25 -0
  232. package/include/sanitizer/allocator_interface.h +106 -0
  233. package/include/sanitizer/asan_interface.h +348 -0
  234. package/include/sanitizer/common_interface_defs.h +544 -0
  235. package/include/sanitizer/coverage_interface.h +36 -0
  236. package/include/sanitizer/dfsan_interface.h +220 -0
  237. package/include/sanitizer/hwasan_interface.h +109 -0
  238. package/include/sanitizer/linux_syscall_hooks.h +3112 -0
  239. package/include/sanitizer/lsan_interface.h +89 -0
  240. package/include/sanitizer/msan_interface.h +135 -0
  241. package/include/sanitizer/netbsd_syscall_hooks.h +5005 -0
  242. package/include/sanitizer/rtsan_interface.h +75 -0
  243. package/include/sanitizer/scudo_interface.h +38 -0
  244. package/include/sanitizer/tsan_interface.h +316 -0
  245. package/include/sanitizer/tsan_interface_atomic.h +223 -0
  246. package/include/sanitizer/ubsan_interface.h +34 -0
  247. package/include/serializeintrin.h +30 -0
  248. package/include/sgxintrin.h +60 -0
  249. package/include/sha512intrin.h +200 -0
  250. package/include/shaintrin.h +190 -0
  251. package/include/sifive_vector.h +174 -0
  252. package/include/sm3intrin.h +238 -0
  253. package/include/sm4evexintrin.h +32 -0
  254. package/include/sm4intrin.h +269 -0
  255. package/include/smmintrin.h +2352 -0
  256. package/include/spirvintrin.h +194 -0
  257. package/include/stdalign.h +24 -0
  258. package/include/stdarg.h +75 -0
  259. package/include/stdatomic.h +204 -0
  260. package/include/stdbool.h +39 -0
  261. package/include/stdckdint.h +42 -0
  262. package/include/stdcountof.h +15 -0
  263. package/include/stddef.h +139 -0
  264. package/include/stddefer.h +19 -0
  265. package/include/stdint.h +844 -0
  266. package/include/stdnoreturn.h +35 -0
  267. package/include/tbmintrin.h +128 -0
  268. package/include/tgmath.h +1368 -0
  269. package/include/tmmintrin.h +779 -0
  270. package/include/tsxldtrkintrin.h +56 -0
  271. package/include/uintrintrin.h +157 -0
  272. package/include/unwind.h +332 -0
  273. package/include/usermsrintrin.h +51 -0
  274. package/include/vadefs.h +51 -0
  275. package/include/vaesintrin.h +86 -0
  276. package/include/varargs.h +16 -0
  277. package/include/vecintrin.h +12868 -0
  278. package/include/velintrin.h +71 -0
  279. package/include/velintrin_approx.h +120 -0
  280. package/include/velintrin_gen.h +1257 -0
  281. package/include/vpclmulqdqintrin.h +30 -0
  282. package/include/waitpkgintrin.h +42 -0
  283. package/include/wasm_simd128.h +2143 -0
  284. package/include/wbnoinvdintrin.h +24 -0
  285. package/include/wmmintrin.h +23 -0
  286. package/include/x86gprintrin.h +49 -0
  287. package/include/x86intrin.h +35 -0
  288. package/include/xmmintrin.h +3175 -0
  289. package/include/xopintrin.h +780 -0
  290. package/include/xsavecintrin.h +84 -0
  291. package/include/xsaveintrin.h +63 -0
  292. package/include/xsaveoptintrin.h +34 -0
  293. package/include/xsavesintrin.h +44 -0
  294. package/include/xtestintrin.h +27 -0
  295. package/include/yvals_core.h +25 -0
  296. package/include/zos_wrappers/builtins.h +18 -0
  297. package/index.js +5 -0
  298. package/lib/darwin/libclang_rt.asan_abi_ios.a +0 -0
  299. package/lib/darwin/libclang_rt.asan_abi_iossim.a +0 -0
  300. package/lib/darwin/libclang_rt.asan_abi_osx.a +0 -0
  301. package/lib/darwin/libclang_rt.asan_ios_dynamic.dylib +0 -0
  302. package/lib/darwin/libclang_rt.asan_iossim_dynamic.dylib +0 -0
  303. package/lib/darwin/libclang_rt.asan_osx_dynamic.dylib +0 -0
  304. package/lib/darwin/libclang_rt.cc_kext.a +0 -0
  305. package/lib/darwin/libclang_rt.cc_kext_ios.a +0 -0
  306. package/lib/darwin/libclang_rt.fuzzer_interceptors_ios.a +0 -0
  307. package/lib/darwin/libclang_rt.fuzzer_interceptors_iossim.a +0 -0
  308. package/lib/darwin/libclang_rt.fuzzer_interceptors_osx.a +0 -0
  309. package/lib/darwin/libclang_rt.fuzzer_ios.a +0 -0
  310. package/lib/darwin/libclang_rt.fuzzer_iossim.a +0 -0
  311. package/lib/darwin/libclang_rt.fuzzer_no_main_ios.a +0 -0
  312. package/lib/darwin/libclang_rt.fuzzer_no_main_iossim.a +0 -0
  313. package/lib/darwin/libclang_rt.fuzzer_no_main_osx.a +0 -0
  314. package/lib/darwin/libclang_rt.fuzzer_osx.a +0 -0
  315. package/lib/darwin/libclang_rt.ios.a +0 -0
  316. package/lib/darwin/libclang_rt.iossim.a +0 -0
  317. package/lib/darwin/libclang_rt.lsan_ios_dynamic.dylib +0 -0
  318. package/lib/darwin/libclang_rt.lsan_iossim_dynamic.dylib +0 -0
  319. package/lib/darwin/libclang_rt.lsan_osx_dynamic.dylib +0 -0
  320. package/lib/darwin/libclang_rt.osx.a +0 -0
  321. package/lib/darwin/libclang_rt.profile_ios.a +0 -0
  322. package/lib/darwin/libclang_rt.profile_iossim.a +0 -0
  323. package/lib/darwin/libclang_rt.profile_osx.a +0 -0
  324. package/lib/darwin/libclang_rt.rtsan_ios_dynamic.dylib +0 -0
  325. package/lib/darwin/libclang_rt.rtsan_iossim_dynamic.dylib +0 -0
  326. package/lib/darwin/libclang_rt.rtsan_osx_dynamic.dylib +0 -0
  327. package/lib/darwin/libclang_rt.stats_client_ios.a +0 -0
  328. package/lib/darwin/libclang_rt.stats_client_iossim.a +0 -0
  329. package/lib/darwin/libclang_rt.stats_client_osx.a +0 -0
  330. package/lib/darwin/libclang_rt.stats_ios_dynamic.dylib +0 -0
  331. package/lib/darwin/libclang_rt.stats_iossim_dynamic.dylib +0 -0
  332. package/lib/darwin/libclang_rt.stats_osx_dynamic.dylib +0 -0
  333. package/lib/darwin/libclang_rt.tsan_ios_dynamic.dylib +0 -0
  334. package/lib/darwin/libclang_rt.tsan_iossim_dynamic.dylib +0 -0
  335. package/lib/darwin/libclang_rt.tsan_osx_dynamic.dylib +0 -0
  336. package/lib/darwin/libclang_rt.tysan_ios_dynamic.dylib +0 -0
  337. package/lib/darwin/libclang_rt.tysan_iossim_dynamic.dylib +0 -0
  338. package/lib/darwin/libclang_rt.tysan_osx_dynamic.dylib +0 -0
  339. package/lib/darwin/libclang_rt.ubsan_ios_dynamic.dylib +0 -0
  340. package/lib/darwin/libclang_rt.ubsan_iossim_dynamic.dylib +0 -0
  341. package/lib/darwin/libclang_rt.ubsan_minimal_ios.a +0 -0
  342. package/lib/darwin/libclang_rt.ubsan_minimal_ios_dynamic.dylib +0 -0
  343. package/lib/darwin/libclang_rt.ubsan_minimal_iossim.a +0 -0
  344. package/lib/darwin/libclang_rt.ubsan_minimal_iossim_dynamic.dylib +0 -0
  345. package/lib/darwin/libclang_rt.ubsan_minimal_osx.a +0 -0
  346. package/lib/darwin/libclang_rt.ubsan_minimal_osx_dynamic.dylib +0 -0
  347. package/lib/darwin/libclang_rt.ubsan_osx_dynamic.dylib +0 -0
  348. package/package.json +40 -1
  349. package/share/asan_ignorelist.txt +14 -0
  350. package/share/cfi_ignorelist.txt +17 -0
@@ -0,0 +1,3064 @@
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+ /*===---- avx512vlbwintrin.h - AVX512VL and AVX512BW intrinsics ------------===
2
+ *
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+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
+ * See https://llvm.org/LICENSE.txt for license information.
5
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
+ *
7
+ *===-----------------------------------------------------------------------===
8
+ */
9
+
10
+ #ifndef __IMMINTRIN_H
11
+ #error "Never use <avx512vlbwintrin.h> directly; include <immintrin.h> instead."
12
+ #endif
13
+
14
+ #ifndef __AVX512VLBWINTRIN_H
15
+ #define __AVX512VLBWINTRIN_H
16
+
17
+ /* Define the default attributes for the functions in this file. */
18
+ #define __DEFAULT_FN_ATTRS128 \
19
+ __attribute__((__always_inline__, __nodebug__, \
20
+ __target__("avx512vl,avx512bw"), __min_vector_width__(128)))
21
+ #define __DEFAULT_FN_ATTRS256 \
22
+ __attribute__((__always_inline__, __nodebug__, \
23
+ __target__("avx512vl,avx512bw"), __min_vector_width__(256)))
24
+
25
+ #if defined(__cplusplus) && (__cplusplus >= 201103L)
26
+ #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
27
+ #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
28
+ #else
29
+ #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
30
+ #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
31
+ #endif
32
+
33
+ /* Integer compare */
34
+
35
+ #define _mm_cmp_epi8_mask(a, b, p) \
36
+ ((__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)(__m128i)(a), \
37
+ (__v16qi)(__m128i)(b), (int)(p), \
38
+ (__mmask16)-1))
39
+
40
+ #define _mm_mask_cmp_epi8_mask(m, a, b, p) \
41
+ ((__mmask16)__builtin_ia32_cmpb128_mask((__v16qi)(__m128i)(a), \
42
+ (__v16qi)(__m128i)(b), (int)(p), \
43
+ (__mmask16)(m)))
44
+
45
+ #define _mm_cmp_epu8_mask(a, b, p) \
46
+ ((__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)(__m128i)(a), \
47
+ (__v16qi)(__m128i)(b), (int)(p), \
48
+ (__mmask16)-1))
49
+
50
+ #define _mm_mask_cmp_epu8_mask(m, a, b, p) \
51
+ ((__mmask16)__builtin_ia32_ucmpb128_mask((__v16qi)(__m128i)(a), \
52
+ (__v16qi)(__m128i)(b), (int)(p), \
53
+ (__mmask16)(m)))
54
+
55
+ #define _mm256_cmp_epi8_mask(a, b, p) \
56
+ ((__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)(__m256i)(a), \
57
+ (__v32qi)(__m256i)(b), (int)(p), \
58
+ (__mmask32)-1))
59
+
60
+ #define _mm256_mask_cmp_epi8_mask(m, a, b, p) \
61
+ ((__mmask32)__builtin_ia32_cmpb256_mask((__v32qi)(__m256i)(a), \
62
+ (__v32qi)(__m256i)(b), (int)(p), \
63
+ (__mmask32)(m)))
64
+
65
+ #define _mm256_cmp_epu8_mask(a, b, p) \
66
+ ((__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)(__m256i)(a), \
67
+ (__v32qi)(__m256i)(b), (int)(p), \
68
+ (__mmask32)-1))
69
+
70
+ #define _mm256_mask_cmp_epu8_mask(m, a, b, p) \
71
+ ((__mmask32)__builtin_ia32_ucmpb256_mask((__v32qi)(__m256i)(a), \
72
+ (__v32qi)(__m256i)(b), (int)(p), \
73
+ (__mmask32)(m)))
74
+
75
+ #define _mm_cmp_epi16_mask(a, b, p) \
76
+ ((__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)(__m128i)(a), \
77
+ (__v8hi)(__m128i)(b), (int)(p), \
78
+ (__mmask8)-1))
79
+
80
+ #define _mm_mask_cmp_epi16_mask(m, a, b, p) \
81
+ ((__mmask8)__builtin_ia32_cmpw128_mask((__v8hi)(__m128i)(a), \
82
+ (__v8hi)(__m128i)(b), (int)(p), \
83
+ (__mmask8)(m)))
84
+
85
+ #define _mm_cmp_epu16_mask(a, b, p) \
86
+ ((__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)(__m128i)(a), \
87
+ (__v8hi)(__m128i)(b), (int)(p), \
88
+ (__mmask8)-1))
89
+
90
+ #define _mm_mask_cmp_epu16_mask(m, a, b, p) \
91
+ ((__mmask8)__builtin_ia32_ucmpw128_mask((__v8hi)(__m128i)(a), \
92
+ (__v8hi)(__m128i)(b), (int)(p), \
93
+ (__mmask8)(m)))
94
+
95
+ #define _mm256_cmp_epi16_mask(a, b, p) \
96
+ ((__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)(__m256i)(a), \
97
+ (__v16hi)(__m256i)(b), (int)(p), \
98
+ (__mmask16)-1))
99
+
100
+ #define _mm256_mask_cmp_epi16_mask(m, a, b, p) \
101
+ ((__mmask16)__builtin_ia32_cmpw256_mask((__v16hi)(__m256i)(a), \
102
+ (__v16hi)(__m256i)(b), (int)(p), \
103
+ (__mmask16)(m)))
104
+
105
+ #define _mm256_cmp_epu16_mask(a, b, p) \
106
+ ((__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)(__m256i)(a), \
107
+ (__v16hi)(__m256i)(b), (int)(p), \
108
+ (__mmask16)-1))
109
+
110
+ #define _mm256_mask_cmp_epu16_mask(m, a, b, p) \
111
+ ((__mmask16)__builtin_ia32_ucmpw256_mask((__v16hi)(__m256i)(a), \
112
+ (__v16hi)(__m256i)(b), (int)(p), \
113
+ (__mmask16)(m)))
114
+
115
+ #define _mm_cmpeq_epi8_mask(A, B) \
116
+ _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_EQ)
117
+ #define _mm_mask_cmpeq_epi8_mask(k, A, B) \
118
+ _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_EQ)
119
+ #define _mm_cmpge_epi8_mask(A, B) \
120
+ _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_GE)
121
+ #define _mm_mask_cmpge_epi8_mask(k, A, B) \
122
+ _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GE)
123
+ #define _mm_cmpgt_epi8_mask(A, B) \
124
+ _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_GT)
125
+ #define _mm_mask_cmpgt_epi8_mask(k, A, B) \
126
+ _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GT)
127
+ #define _mm_cmple_epi8_mask(A, B) \
128
+ _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_LE)
129
+ #define _mm_mask_cmple_epi8_mask(k, A, B) \
130
+ _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LE)
131
+ #define _mm_cmplt_epi8_mask(A, B) \
132
+ _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_LT)
133
+ #define _mm_mask_cmplt_epi8_mask(k, A, B) \
134
+ _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LT)
135
+ #define _mm_cmpneq_epi8_mask(A, B) \
136
+ _mm_cmp_epi8_mask((A), (B), _MM_CMPINT_NE)
137
+ #define _mm_mask_cmpneq_epi8_mask(k, A, B) \
138
+ _mm_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_NE)
139
+
140
+ #define _mm256_cmpeq_epi8_mask(A, B) \
141
+ _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_EQ)
142
+ #define _mm256_mask_cmpeq_epi8_mask(k, A, B) \
143
+ _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_EQ)
144
+ #define _mm256_cmpge_epi8_mask(A, B) \
145
+ _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_GE)
146
+ #define _mm256_mask_cmpge_epi8_mask(k, A, B) \
147
+ _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GE)
148
+ #define _mm256_cmpgt_epi8_mask(A, B) \
149
+ _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_GT)
150
+ #define _mm256_mask_cmpgt_epi8_mask(k, A, B) \
151
+ _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GT)
152
+ #define _mm256_cmple_epi8_mask(A, B) \
153
+ _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_LE)
154
+ #define _mm256_mask_cmple_epi8_mask(k, A, B) \
155
+ _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LE)
156
+ #define _mm256_cmplt_epi8_mask(A, B) \
157
+ _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_LT)
158
+ #define _mm256_mask_cmplt_epi8_mask(k, A, B) \
159
+ _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LT)
160
+ #define _mm256_cmpneq_epi8_mask(A, B) \
161
+ _mm256_cmp_epi8_mask((A), (B), _MM_CMPINT_NE)
162
+ #define _mm256_mask_cmpneq_epi8_mask(k, A, B) \
163
+ _mm256_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_NE)
164
+
165
+ #define _mm_cmpeq_epu8_mask(A, B) \
166
+ _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_EQ)
167
+ #define _mm_mask_cmpeq_epu8_mask(k, A, B) \
168
+ _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_EQ)
169
+ #define _mm_cmpge_epu8_mask(A, B) \
170
+ _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_GE)
171
+ #define _mm_mask_cmpge_epu8_mask(k, A, B) \
172
+ _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GE)
173
+ #define _mm_cmpgt_epu8_mask(A, B) \
174
+ _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_GT)
175
+ #define _mm_mask_cmpgt_epu8_mask(k, A, B) \
176
+ _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GT)
177
+ #define _mm_cmple_epu8_mask(A, B) \
178
+ _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_LE)
179
+ #define _mm_mask_cmple_epu8_mask(k, A, B) \
180
+ _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LE)
181
+ #define _mm_cmplt_epu8_mask(A, B) \
182
+ _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_LT)
183
+ #define _mm_mask_cmplt_epu8_mask(k, A, B) \
184
+ _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LT)
185
+ #define _mm_cmpneq_epu8_mask(A, B) \
186
+ _mm_cmp_epu8_mask((A), (B), _MM_CMPINT_NE)
187
+ #define _mm_mask_cmpneq_epu8_mask(k, A, B) \
188
+ _mm_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_NE)
189
+
190
+ #define _mm256_cmpeq_epu8_mask(A, B) \
191
+ _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_EQ)
192
+ #define _mm256_mask_cmpeq_epu8_mask(k, A, B) \
193
+ _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_EQ)
194
+ #define _mm256_cmpge_epu8_mask(A, B) \
195
+ _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_GE)
196
+ #define _mm256_mask_cmpge_epu8_mask(k, A, B) \
197
+ _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GE)
198
+ #define _mm256_cmpgt_epu8_mask(A, B) \
199
+ _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_GT)
200
+ #define _mm256_mask_cmpgt_epu8_mask(k, A, B) \
201
+ _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GT)
202
+ #define _mm256_cmple_epu8_mask(A, B) \
203
+ _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_LE)
204
+ #define _mm256_mask_cmple_epu8_mask(k, A, B) \
205
+ _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LE)
206
+ #define _mm256_cmplt_epu8_mask(A, B) \
207
+ _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_LT)
208
+ #define _mm256_mask_cmplt_epu8_mask(k, A, B) \
209
+ _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LT)
210
+ #define _mm256_cmpneq_epu8_mask(A, B) \
211
+ _mm256_cmp_epu8_mask((A), (B), _MM_CMPINT_NE)
212
+ #define _mm256_mask_cmpneq_epu8_mask(k, A, B) \
213
+ _mm256_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_NE)
214
+
215
+ #define _mm_cmpeq_epi16_mask(A, B) \
216
+ _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_EQ)
217
+ #define _mm_mask_cmpeq_epi16_mask(k, A, B) \
218
+ _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_EQ)
219
+ #define _mm_cmpge_epi16_mask(A, B) \
220
+ _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_GE)
221
+ #define _mm_mask_cmpge_epi16_mask(k, A, B) \
222
+ _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GE)
223
+ #define _mm_cmpgt_epi16_mask(A, B) \
224
+ _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_GT)
225
+ #define _mm_mask_cmpgt_epi16_mask(k, A, B) \
226
+ _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GT)
227
+ #define _mm_cmple_epi16_mask(A, B) \
228
+ _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_LE)
229
+ #define _mm_mask_cmple_epi16_mask(k, A, B) \
230
+ _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LE)
231
+ #define _mm_cmplt_epi16_mask(A, B) \
232
+ _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_LT)
233
+ #define _mm_mask_cmplt_epi16_mask(k, A, B) \
234
+ _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LT)
235
+ #define _mm_cmpneq_epi16_mask(A, B) \
236
+ _mm_cmp_epi16_mask((A), (B), _MM_CMPINT_NE)
237
+ #define _mm_mask_cmpneq_epi16_mask(k, A, B) \
238
+ _mm_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_NE)
239
+
240
+ #define _mm256_cmpeq_epi16_mask(A, B) \
241
+ _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_EQ)
242
+ #define _mm256_mask_cmpeq_epi16_mask(k, A, B) \
243
+ _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_EQ)
244
+ #define _mm256_cmpge_epi16_mask(A, B) \
245
+ _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_GE)
246
+ #define _mm256_mask_cmpge_epi16_mask(k, A, B) \
247
+ _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GE)
248
+ #define _mm256_cmpgt_epi16_mask(A, B) \
249
+ _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_GT)
250
+ #define _mm256_mask_cmpgt_epi16_mask(k, A, B) \
251
+ _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GT)
252
+ #define _mm256_cmple_epi16_mask(A, B) \
253
+ _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_LE)
254
+ #define _mm256_mask_cmple_epi16_mask(k, A, B) \
255
+ _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LE)
256
+ #define _mm256_cmplt_epi16_mask(A, B) \
257
+ _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_LT)
258
+ #define _mm256_mask_cmplt_epi16_mask(k, A, B) \
259
+ _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LT)
260
+ #define _mm256_cmpneq_epi16_mask(A, B) \
261
+ _mm256_cmp_epi16_mask((A), (B), _MM_CMPINT_NE)
262
+ #define _mm256_mask_cmpneq_epi16_mask(k, A, B) \
263
+ _mm256_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_NE)
264
+
265
+ #define _mm_cmpeq_epu16_mask(A, B) \
266
+ _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_EQ)
267
+ #define _mm_mask_cmpeq_epu16_mask(k, A, B) \
268
+ _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_EQ)
269
+ #define _mm_cmpge_epu16_mask(A, B) \
270
+ _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_GE)
271
+ #define _mm_mask_cmpge_epu16_mask(k, A, B) \
272
+ _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GE)
273
+ #define _mm_cmpgt_epu16_mask(A, B) \
274
+ _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_GT)
275
+ #define _mm_mask_cmpgt_epu16_mask(k, A, B) \
276
+ _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GT)
277
+ #define _mm_cmple_epu16_mask(A, B) \
278
+ _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_LE)
279
+ #define _mm_mask_cmple_epu16_mask(k, A, B) \
280
+ _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LE)
281
+ #define _mm_cmplt_epu16_mask(A, B) \
282
+ _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_LT)
283
+ #define _mm_mask_cmplt_epu16_mask(k, A, B) \
284
+ _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LT)
285
+ #define _mm_cmpneq_epu16_mask(A, B) \
286
+ _mm_cmp_epu16_mask((A), (B), _MM_CMPINT_NE)
287
+ #define _mm_mask_cmpneq_epu16_mask(k, A, B) \
288
+ _mm_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE)
289
+
290
+ #define _mm256_cmpeq_epu16_mask(A, B) \
291
+ _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_EQ)
292
+ #define _mm256_mask_cmpeq_epu16_mask(k, A, B) \
293
+ _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_EQ)
294
+ #define _mm256_cmpge_epu16_mask(A, B) \
295
+ _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_GE)
296
+ #define _mm256_mask_cmpge_epu16_mask(k, A, B) \
297
+ _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GE)
298
+ #define _mm256_cmpgt_epu16_mask(A, B) \
299
+ _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_GT)
300
+ #define _mm256_mask_cmpgt_epu16_mask(k, A, B) \
301
+ _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GT)
302
+ #define _mm256_cmple_epu16_mask(A, B) \
303
+ _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_LE)
304
+ #define _mm256_mask_cmple_epu16_mask(k, A, B) \
305
+ _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LE)
306
+ #define _mm256_cmplt_epu16_mask(A, B) \
307
+ _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_LT)
308
+ #define _mm256_mask_cmplt_epu16_mask(k, A, B) \
309
+ _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LT)
310
+ #define _mm256_cmpneq_epu16_mask(A, B) \
311
+ _mm256_cmp_epu16_mask((A), (B), _MM_CMPINT_NE)
312
+ #define _mm256_mask_cmpneq_epu16_mask(k, A, B) \
313
+ _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE)
314
+
315
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
316
+ _mm256_mask_add_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
317
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
318
+ (__v32qi)_mm256_add_epi8(__A, __B),
319
+ (__v32qi)__W);
320
+ }
321
+
322
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
323
+ _mm256_maskz_add_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
324
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
325
+ (__v32qi)_mm256_add_epi8(__A, __B),
326
+ (__v32qi)_mm256_setzero_si256());
327
+ }
328
+
329
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
330
+ _mm256_mask_add_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
331
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
332
+ (__v16hi)_mm256_add_epi16(__A, __B),
333
+ (__v16hi)__W);
334
+ }
335
+
336
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
337
+ _mm256_maskz_add_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
338
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
339
+ (__v16hi)_mm256_add_epi16(__A, __B),
340
+ (__v16hi)_mm256_setzero_si256());
341
+ }
342
+
343
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
344
+ _mm256_mask_sub_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
345
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
346
+ (__v32qi)_mm256_sub_epi8(__A, __B),
347
+ (__v32qi)__W);
348
+ }
349
+
350
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
351
+ _mm256_maskz_sub_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
352
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
353
+ (__v32qi)_mm256_sub_epi8(__A, __B),
354
+ (__v32qi)_mm256_setzero_si256());
355
+ }
356
+
357
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
358
+ _mm256_mask_sub_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
359
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
360
+ (__v16hi)_mm256_sub_epi16(__A, __B),
361
+ (__v16hi)__W);
362
+ }
363
+
364
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
365
+ _mm256_maskz_sub_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
366
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
367
+ (__v16hi)_mm256_sub_epi16(__A, __B),
368
+ (__v16hi)_mm256_setzero_si256());
369
+ }
370
+
371
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
372
+ _mm_mask_add_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
373
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
374
+ (__v16qi)_mm_add_epi8(__A, __B),
375
+ (__v16qi)__W);
376
+ }
377
+
378
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
379
+ _mm_maskz_add_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
380
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
381
+ (__v16qi)_mm_add_epi8(__A, __B),
382
+ (__v16qi)_mm_setzero_si128());
383
+ }
384
+
385
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
386
+ _mm_mask_add_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
387
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
388
+ (__v8hi)_mm_add_epi16(__A, __B),
389
+ (__v8hi)__W);
390
+ }
391
+
392
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
393
+ _mm_maskz_add_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
394
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
395
+ (__v8hi)_mm_add_epi16(__A, __B),
396
+ (__v8hi)_mm_setzero_si128());
397
+ }
398
+
399
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
400
+ _mm_mask_sub_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
401
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
402
+ (__v16qi)_mm_sub_epi8(__A, __B),
403
+ (__v16qi)__W);
404
+ }
405
+
406
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
407
+ _mm_maskz_sub_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
408
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
409
+ (__v16qi)_mm_sub_epi8(__A, __B),
410
+ (__v16qi)_mm_setzero_si128());
411
+ }
412
+
413
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
414
+ _mm_mask_sub_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
415
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
416
+ (__v8hi)_mm_sub_epi16(__A, __B),
417
+ (__v8hi)__W);
418
+ }
419
+
420
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
421
+ _mm_maskz_sub_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
422
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
423
+ (__v8hi)_mm_sub_epi16(__A, __B),
424
+ (__v8hi)_mm_setzero_si128());
425
+ }
426
+
427
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
428
+ _mm256_mask_mullo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
429
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
430
+ (__v16hi)_mm256_mullo_epi16(__A, __B),
431
+ (__v16hi)__W);
432
+ }
433
+
434
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
435
+ _mm256_maskz_mullo_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
436
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
437
+ (__v16hi)_mm256_mullo_epi16(__A, __B),
438
+ (__v16hi)_mm256_setzero_si256());
439
+ }
440
+
441
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
442
+ _mm_mask_mullo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
443
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
444
+ (__v8hi)_mm_mullo_epi16(__A, __B),
445
+ (__v8hi)__W);
446
+ }
447
+
448
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
449
+ _mm_maskz_mullo_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
450
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
451
+ (__v8hi)_mm_mullo_epi16(__A, __B),
452
+ (__v8hi)_mm_setzero_si128());
453
+ }
454
+
455
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
456
+ _mm_mask_blend_epi8(__mmask16 __U, __m128i __A, __m128i __W) {
457
+ return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,
458
+ (__v16qi) __W,
459
+ (__v16qi) __A);
460
+ }
461
+
462
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
463
+ _mm256_mask_blend_epi8(__mmask32 __U, __m256i __A, __m256i __W) {
464
+ return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,
465
+ (__v32qi) __W,
466
+ (__v32qi) __A);
467
+ }
468
+
469
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
470
+ _mm_mask_blend_epi16(__mmask8 __U, __m128i __A, __m128i __W) {
471
+ return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,
472
+ (__v8hi) __W,
473
+ (__v8hi) __A);
474
+ }
475
+
476
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
477
+ _mm256_mask_blend_epi16(__mmask16 __U, __m256i __A, __m256i __W) {
478
+ return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,
479
+ (__v16hi) __W,
480
+ (__v16hi) __A);
481
+ }
482
+
483
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
484
+ _mm_mask_abs_epi8(__m128i __W, __mmask16 __U, __m128i __A) {
485
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
486
+ (__v16qi)_mm_abs_epi8(__A),
487
+ (__v16qi)__W);
488
+ }
489
+
490
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
491
+ _mm_maskz_abs_epi8(__mmask16 __U, __m128i __A) {
492
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
493
+ (__v16qi)_mm_abs_epi8(__A),
494
+ (__v16qi)_mm_setzero_si128());
495
+ }
496
+
497
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
498
+ _mm256_mask_abs_epi8(__m256i __W, __mmask32 __U, __m256i __A) {
499
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
500
+ (__v32qi)_mm256_abs_epi8(__A),
501
+ (__v32qi)__W);
502
+ }
503
+
504
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
505
+ _mm256_maskz_abs_epi8(__mmask32 __U, __m256i __A) {
506
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
507
+ (__v32qi)_mm256_abs_epi8(__A),
508
+ (__v32qi)_mm256_setzero_si256());
509
+ }
510
+
511
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
512
+ _mm_mask_abs_epi16(__m128i __W, __mmask8 __U, __m128i __A) {
513
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
514
+ (__v8hi)_mm_abs_epi16(__A),
515
+ (__v8hi)__W);
516
+ }
517
+
518
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
519
+ _mm_maskz_abs_epi16(__mmask8 __U, __m128i __A) {
520
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
521
+ (__v8hi)_mm_abs_epi16(__A),
522
+ (__v8hi)_mm_setzero_si128());
523
+ }
524
+
525
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
526
+ _mm256_mask_abs_epi16(__m256i __W, __mmask16 __U, __m256i __A) {
527
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
528
+ (__v16hi)_mm256_abs_epi16(__A),
529
+ (__v16hi)__W);
530
+ }
531
+
532
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
533
+ _mm256_maskz_abs_epi16(__mmask16 __U, __m256i __A) {
534
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
535
+ (__v16hi)_mm256_abs_epi16(__A),
536
+ (__v16hi)_mm256_setzero_si256());
537
+ }
538
+
539
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
540
+ _mm_maskz_packs_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
541
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
542
+ (__v8hi)_mm_packs_epi32(__A, __B),
543
+ (__v8hi)_mm_setzero_si128());
544
+ }
545
+
546
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
547
+ _mm_mask_packs_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
548
+ {
549
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
550
+ (__v8hi)_mm_packs_epi32(__A, __B),
551
+ (__v8hi)__W);
552
+ }
553
+
554
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
555
+ _mm256_maskz_packs_epi32(__mmask16 __M, __m256i __A, __m256i __B)
556
+ {
557
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
558
+ (__v16hi)_mm256_packs_epi32(__A, __B),
559
+ (__v16hi)_mm256_setzero_si256());
560
+ }
561
+
562
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
563
+ _mm256_mask_packs_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)
564
+ {
565
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
566
+ (__v16hi)_mm256_packs_epi32(__A, __B),
567
+ (__v16hi)__W);
568
+ }
569
+
570
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
571
+ _mm_maskz_packs_epi16(__mmask16 __M, __m128i __A, __m128i __B)
572
+ {
573
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
574
+ (__v16qi)_mm_packs_epi16(__A, __B),
575
+ (__v16qi)_mm_setzero_si128());
576
+ }
577
+
578
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
579
+ _mm_mask_packs_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)
580
+ {
581
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
582
+ (__v16qi)_mm_packs_epi16(__A, __B),
583
+ (__v16qi)__W);
584
+ }
585
+
586
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
587
+ _mm256_maskz_packs_epi16(__mmask32 __M, __m256i __A, __m256i __B)
588
+ {
589
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
590
+ (__v32qi)_mm256_packs_epi16(__A, __B),
591
+ (__v32qi)_mm256_setzero_si256());
592
+ }
593
+
594
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
595
+ _mm256_mask_packs_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)
596
+ {
597
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
598
+ (__v32qi)_mm256_packs_epi16(__A, __B),
599
+ (__v32qi)__W);
600
+ }
601
+
602
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
603
+ _mm_maskz_packus_epi32(__mmask8 __M, __m128i __A, __m128i __B)
604
+ {
605
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
606
+ (__v8hi)_mm_packus_epi32(__A, __B),
607
+ (__v8hi)_mm_setzero_si128());
608
+ }
609
+
610
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
611
+ _mm_mask_packus_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
612
+ {
613
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
614
+ (__v8hi)_mm_packus_epi32(__A, __B),
615
+ (__v8hi)__W);
616
+ }
617
+
618
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
619
+ _mm256_maskz_packus_epi32(__mmask16 __M, __m256i __A, __m256i __B)
620
+ {
621
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
622
+ (__v16hi)_mm256_packus_epi32(__A, __B),
623
+ (__v16hi)_mm256_setzero_si256());
624
+ }
625
+
626
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
627
+ _mm256_mask_packus_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)
628
+ {
629
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
630
+ (__v16hi)_mm256_packus_epi32(__A, __B),
631
+ (__v16hi)__W);
632
+ }
633
+
634
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
635
+ _mm_maskz_packus_epi16(__mmask16 __M, __m128i __A, __m128i __B)
636
+ {
637
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
638
+ (__v16qi)_mm_packus_epi16(__A, __B),
639
+ (__v16qi)_mm_setzero_si128());
640
+ }
641
+
642
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
643
+ _mm_mask_packus_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)
644
+ {
645
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
646
+ (__v16qi)_mm_packus_epi16(__A, __B),
647
+ (__v16qi)__W);
648
+ }
649
+
650
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
651
+ _mm256_maskz_packus_epi16(__mmask32 __M, __m256i __A, __m256i __B)
652
+ {
653
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
654
+ (__v32qi)_mm256_packus_epi16(__A, __B),
655
+ (__v32qi)_mm256_setzero_si256());
656
+ }
657
+
658
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
659
+ _mm256_mask_packus_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)
660
+ {
661
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
662
+ (__v32qi)_mm256_packus_epi16(__A, __B),
663
+ (__v32qi)__W);
664
+ }
665
+
666
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
667
+ _mm_mask_adds_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
668
+ {
669
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
670
+ (__v16qi)_mm_adds_epi8(__A, __B),
671
+ (__v16qi)__W);
672
+ }
673
+
674
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
675
+ _mm_maskz_adds_epi8(__mmask16 __U, __m128i __A, __m128i __B)
676
+ {
677
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
678
+ (__v16qi)_mm_adds_epi8(__A, __B),
679
+ (__v16qi)_mm_setzero_si128());
680
+ }
681
+
682
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
683
+ _mm256_mask_adds_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
684
+ {
685
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
686
+ (__v32qi)_mm256_adds_epi8(__A, __B),
687
+ (__v32qi)__W);
688
+ }
689
+
690
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
691
+ _mm256_maskz_adds_epi8(__mmask32 __U, __m256i __A, __m256i __B)
692
+ {
693
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
694
+ (__v32qi)_mm256_adds_epi8(__A, __B),
695
+ (__v32qi)_mm256_setzero_si256());
696
+ }
697
+
698
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
699
+ _mm_mask_adds_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
700
+ {
701
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
702
+ (__v8hi)_mm_adds_epi16(__A, __B),
703
+ (__v8hi)__W);
704
+ }
705
+
706
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
707
+ _mm_maskz_adds_epi16(__mmask8 __U, __m128i __A, __m128i __B)
708
+ {
709
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
710
+ (__v8hi)_mm_adds_epi16(__A, __B),
711
+ (__v8hi)_mm_setzero_si128());
712
+ }
713
+
714
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
715
+ _mm256_mask_adds_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
716
+ {
717
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
718
+ (__v16hi)_mm256_adds_epi16(__A, __B),
719
+ (__v16hi)__W);
720
+ }
721
+
722
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
723
+ _mm256_maskz_adds_epi16(__mmask16 __U, __m256i __A, __m256i __B)
724
+ {
725
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
726
+ (__v16hi)_mm256_adds_epi16(__A, __B),
727
+ (__v16hi)_mm256_setzero_si256());
728
+ }
729
+
730
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
731
+ _mm_mask_adds_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
732
+ {
733
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
734
+ (__v16qi)_mm_adds_epu8(__A, __B),
735
+ (__v16qi)__W);
736
+ }
737
+
738
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
739
+ _mm_maskz_adds_epu8(__mmask16 __U, __m128i __A, __m128i __B)
740
+ {
741
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
742
+ (__v16qi)_mm_adds_epu8(__A, __B),
743
+ (__v16qi)_mm_setzero_si128());
744
+ }
745
+
746
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
747
+ _mm256_mask_adds_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
748
+ {
749
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
750
+ (__v32qi)_mm256_adds_epu8(__A, __B),
751
+ (__v32qi)__W);
752
+ }
753
+
754
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
755
+ _mm256_maskz_adds_epu8(__mmask32 __U, __m256i __A, __m256i __B)
756
+ {
757
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
758
+ (__v32qi)_mm256_adds_epu8(__A, __B),
759
+ (__v32qi)_mm256_setzero_si256());
760
+ }
761
+
762
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
763
+ _mm_mask_adds_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
764
+ {
765
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
766
+ (__v8hi)_mm_adds_epu16(__A, __B),
767
+ (__v8hi)__W);
768
+ }
769
+
770
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
771
+ _mm_maskz_adds_epu16(__mmask8 __U, __m128i __A, __m128i __B)
772
+ {
773
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
774
+ (__v8hi)_mm_adds_epu16(__A, __B),
775
+ (__v8hi)_mm_setzero_si128());
776
+ }
777
+
778
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
779
+ _mm256_mask_adds_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
780
+ {
781
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
782
+ (__v16hi)_mm256_adds_epu16(__A, __B),
783
+ (__v16hi)__W);
784
+ }
785
+
786
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
787
+ _mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B)
788
+ {
789
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
790
+ (__v16hi)_mm256_adds_epu16(__A, __B),
791
+ (__v16hi)_mm256_setzero_si256());
792
+ }
793
+
794
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
795
+ _mm_mask_avg_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
796
+ return (__m128i)__builtin_ia32_selectb_128(
797
+ (__mmask16)__U, (__v16qi)_mm_avg_epu8(__A, __B), (__v16qi)__W);
798
+ }
799
+
800
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
801
+ _mm_maskz_avg_epu8(__mmask16 __U, __m128i __A, __m128i __B) {
802
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
803
+ (__v16qi)_mm_avg_epu8(__A, __B),
804
+ (__v16qi)_mm_setzero_si128());
805
+ }
806
+
807
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
808
+ _mm256_mask_avg_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
809
+ return (__m256i)__builtin_ia32_selectb_256(
810
+ (__mmask32)__U, (__v32qi)_mm256_avg_epu8(__A, __B), (__v32qi)__W);
811
+ }
812
+
813
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
814
+ _mm256_maskz_avg_epu8(__mmask32 __U, __m256i __A, __m256i __B) {
815
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
816
+ (__v32qi)_mm256_avg_epu8(__A, __B),
817
+ (__v32qi)_mm256_setzero_si256());
818
+ }
819
+
820
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
821
+ _mm_mask_avg_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
822
+ return (__m128i)__builtin_ia32_selectw_128(
823
+ (__mmask8)__U, (__v8hi)_mm_avg_epu16(__A, __B), (__v8hi)__W);
824
+ }
825
+
826
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
827
+ _mm_maskz_avg_epu16(__mmask8 __U, __m128i __A, __m128i __B) {
828
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
829
+ (__v8hi)_mm_avg_epu16(__A, __B),
830
+ (__v8hi)_mm_setzero_si128());
831
+ }
832
+
833
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
834
+ _mm256_mask_avg_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
835
+ return (__m256i)__builtin_ia32_selectw_256(
836
+ (__mmask16)__U, (__v16hi)_mm256_avg_epu16(__A, __B), (__v16hi)__W);
837
+ }
838
+
839
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
840
+ _mm256_maskz_avg_epu16(__mmask16 __U, __m256i __A, __m256i __B) {
841
+ return (__m256i)__builtin_ia32_selectw_256(
842
+ (__mmask16)__U, (__v16hi)_mm256_avg_epu16(__A, __B),
843
+ (__v16hi)_mm256_setzero_si256());
844
+ }
845
+
846
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
847
+ _mm_maskz_max_epi8(__mmask16 __M, __m128i __A, __m128i __B) {
848
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
849
+ (__v16qi)_mm_max_epi8(__A, __B),
850
+ (__v16qi)_mm_setzero_si128());
851
+ }
852
+
853
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
854
+ _mm_mask_max_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {
855
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
856
+ (__v16qi)_mm_max_epi8(__A, __B),
857
+ (__v16qi)__W);
858
+ }
859
+
860
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
861
+ _mm256_maskz_max_epi8(__mmask32 __M, __m256i __A, __m256i __B) {
862
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
863
+ (__v32qi)_mm256_max_epi8(__A, __B),
864
+ (__v32qi)_mm256_setzero_si256());
865
+ }
866
+
867
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
868
+ _mm256_mask_max_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {
869
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
870
+ (__v32qi)_mm256_max_epi8(__A, __B),
871
+ (__v32qi)__W);
872
+ }
873
+
874
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
875
+ _mm_maskz_max_epi16(__mmask8 __M, __m128i __A, __m128i __B) {
876
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
877
+ (__v8hi)_mm_max_epi16(__A, __B),
878
+ (__v8hi)_mm_setzero_si128());
879
+ }
880
+
881
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
882
+ _mm_mask_max_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
883
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
884
+ (__v8hi)_mm_max_epi16(__A, __B),
885
+ (__v8hi)__W);
886
+ }
887
+
888
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
889
+ _mm256_maskz_max_epi16(__mmask16 __M, __m256i __A, __m256i __B) {
890
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
891
+ (__v16hi)_mm256_max_epi16(__A, __B),
892
+ (__v16hi)_mm256_setzero_si256());
893
+ }
894
+
895
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
896
+ _mm256_mask_max_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {
897
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
898
+ (__v16hi)_mm256_max_epi16(__A, __B),
899
+ (__v16hi)__W);
900
+ }
901
+
902
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
903
+ _mm_maskz_max_epu8(__mmask16 __M, __m128i __A, __m128i __B) {
904
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
905
+ (__v16qi)_mm_max_epu8(__A, __B),
906
+ (__v16qi)_mm_setzero_si128());
907
+ }
908
+
909
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
910
+ _mm_mask_max_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {
911
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
912
+ (__v16qi)_mm_max_epu8(__A, __B),
913
+ (__v16qi)__W);
914
+ }
915
+
916
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
917
+ _mm256_maskz_max_epu8(__mmask32 __M, __m256i __A, __m256i __B) {
918
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
919
+ (__v32qi)_mm256_max_epu8(__A, __B),
920
+ (__v32qi)_mm256_setzero_si256());
921
+ }
922
+
923
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
924
+ _mm256_mask_max_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {
925
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
926
+ (__v32qi)_mm256_max_epu8(__A, __B),
927
+ (__v32qi)__W);
928
+ }
929
+
930
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
931
+ _mm_maskz_max_epu16(__mmask8 __M, __m128i __A, __m128i __B) {
932
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
933
+ (__v8hi)_mm_max_epu16(__A, __B),
934
+ (__v8hi)_mm_setzero_si128());
935
+ }
936
+
937
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
938
+ _mm_mask_max_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
939
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
940
+ (__v8hi)_mm_max_epu16(__A, __B),
941
+ (__v8hi)__W);
942
+ }
943
+
944
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
945
+ _mm256_maskz_max_epu16(__mmask16 __M, __m256i __A, __m256i __B) {
946
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
947
+ (__v16hi)_mm256_max_epu16(__A, __B),
948
+ (__v16hi)_mm256_setzero_si256());
949
+ }
950
+
951
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
952
+ _mm256_mask_max_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {
953
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
954
+ (__v16hi)_mm256_max_epu16(__A, __B),
955
+ (__v16hi)__W);
956
+ }
957
+
958
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
959
+ _mm_maskz_min_epi8(__mmask16 __M, __m128i __A, __m128i __B) {
960
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
961
+ (__v16qi)_mm_min_epi8(__A, __B),
962
+ (__v16qi)_mm_setzero_si128());
963
+ }
964
+
965
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
966
+ _mm_mask_min_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {
967
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
968
+ (__v16qi)_mm_min_epi8(__A, __B),
969
+ (__v16qi)__W);
970
+ }
971
+
972
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
973
+ _mm256_maskz_min_epi8(__mmask32 __M, __m256i __A, __m256i __B) {
974
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
975
+ (__v32qi)_mm256_min_epi8(__A, __B),
976
+ (__v32qi)_mm256_setzero_si256());
977
+ }
978
+
979
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
980
+ _mm256_mask_min_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {
981
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
982
+ (__v32qi)_mm256_min_epi8(__A, __B),
983
+ (__v32qi)__W);
984
+ }
985
+
986
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
987
+ _mm_maskz_min_epi16(__mmask8 __M, __m128i __A, __m128i __B) {
988
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
989
+ (__v8hi)_mm_min_epi16(__A, __B),
990
+ (__v8hi)_mm_setzero_si128());
991
+ }
992
+
993
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
994
+ _mm_mask_min_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
995
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
996
+ (__v8hi)_mm_min_epi16(__A, __B),
997
+ (__v8hi)__W);
998
+ }
999
+
1000
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1001
+ _mm256_maskz_min_epi16(__mmask16 __M, __m256i __A, __m256i __B) {
1002
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
1003
+ (__v16hi)_mm256_min_epi16(__A, __B),
1004
+ (__v16hi)_mm256_setzero_si256());
1005
+ }
1006
+
1007
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1008
+ _mm256_mask_min_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {
1009
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
1010
+ (__v16hi)_mm256_min_epi16(__A, __B),
1011
+ (__v16hi)__W);
1012
+ }
1013
+
1014
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1015
+ _mm_maskz_min_epu8(__mmask16 __M, __m128i __A, __m128i __B) {
1016
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
1017
+ (__v16qi)_mm_min_epu8(__A, __B),
1018
+ (__v16qi)_mm_setzero_si128());
1019
+ }
1020
+
1021
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1022
+ _mm_mask_min_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {
1023
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
1024
+ (__v16qi)_mm_min_epu8(__A, __B),
1025
+ (__v16qi)__W);
1026
+ }
1027
+
1028
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1029
+ _mm256_maskz_min_epu8(__mmask32 __M, __m256i __A, __m256i __B) {
1030
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
1031
+ (__v32qi)_mm256_min_epu8(__A, __B),
1032
+ (__v32qi)_mm256_setzero_si256());
1033
+ }
1034
+
1035
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1036
+ _mm256_mask_min_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {
1037
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
1038
+ (__v32qi)_mm256_min_epu8(__A, __B),
1039
+ (__v32qi)__W);
1040
+ }
1041
+
1042
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1043
+ _mm_maskz_min_epu16(__mmask8 __M, __m128i __A, __m128i __B) {
1044
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
1045
+ (__v8hi)_mm_min_epu16(__A, __B),
1046
+ (__v8hi)_mm_setzero_si128());
1047
+ }
1048
+
1049
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1050
+ _mm_mask_min_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
1051
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
1052
+ (__v8hi)_mm_min_epu16(__A, __B),
1053
+ (__v8hi)__W);
1054
+ }
1055
+
1056
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1057
+ _mm256_maskz_min_epu16(__mmask16 __M, __m256i __A, __m256i __B) {
1058
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
1059
+ (__v16hi)_mm256_min_epu16(__A, __B),
1060
+ (__v16hi)_mm256_setzero_si256());
1061
+ }
1062
+
1063
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1064
+ _mm256_mask_min_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {
1065
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
1066
+ (__v16hi)_mm256_min_epu16(__A, __B),
1067
+ (__v16hi)__W);
1068
+ }
1069
+
1070
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1071
+ _mm_mask_shuffle_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
1072
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1073
+ (__v16qi)_mm_shuffle_epi8(__A, __B),
1074
+ (__v16qi)__W);
1075
+ }
1076
+
1077
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1078
+ _mm_maskz_shuffle_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
1079
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1080
+ (__v16qi)_mm_shuffle_epi8(__A, __B),
1081
+ (__v16qi)_mm_setzero_si128());
1082
+ }
1083
+
1084
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1085
+ _mm256_mask_shuffle_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
1086
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1087
+ (__v32qi)_mm256_shuffle_epi8(__A, __B),
1088
+ (__v32qi)__W);
1089
+ }
1090
+
1091
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1092
+ _mm256_maskz_shuffle_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
1093
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1094
+ (__v32qi)_mm256_shuffle_epi8(__A, __B),
1095
+ (__v32qi)_mm256_setzero_si256());
1096
+ }
1097
+
1098
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1099
+ _mm_mask_subs_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
1100
+ {
1101
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1102
+ (__v16qi)_mm_subs_epi8(__A, __B),
1103
+ (__v16qi)__W);
1104
+ }
1105
+
1106
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1107
+ _mm_maskz_subs_epi8(__mmask16 __U, __m128i __A, __m128i __B)
1108
+ {
1109
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1110
+ (__v16qi)_mm_subs_epi8(__A, __B),
1111
+ (__v16qi)_mm_setzero_si128());
1112
+ }
1113
+
1114
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1115
+ _mm256_mask_subs_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
1116
+ {
1117
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1118
+ (__v32qi)_mm256_subs_epi8(__A, __B),
1119
+ (__v32qi)__W);
1120
+ }
1121
+
1122
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1123
+ _mm256_maskz_subs_epi8(__mmask32 __U, __m256i __A, __m256i __B)
1124
+ {
1125
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1126
+ (__v32qi)_mm256_subs_epi8(__A, __B),
1127
+ (__v32qi)_mm256_setzero_si256());
1128
+ }
1129
+
1130
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1131
+ _mm_mask_subs_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1132
+ {
1133
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1134
+ (__v8hi)_mm_subs_epi16(__A, __B),
1135
+ (__v8hi)__W);
1136
+ }
1137
+
1138
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1139
+ _mm_maskz_subs_epi16(__mmask8 __U, __m128i __A, __m128i __B)
1140
+ {
1141
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1142
+ (__v8hi)_mm_subs_epi16(__A, __B),
1143
+ (__v8hi)_mm_setzero_si128());
1144
+ }
1145
+
1146
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1147
+ _mm256_mask_subs_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
1148
+ {
1149
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1150
+ (__v16hi)_mm256_subs_epi16(__A, __B),
1151
+ (__v16hi)__W);
1152
+ }
1153
+
1154
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1155
+ _mm256_maskz_subs_epi16(__mmask16 __U, __m256i __A, __m256i __B)
1156
+ {
1157
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1158
+ (__v16hi)_mm256_subs_epi16(__A, __B),
1159
+ (__v16hi)_mm256_setzero_si256());
1160
+ }
1161
+
1162
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1163
+ _mm_mask_subs_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
1164
+ {
1165
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1166
+ (__v16qi)_mm_subs_epu8(__A, __B),
1167
+ (__v16qi)__W);
1168
+ }
1169
+
1170
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1171
+ _mm_maskz_subs_epu8(__mmask16 __U, __m128i __A, __m128i __B)
1172
+ {
1173
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1174
+ (__v16qi)_mm_subs_epu8(__A, __B),
1175
+ (__v16qi)_mm_setzero_si128());
1176
+ }
1177
+
1178
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1179
+ _mm256_mask_subs_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
1180
+ {
1181
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1182
+ (__v32qi)_mm256_subs_epu8(__A, __B),
1183
+ (__v32qi)__W);
1184
+ }
1185
+
1186
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1187
+ _mm256_maskz_subs_epu8(__mmask32 __U, __m256i __A, __m256i __B)
1188
+ {
1189
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1190
+ (__v32qi)_mm256_subs_epu8(__A, __B),
1191
+ (__v32qi)_mm256_setzero_si256());
1192
+ }
1193
+
1194
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1195
+ _mm_mask_subs_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1196
+ {
1197
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1198
+ (__v8hi)_mm_subs_epu16(__A, __B),
1199
+ (__v8hi)__W);
1200
+ }
1201
+
1202
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1203
+ _mm_maskz_subs_epu16(__mmask8 __U, __m128i __A, __m128i __B)
1204
+ {
1205
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1206
+ (__v8hi)_mm_subs_epu16(__A, __B),
1207
+ (__v8hi)_mm_setzero_si128());
1208
+ }
1209
+
1210
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1211
+ _mm256_mask_subs_epu16(__m256i __W, __mmask16 __U, __m256i __A,
1212
+ __m256i __B) {
1213
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1214
+ (__v16hi)_mm256_subs_epu16(__A, __B),
1215
+ (__v16hi)__W);
1216
+ }
1217
+
1218
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1219
+ _mm256_maskz_subs_epu16(__mmask16 __U, __m256i __A, __m256i __B)
1220
+ {
1221
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1222
+ (__v16hi)_mm256_subs_epu16(__A, __B),
1223
+ (__v16hi)_mm256_setzero_si256());
1224
+ }
1225
+
1226
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1227
+ _mm_permutex2var_epi16(__m128i __A, __m128i __I, __m128i __B) {
1228
+ return (__m128i)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I,
1229
+ (__v8hi) __B);
1230
+ }
1231
+
1232
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1233
+ _mm_mask_permutex2var_epi16(__m128i __A, __mmask8 __U, __m128i __I,
1234
+ __m128i __B) {
1235
+ return (__m128i)__builtin_ia32_selectw_128(__U,
1236
+ (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),
1237
+ (__v8hi)__A);
1238
+ }
1239
+
1240
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1241
+ _mm_mask2_permutex2var_epi16(__m128i __A, __m128i __I, __mmask8 __U,
1242
+ __m128i __B) {
1243
+ return (__m128i)__builtin_ia32_selectw_128(__U,
1244
+ (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),
1245
+ (__v8hi)__I);
1246
+ }
1247
+
1248
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1249
+ _mm_maskz_permutex2var_epi16(__mmask8 __U, __m128i __A, __m128i __I,
1250
+ __m128i __B) {
1251
+ return (__m128i)__builtin_ia32_selectw_128(__U,
1252
+ (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),
1253
+ (__v8hi)_mm_setzero_si128());
1254
+ }
1255
+
1256
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1257
+ _mm256_permutex2var_epi16(__m256i __A, __m256i __I, __m256i __B) {
1258
+ return (__m256i)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I,
1259
+ (__v16hi)__B);
1260
+ }
1261
+
1262
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1263
+ _mm256_mask_permutex2var_epi16(__m256i __A, __mmask16 __U, __m256i __I,
1264
+ __m256i __B) {
1265
+ return (__m256i)__builtin_ia32_selectw_256(__U,
1266
+ (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),
1267
+ (__v16hi)__A);
1268
+ }
1269
+
1270
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1271
+ _mm256_mask2_permutex2var_epi16(__m256i __A, __m256i __I, __mmask16 __U,
1272
+ __m256i __B) {
1273
+ return (__m256i)__builtin_ia32_selectw_256(__U,
1274
+ (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),
1275
+ (__v16hi)__I);
1276
+ }
1277
+
1278
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1279
+ _mm256_maskz_permutex2var_epi16(__mmask16 __U, __m256i __A, __m256i __I,
1280
+ __m256i __B) {
1281
+ return (__m256i)__builtin_ia32_selectw_256(__U,
1282
+ (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),
1283
+ (__v16hi)_mm256_setzero_si256());
1284
+ }
1285
+
1286
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1287
+ _mm_mask_maddubs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {
1288
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1289
+ (__v8hi)_mm_maddubs_epi16(__X, __Y),
1290
+ (__v8hi)__W);
1291
+ }
1292
+
1293
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1294
+ _mm_maskz_maddubs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {
1295
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1296
+ (__v8hi)_mm_maddubs_epi16(__X, __Y),
1297
+ (__v8hi)_mm_setzero_si128());
1298
+ }
1299
+
1300
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1301
+ _mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X,
1302
+ __m256i __Y) {
1303
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1304
+ (__v16hi)_mm256_maddubs_epi16(__X, __Y),
1305
+ (__v16hi)__W);
1306
+ }
1307
+
1308
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1309
+ _mm256_maskz_maddubs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {
1310
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1311
+ (__v16hi)_mm256_maddubs_epi16(__X, __Y),
1312
+ (__v16hi)_mm256_setzero_si256());
1313
+ }
1314
+
1315
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1316
+ _mm_mask_madd_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
1317
+ return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
1318
+ (__v4si)_mm_madd_epi16(__A, __B),
1319
+ (__v4si)__W);
1320
+ }
1321
+
1322
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1323
+ _mm_maskz_madd_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
1324
+ return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
1325
+ (__v4si)_mm_madd_epi16(__A, __B),
1326
+ (__v4si)_mm_setzero_si128());
1327
+ }
1328
+
1329
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1330
+ _mm256_mask_madd_epi16(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
1331
+ return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
1332
+ (__v8si)_mm256_madd_epi16(__A, __B),
1333
+ (__v8si)__W);
1334
+ }
1335
+
1336
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1337
+ _mm256_maskz_madd_epi16(__mmask8 __U, __m256i __A, __m256i __B) {
1338
+ return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
1339
+ (__v8si)_mm256_madd_epi16(__A, __B),
1340
+ (__v8si)_mm256_setzero_si256());
1341
+ }
1342
+
1343
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
1344
+ _mm_cvtsepi16_epi8 (__m128i __A) {
1345
+ return (__m128i) __builtin_ia32_pmovswb128_mask ((__v8hi) __A,
1346
+ (__v16qi) _mm_setzero_si128(),
1347
+ (__mmask8) -1);
1348
+ }
1349
+
1350
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
1351
+ _mm_mask_cvtsepi16_epi8 (__m128i __O, __mmask8 __M, __m128i __A) {
1352
+ return (__m128i) __builtin_ia32_pmovswb128_mask ((__v8hi) __A,
1353
+ (__v16qi) __O,
1354
+ __M);
1355
+ }
1356
+
1357
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
1358
+ _mm_maskz_cvtsepi16_epi8 (__mmask8 __M, __m128i __A) {
1359
+ return (__m128i) __builtin_ia32_pmovswb128_mask ((__v8hi) __A,
1360
+ (__v16qi) _mm_setzero_si128(),
1361
+ __M);
1362
+ }
1363
+
1364
+ static __inline__ __m128i __DEFAULT_FN_ATTRS256
1365
+ _mm256_cvtsepi16_epi8 (__m256i __A) {
1366
+ return (__m128i) __builtin_ia32_pmovswb256_mask ((__v16hi) __A,
1367
+ (__v16qi) _mm_setzero_si128(),
1368
+ (__mmask16) -1);
1369
+ }
1370
+
1371
+ static __inline__ __m128i __DEFAULT_FN_ATTRS256
1372
+ _mm256_mask_cvtsepi16_epi8 (__m128i __O, __mmask16 __M, __m256i __A) {
1373
+ return (__m128i) __builtin_ia32_pmovswb256_mask ((__v16hi) __A,
1374
+ (__v16qi) __O,
1375
+ __M);
1376
+ }
1377
+
1378
+ static __inline__ __m128i __DEFAULT_FN_ATTRS256
1379
+ _mm256_maskz_cvtsepi16_epi8 (__mmask16 __M, __m256i __A) {
1380
+ return (__m128i) __builtin_ia32_pmovswb256_mask ((__v16hi) __A,
1381
+ (__v16qi) _mm_setzero_si128(),
1382
+ __M);
1383
+ }
1384
+
1385
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
1386
+ _mm_cvtusepi16_epi8 (__m128i __A) {
1387
+ return (__m128i) __builtin_ia32_pmovuswb128_mask ((__v8hi) __A,
1388
+ (__v16qi) _mm_setzero_si128(),
1389
+ (__mmask8) -1);
1390
+ }
1391
+
1392
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
1393
+ _mm_mask_cvtusepi16_epi8 (__m128i __O, __mmask8 __M, __m128i __A) {
1394
+ return (__m128i) __builtin_ia32_pmovuswb128_mask ((__v8hi) __A,
1395
+ (__v16qi) __O,
1396
+ __M);
1397
+ }
1398
+
1399
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
1400
+ _mm_maskz_cvtusepi16_epi8 (__mmask8 __M, __m128i __A) {
1401
+ return (__m128i) __builtin_ia32_pmovuswb128_mask ((__v8hi) __A,
1402
+ (__v16qi) _mm_setzero_si128(),
1403
+ __M);
1404
+ }
1405
+
1406
+ static __inline__ __m128i __DEFAULT_FN_ATTRS256
1407
+ _mm256_cvtusepi16_epi8 (__m256i __A) {
1408
+ return (__m128i) __builtin_ia32_pmovuswb256_mask ((__v16hi) __A,
1409
+ (__v16qi) _mm_setzero_si128(),
1410
+ (__mmask16) -1);
1411
+ }
1412
+
1413
+ static __inline__ __m128i __DEFAULT_FN_ATTRS256
1414
+ _mm256_mask_cvtusepi16_epi8 (__m128i __O, __mmask16 __M, __m256i __A) {
1415
+ return (__m128i) __builtin_ia32_pmovuswb256_mask ((__v16hi) __A,
1416
+ (__v16qi) __O,
1417
+ __M);
1418
+ }
1419
+
1420
+ static __inline__ __m128i __DEFAULT_FN_ATTRS256
1421
+ _mm256_maskz_cvtusepi16_epi8 (__mmask16 __M, __m256i __A) {
1422
+ return (__m128i) __builtin_ia32_pmovuswb256_mask ((__v16hi) __A,
1423
+ (__v16qi) _mm_setzero_si128(),
1424
+ __M);
1425
+ }
1426
+
1427
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1428
+ _mm_cvtepi16_epi8(__m128i __A) {
1429
+ return (__m128i)__builtin_shufflevector(
1430
+ __builtin_convertvector((__v8hi)__A, __v8qi),
1431
+ (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
1432
+ 12, 13, 14, 15);
1433
+ }
1434
+
1435
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
1436
+ _mm_mask_cvtepi16_epi8 (__m128i __O, __mmask8 __M, __m128i __A) {
1437
+ return (__m128i) __builtin_ia32_pmovwb128_mask ((__v8hi) __A,
1438
+ (__v16qi) __O,
1439
+ __M);
1440
+ }
1441
+
1442
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
1443
+ _mm_maskz_cvtepi16_epi8 (__mmask8 __M, __m128i __A) {
1444
+ return (__m128i) __builtin_ia32_pmovwb128_mask ((__v8hi) __A,
1445
+ (__v16qi) _mm_setzero_si128(),
1446
+ __M);
1447
+ }
1448
+
1449
+ static __inline__ void __DEFAULT_FN_ATTRS128
1450
+ _mm_mask_cvtepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)
1451
+ {
1452
+ __builtin_ia32_pmovwb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M);
1453
+ }
1454
+
1455
+
1456
+ static __inline__ void __DEFAULT_FN_ATTRS128
1457
+ _mm_mask_cvtsepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)
1458
+ {
1459
+ __builtin_ia32_pmovswb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M);
1460
+ }
1461
+
1462
+ static __inline__ void __DEFAULT_FN_ATTRS128
1463
+ _mm_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)
1464
+ {
1465
+ __builtin_ia32_pmovuswb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M);
1466
+ }
1467
+
1468
+ static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
1469
+ _mm256_cvtepi16_epi8(__m256i __A) {
1470
+ return (__m128i)__builtin_convertvector((__v16hi) __A, __v16qi);
1471
+ }
1472
+
1473
+ static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
1474
+ _mm256_mask_cvtepi16_epi8(__m128i __O, __mmask16 __M, __m256i __A) {
1475
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
1476
+ (__v16qi)_mm256_cvtepi16_epi8(__A),
1477
+ (__v16qi)__O);
1478
+ }
1479
+
1480
+ static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
1481
+ _mm256_maskz_cvtepi16_epi8(__mmask16 __M, __m256i __A) {
1482
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
1483
+ (__v16qi)_mm256_cvtepi16_epi8(__A),
1484
+ (__v16qi)_mm_setzero_si128());
1485
+ }
1486
+
1487
+ static __inline__ void __DEFAULT_FN_ATTRS256
1488
+ _mm256_mask_cvtepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A)
1489
+ {
1490
+ __builtin_ia32_pmovwb256mem_mask ((__v16qi *) __P, (__v16hi) __A, __M);
1491
+ }
1492
+
1493
+ static __inline__ void __DEFAULT_FN_ATTRS256
1494
+ _mm256_mask_cvtsepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A)
1495
+ {
1496
+ __builtin_ia32_pmovswb256mem_mask ((__v16qi *) __P, (__v16hi) __A, __M);
1497
+ }
1498
+
1499
+ static __inline__ void __DEFAULT_FN_ATTRS256
1500
+ _mm256_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A)
1501
+ {
1502
+ __builtin_ia32_pmovuswb256mem_mask ((__v16qi*) __P, (__v16hi) __A, __M);
1503
+ }
1504
+
1505
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1506
+ _mm_mask_mulhrs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {
1507
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1508
+ (__v8hi)_mm_mulhrs_epi16(__X, __Y),
1509
+ (__v8hi)__W);
1510
+ }
1511
+
1512
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1513
+ _mm_maskz_mulhrs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {
1514
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1515
+ (__v8hi)_mm_mulhrs_epi16(__X, __Y),
1516
+ (__v8hi)_mm_setzero_si128());
1517
+ }
1518
+
1519
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1520
+ _mm256_mask_mulhrs_epi16(__m256i __W, __mmask16 __U, __m256i __X, __m256i __Y) {
1521
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1522
+ (__v16hi)_mm256_mulhrs_epi16(__X, __Y),
1523
+ (__v16hi)__W);
1524
+ }
1525
+
1526
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1527
+ _mm256_maskz_mulhrs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {
1528
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1529
+ (__v16hi)_mm256_mulhrs_epi16(__X, __Y),
1530
+ (__v16hi)_mm256_setzero_si256());
1531
+ }
1532
+
1533
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1534
+ _mm_mask_mulhi_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
1535
+ return (__m128i)__builtin_ia32_selectw_128(
1536
+ (__mmask8)__U, (__v8hi)_mm_mulhi_epu16(__A, __B), (__v8hi)__W);
1537
+ }
1538
+
1539
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1540
+ _mm_maskz_mulhi_epu16(__mmask8 __U, __m128i __A, __m128i __B) {
1541
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1542
+ (__v8hi)_mm_mulhi_epu16(__A, __B),
1543
+ (__v8hi)_mm_setzero_si128());
1544
+ }
1545
+
1546
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1547
+ _mm256_mask_mulhi_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
1548
+ return (__m256i)__builtin_ia32_selectw_256(
1549
+ (__mmask16)__U, (__v16hi)_mm256_mulhi_epu16(__A, __B), (__v16hi)__W);
1550
+ }
1551
+
1552
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1553
+ _mm256_maskz_mulhi_epu16(__mmask16 __U, __m256i __A, __m256i __B) {
1554
+ return (__m256i)__builtin_ia32_selectw_256(
1555
+ (__mmask16)__U, (__v16hi)_mm256_mulhi_epu16(__A, __B),
1556
+ (__v16hi)_mm256_setzero_si256());
1557
+ }
1558
+
1559
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1560
+ _mm_mask_mulhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
1561
+ return (__m128i)__builtin_ia32_selectw_128(
1562
+ (__mmask8)__U, (__v8hi)_mm_mulhi_epi16(__A, __B), (__v8hi)__W);
1563
+ }
1564
+
1565
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1566
+ _mm_maskz_mulhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
1567
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1568
+ (__v8hi)_mm_mulhi_epi16(__A, __B),
1569
+ (__v8hi)_mm_setzero_si128());
1570
+ }
1571
+
1572
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1573
+ _mm256_mask_mulhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
1574
+ return (__m256i)__builtin_ia32_selectw_256(
1575
+ (__mmask16)__U, (__v16hi)_mm256_mulhi_epi16(__A, __B), (__v16hi)__W);
1576
+ }
1577
+
1578
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1579
+ _mm256_maskz_mulhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
1580
+ return (__m256i)__builtin_ia32_selectw_256(
1581
+ (__mmask16)__U, (__v16hi)_mm256_mulhi_epi16(__A, __B),
1582
+ (__v16hi)_mm256_setzero_si256());
1583
+ }
1584
+
1585
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1586
+ _mm_mask_unpackhi_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
1587
+ return (__m128i)__builtin_ia32_selectb_128(
1588
+ (__mmask16)__U, (__v16qi)_mm_unpackhi_epi8(__A, __B), (__v16qi)__W);
1589
+ }
1590
+
1591
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1592
+ _mm_maskz_unpackhi_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
1593
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1594
+ (__v16qi)_mm_unpackhi_epi8(__A, __B),
1595
+ (__v16qi)_mm_setzero_si128());
1596
+ }
1597
+
1598
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1599
+ _mm256_mask_unpackhi_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
1600
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1601
+ (__v32qi)_mm256_unpackhi_epi8(__A, __B),
1602
+ (__v32qi)__W);
1603
+ }
1604
+
1605
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1606
+ _mm256_maskz_unpackhi_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
1607
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1608
+ (__v32qi)_mm256_unpackhi_epi8(__A, __B),
1609
+ (__v32qi)_mm256_setzero_si256());
1610
+ }
1611
+
1612
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1613
+ _mm_mask_unpackhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
1614
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1615
+ (__v8hi)_mm_unpackhi_epi16(__A, __B),
1616
+ (__v8hi)__W);
1617
+ }
1618
+
1619
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1620
+ _mm_maskz_unpackhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
1621
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1622
+ (__v8hi)_mm_unpackhi_epi16(__A, __B),
1623
+ (__v8hi) _mm_setzero_si128());
1624
+ }
1625
+
1626
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1627
+ _mm256_mask_unpackhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
1628
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1629
+ (__v16hi)_mm256_unpackhi_epi16(__A, __B),
1630
+ (__v16hi)__W);
1631
+ }
1632
+
1633
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1634
+ _mm256_maskz_unpackhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
1635
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1636
+ (__v16hi)_mm256_unpackhi_epi16(__A, __B),
1637
+ (__v16hi)_mm256_setzero_si256());
1638
+ }
1639
+
1640
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1641
+ _mm_mask_unpacklo_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
1642
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1643
+ (__v16qi)_mm_unpacklo_epi8(__A, __B),
1644
+ (__v16qi)__W);
1645
+ }
1646
+
1647
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1648
+ _mm_maskz_unpacklo_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
1649
+ return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1650
+ (__v16qi)_mm_unpacklo_epi8(__A, __B),
1651
+ (__v16qi)_mm_setzero_si128());
1652
+ }
1653
+
1654
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1655
+ _mm256_mask_unpacklo_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
1656
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1657
+ (__v32qi)_mm256_unpacklo_epi8(__A, __B),
1658
+ (__v32qi)__W);
1659
+ }
1660
+
1661
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1662
+ _mm256_maskz_unpacklo_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
1663
+ return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1664
+ (__v32qi)_mm256_unpacklo_epi8(__A, __B),
1665
+ (__v32qi)_mm256_setzero_si256());
1666
+ }
1667
+
1668
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1669
+ _mm_mask_unpacklo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
1670
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1671
+ (__v8hi)_mm_unpacklo_epi16(__A, __B),
1672
+ (__v8hi)__W);
1673
+ }
1674
+
1675
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1676
+ _mm_maskz_unpacklo_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
1677
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1678
+ (__v8hi)_mm_unpacklo_epi16(__A, __B),
1679
+ (__v8hi) _mm_setzero_si128());
1680
+ }
1681
+
1682
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1683
+ _mm256_mask_unpacklo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
1684
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1685
+ (__v16hi)_mm256_unpacklo_epi16(__A, __B),
1686
+ (__v16hi)__W);
1687
+ }
1688
+
1689
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1690
+ _mm256_maskz_unpacklo_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
1691
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1692
+ (__v16hi)_mm256_unpacklo_epi16(__A, __B),
1693
+ (__v16hi)_mm256_setzero_si256());
1694
+ }
1695
+
1696
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1697
+ _mm_mask_cvtepi8_epi16(__m128i __W, __mmask8 __U, __m128i __A)
1698
+ {
1699
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1700
+ (__v8hi)_mm_cvtepi8_epi16(__A),
1701
+ (__v8hi)__W);
1702
+ }
1703
+
1704
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1705
+ _mm_maskz_cvtepi8_epi16(__mmask8 __U, __m128i __A)
1706
+ {
1707
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1708
+ (__v8hi)_mm_cvtepi8_epi16(__A),
1709
+ (__v8hi)_mm_setzero_si128());
1710
+ }
1711
+
1712
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1713
+ _mm256_mask_cvtepi8_epi16(__m256i __W, __mmask16 __U, __m128i __A)
1714
+ {
1715
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1716
+ (__v16hi)_mm256_cvtepi8_epi16(__A),
1717
+ (__v16hi)__W);
1718
+ }
1719
+
1720
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1721
+ _mm256_maskz_cvtepi8_epi16(__mmask16 __U, __m128i __A)
1722
+ {
1723
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1724
+ (__v16hi)_mm256_cvtepi8_epi16(__A),
1725
+ (__v16hi)_mm256_setzero_si256());
1726
+ }
1727
+
1728
+
1729
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1730
+ _mm_mask_cvtepu8_epi16(__m128i __W, __mmask8 __U, __m128i __A)
1731
+ {
1732
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1733
+ (__v8hi)_mm_cvtepu8_epi16(__A),
1734
+ (__v8hi)__W);
1735
+ }
1736
+
1737
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1738
+ _mm_maskz_cvtepu8_epi16(__mmask8 __U, __m128i __A)
1739
+ {
1740
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1741
+ (__v8hi)_mm_cvtepu8_epi16(__A),
1742
+ (__v8hi)_mm_setzero_si128());
1743
+ }
1744
+
1745
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1746
+ _mm256_mask_cvtepu8_epi16(__m256i __W, __mmask16 __U, __m128i __A)
1747
+ {
1748
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1749
+ (__v16hi)_mm256_cvtepu8_epi16(__A),
1750
+ (__v16hi)__W);
1751
+ }
1752
+
1753
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1754
+ _mm256_maskz_cvtepu8_epi16 (__mmask16 __U, __m128i __A)
1755
+ {
1756
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1757
+ (__v16hi)_mm256_cvtepu8_epi16(__A),
1758
+ (__v16hi)_mm256_setzero_si256());
1759
+ }
1760
+
1761
+
1762
+ #define _mm_mask_shufflehi_epi16(W, U, A, imm) \
1763
+ ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
1764
+ (__v8hi)_mm_shufflehi_epi16((A), (imm)), \
1765
+ (__v8hi)(__m128i)(W)))
1766
+
1767
+ #define _mm_maskz_shufflehi_epi16(U, A, imm) \
1768
+ ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
1769
+ (__v8hi)_mm_shufflehi_epi16((A), (imm)), \
1770
+ (__v8hi)_mm_setzero_si128()))
1771
+
1772
+ #define _mm256_mask_shufflehi_epi16(W, U, A, imm) \
1773
+ ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
1774
+ (__v16hi)_mm256_shufflehi_epi16((A), (imm)), \
1775
+ (__v16hi)(__m256i)(W)))
1776
+
1777
+ #define _mm256_maskz_shufflehi_epi16(U, A, imm) \
1778
+ ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
1779
+ (__v16hi)_mm256_shufflehi_epi16((A), (imm)), \
1780
+ (__v16hi)_mm256_setzero_si256()))
1781
+
1782
+ #define _mm_mask_shufflelo_epi16(W, U, A, imm) \
1783
+ ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
1784
+ (__v8hi)_mm_shufflelo_epi16((A), (imm)), \
1785
+ (__v8hi)(__m128i)(W)))
1786
+
1787
+ #define _mm_maskz_shufflelo_epi16(U, A, imm) \
1788
+ ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
1789
+ (__v8hi)_mm_shufflelo_epi16((A), (imm)), \
1790
+ (__v8hi)_mm_setzero_si128()))
1791
+
1792
+ #define _mm256_mask_shufflelo_epi16(W, U, A, imm) \
1793
+ ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
1794
+ (__v16hi)_mm256_shufflelo_epi16((A), \
1795
+ (imm)), \
1796
+ (__v16hi)(__m256i)(W)))
1797
+
1798
+ #define _mm256_maskz_shufflelo_epi16(U, A, imm) \
1799
+ ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
1800
+ (__v16hi)_mm256_shufflelo_epi16((A), \
1801
+ (imm)), \
1802
+ (__v16hi)_mm256_setzero_si256()))
1803
+
1804
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1805
+ _mm256_sllv_epi16(__m256i __A, __m256i __B)
1806
+ {
1807
+ return (__m256i)__builtin_ia32_psllv16hi((__v16hi)__A, (__v16hi)__B);
1808
+ }
1809
+
1810
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1811
+ _mm256_mask_sllv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
1812
+ {
1813
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1814
+ (__v16hi)_mm256_sllv_epi16(__A, __B),
1815
+ (__v16hi)__W);
1816
+ }
1817
+
1818
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1819
+ _mm256_maskz_sllv_epi16(__mmask16 __U, __m256i __A, __m256i __B)
1820
+ {
1821
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1822
+ (__v16hi)_mm256_sllv_epi16(__A, __B),
1823
+ (__v16hi)_mm256_setzero_si256());
1824
+ }
1825
+
1826
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1827
+ _mm_sllv_epi16(__m128i __A, __m128i __B)
1828
+ {
1829
+ return (__m128i)__builtin_ia32_psllv8hi((__v8hi)__A, (__v8hi)__B);
1830
+ }
1831
+
1832
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1833
+ _mm_mask_sllv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1834
+ {
1835
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1836
+ (__v8hi)_mm_sllv_epi16(__A, __B),
1837
+ (__v8hi)__W);
1838
+ }
1839
+
1840
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1841
+ _mm_maskz_sllv_epi16(__mmask8 __U, __m128i __A, __m128i __B)
1842
+ {
1843
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1844
+ (__v8hi)_mm_sllv_epi16(__A, __B),
1845
+ (__v8hi)_mm_setzero_si128());
1846
+ }
1847
+
1848
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
1849
+ _mm_mask_sll_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1850
+ {
1851
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1852
+ (__v8hi)_mm_sll_epi16(__A, __B),
1853
+ (__v8hi)__W);
1854
+ }
1855
+
1856
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
1857
+ _mm_maskz_sll_epi16 (__mmask8 __U, __m128i __A, __m128i __B)
1858
+ {
1859
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1860
+ (__v8hi)_mm_sll_epi16(__A, __B),
1861
+ (__v8hi)_mm_setzero_si128());
1862
+ }
1863
+
1864
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256
1865
+ _mm256_mask_sll_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m128i __B)
1866
+ {
1867
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1868
+ (__v16hi)_mm256_sll_epi16(__A, __B),
1869
+ (__v16hi)__W);
1870
+ }
1871
+
1872
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256
1873
+ _mm256_maskz_sll_epi16(__mmask16 __U, __m256i __A, __m128i __B)
1874
+ {
1875
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1876
+ (__v16hi)_mm256_sll_epi16(__A, __B),
1877
+ (__v16hi)_mm256_setzero_si256());
1878
+ }
1879
+
1880
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1881
+ _mm_mask_slli_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
1882
+ {
1883
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1884
+ (__v8hi)_mm_slli_epi16(__A, (int)__B),
1885
+ (__v8hi)__W);
1886
+ }
1887
+
1888
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1889
+ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, unsigned int __B)
1890
+ {
1891
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1892
+ (__v8hi)_mm_slli_epi16(__A, (int)__B),
1893
+ (__v8hi)_mm_setzero_si128());
1894
+ }
1895
+
1896
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1897
+ _mm256_mask_slli_epi16(__m256i __W, __mmask16 __U, __m256i __A,
1898
+ unsigned int __B) {
1899
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1900
+ (__v16hi)_mm256_slli_epi16(__A, (int)__B),
1901
+ (__v16hi)__W);
1902
+ }
1903
+
1904
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1905
+ _mm256_maskz_slli_epi16(__mmask16 __U, __m256i __A, unsigned int __B) {
1906
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1907
+ (__v16hi)_mm256_slli_epi16(__A, (int)__B),
1908
+ (__v16hi)_mm256_setzero_si256());
1909
+ }
1910
+
1911
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1912
+ _mm256_srlv_epi16(__m256i __A, __m256i __B)
1913
+ {
1914
+ return (__m256i)__builtin_ia32_psrlv16hi((__v16hi)__A, (__v16hi)__B);
1915
+ }
1916
+
1917
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1918
+ _mm256_mask_srlv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
1919
+ {
1920
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1921
+ (__v16hi)_mm256_srlv_epi16(__A, __B),
1922
+ (__v16hi)__W);
1923
+ }
1924
+
1925
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1926
+ _mm256_maskz_srlv_epi16(__mmask16 __U, __m256i __A, __m256i __B)
1927
+ {
1928
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1929
+ (__v16hi)_mm256_srlv_epi16(__A, __B),
1930
+ (__v16hi)_mm256_setzero_si256());
1931
+ }
1932
+
1933
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1934
+ _mm_srlv_epi16(__m128i __A, __m128i __B)
1935
+ {
1936
+ return (__m128i)__builtin_ia32_psrlv8hi((__v8hi)__A, (__v8hi)__B);
1937
+ }
1938
+
1939
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1940
+ _mm_mask_srlv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1941
+ {
1942
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1943
+ (__v8hi)_mm_srlv_epi16(__A, __B),
1944
+ (__v8hi)__W);
1945
+ }
1946
+
1947
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1948
+ _mm_maskz_srlv_epi16(__mmask8 __U, __m128i __A, __m128i __B)
1949
+ {
1950
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1951
+ (__v8hi)_mm_srlv_epi16(__A, __B),
1952
+ (__v8hi)_mm_setzero_si128());
1953
+ }
1954
+
1955
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1956
+ _mm256_srav_epi16(__m256i __A, __m256i __B)
1957
+ {
1958
+ return (__m256i)__builtin_ia32_psrav16hi((__v16hi)__A, (__v16hi)__B);
1959
+ }
1960
+
1961
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1962
+ _mm256_mask_srav_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
1963
+ {
1964
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1965
+ (__v16hi)_mm256_srav_epi16(__A, __B),
1966
+ (__v16hi)__W);
1967
+ }
1968
+
1969
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1970
+ _mm256_maskz_srav_epi16(__mmask16 __U, __m256i __A, __m256i __B)
1971
+ {
1972
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1973
+ (__v16hi)_mm256_srav_epi16(__A, __B),
1974
+ (__v16hi)_mm256_setzero_si256());
1975
+ }
1976
+
1977
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1978
+ _mm_srav_epi16(__m128i __A, __m128i __B)
1979
+ {
1980
+ return (__m128i)__builtin_ia32_psrav8hi((__v8hi)__A, (__v8hi)__B);
1981
+ }
1982
+
1983
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1984
+ _mm_mask_srav_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1985
+ {
1986
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1987
+ (__v8hi)_mm_srav_epi16(__A, __B),
1988
+ (__v8hi)__W);
1989
+ }
1990
+
1991
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1992
+ _mm_maskz_srav_epi16(__mmask8 __U, __m128i __A, __m128i __B)
1993
+ {
1994
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1995
+ (__v8hi)_mm_srav_epi16(__A, __B),
1996
+ (__v8hi)_mm_setzero_si128());
1997
+ }
1998
+
1999
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
2000
+ _mm_mask_sra_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
2001
+ {
2002
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2003
+ (__v8hi)_mm_sra_epi16(__A, __B),
2004
+ (__v8hi)__W);
2005
+ }
2006
+
2007
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
2008
+ _mm_maskz_sra_epi16(__mmask8 __U, __m128i __A, __m128i __B)
2009
+ {
2010
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2011
+ (__v8hi)_mm_sra_epi16(__A, __B),
2012
+ (__v8hi)_mm_setzero_si128());
2013
+ }
2014
+
2015
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256
2016
+ _mm256_mask_sra_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m128i __B)
2017
+ {
2018
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2019
+ (__v16hi)_mm256_sra_epi16(__A, __B),
2020
+ (__v16hi)__W);
2021
+ }
2022
+
2023
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256
2024
+ _mm256_maskz_sra_epi16(__mmask16 __U, __m256i __A, __m128i __B)
2025
+ {
2026
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2027
+ (__v16hi)_mm256_sra_epi16(__A, __B),
2028
+ (__v16hi)_mm256_setzero_si256());
2029
+ }
2030
+
2031
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2032
+ _mm_mask_srai_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) {
2033
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2034
+ (__v8hi)_mm_srai_epi16(__A, (int)__B),
2035
+ (__v8hi)__W);
2036
+ }
2037
+
2038
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2039
+ _mm_maskz_srai_epi16(__mmask8 __U, __m128i __A, unsigned int __B) {
2040
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2041
+ (__v8hi)_mm_srai_epi16(__A, (int)__B),
2042
+ (__v8hi)_mm_setzero_si128());
2043
+ }
2044
+
2045
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2046
+ _mm256_mask_srai_epi16(__m256i __W, __mmask16 __U, __m256i __A,
2047
+ unsigned int __B) {
2048
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2049
+ (__v16hi)_mm256_srai_epi16(__A, (int)__B),
2050
+ (__v16hi)__W);
2051
+ }
2052
+
2053
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2054
+ _mm256_maskz_srai_epi16(__mmask16 __U, __m256i __A, unsigned int __B) {
2055
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2056
+ (__v16hi)_mm256_srai_epi16(__A, (int)__B),
2057
+ (__v16hi)_mm256_setzero_si256());
2058
+ }
2059
+
2060
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
2061
+ _mm_mask_srl_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
2062
+ {
2063
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2064
+ (__v8hi)_mm_srl_epi16(__A, __B),
2065
+ (__v8hi)__W);
2066
+ }
2067
+
2068
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
2069
+ _mm_maskz_srl_epi16 (__mmask8 __U, __m128i __A, __m128i __B)
2070
+ {
2071
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2072
+ (__v8hi)_mm_srl_epi16(__A, __B),
2073
+ (__v8hi)_mm_setzero_si128());
2074
+ }
2075
+
2076
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256
2077
+ _mm256_mask_srl_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m128i __B)
2078
+ {
2079
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2080
+ (__v16hi)_mm256_srl_epi16(__A, __B),
2081
+ (__v16hi)__W);
2082
+ }
2083
+
2084
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256
2085
+ _mm256_maskz_srl_epi16(__mmask16 __U, __m256i __A, __m128i __B)
2086
+ {
2087
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2088
+ (__v16hi)_mm256_srl_epi16(__A, __B),
2089
+ (__v16hi)_mm256_setzero_si256());
2090
+ }
2091
+
2092
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2093
+ _mm_mask_srli_epi16(__m128i __W, __mmask8 __U, __m128i __A, int __B) {
2094
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2095
+ (__v8hi)_mm_srli_epi16(__A, __B),
2096
+ (__v8hi)__W);
2097
+ }
2098
+
2099
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2100
+ _mm_maskz_srli_epi16(__mmask8 __U, __m128i __A, int __B) {
2101
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2102
+ (__v8hi)_mm_srli_epi16(__A, __B),
2103
+ (__v8hi)_mm_setzero_si128());
2104
+ }
2105
+
2106
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2107
+ _mm256_mask_srli_epi16(__m256i __W, __mmask16 __U, __m256i __A, int __B) {
2108
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2109
+ (__v16hi)_mm256_srli_epi16(__A, __B),
2110
+ (__v16hi)__W);
2111
+ }
2112
+
2113
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2114
+ _mm256_maskz_srli_epi16(__mmask16 __U, __m256i __A, int __B) {
2115
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2116
+ (__v16hi)_mm256_srli_epi16(__A, __B),
2117
+ (__v16hi)_mm256_setzero_si256());
2118
+ }
2119
+
2120
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2121
+ _mm_mask_mov_epi16(__m128i __W, __mmask8 __U, __m128i __A) {
2122
+ return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,
2123
+ (__v8hi) __A,
2124
+ (__v8hi) __W);
2125
+ }
2126
+
2127
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2128
+ _mm_maskz_mov_epi16(__mmask8 __U, __m128i __A) {
2129
+ return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,
2130
+ (__v8hi) __A,
2131
+ (__v8hi) _mm_setzero_si128 ());
2132
+ }
2133
+
2134
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2135
+ _mm256_mask_mov_epi16(__m256i __W, __mmask16 __U, __m256i __A) {
2136
+ return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,
2137
+ (__v16hi) __A,
2138
+ (__v16hi) __W);
2139
+ }
2140
+
2141
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2142
+ _mm256_maskz_mov_epi16(__mmask16 __U, __m256i __A) {
2143
+ return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,
2144
+ (__v16hi) __A,
2145
+ (__v16hi) _mm256_setzero_si256 ());
2146
+ }
2147
+
2148
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2149
+ _mm_mask_mov_epi8(__m128i __W, __mmask16 __U, __m128i __A) {
2150
+ return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,
2151
+ (__v16qi) __A,
2152
+ (__v16qi) __W);
2153
+ }
2154
+
2155
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2156
+ _mm_maskz_mov_epi8(__mmask16 __U, __m128i __A) {
2157
+ return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,
2158
+ (__v16qi) __A,
2159
+ (__v16qi) _mm_setzero_si128 ());
2160
+ }
2161
+
2162
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2163
+ _mm256_mask_mov_epi8(__m256i __W, __mmask32 __U, __m256i __A) {
2164
+ return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,
2165
+ (__v32qi) __A,
2166
+ (__v32qi) __W);
2167
+ }
2168
+
2169
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2170
+ _mm256_maskz_mov_epi8(__mmask32 __U, __m256i __A) {
2171
+ return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,
2172
+ (__v32qi) __A,
2173
+ (__v32qi) _mm256_setzero_si256 ());
2174
+ }
2175
+
2176
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2177
+ _mm_mask_set1_epi8 (__m128i __O, __mmask16 __M, char __A)
2178
+ {
2179
+ return (__m128i) __builtin_ia32_selectb_128(__M,
2180
+ (__v16qi) _mm_set1_epi8(__A),
2181
+ (__v16qi) __O);
2182
+ }
2183
+
2184
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2185
+ _mm_maskz_set1_epi8 (__mmask16 __M, char __A)
2186
+ {
2187
+ return (__m128i) __builtin_ia32_selectb_128(__M,
2188
+ (__v16qi) _mm_set1_epi8(__A),
2189
+ (__v16qi) _mm_setzero_si128());
2190
+ }
2191
+
2192
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2193
+ _mm256_mask_set1_epi8 (__m256i __O, __mmask32 __M, char __A)
2194
+ {
2195
+ return (__m256i) __builtin_ia32_selectb_256(__M,
2196
+ (__v32qi) _mm256_set1_epi8(__A),
2197
+ (__v32qi) __O);
2198
+ }
2199
+
2200
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2201
+ _mm256_maskz_set1_epi8 (__mmask32 __M, char __A)
2202
+ {
2203
+ return (__m256i) __builtin_ia32_selectb_256(__M,
2204
+ (__v32qi) _mm256_set1_epi8(__A),
2205
+ (__v32qi) _mm256_setzero_si256());
2206
+ }
2207
+
2208
+ static __inline __m128i __DEFAULT_FN_ATTRS128
2209
+ _mm_loadu_epi16 (void const *__P)
2210
+ {
2211
+ struct __loadu_epi16 {
2212
+ __m128i_u __v;
2213
+ } __attribute__((__packed__, __may_alias__));
2214
+ return ((const struct __loadu_epi16*)__P)->__v;
2215
+ }
2216
+
2217
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
2218
+ _mm_mask_loadu_epi16 (__m128i __W, __mmask8 __U, void const *__P)
2219
+ {
2220
+ return (__m128i) __builtin_ia32_loaddquhi128_mask ((const __v8hi *) __P,
2221
+ (__v8hi) __W,
2222
+ (__mmask8) __U);
2223
+ }
2224
+
2225
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
2226
+ _mm_maskz_loadu_epi16 (__mmask8 __U, void const *__P)
2227
+ {
2228
+ return (__m128i) __builtin_ia32_loaddquhi128_mask ((const __v8hi *) __P,
2229
+ (__v8hi)
2230
+ _mm_setzero_si128 (),
2231
+ (__mmask8) __U);
2232
+ }
2233
+
2234
+ static __inline __m256i __DEFAULT_FN_ATTRS256
2235
+ _mm256_loadu_epi16 (void const *__P)
2236
+ {
2237
+ struct __loadu_epi16 {
2238
+ __m256i_u __v;
2239
+ } __attribute__((__packed__, __may_alias__));
2240
+ return ((const struct __loadu_epi16*)__P)->__v;
2241
+ }
2242
+
2243
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256
2244
+ _mm256_mask_loadu_epi16 (__m256i __W, __mmask16 __U, void const *__P)
2245
+ {
2246
+ return (__m256i) __builtin_ia32_loaddquhi256_mask ((const __v16hi *) __P,
2247
+ (__v16hi) __W,
2248
+ (__mmask16) __U);
2249
+ }
2250
+
2251
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256
2252
+ _mm256_maskz_loadu_epi16 (__mmask16 __U, void const *__P)
2253
+ {
2254
+ return (__m256i) __builtin_ia32_loaddquhi256_mask ((const __v16hi *) __P,
2255
+ (__v16hi)
2256
+ _mm256_setzero_si256 (),
2257
+ (__mmask16) __U);
2258
+ }
2259
+
2260
+ static __inline __m128i __DEFAULT_FN_ATTRS128
2261
+ _mm_loadu_epi8 (void const *__P)
2262
+ {
2263
+ struct __loadu_epi8 {
2264
+ __m128i_u __v;
2265
+ } __attribute__((__packed__, __may_alias__));
2266
+ return ((const struct __loadu_epi8*)__P)->__v;
2267
+ }
2268
+
2269
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
2270
+ _mm_mask_loadu_epi8 (__m128i __W, __mmask16 __U, void const *__P)
2271
+ {
2272
+ return (__m128i) __builtin_ia32_loaddquqi128_mask ((const __v16qi *) __P,
2273
+ (__v16qi) __W,
2274
+ (__mmask16) __U);
2275
+ }
2276
+
2277
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128
2278
+ _mm_maskz_loadu_epi8 (__mmask16 __U, void const *__P)
2279
+ {
2280
+ return (__m128i) __builtin_ia32_loaddquqi128_mask ((const __v16qi *) __P,
2281
+ (__v16qi)
2282
+ _mm_setzero_si128 (),
2283
+ (__mmask16) __U);
2284
+ }
2285
+
2286
+ static __inline __m256i __DEFAULT_FN_ATTRS256
2287
+ _mm256_loadu_epi8 (void const *__P)
2288
+ {
2289
+ struct __loadu_epi8 {
2290
+ __m256i_u __v;
2291
+ } __attribute__((__packed__, __may_alias__));
2292
+ return ((const struct __loadu_epi8*)__P)->__v;
2293
+ }
2294
+
2295
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256
2296
+ _mm256_mask_loadu_epi8 (__m256i __W, __mmask32 __U, void const *__P)
2297
+ {
2298
+ return (__m256i) __builtin_ia32_loaddquqi256_mask ((const __v32qi *) __P,
2299
+ (__v32qi) __W,
2300
+ (__mmask32) __U);
2301
+ }
2302
+
2303
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256
2304
+ _mm256_maskz_loadu_epi8 (__mmask32 __U, void const *__P)
2305
+ {
2306
+ return (__m256i) __builtin_ia32_loaddquqi256_mask ((const __v32qi *) __P,
2307
+ (__v32qi)
2308
+ _mm256_setzero_si256 (),
2309
+ (__mmask32) __U);
2310
+ }
2311
+
2312
+ static __inline void __DEFAULT_FN_ATTRS128
2313
+ _mm_storeu_epi16 (void *__P, __m128i __A)
2314
+ {
2315
+ struct __storeu_epi16 {
2316
+ __m128i_u __v;
2317
+ } __attribute__((__packed__, __may_alias__));
2318
+ ((struct __storeu_epi16*)__P)->__v = __A;
2319
+ }
2320
+
2321
+ static __inline__ void __DEFAULT_FN_ATTRS128
2322
+ _mm_mask_storeu_epi16 (void *__P, __mmask8 __U, __m128i __A)
2323
+ {
2324
+ __builtin_ia32_storedquhi128_mask ((__v8hi *) __P,
2325
+ (__v8hi) __A,
2326
+ (__mmask8) __U);
2327
+ }
2328
+
2329
+ static __inline void __DEFAULT_FN_ATTRS256
2330
+ _mm256_storeu_epi16 (void *__P, __m256i __A)
2331
+ {
2332
+ struct __storeu_epi16 {
2333
+ __m256i_u __v;
2334
+ } __attribute__((__packed__, __may_alias__));
2335
+ ((struct __storeu_epi16*)__P)->__v = __A;
2336
+ }
2337
+
2338
+ static __inline__ void __DEFAULT_FN_ATTRS256
2339
+ _mm256_mask_storeu_epi16 (void *__P, __mmask16 __U, __m256i __A)
2340
+ {
2341
+ __builtin_ia32_storedquhi256_mask ((__v16hi *) __P,
2342
+ (__v16hi) __A,
2343
+ (__mmask16) __U);
2344
+ }
2345
+
2346
+ static __inline void __DEFAULT_FN_ATTRS128
2347
+ _mm_storeu_epi8 (void *__P, __m128i __A)
2348
+ {
2349
+ struct __storeu_epi8 {
2350
+ __m128i_u __v;
2351
+ } __attribute__((__packed__, __may_alias__));
2352
+ ((struct __storeu_epi8*)__P)->__v = __A;
2353
+ }
2354
+
2355
+ static __inline__ void __DEFAULT_FN_ATTRS128
2356
+ _mm_mask_storeu_epi8 (void *__P, __mmask16 __U, __m128i __A)
2357
+ {
2358
+ __builtin_ia32_storedquqi128_mask ((__v16qi *) __P,
2359
+ (__v16qi) __A,
2360
+ (__mmask16) __U);
2361
+ }
2362
+
2363
+ static __inline void __DEFAULT_FN_ATTRS256
2364
+ _mm256_storeu_epi8 (void *__P, __m256i __A)
2365
+ {
2366
+ struct __storeu_epi8 {
2367
+ __m256i_u __v;
2368
+ } __attribute__((__packed__, __may_alias__));
2369
+ ((struct __storeu_epi8*)__P)->__v = __A;
2370
+ }
2371
+
2372
+ static __inline__ void __DEFAULT_FN_ATTRS256
2373
+ _mm256_mask_storeu_epi8 (void *__P, __mmask32 __U, __m256i __A)
2374
+ {
2375
+ __builtin_ia32_storedquqi256_mask ((__v32qi *) __P,
2376
+ (__v32qi) __A,
2377
+ (__mmask32) __U);
2378
+ }
2379
+
2380
+ static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR
2381
+ _mm_test_epi8_mask(__m128i __A, __m128i __B) {
2382
+ return _mm_cmpneq_epi8_mask (_mm_and_si128(__A, __B), _mm_setzero_si128());
2383
+ }
2384
+
2385
+ static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR
2386
+ _mm_mask_test_epi8_mask(__mmask16 __U, __m128i __A, __m128i __B) {
2387
+ return _mm_mask_cmpneq_epi8_mask (__U, _mm_and_si128 (__A, __B),
2388
+ _mm_setzero_si128());
2389
+ }
2390
+
2391
+ static __inline__ __mmask32 __DEFAULT_FN_ATTRS256_CONSTEXPR
2392
+ _mm256_test_epi8_mask(__m256i __A, __m256i __B) {
2393
+ return _mm256_cmpneq_epi8_mask (_mm256_and_si256(__A, __B),
2394
+ _mm256_setzero_si256());
2395
+ }
2396
+
2397
+ static __inline__ __mmask32 __DEFAULT_FN_ATTRS256
2398
+ _mm256_mask_test_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B)
2399
+ {
2400
+ return _mm256_mask_cmpneq_epi8_mask (__U, _mm256_and_si256(__A, __B),
2401
+ _mm256_setzero_si256());
2402
+ }
2403
+
2404
+ static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
2405
+ _mm_test_epi16_mask (__m128i __A, __m128i __B)
2406
+ {
2407
+ return _mm_cmpneq_epi16_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128());
2408
+ }
2409
+
2410
+ static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
2411
+ _mm_mask_test_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B)
2412
+ {
2413
+ return _mm_mask_cmpneq_epi16_mask (__U, _mm_and_si128 (__A, __B),
2414
+ _mm_setzero_si128());
2415
+ }
2416
+
2417
+ static __inline__ __mmask16 __DEFAULT_FN_ATTRS256
2418
+ _mm256_test_epi16_mask (__m256i __A, __m256i __B)
2419
+ {
2420
+ return _mm256_cmpneq_epi16_mask (_mm256_and_si256 (__A, __B),
2421
+ _mm256_setzero_si256 ());
2422
+ }
2423
+
2424
+ static __inline__ __mmask16 __DEFAULT_FN_ATTRS256
2425
+ _mm256_mask_test_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)
2426
+ {
2427
+ return _mm256_mask_cmpneq_epi16_mask (__U, _mm256_and_si256(__A, __B),
2428
+ _mm256_setzero_si256());
2429
+ }
2430
+
2431
+ static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR
2432
+ _mm_testn_epi8_mask(__m128i __A, __m128i __B) {
2433
+ return _mm_cmpeq_epi8_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128());
2434
+ }
2435
+
2436
+ static __inline__ __mmask16 __DEFAULT_FN_ATTRS128
2437
+ _mm_mask_testn_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B)
2438
+ {
2439
+ return _mm_mask_cmpeq_epi8_mask (__U, _mm_and_si128 (__A, __B),
2440
+ _mm_setzero_si128());
2441
+ }
2442
+
2443
+ static __inline__ __mmask32 __DEFAULT_FN_ATTRS256
2444
+ _mm256_testn_epi8_mask (__m256i __A, __m256i __B)
2445
+ {
2446
+ return _mm256_cmpeq_epi8_mask (_mm256_and_si256 (__A, __B),
2447
+ _mm256_setzero_si256());
2448
+ }
2449
+
2450
+ static __inline__ __mmask32 __DEFAULT_FN_ATTRS256
2451
+ _mm256_mask_testn_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B)
2452
+ {
2453
+ return _mm256_mask_cmpeq_epi8_mask (__U, _mm256_and_si256 (__A, __B),
2454
+ _mm256_setzero_si256());
2455
+ }
2456
+
2457
+ static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
2458
+ _mm_testn_epi16_mask (__m128i __A, __m128i __B)
2459
+ {
2460
+ return _mm_cmpeq_epi16_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128());
2461
+ }
2462
+
2463
+ static __inline__ __mmask8 __DEFAULT_FN_ATTRS128
2464
+ _mm_mask_testn_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B)
2465
+ {
2466
+ return _mm_mask_cmpeq_epi16_mask (__U, _mm_and_si128(__A, __B), _mm_setzero_si128());
2467
+ }
2468
+
2469
+ static __inline__ __mmask16 __DEFAULT_FN_ATTRS256
2470
+ _mm256_testn_epi16_mask (__m256i __A, __m256i __B)
2471
+ {
2472
+ return _mm256_cmpeq_epi16_mask (_mm256_and_si256(__A, __B),
2473
+ _mm256_setzero_si256());
2474
+ }
2475
+
2476
+ static __inline__ __mmask16 __DEFAULT_FN_ATTRS256
2477
+ _mm256_mask_testn_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)
2478
+ {
2479
+ return _mm256_mask_cmpeq_epi16_mask (__U, _mm256_and_si256 (__A, __B),
2480
+ _mm256_setzero_si256());
2481
+ }
2482
+
2483
+ static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR
2484
+ _mm_movepi8_mask(__m128i __A) {
2485
+ return (__mmask16) __builtin_ia32_cvtb2mask128 ((__v16qi) __A);
2486
+ }
2487
+
2488
+ static __inline__ __mmask32 __DEFAULT_FN_ATTRS256_CONSTEXPR
2489
+ _mm256_movepi8_mask(__m256i __A) {
2490
+ return (__mmask32) __builtin_ia32_cvtb2mask256 ((__v32qi) __A);
2491
+ }
2492
+
2493
+ static __inline__ __mmask8 __DEFAULT_FN_ATTRS128_CONSTEXPR
2494
+ _mm_movepi16_mask(__m128i __A) {
2495
+ return (__mmask8) __builtin_ia32_cvtw2mask128 ((__v8hi) __A);
2496
+ }
2497
+
2498
+ static __inline__ __mmask16 __DEFAULT_FN_ATTRS256_CONSTEXPR
2499
+ _mm256_movepi16_mask(__m256i __A) {
2500
+ return (__mmask16) __builtin_ia32_cvtw2mask256 ((__v16hi) __A);
2501
+ }
2502
+
2503
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2504
+ _mm_movm_epi8(__mmask16 __A) {
2505
+ return (__m128i) __builtin_ia32_cvtmask2b128 (__A);
2506
+ }
2507
+
2508
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2509
+ _mm256_movm_epi8(__mmask32 __A) {
2510
+ return (__m256i) __builtin_ia32_cvtmask2b256 (__A);
2511
+ }
2512
+
2513
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2514
+ _mm_movm_epi16(__mmask8 __A) {
2515
+ return (__m128i) __builtin_ia32_cvtmask2w128 (__A);
2516
+ }
2517
+
2518
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2519
+ _mm256_movm_epi16(__mmask16 __A) {
2520
+ return (__m256i) __builtin_ia32_cvtmask2w256 (__A);
2521
+ }
2522
+
2523
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2524
+ _mm_mask_broadcastb_epi8 (__m128i __O, __mmask16 __M, __m128i __A)
2525
+ {
2526
+ return (__m128i)__builtin_ia32_selectb_128(__M,
2527
+ (__v16qi) _mm_broadcastb_epi8(__A),
2528
+ (__v16qi) __O);
2529
+ }
2530
+
2531
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2532
+ _mm_maskz_broadcastb_epi8 (__mmask16 __M, __m128i __A)
2533
+ {
2534
+ return (__m128i)__builtin_ia32_selectb_128(__M,
2535
+ (__v16qi) _mm_broadcastb_epi8(__A),
2536
+ (__v16qi) _mm_setzero_si128());
2537
+ }
2538
+
2539
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2540
+ _mm256_mask_broadcastb_epi8 (__m256i __O, __mmask32 __M, __m128i __A)
2541
+ {
2542
+ return (__m256i)__builtin_ia32_selectb_256(__M,
2543
+ (__v32qi) _mm256_broadcastb_epi8(__A),
2544
+ (__v32qi) __O);
2545
+ }
2546
+
2547
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2548
+ _mm256_maskz_broadcastb_epi8 (__mmask32 __M, __m128i __A)
2549
+ {
2550
+ return (__m256i)__builtin_ia32_selectb_256(__M,
2551
+ (__v32qi) _mm256_broadcastb_epi8(__A),
2552
+ (__v32qi) _mm256_setzero_si256());
2553
+ }
2554
+
2555
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2556
+ _mm_mask_broadcastw_epi16 (__m128i __O, __mmask8 __M, __m128i __A)
2557
+ {
2558
+ return (__m128i)__builtin_ia32_selectw_128(__M,
2559
+ (__v8hi) _mm_broadcastw_epi16(__A),
2560
+ (__v8hi) __O);
2561
+ }
2562
+
2563
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2564
+ _mm_maskz_broadcastw_epi16 (__mmask8 __M, __m128i __A)
2565
+ {
2566
+ return (__m128i)__builtin_ia32_selectw_128(__M,
2567
+ (__v8hi) _mm_broadcastw_epi16(__A),
2568
+ (__v8hi) _mm_setzero_si128());
2569
+ }
2570
+
2571
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2572
+ _mm256_mask_broadcastw_epi16 (__m256i __O, __mmask16 __M, __m128i __A)
2573
+ {
2574
+ return (__m256i)__builtin_ia32_selectw_256(__M,
2575
+ (__v16hi) _mm256_broadcastw_epi16(__A),
2576
+ (__v16hi) __O);
2577
+ }
2578
+
2579
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2580
+ _mm256_maskz_broadcastw_epi16 (__mmask16 __M, __m128i __A)
2581
+ {
2582
+ return (__m256i)__builtin_ia32_selectw_256(__M,
2583
+ (__v16hi) _mm256_broadcastw_epi16(__A),
2584
+ (__v16hi) _mm256_setzero_si256());
2585
+ }
2586
+
2587
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2588
+ _mm256_mask_set1_epi16 (__m256i __O, __mmask16 __M, short __A)
2589
+ {
2590
+ return (__m256i) __builtin_ia32_selectw_256 (__M,
2591
+ (__v16hi) _mm256_set1_epi16(__A),
2592
+ (__v16hi) __O);
2593
+ }
2594
+
2595
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2596
+ _mm256_maskz_set1_epi16 (__mmask16 __M, short __A)
2597
+ {
2598
+ return (__m256i) __builtin_ia32_selectw_256(__M,
2599
+ (__v16hi)_mm256_set1_epi16(__A),
2600
+ (__v16hi) _mm256_setzero_si256());
2601
+ }
2602
+
2603
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2604
+ _mm_mask_set1_epi16 (__m128i __O, __mmask8 __M, short __A)
2605
+ {
2606
+ return (__m128i) __builtin_ia32_selectw_128(__M,
2607
+ (__v8hi) _mm_set1_epi16(__A),
2608
+ (__v8hi) __O);
2609
+ }
2610
+
2611
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2612
+ _mm_maskz_set1_epi16 (__mmask8 __M, short __A)
2613
+ {
2614
+ return (__m128i) __builtin_ia32_selectw_128(__M,
2615
+ (__v8hi) _mm_set1_epi16(__A),
2616
+ (__v8hi) _mm_setzero_si128());
2617
+ }
2618
+
2619
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2620
+ _mm_permutexvar_epi16(__m128i __A, __m128i __B) {
2621
+ return (__m128i)__builtin_ia32_permvarhi128((__v8hi) __B, (__v8hi) __A);
2622
+ }
2623
+
2624
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2625
+ _mm_maskz_permutexvar_epi16(__mmask8 __M, __m128i __A, __m128i __B) {
2626
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
2627
+ (__v8hi)_mm_permutexvar_epi16(__A, __B),
2628
+ (__v8hi) _mm_setzero_si128());
2629
+ }
2630
+
2631
+ static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2632
+ _mm_mask_permutexvar_epi16(__m128i __W, __mmask8 __M, __m128i __A,
2633
+ __m128i __B) {
2634
+ return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
2635
+ (__v8hi)_mm_permutexvar_epi16(__A, __B),
2636
+ (__v8hi)__W);
2637
+ }
2638
+
2639
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2640
+ _mm256_permutexvar_epi16(__m256i __A, __m256i __B) {
2641
+ return (__m256i)__builtin_ia32_permvarhi256((__v16hi) __B, (__v16hi) __A);
2642
+ }
2643
+
2644
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2645
+ _mm256_maskz_permutexvar_epi16(__mmask16 __M, __m256i __A, __m256i __B) {
2646
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
2647
+ (__v16hi)_mm256_permutexvar_epi16(__A, __B),
2648
+ (__v16hi)_mm256_setzero_si256());
2649
+ }
2650
+
2651
+ static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2652
+ _mm256_mask_permutexvar_epi16(__m256i __W, __mmask16 __M, __m256i __A,
2653
+ __m256i __B) {
2654
+ return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
2655
+ (__v16hi)_mm256_permutexvar_epi16(__A, __B),
2656
+ (__v16hi)__W);
2657
+ }
2658
+
2659
+ #define _mm_mask_alignr_epi8(W, U, A, B, N) \
2660
+ ((__m128i)__builtin_ia32_selectb_128((__mmask16)(U), \
2661
+ (__v16qi)_mm_alignr_epi8((A), (B), (int)(N)), \
2662
+ (__v16qi)(__m128i)(W)))
2663
+
2664
+ #define _mm_maskz_alignr_epi8(U, A, B, N) \
2665
+ ((__m128i)__builtin_ia32_selectb_128((__mmask16)(U), \
2666
+ (__v16qi)_mm_alignr_epi8((A), (B), (int)(N)), \
2667
+ (__v16qi)_mm_setzero_si128()))
2668
+
2669
+ #define _mm256_mask_alignr_epi8(W, U, A, B, N) \
2670
+ ((__m256i)__builtin_ia32_selectb_256((__mmask32)(U), \
2671
+ (__v32qi)_mm256_alignr_epi8((A), (B), (int)(N)), \
2672
+ (__v32qi)(__m256i)(W)))
2673
+
2674
+ #define _mm256_maskz_alignr_epi8(U, A, B, N) \
2675
+ ((__m256i)__builtin_ia32_selectb_256((__mmask32)(U), \
2676
+ (__v32qi)_mm256_alignr_epi8((A), (B), (int)(N)), \
2677
+ (__v32qi)_mm256_setzero_si256()))
2678
+
2679
+ #define _mm_dbsad_epu8(A, B, imm) \
2680
+ ((__m128i)__builtin_ia32_dbpsadbw128((__v16qi)(__m128i)(A), \
2681
+ (__v16qi)(__m128i)(B), (int)(imm)))
2682
+
2683
+ #define _mm_mask_dbsad_epu8(W, U, A, B, imm) \
2684
+ ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
2685
+ (__v8hi)_mm_dbsad_epu8((A), (B), (imm)), \
2686
+ (__v8hi)(__m128i)(W)))
2687
+
2688
+ #define _mm_maskz_dbsad_epu8(U, A, B, imm) \
2689
+ ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
2690
+ (__v8hi)_mm_dbsad_epu8((A), (B), (imm)), \
2691
+ (__v8hi)_mm_setzero_si128()))
2692
+
2693
+ #define _mm256_dbsad_epu8(A, B, imm) \
2694
+ ((__m256i)__builtin_ia32_dbpsadbw256((__v32qi)(__m256i)(A), \
2695
+ (__v32qi)(__m256i)(B), (int)(imm)))
2696
+
2697
+ #define _mm256_mask_dbsad_epu8(W, U, A, B, imm) \
2698
+ ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
2699
+ (__v16hi)_mm256_dbsad_epu8((A), (B), (imm)), \
2700
+ (__v16hi)(__m256i)(W)))
2701
+
2702
+ #define _mm256_maskz_dbsad_epu8(U, A, B, imm) \
2703
+ ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
2704
+ (__v16hi)_mm256_dbsad_epu8((A), (B), (imm)), \
2705
+ (__v16hi)_mm256_setzero_si256()))
2706
+
2707
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2708
+ _mm_reduce_add_epi16(__m128i __W) {
2709
+ return __builtin_reduce_add((__v8hi)__W);
2710
+ }
2711
+
2712
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2713
+ _mm_reduce_mul_epi16(__m128i __W) {
2714
+ return __builtin_reduce_mul((__v8hi)__W);
2715
+ }
2716
+
2717
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2718
+ _mm_reduce_and_epi16(__m128i __W) {
2719
+ return __builtin_reduce_and((__v8hi)__W);
2720
+ }
2721
+
2722
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2723
+ _mm_reduce_or_epi16(__m128i __W) {
2724
+ return __builtin_reduce_or((__v8hi)__W);
2725
+ }
2726
+
2727
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2728
+ _mm_mask_reduce_add_epi16(__mmask8 __M, __m128i __W) {
2729
+ __W = _mm_maskz_mov_epi16(__M, __W);
2730
+ return __builtin_reduce_add((__v8hi)__W);
2731
+ }
2732
+
2733
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2734
+ _mm_mask_reduce_mul_epi16(__mmask8 __M, __m128i __W) {
2735
+ __W = _mm_mask_mov_epi16(_mm_set1_epi16(1), __M, __W);
2736
+ return __builtin_reduce_mul((__v8hi)__W);
2737
+ }
2738
+
2739
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2740
+ _mm_mask_reduce_and_epi16(__mmask8 __M, __m128i __W) {
2741
+ __W = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __W);
2742
+ return __builtin_reduce_and((__v8hi)__W);
2743
+ }
2744
+
2745
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2746
+ _mm_mask_reduce_or_epi16(__mmask8 __M, __m128i __W) {
2747
+ __W = _mm_maskz_mov_epi16(__M, __W);
2748
+ return __builtin_reduce_or((__v8hi)__W);
2749
+ }
2750
+
2751
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2752
+ _mm_reduce_max_epi16(__m128i __V) {
2753
+ return __builtin_reduce_max((__v8hi)__V);
2754
+ }
2755
+
2756
+ static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR
2757
+ _mm_reduce_max_epu16(__m128i __V) {
2758
+ return __builtin_reduce_max((__v8hu)__V);
2759
+ }
2760
+
2761
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2762
+ _mm_reduce_min_epi16(__m128i __V) {
2763
+ return __builtin_reduce_min((__v8hi)__V);
2764
+ }
2765
+
2766
+ static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR
2767
+ _mm_reduce_min_epu16(__m128i __V) {
2768
+ return __builtin_reduce_min((__v8hu)__V);
2769
+ }
2770
+
2771
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2772
+ _mm_mask_reduce_max_epi16(__mmask16 __M, __m128i __V) {
2773
+ __V = _mm_mask_mov_epi16(_mm_set1_epi16(-32767-1), __M, __V);
2774
+ return __builtin_reduce_max((__v8hi)__V);
2775
+ }
2776
+
2777
+ static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR
2778
+ _mm_mask_reduce_max_epu16(__mmask16 __M, __m128i __V) {
2779
+ __V = _mm_maskz_mov_epi16(__M, __V);
2780
+ return __builtin_reduce_max((__v8hu)__V);
2781
+ }
2782
+
2783
+ static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2784
+ _mm_mask_reduce_min_epi16(__mmask16 __M, __m128i __V) {
2785
+ __V = _mm_mask_mov_epi16(_mm_set1_epi16(32767), __M, __V);
2786
+ return __builtin_reduce_min((__v8hi)__V);
2787
+ }
2788
+
2789
+ static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR
2790
+ _mm_mask_reduce_min_epu16(__mmask16 __M, __m128i __V) {
2791
+ __V = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __V);
2792
+ return __builtin_reduce_min((__v8hu)__V);
2793
+ }
2794
+
2795
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2796
+ _mm256_reduce_add_epi16(__m256i __W) {
2797
+ return __builtin_reduce_add((__v16hi)__W);
2798
+ }
2799
+
2800
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2801
+ _mm256_reduce_mul_epi16(__m256i __W) {
2802
+ return __builtin_reduce_mul((__v16hi)__W);
2803
+ }
2804
+
2805
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2806
+ _mm256_reduce_and_epi16(__m256i __W) {
2807
+ return __builtin_reduce_and((__v16hi)__W);
2808
+ }
2809
+
2810
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2811
+ _mm256_reduce_or_epi16(__m256i __W) {
2812
+ return __builtin_reduce_or((__v16hi)__W);
2813
+ }
2814
+
2815
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2816
+ _mm256_mask_reduce_add_epi16(__mmask16 __M, __m256i __W) {
2817
+ __W = _mm256_maskz_mov_epi16(__M, __W);
2818
+ return __builtin_reduce_add((__v16hi)__W);
2819
+ }
2820
+
2821
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2822
+ _mm256_mask_reduce_mul_epi16(__mmask16 __M, __m256i __W) {
2823
+ __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(1), __M, __W);
2824
+ return __builtin_reduce_mul((__v16hi)__W);
2825
+ }
2826
+
2827
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2828
+ _mm256_mask_reduce_and_epi16(__mmask16 __M, __m256i __W) {
2829
+ __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __W);
2830
+ return __builtin_reduce_and((__v16hi)__W);
2831
+ }
2832
+
2833
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2834
+ _mm256_mask_reduce_or_epi16(__mmask16 __M, __m256i __W) {
2835
+ __W = _mm256_maskz_mov_epi16(__M, __W);
2836
+ return __builtin_reduce_or((__v16hi)__W);
2837
+ }
2838
+
2839
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2840
+ _mm256_reduce_max_epi16(__m256i __V) {
2841
+ return __builtin_reduce_max((__v16hi)__V);
2842
+ }
2843
+
2844
+ static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR
2845
+ _mm256_reduce_max_epu16(__m256i __V) {
2846
+ return __builtin_reduce_max((__v16hu)__V);
2847
+ }
2848
+
2849
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2850
+ _mm256_reduce_min_epi16(__m256i __V) {
2851
+ return __builtin_reduce_min((__v16hi)__V);
2852
+ }
2853
+
2854
+ static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR
2855
+ _mm256_reduce_min_epu16(__m256i __V) {
2856
+ return __builtin_reduce_min((__v16hu)__V);
2857
+ }
2858
+
2859
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2860
+ _mm256_mask_reduce_max_epi16(__mmask16 __M, __m256i __V) {
2861
+ __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-32767-1), __M, __V);
2862
+ return __builtin_reduce_max((__v16hi)__V);
2863
+ }
2864
+
2865
+ static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR
2866
+ _mm256_mask_reduce_max_epu16(__mmask16 __M, __m256i __V) {
2867
+ __V = _mm256_maskz_mov_epi16(__M, __V);
2868
+ return __builtin_reduce_max((__v16hu)__V);
2869
+ }
2870
+
2871
+ static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2872
+ _mm256_mask_reduce_min_epi16(__mmask16 __M, __m256i __V) {
2873
+ __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(32767), __M, __V);
2874
+ return __builtin_reduce_min((__v16hi)__V);
2875
+ }
2876
+
2877
+ static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR
2878
+ _mm256_mask_reduce_min_epu16(__mmask16 __M, __m256i __V) {
2879
+ __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __V);
2880
+ return __builtin_reduce_min((__v16hu)__V);
2881
+ }
2882
+
2883
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2884
+ _mm_reduce_add_epi8(__m128i __W) {
2885
+ return __builtin_reduce_add((__v16qs)__W);
2886
+ }
2887
+
2888
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2889
+ _mm_reduce_mul_epi8(__m128i __W) {
2890
+ return __builtin_reduce_mul((__v16qs)__W);
2891
+ }
2892
+
2893
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2894
+ _mm_reduce_and_epi8(__m128i __W) {
2895
+ return __builtin_reduce_and((__v16qs)__W);
2896
+ }
2897
+
2898
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2899
+ _mm_reduce_or_epi8(__m128i __W) {
2900
+ return __builtin_reduce_or((__v16qs)__W);
2901
+ }
2902
+
2903
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2904
+ _mm_mask_reduce_add_epi8(__mmask16 __M, __m128i __W) {
2905
+ __W = _mm_maskz_mov_epi8(__M, __W);
2906
+ return __builtin_reduce_add((__v16qs)__W);
2907
+ }
2908
+
2909
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2910
+ _mm_mask_reduce_mul_epi8(__mmask16 __M, __m128i __W) {
2911
+ __W = _mm_mask_mov_epi8(_mm_set1_epi8(1), __M, __W);
2912
+ return __builtin_reduce_mul((__v16qs)__W);
2913
+ }
2914
+
2915
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2916
+ _mm_mask_reduce_and_epi8(__mmask16 __M, __m128i __W) {
2917
+ __W = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __W);
2918
+ return __builtin_reduce_and((__v16qs)__W);
2919
+ }
2920
+
2921
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2922
+ _mm_mask_reduce_or_epi8(__mmask16 __M, __m128i __W) {
2923
+ __W = _mm_maskz_mov_epi8(__M, __W);
2924
+ return __builtin_reduce_or((__v16qs)__W);
2925
+ }
2926
+
2927
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2928
+ _mm_reduce_max_epi8(__m128i __V) {
2929
+ return __builtin_reduce_max((__v16qs)__V);
2930
+ }
2931
+
2932
+ static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR
2933
+ _mm_reduce_max_epu8(__m128i __V) {
2934
+ return __builtin_reduce_max((__v16qu)__V);
2935
+ }
2936
+
2937
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2938
+ _mm_reduce_min_epi8(__m128i __V) {
2939
+ return __builtin_reduce_min((__v16qs)__V);
2940
+ }
2941
+
2942
+ static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR
2943
+ _mm_reduce_min_epu8(__m128i __V) {
2944
+ return __builtin_reduce_min((__v16qu)__V);
2945
+ }
2946
+
2947
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2948
+ _mm_mask_reduce_max_epi8(__mmask16 __M, __m128i __V) {
2949
+ __V = _mm_mask_mov_epi8(_mm_set1_epi8(-127-1), __M, __V);
2950
+ return __builtin_reduce_max((__v16qs)__V);
2951
+ }
2952
+
2953
+ static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR
2954
+ _mm_mask_reduce_max_epu8(__mmask16 __M, __m128i __V) {
2955
+ __V = _mm_maskz_mov_epi8(__M, __V);
2956
+ return __builtin_reduce_max((__v16qu)__V);
2957
+ }
2958
+
2959
+ static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2960
+ _mm_mask_reduce_min_epi8(__mmask16 __M, __m128i __V) {
2961
+ __V = _mm_mask_mov_epi8(_mm_set1_epi8(127), __M, __V);
2962
+ return __builtin_reduce_min((__v16qs)__V);
2963
+ }
2964
+
2965
+ static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR
2966
+ _mm_mask_reduce_min_epu8(__mmask16 __M, __m128i __V) {
2967
+ __V = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __V);
2968
+ return __builtin_reduce_min((__v16qu)__V);
2969
+ }
2970
+
2971
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
2972
+ _mm256_reduce_add_epi8(__m256i __W) {
2973
+ return __builtin_reduce_add((__v32qs)__W);
2974
+ }
2975
+
2976
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
2977
+ _mm256_reduce_mul_epi8(__m256i __W) {
2978
+ return __builtin_reduce_mul((__v32qs)__W);
2979
+ }
2980
+
2981
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
2982
+ _mm256_reduce_and_epi8(__m256i __W) {
2983
+ return __builtin_reduce_and((__v32qs)__W);
2984
+ }
2985
+
2986
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
2987
+ _mm256_reduce_or_epi8(__m256i __W) {
2988
+ return __builtin_reduce_or((__v32qs)__W);
2989
+ }
2990
+
2991
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
2992
+ _mm256_mask_reduce_add_epi8(__mmask32 __M, __m256i __W) {
2993
+ __W = _mm256_maskz_mov_epi8(__M, __W);
2994
+ return __builtin_reduce_add((__v32qs)__W);
2995
+ }
2996
+
2997
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
2998
+ _mm256_mask_reduce_mul_epi8(__mmask32 __M, __m256i __W) {
2999
+ __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(1), __M, __W);
3000
+ return __builtin_reduce_mul((__v32qs)__W);
3001
+ }
3002
+
3003
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3004
+ _mm256_mask_reduce_and_epi8(__mmask32 __M, __m256i __W) {
3005
+ __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __W);
3006
+ return __builtin_reduce_and((__v32qs)__W);
3007
+ }
3008
+
3009
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3010
+ _mm256_mask_reduce_or_epi8(__mmask32 __M, __m256i __W) {
3011
+ __W = _mm256_maskz_mov_epi8(__M, __W);
3012
+ return __builtin_reduce_or((__v32qs)__W);
3013
+ }
3014
+
3015
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3016
+ _mm256_reduce_max_epi8(__m256i __V) {
3017
+ return __builtin_reduce_max((__v32qs)__V);
3018
+ }
3019
+
3020
+ static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR
3021
+ _mm256_reduce_max_epu8(__m256i __V) {
3022
+ return __builtin_reduce_max((__v32qu)__V);
3023
+ }
3024
+
3025
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3026
+ _mm256_reduce_min_epi8(__m256i __V) {
3027
+ return __builtin_reduce_min((__v32qs)__V);
3028
+ }
3029
+
3030
+ static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR
3031
+ _mm256_reduce_min_epu8(__m256i __V) {
3032
+ return __builtin_reduce_min((__v32qu)__V);
3033
+ }
3034
+
3035
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3036
+ _mm256_mask_reduce_max_epi8(__mmask32 __M, __m256i __V) {
3037
+ __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-127-1), __M, __V);
3038
+ return __builtin_reduce_max((__v32qs)__V);
3039
+ }
3040
+
3041
+ static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR
3042
+ _mm256_mask_reduce_max_epu8(__mmask32 __M, __m256i __V) {
3043
+ __V = _mm256_maskz_mov_epi8(__M, __V);
3044
+ return __builtin_reduce_max((__v32qu)__V);
3045
+ }
3046
+
3047
+ static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3048
+ _mm256_mask_reduce_min_epi8(__mmask32 __M, __m256i __V) {
3049
+ __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(127), __M, __V);
3050
+ return __builtin_reduce_min((__v32qs)__V);
3051
+ }
3052
+
3053
+ static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR
3054
+ _mm256_mask_reduce_min_epu8(__mmask32 __M, __m256i __V) {
3055
+ __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __V);
3056
+ return __builtin_reduce_min((__v32qu)__V);
3057
+ }
3058
+
3059
+ #undef __DEFAULT_FN_ATTRS128
3060
+ #undef __DEFAULT_FN_ATTRS256
3061
+ #undef __DEFAULT_FN_ATTRS128_CONSTEXPR
3062
+ #undef __DEFAULT_FN_ATTRS256_CONSTEXPR
3063
+
3064
+ #endif /* __AVX512VLBWINTRIN_H */