easyeda-mcp-pro 0.9.0 → 0.11.0

package/dist/circuit/circuit-ir.d.ts

@@ -184,8 +184,8 @@ export declare const PhysicalConstraintSchema: z.ZodObject<{
         board: "board";
         net: "net";
         interface: "interface";
-        device: "device";
         block: "block";
+        device: "device";
         zone: "zone";
     }>;
     targetRef: z.ZodOptional<z.ZodString>;
@@ -525,8 +525,8 @@ export declare const CircuitIRSchema: z.ZodObject<{
             board: "board";
             net: "net";
             interface: "interface";
-            device: "device";
             block: "block";
+            device: "device";
             zone: "zone";
         }>;
         targetRef: z.ZodOptional<z.ZodString>;

package/dist/config/profiles.js

@@ -3,35 +3,35 @@ export const PROFILE_DEFINITIONS = {
         name: 'core',
         label: 'Core',
         description: 'High-confidence tools: diagnostics, EasyEDA API inventory, schematic, BOM, DRC/ERC, board layers/stackup, Gerber export',
-        approxToolCount: '39',
+        approxToolCount: '41',
         isDefault: true,
     },
     pro: {
         name: 'pro',
         label: 'Pro',
         description: 'Adds pick-and-place, PDF, netlist export for manufacturing workflows',
-        approxToolCount: '42',
+        approxToolCount: '44',
         isDefault: false,
     },
     full: {
         name: 'full',
         label: 'Full',
         description: 'Adds controlled documented EasyEDA API method calls for full runtime control without raw JavaScript execution',
-        approxToolCount: '49',
+        approxToolCount: '51',
         isDefault: false,
     },
     dev: {
         name: 'dev',
         label: 'Dev',
         description: 'Adds diagnostics probes for bridge methods and live component runtime shape inspection',
-        approxToolCount: '53',
+        approxToolCount: '55',
         isDefault: false,
     },
     experimental: {
         name: 'experimental',
         label: 'Experimental',
         description: 'MCP Apps, Tasks, simulation, autorouter, AI action plans',
-        approxToolCount: '51',
+        approxToolCount: '53',
         isDefault: false,
     },
 };

package/dist/config/version.d.ts

@@ -1 +1 @@
-export declare const SERVER_VERSION = "0.9.0";
+export declare const SERVER_VERSION = "0.11.0";

package/dist/config/version.js

@@ -1,2 +1,2 @@
-export const SERVER_VERSION = '0.9.0'; // x-release-please-version
+export const SERVER_VERSION = '0.11.0'; // x-release-please-version
 //# sourceMappingURL=version.js.map

package/dist/config/version.js.map

@@ -1 +1 @@
-{"version":3,"file":"version.js","sourceRoot":"","sources":["../../src/config/version.ts"],"names":[],"mappings":"AAAA,MAAM,CAAC,MAAM,cAAc,GAAG,OAAO,CAAC,CAAC,2BAA2B"}
+{"version":3,"file":"version.js","sourceRoot":"","sources":["../../src/config/version.ts"],"names":[],"mappings":"AAAA,MAAM,CAAC,MAAM,cAAc,GAAG,QAAQ,CAAC,CAAC,2BAA2B"}

package/dist/pcb-constraints/errors.js

@@ -102,6 +102,78 @@ export const PcbConstraintCodeMap = {
         severity: 'error',
         remediationHint: 'Define explicit creepage and clearance distances for high-voltage nets. Minimum 4mm clearance for 250V AC is recommended.',
     },
+    DRILL_FILE_MISSING: {
+        code: 'PCB_DRILL_FILE_MISSING',
+        message: 'NC drill file is missing from the manufacturing package',
+        severity: 'error',
+        remediationHint: 'Re-export the manufacturing package with Excellon/NC drill files included',
+    },
+    COPPER_EDGE_CLEARANCE: {
+        code: 'PCB_COPPER_EDGE_CLEARANCE',
+        message: 'Copper is too close to the board edge',
+        severity: 'error',
+        remediationHint: 'Move copper, zones, vias, and pads away from the routed board edge or increase the copper-to-edge clearance rule',
+    },
+    DRILL_TOO_SMALL: {
+        code: 'PCB_DRILL_TOO_SMALL',
+        message: 'Minimum drill diameter is below common fabrication capability',
+        severity: 'warning',
+        remediationHint: 'Increase finished drill diameter or confirm the selected fabricator supports the requested drill size',
+    },
+    ANNULAR_RING_TOO_SMALL: {
+        code: 'PCB_ANNULAR_RING_TOO_SMALL',
+        message: 'Annular ring is below recommended manufacturing minimum',
+        severity: 'warning',
+        remediationHint: 'Increase pad/via diameter or reduce drill size to maintain enough annular ring for registration tolerance',
+    },
+    SOLDERMASK_SLIVER: {
+        code: 'PCB_SOLDERMASK_SLIVER',
+        message: 'Soldermask sliver is below recommended minimum',
+        severity: 'warning',
+        remediationHint: 'Increase pad spacing, adjust soldermask expansion, or remove soldermask dams intentionally where supported',
+    },
+    SILKSCREEN_OVER_PAD: {
+        code: 'PCB_SILKSCREEN_OVER_PAD',
+        message: 'Silkscreen overlaps exposed copper pads',
+        severity: 'warning',
+        remediationHint: 'Move or clip silkscreen references/graphics so they do not print over solderable pads',
+    },
+    TOOLING_HOLE_MISSING: {
+        code: 'PCB_TOOLING_HOLE_MISSING',
+        message: 'Tooling holes are missing for assembly/panel fixture alignment',
+        severity: 'warning',
+        remediationHint: 'Add tooling holes or confirm the assembler will provide panel-level tooling holes during panelization',
+    },
+    POLARITY_MARK_MISSING: {
+        code: 'PCB_POLARITY_MARK_MISSING',
+        message: 'Polarity or orientation marks are missing for polarized components',
+        severity: 'warning',
+        remediationHint: 'Add clear silkscreen/courtyard polarity markers for diodes, LEDs, electrolytic capacitors, IC pin 1, and connectors',
+    },
+    COMPONENT_SPACING_VIOLATION: {
+        code: 'PCB_COMPONENT_SPACING_VIOLATION',
+        message: 'Component spacing/courtyard violations detected',
+        severity: 'warning',
+        remediationHint: 'Increase component-to-component spacing or review courtyard overlap for assembly nozzle, hand-solder, and rework access',
+    },
+    TESTPOINT_COVERAGE_LOW: {
+        code: 'PCB_TESTPOINT_COVERAGE_LOW',
+        message: 'Critical nets are missing test points',
+        severity: 'warning',
+        remediationHint: 'Add accessible test pads for power rails, ground, reset, boot, programming, clocks, and key interfaces',
+    },
+    PROGRAMMING_HEADER_MISSING: {
+        code: 'PCB_PROGRAMMING_HEADER_MISSING',
+        message: 'Programming/debug header is required but missing',
+        severity: 'error',
+        remediationHint: 'Add a programming/debug connector or documented test pads for SWD/JTAG/UART/BOOT/RESET access',
+    },
+    FAB_NOTES_MISSING: {
+        code: 'PCB_FAB_NOTES_MISSING',
+        message: 'Fabrication notes are missing from the handoff package',
+        severity: 'warning',
+        remediationHint: 'Add fabrication notes covering board thickness, copper weight, finish, soldermask color, impedance requirements, panelization, and special instructions',
+    },
 };
 // ── Factory helpers ────────────────────────────────────────────────────────
 /**

package/dist/pcb-constraints/errors.js.map

@@ -1 +1 @@
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package/dist/pcb-constraints/types.d.ts

@@ -5,7 +5,7 @@
  */
 import type { ConstraintSeverity } from '../circuit/types.js';
 /** Machine-readable code identifying a PCB constraint check. */
-export type PcbConstraintCode = 'PCB_MISSING_OUTLINE' | 'PCB_OUTLINE_TOO_SMALL' | 'PCB_MISSING_STACKUP' | 'PCB_LAYER_COUNT_MISMATCH' | 'PCB_MISSING_MOUNTING_HOLES' | 'PCB_MISSING_NET_CLASSES' | 'PCB_INVALID_CLEARANCE' | 'PCB_KEEPOUT_VIOLATION' | 'PCB_MISSING_PLACEMENT_ZONES' | 'PCB_MISSING_MANUFACTURING_CONSTRAINTS' | 'PCB_FIDUCIAL_REQUIRED' | 'PCB_HIGH_VOLTAGE_CLEARANCE' | 'PCB_CONSTRAINT_INTERNAL';
+export type PcbConstraintCode = 'PCB_MISSING_OUTLINE' | 'PCB_OUTLINE_TOO_SMALL' | 'PCB_MISSING_STACKUP' | 'PCB_LAYER_COUNT_MISMATCH' | 'PCB_MISSING_MOUNTING_HOLES' | 'PCB_MISSING_NET_CLASSES' | 'PCB_INVALID_CLEARANCE' | 'PCB_KEEPOUT_VIOLATION' | 'PCB_MISSING_PLACEMENT_ZONES' | 'PCB_MISSING_MANUFACTURING_CONSTRAINTS' | 'PCB_FIDUCIAL_REQUIRED' | 'PCB_HIGH_VOLTAGE_CLEARANCE' | 'PCB_DRILL_FILE_MISSING' | 'PCB_COPPER_EDGE_CLEARANCE' | 'PCB_DRILL_TOO_SMALL' | 'PCB_ANNULAR_RING_TOO_SMALL' | 'PCB_SOLDERMASK_SLIVER' | 'PCB_SILKSCREEN_OVER_PAD' | 'PCB_TOOLING_HOLE_MISSING' | 'PCB_POLARITY_MARK_MISSING' | 'PCB_COMPONENT_SPACING_VIOLATION' | 'PCB_TESTPOINT_COVERAGE_LOW' | 'PCB_PROGRAMMING_HEADER_MISSING' | 'PCB_FAB_NOTES_MISSING' | 'PCB_CONSTRAINT_INTERNAL';
 /**
  * A single PCB constraint issue (error or warning).
  *
@@ -74,6 +74,44 @@ export interface PcbConstraintInput {
     hasFiducials?: boolean;
     /** Whether test pads are defined. */
     hasTestPads?: boolean;
+    /** Whether the drill/NC drill file is present in the manufacturing package. */
+    hasDrillFile?: boolean;
+    /** Minimum copper-to-board-edge clearance observed in mm. */
+    minCopperToEdgeMm?: number;
+    /** Number of copper-to-edge clearance violations. */
+    copperToEdgeViolationCount?: number;
+    /** Minimum finished/mechanical drill diameter observed in mm. */
+    minDrillMm?: number;
+    /** Minimum annular ring observed in mm. */
+    minAnnularRingMm?: number;
+    /** Minimum soldermask web/sliver observed in mm. */
+    minSolderMaskSliverMm?: number;
+    /** Count of soldermask sliver violations. */
+    solderMaskSliverViolationCount?: number;
+    /** Count of silkscreen objects overlapping copper pads. */
+    silkscreenOverPadCount?: number;
+    /** Number of SMT components requiring assembly alignment. */
+    smtComponentCount?: number;
+    /** Count of global/local fiducials. Overrides hasFiducials when provided. */
+    fiducialCount?: number;
+    /** Count of tooling holes for panel/fixture assembly. */
+    toolingHoleCount?: number;
+    /** Number of polarized/orientation-sensitive components. */
+    polarizedComponentCount?: number;
+    /** Number of polarized components with explicit polarity/orientation marks. */
+    polarityMarkCount?: number;
+    /** Count of component courtyard/spacing violations. */
+    componentSpacingViolationCount?: number;
+    /** Critical nets that should be accessible for bring-up/test. */
+    criticalNetNames?: string[];
+    /** Nets that have test pads/probes. */
+    testPointNets?: string[];
+    /** Whether a programming/debug header is present when required. */
+    hasProgrammingHeader?: boolean;
+    /** Whether this design requires a programming/debug header. */
+    requiresProgrammingHeader?: boolean;
+    /** Whether fabrication notes are present in the handoff package. */
+    hasFabricationNotes?: boolean;
     /** Whether the design contains high-voltage domains. */
     hasHighVoltage?: boolean;
     /** Manufacturing process (lead-free, lead-based, mixed). */

package/dist/pcb-constraints/validation.d.ts

@@ -1,7 +1,7 @@
 /**
  * PCB constraint validation rules.
  *
- * Implements constraint checks that operate on {@link PcbConstraintInput}
+ * Implements production constraint checks that operate on {@link PcbConstraintInput}
  * and produce structured {@link PcbConstraintIssue}s.
  *
  * Rules:
@@ -17,6 +17,17 @@
  * 10. Missing manufacturing constraints (warning)
  * 11. Fiducials recommended for SMT (warning)
  * 12. High-voltage creepage/clearance (error)
+ * 13. Missing drill file (error)
+ * 14. Copper-to-edge clearance violations (error)
+ * 15. Drill/annular-ring manufacturing risk (warning)
+ * 16. Soldermask sliver risk (warning)
+ * 17. Silkscreen over exposed pads (warning)
+ * 18. Tooling holes for assembly/panel fixtures (warning)
+ * 19. Polarity/orientation marks (warning)
+ * 20. Component spacing/courtyard violations (warning)
+ * 21. Critical-net testpoint coverage (warning)
+ * 22. Programming/debug header access (error)
+ * 23. Fabrication notes completeness (warning)
  *
  * @module
  */
@@ -24,7 +35,7 @@ import type { PcbConstraintInput, PcbConstraintResult } from './types.js';
 /**
  * Run all PCB constraint validation rules against board data.
  *
- * Orchestrates 12 rules:
+ * Orchestrates 23 rules:
  *   1. Missing outline         — error  if board outline is not defined
  *   2. Outline too small       — warning if dimensions are below 5mm
  *   3. Missing stackup         — warning if no detailed layer stack
@@ -37,6 +48,17 @@ import type { PcbConstraintInput, PcbConstraintResult } from './types.js';
  *  10. Missing mfg constraints — warning if process/quantity unspecified
  *  11. Fiducials recommended   — warning if SMT board without fiducials
  *  12. High-voltage clearance  — error  if HV domain without proper clearance
+ *  13. Drill file              — error  if NC drill file is missing
+ *  14. Copper edge clearance   — error  if copper is too close to board edge
+ *  15. Drill/annular ring      — warning if process dimensions are risky
+ *  16. Soldermask sliver       — warning if soldermask web is too small
+ *  17. Silkscreen over pad     — warning if silkscreen overlaps exposed pads
+ *  18. Tooling holes           — warning if assembly tooling holes are missing
+ *  19. Polarity marks          — warning if orientation-sensitive parts lack marks
+ *  20. Component spacing       — warning if courtyard/spacing violations exist
+ *  21. Testpoint coverage      — warning if critical nets lack test access
+ *  22. Programming header      — error  if required debug/programming access is missing
+ *  23. Fabrication notes       — warning if handoff notes are missing
  */
 export declare function validatePcbConstraints(input: PcbConstraintInput): PcbConstraintResult;
 /**
@@ -60,6 +82,25 @@ export declare function fromPcbIntent(pcb: {
     mountingHoles?: unknown[];
     fiducials?: unknown[];
     testPads?: unknown[];
+    hasDrillFile?: boolean;
+    minCopperToEdgeMm?: number;
+    copperToEdgeViolationCount?: number;
+    minDrillMm?: number;
+    minAnnularRingMm?: number;
+    minSolderMaskSliverMm?: number;
+    solderMaskSliverViolationCount?: number;
+    silkscreenOverPadCount?: number;
+    smtComponentCount?: number;
+    fiducialCount?: number;
+    toolingHoleCount?: number;
+    polarizedComponentCount?: number;
+    polarityMarkCount?: number;
+    componentSpacingViolationCount?: number;
+    criticalNetNames?: string[];
+    testPointNets?: string[];
+    hasProgrammingHeader?: boolean;
+    requiresProgrammingHeader?: boolean;
+    hasFabricationNotes?: boolean;
     manufacturingProcess?: string;
     manufacturing?: {
         process?: string;

package/dist/pcb-constraints/validation.js

@@ -1,7 +1,7 @@
 /**
  * PCB constraint validation rules.
  *
- * Implements constraint checks that operate on {@link PcbConstraintInput}
+ * Implements production constraint checks that operate on {@link PcbConstraintInput}
  * and produce structured {@link PcbConstraintIssue}s.
  *
  * Rules:
@@ -17,10 +17,31 @@
  * 10. Missing manufacturing constraints (warning)
  * 11. Fiducials recommended for SMT (warning)
  * 12. High-voltage creepage/clearance (error)
+ * 13. Missing drill file (error)
+ * 14. Copper-to-edge clearance violations (error)
+ * 15. Drill/annular-ring manufacturing risk (warning)
+ * 16. Soldermask sliver risk (warning)
+ * 17. Silkscreen over exposed pads (warning)
+ * 18. Tooling holes for assembly/panel fixtures (warning)
+ * 19. Polarity/orientation marks (warning)
+ * 20. Component spacing/courtyard violations (warning)
+ * 21. Critical-net testpoint coverage (warning)
+ * 22. Programming/debug header access (error)
+ * 23. Fabrication notes completeness (warning)
  *
  * @module
  */
 import { pcbError, pcbWarning } from './errors.js';
+const MIN_COPPER_TO_EDGE_MM = 0.25;
+const MIN_DRILL_MM = 0.2;
+const MIN_ANNULAR_RING_MM = 0.1;
+const MIN_SOLDERMASK_SLIVER_MM = 0.1;
+const MIN_SMT_FIDUCIAL_COUNT = 3;
+const MIN_TOOLING_HOLE_COUNT = 2;
+const MIN_TESTPOINT_COVERAGE_RATIO = 0.8;
+function normalizedNetName(name) {
+    return name.trim().toUpperCase();
+}
 // ── Rule: missing board outline ────────────────────────────────────────────
 function checkMissingOutline(input) {
     const issues = [];
@@ -155,6 +176,191 @@ function checkHighVoltageClearance(input) {
     }
     return issues;
 }
+// ── Production review: drill file completeness ─────────────────────────────
+function checkDrillFile(input) {
+    if (input.hasDrillFile !== false)
+        return [];
+    return [
+        pcbError('PCB_DRILL_FILE_MISSING', 'NC drill file is missing from the manufacturing package', {
+            remediationHint: 'Re-export the manufacturing package with Excellon/NC drill files included',
+            details: { hasDrillFile: input.hasDrillFile },
+        }),
+    ];
+}
+// ── Production review: copper-to-edge clearance ────────────────────────────
+function checkCopperToEdgeClearance(input) {
+    const issues = [];
+    const violationCount = input.copperToEdgeViolationCount ?? 0;
+    const belowMinimum = input.minCopperToEdgeMm !== undefined && input.minCopperToEdgeMm < MIN_COPPER_TO_EDGE_MM;
+    if (violationCount > 0 || belowMinimum) {
+        issues.push(pcbError('PCB_COPPER_EDGE_CLEARANCE', `Copper-to-edge clearance is below ${MIN_COPPER_TO_EDGE_MM}mm${input.minCopperToEdgeMm !== undefined ? ` (observed ${input.minCopperToEdgeMm}mm)` : ''}`, {
+            remediationHint: 'Move copper, zones, vias, and pads away from the routed board edge or increase the copper-to-edge clearance rule',
+            details: {
+                minCopperToEdgeMm: input.minCopperToEdgeMm,
+                copperToEdgeViolationCount: violationCount,
+                recommendedMinimumMm: MIN_COPPER_TO_EDGE_MM,
+            },
+        }));
+    }
+    return issues;
+}
+// ── Production review: drill and annular ring capability ───────────────────
+function checkDrillManufacturability(input) {
+    const issues = [];
+    if (input.minDrillMm !== undefined && input.minDrillMm < MIN_DRILL_MM) {
+        issues.push(pcbWarning('PCB_DRILL_TOO_SMALL', `Minimum drill diameter ${input.minDrillMm}mm is below common ${MIN_DRILL_MM}mm fabrication capability`, {
+            remediationHint: 'Increase finished drill diameter or confirm the selected fabricator supports the requested drill size',
+            details: { minDrillMm: input.minDrillMm, recommendedMinimumMm: MIN_DRILL_MM },
+        }));
+    }
+    if (input.minAnnularRingMm !== undefined && input.minAnnularRingMm < MIN_ANNULAR_RING_MM) {
+        issues.push(pcbWarning('PCB_ANNULAR_RING_TOO_SMALL', `Minimum annular ring ${input.minAnnularRingMm}mm is below recommended ${MIN_ANNULAR_RING_MM}mm`, {
+            remediationHint: 'Increase pad/via diameter or reduce drill size to maintain enough annular ring for registration tolerance',
+            details: {
+                minAnnularRingMm: input.minAnnularRingMm,
+                recommendedMinimumMm: MIN_ANNULAR_RING_MM,
+            },
+        }));
+    }
+    return issues;
+}
+// ── Production review: soldermask sliver ───────────────────────────────────
+function checkSolderMaskSliver(input) {
+    const violationCount = input.solderMaskSliverViolationCount ?? 0;
+    const belowMinimum = input.minSolderMaskSliverMm !== undefined &&
+        input.minSolderMaskSliverMm < MIN_SOLDERMASK_SLIVER_MM;
+    if (!belowMinimum && violationCount === 0)
+        return [];
+    return [
+        pcbWarning('PCB_SOLDERMASK_SLIVER', `Soldermask sliver is below ${MIN_SOLDERMASK_SLIVER_MM}mm${input.minSolderMaskSliverMm !== undefined ? ` (observed ${input.minSolderMaskSliverMm}mm)` : ''}`, {
+            remediationHint: 'Increase pad spacing, adjust soldermask expansion, or remove soldermask dams intentionally where supported',
+            details: {
+                minSolderMaskSliverMm: input.minSolderMaskSliverMm,
+                solderMaskSliverViolationCount: violationCount,
+                recommendedMinimumMm: MIN_SOLDERMASK_SLIVER_MM,
+            },
+        }),
+    ];
+}
+// ── Production review: silkscreen over pads ────────────────────────────────
+function checkSilkscreenOverPads(input) {
+    const count = input.silkscreenOverPadCount ?? 0;
+    if (count <= 0)
+        return [];
+    return [
+        pcbWarning('PCB_SILKSCREEN_OVER_PAD', `${count} silkscreen object${count === 1 ? '' : 's'} overlap exposed copper pads`, {
+            remediationHint: 'Move or clip silkscreen references/graphics so they do not print over solderable pads',
+            details: { silkscreenOverPadCount: count },
+        }),
+    ];
+}
+// ── Production review: assembly fixtures/fiducials ─────────────────────────
+function checkAssemblyAlignmentFeatures(input) {
+    const issues = [];
+    const smtCount = input.smtComponentCount ?? 0;
+    const fiducialCount = input.fiducialCount ?? (input.hasFiducials ? MIN_SMT_FIDUCIAL_COUNT : 0);
+    const toolingHoleCount = input.toolingHoleCount ?? 0;
+    if (smtCount > 0 && fiducialCount < MIN_SMT_FIDUCIAL_COUNT) {
+        issues.push(pcbWarning('PCB_FIDUCIAL_REQUIRED', `SMT assembly has ${fiducialCount} fiducial(s); at least ${MIN_SMT_FIDUCIAL_COUNT} are recommended`, {
+            remediationHint: 'Add at least 3 fiducial marks (global, near board corners) for pick-and-place machine alignment',
+            details: {
+                smtComponentCount: smtCount,
+                fiducialCount,
+                recommendedMinimum: MIN_SMT_FIDUCIAL_COUNT,
+            },
+        }));
+    }
+    if (smtCount > 0 && toolingHoleCount < MIN_TOOLING_HOLE_COUNT) {
+        issues.push(pcbWarning('PCB_TOOLING_HOLE_MISSING', `Assembly tooling holes are below recommended count (${toolingHoleCount}/${MIN_TOOLING_HOLE_COUNT})`, {
+            remediationHint: 'Add tooling holes or confirm the assembler will provide panel-level tooling holes during panelization',
+            details: {
+                smtComponentCount: smtCount,
+                toolingHoleCount,
+                recommendedMinimum: MIN_TOOLING_HOLE_COUNT,
+            },
+        }));
+    }
+    return issues;
+}
+// ── Production review: polarity/orientation marks ──────────────────────────
+function checkPolarityMarks(input) {
+    const polarizedCount = input.polarizedComponentCount ?? 0;
+    const markedCount = input.polarityMarkCount ?? 0;
+    const missingCount = Math.max(0, polarizedCount - markedCount);
+    if (missingCount === 0)
+        return [];
+    return [
+        pcbWarning('PCB_POLARITY_MARK_MISSING', `${missingCount} polarized/orientation-sensitive component${missingCount === 1 ? '' : 's'} lack polarity/orientation marks`, {
+            remediationHint: 'Add clear silkscreen/courtyard polarity markers for diodes, LEDs, electrolytic capacitors, IC pin 1, and connectors',
+            details: {
+                polarizedComponentCount: polarizedCount,
+                polarityMarkCount: markedCount,
+                missingCount,
+            },
+        }),
+    ];
+}
+// ── Production review: component spacing/courtyard ─────────────────────────
+function checkComponentSpacing(input) {
+    const count = input.componentSpacingViolationCount ?? 0;
+    if (count <= 0)
+        return [];
+    return [
+        pcbWarning('PCB_COMPONENT_SPACING_VIOLATION', `${count} component spacing/courtyard violation${count === 1 ? '' : 's'} detected`, {
+            remediationHint: 'Increase component-to-component spacing or review courtyard overlap for assembly nozzle, hand-solder, and rework access',
+            details: { componentSpacingViolationCount: count },
+        }),
+    ];
+}
+// ── Production review: testpoint coverage ──────────────────────────────────
+function checkTestpointCoverage(input) {
+    const criticalNets = [...new Set((input.criticalNetNames ?? []).map(normalizedNetName))];
+    if (criticalNets.length === 0)
+        return [];
+    const testPointNets = new Set((input.testPointNets ?? []).map(normalizedNetName));
+    const missing = criticalNets.filter((net) => !testPointNets.has(net));
+    const coverage = (criticalNets.length - missing.length) / criticalNets.length;
+    if (coverage < MIN_TESTPOINT_COVERAGE_RATIO) {
+        return [
+            pcbWarning('PCB_TESTPOINT_COVERAGE_LOW', `Critical-net testpoint coverage is ${(coverage * 100).toFixed(0)}%; ${missing.length} critical net(s) are missing test access`, {
+                remediationHint: 'Add accessible test pads for power rails, ground, reset, boot, programming, clocks, and key interfaces',
+                details: {
+                    criticalNetCount: criticalNets.length,
+                    testPointNetCount: testPointNets.size,
+                    missingCriticalNets: missing,
+                    coverageRatio: coverage,
+                    recommendedMinimumRatio: MIN_TESTPOINT_COVERAGE_RATIO,
+                },
+            }),
+        ];
+    }
+    return [];
+}
+// ── Production review: programming/debug access ────────────────────────────
+function checkProgrammingHeader(input) {
+    if (!input.requiresProgrammingHeader || input.hasProgrammingHeader !== false)
+        return [];
+    return [
+        pcbError('PCB_PROGRAMMING_HEADER_MISSING', 'Programming/debug header is required but missing', {
+            remediationHint: 'Add a programming/debug connector or documented test pads for SWD/JTAG/UART/BOOT/RESET access',
+            details: {
+                requiresProgrammingHeader: true,
+                hasProgrammingHeader: input.hasProgrammingHeader,
+            },
+        }),
+    ];
+}
+// ── Production review: fabrication notes ───────────────────────────────────
+function checkFabricationNotes(input) {
+    if (input.hasFabricationNotes !== false)
+        return [];
+    return [
+        pcbWarning('PCB_FAB_NOTES_MISSING', 'Fabrication notes are missing from the handoff package', {
+            remediationHint: 'Add fabrication notes covering board thickness, copper weight, finish, soldermask color, impedance requirements, panelization, and special instructions',
+            details: { hasFabricationNotes: input.hasFabricationNotes },
+        }),
+    ];
+}
 const RULES = [
     checkMissingOutline,
     checkOutlineTooSmall,
@@ -168,12 +374,23 @@ const RULES = [
     checkMissingManufacturingConstraints,
     checkFiducials,
     checkHighVoltageClearance,
+    checkDrillFile,
+    checkCopperToEdgeClearance,
+    checkDrillManufacturability,
+    checkSolderMaskSliver,
+    checkSilkscreenOverPads,
+    checkAssemblyAlignmentFeatures,
+    checkPolarityMarks,
+    checkComponentSpacing,
+    checkTestpointCoverage,
+    checkProgrammingHeader,
+    checkFabricationNotes,
 ];
 // ── Main entry point ───────────────────────────────────────────────────────
 /**
  * Run all PCB constraint validation rules against board data.
  *
- * Orchestrates 12 rules:
+ * Orchestrates 23 rules:
  *   1. Missing outline         — error  if board outline is not defined
  *   2. Outline too small       — warning if dimensions are below 5mm
  *   3. Missing stackup         — warning if no detailed layer stack
@@ -186,6 +403,17 @@ const RULES = [
  *  10. Missing mfg constraints — warning if process/quantity unspecified
  *  11. Fiducials recommended   — warning if SMT board without fiducials
  *  12. High-voltage clearance  — error  if HV domain without proper clearance
+ *  13. Drill file              — error  if NC drill file is missing
+ *  14. Copper edge clearance   — error  if copper is too close to board edge
+ *  15. Drill/annular ring      — warning if process dimensions are risky
+ *  16. Soldermask sliver       — warning if soldermask web is too small
+ *  17. Silkscreen over pad     — warning if silkscreen overlaps exposed pads
+ *  18. Tooling holes           — warning if assembly tooling holes are missing
+ *  19. Polarity marks          — warning if orientation-sensitive parts lack marks
+ *  20. Component spacing       — warning if courtyard/spacing violations exist
+ *  21. Testpoint coverage      — warning if critical nets lack test access
+ *  22. Programming header      — error  if required debug/programming access is missing
+ *  23. Fabrication notes       — warning if handoff notes are missing
  */
 export function validatePcbConstraints(input) {
     const errors = [];
@@ -300,6 +528,25 @@ export function fromPcbIntent(pcb) {
         hasPlacementZones: !!(pcb.placementZones && pcb.placementZones.length > 0),
         hasFiducials: !!(pcb.fiducials && pcb.fiducials.length > 0),
         hasTestPads: !!(pcb.testPads && pcb.testPads.length > 0),
+        hasDrillFile: pcb.hasDrillFile,
+        minCopperToEdgeMm: pcb.minCopperToEdgeMm,
+        copperToEdgeViolationCount: pcb.copperToEdgeViolationCount,
+        minDrillMm: pcb.minDrillMm,
+        minAnnularRingMm: pcb.minAnnularRingMm,
+        minSolderMaskSliverMm: pcb.minSolderMaskSliverMm,
+        solderMaskSliverViolationCount: pcb.solderMaskSliverViolationCount,
+        silkscreenOverPadCount: pcb.silkscreenOverPadCount,
+        smtComponentCount: pcb.smtComponentCount,
+        fiducialCount: pcb.fiducialCount ?? pcb.fiducials?.length,
+        toolingHoleCount: pcb.toolingHoleCount,
+        polarizedComponentCount: pcb.polarizedComponentCount,
+        polarityMarkCount: pcb.polarityMarkCount,
+        componentSpacingViolationCount: pcb.componentSpacingViolationCount,
+        criticalNetNames: pcb.criticalNetNames,
+        testPointNets: pcb.testPointNets,
+        hasProgrammingHeader: pcb.hasProgrammingHeader,
+        requiresProgrammingHeader: pcb.requiresProgrammingHeader,
+        hasFabricationNotes: pcb.hasFabricationNotes,
         hasHighVoltage: pcb.highVoltage ?? false,
         manufacturingProcess: pcb.manufacturingProcess ?? pcb.manufacturing?.process,
         hasQuantity: !!(pcb.quantity && pcb.quantity > 0) ||