easyeda-mcp-pro 0.3.2 → 0.5.2

package/dist/circuit/circuit-ir.js

@@ -0,0 +1,292 @@
+/**
+ * CircuitIR — versioned, validated, machine-readable circuit model.
+ *
+ * CircuitIR is the **source of truth** for downstream EasyEDA operations.
+ * It is produced by compiling a DesignIntent, but can also be authored or
+ * edited directly for advanced use cases.
+ *
+ * Every significant node (Block, Device, Net, Rail) carries a `designIntentRef`
+ * array for traceability back to the originating DesignIntent requirements.
+ *
+ * @schema circuit-ir/v1
+ */
+import { z } from 'zod';
+import { ValidationStatus, NetType, ConstraintSeverity, ConstraintType, BoardLayerType, KeepoutRestriction, PlacementSide, PlacementZoneType, MountingHoleType, } from './types.js';
+import { CircuitError, CircuitErrorCode, fromZodError } from './errors.js';
+// ── Schema constants ──────────────────────────────────────────────────────
+const MAX_STRING_LENGTH = 1024;
+const MAX_DESCRIPTION_LENGTH = 2048;
+// Field length constraints
+const MAX_ID_LENGTH = 64;
+const MAX_NAME_LENGTH = 128;
+const MAX_TYPE_LENGTH = 64;
+const MAX_REF_LENGTH = 32;
+const MAX_LCSC_LENGTH = 32;
+const MAX_SCOPE_LENGTH = 256;
+const MAX_NOTE_LENGTH = 512;
+const MAX_DESIGN_DESC_LENGTH = 256;
+// ── Schema version ────────────────────────────────────────────────────────
+export const CIRCUIT_IR_SCHEMA_VERSION = 'circuit-ir/v1';
+// ── Sub-schemas ───────────────────────────────────────────────────────────
+const designIntentRefSchema = z.object({
+    requirementId: z.string().min(1),
+    note: z.string().max(MAX_NOTE_LENGTH).optional(),
+});
+const metadataSchema = z.object({
+    version: z.literal('1.0.0').default('1.0.0'),
+    createdAt: z.string().datetime().optional(),
+    designIntentRef: z.string().optional(),
+    validationStatus: z.nativeEnum(ValidationStatus).default(ValidationStatus.Draft),
+});
+// ── Block ─────────────────────────────────────────────────────────────────
+export const BlockSchema = z.object({
+    id: z.string().min(1).max(MAX_ID_LENGTH),
+    name: z.string().min(1).max(MAX_NAME_LENGTH),
+    type: z.string().min(1).max(MAX_TYPE_LENGTH),
+    description: z.string().max(MAX_STRING_LENGTH).optional(),
+    designIntentRef: z.array(designIntentRefSchema).default([]),
+    children: z.array(z.string()).default([]),
+});
+// ── Device ────────────────────────────────────────────────────────────────
+export const DeviceSchema = z.object({
+    id: z.string().min(1).max(MAX_ID_LENGTH),
+    ref: z.string().min(1).max(MAX_REF_LENGTH),
+    mpn: z.string().max(MAX_NAME_LENGTH).optional(),
+    manufacturer: z.string().max(MAX_NAME_LENGTH).optional(),
+    package: z.string().max(MAX_NAME_LENGTH).optional(),
+    datasheet: z.string().url().optional().or(z.literal('')),
+    lcsc: z.string().max(MAX_LCSC_LENGTH).optional(),
+    blockRef: z.string().max(MAX_ID_LENGTH).optional(),
+    designIntentRef: z.array(designIntentRefSchema).default([]),
+    metadata: z.array(z.object({ key: z.string(), value: z.string() })).default([]),
+});
+// ── Net ───────────────────────────────────────────────────────────────────
+export const NetNodeSchema = z.object({
+    deviceRef: z.string().min(1),
+    pin: z.string().min(1),
+});
+export const NetSchema = z.object({
+    id: z.string().min(1).max(MAX_ID_LENGTH),
+    name: z.string().min(1).max(MAX_NAME_LENGTH),
+    type: z.nativeEnum(NetType).default(NetType.Signal),
+    nodes: z.array(NetNodeSchema).default([]),
+    blockRef: z.string().max(MAX_ID_LENGTH).optional(),
+    designIntentRef: z.array(designIntentRefSchema).default([]),
+    metadata: z.array(z.object({ key: z.string(), value: z.string() })).default([]),
+});
+// ── Power Rail ────────────────────────────────────────────────────────────
+export const PowerRailSchema = z.object({
+    id: z.string().min(1).max(MAX_ID_LENGTH),
+    name: z.string().min(1).max(MAX_ID_LENGTH),
+    voltage: z.number(),
+    tolerance: z.number().min(0).max(100).default(5),
+    maxCurrentAmps: z.number().nonnegative().optional(),
+    sourceBlockRef: z.string().max(MAX_ID_LENGTH).optional(),
+    sinkBlockRefs: z.array(z.string()).default([]),
+    designIntentRef: z.array(designIntentRefSchema).default([]),
+    metadata: z.array(z.object({ key: z.string(), value: z.string() })).default([]),
+});
+// ── Interface ─────────────────────────────────────────────────────────────
+export const InterfacePinSchema = z.object({
+    pin: z.string().min(1),
+    signal: z.string().min(1),
+    type: z.enum(['input', 'output', 'bidirectional', 'power', 'ground']).optional(),
+});
+export const InterfaceSchema = z.object({
+    id: z.string().min(1).max(MAX_ID_LENGTH),
+    name: z.string().min(1).max(MAX_NAME_LENGTH),
+    type: z.string().min(1).max(MAX_TYPE_LENGTH),
+    pinout: z.array(InterfacePinSchema).default([]),
+    blockRef: z.string().max(MAX_ID_LENGTH).optional(),
+    designIntentRef: z.array(designIntentRefSchema).default([]),
+});
+// ── Constraint ────────────────────────────────────────────────────────────
+export const ConstraintSchema = z.object({
+    id: z.string().min(1).max(MAX_ID_LENGTH),
+    type: z.nativeEnum(ConstraintType),
+    severity: z.nativeEnum(ConstraintSeverity).default(ConstraintSeverity.Required),
+    description: z.string().min(1).max(MAX_DESCRIPTION_LENGTH),
+    scope: z.string().max(MAX_SCOPE_LENGTH).optional(),
+    designIntentRef: z.array(designIntentRefSchema).default([]),
+});
+// ── BOM Intent ────────────────────────────────────────────────────────────
+export const BomIntentSchema = z.object({
+    excludeRefs: z.array(z.string()).default([]),
+    preferredVendors: z.array(z.string()).default([]),
+    costTargetUsd: z.number().nonnegative().optional(),
+    notes: z.string().max(MAX_STRING_LENGTH).optional(),
+});
+// ── PCB Intent ────────────────────────────────────────────────────────────
+/** Board outline polygon (mm). */
+const point2DSchema = z.object({
+    x: z.number(),
+    y: z.number(),
+});
+const boardOutlineSchema = z.object({
+    shape: z.array(point2DSchema).min(3, { message: 'Board outline must have at least 3 points' }),
+    cutouts: z.array(z.array(point2DSchema)).optional(),
+});
+/** One layer in the PCB stackup. */
+const layerStackEntrySchema = z.object({
+    name: z.string().min(1).max(MAX_ID_LENGTH),
+    type: z.nativeEnum(BoardLayerType),
+    thicknessMm: z.number().positive(),
+    material: z.string().min(1).max(MAX_ID_LENGTH),
+    copperWeightOz: z.number().nonnegative().optional(),
+    dielectricConstant: z.number().nonnegative().optional(),
+    order: z.number().int().nonnegative(),
+});
+/** A net class with routing rules. */
+const netClassRuleSchema = z.object({
+    name: z.string().min(1).max(MAX_ID_LENGTH),
+    traceWidthMm: z.number().positive(),
+    clearanceMm: z.number().nonnegative(),
+    viaDiameterMm: z.number().positive().optional(),
+    viaHoleMm: z.number().positive().optional(),
+    priority: z.number().int().nonnegative().optional(),
+    netNames: z.array(z.string()).optional(),
+});
+/** Clearance rule between two net classes. */
+const clearanceRuleSchema = z.object({
+    netClassA: z.string().min(1),
+    netClassB: z.string().min(1),
+    clearanceMm: z.number().nonnegative(),
+    layer: z.string().optional(),
+});
+/** A restricted area on the board. */
+const keepoutAreaSchema = z.object({
+    outline: z.array(point2DSchema).min(3),
+    layer: z.string().min(1),
+    restriction: z.nativeEnum(KeepoutRestriction),
+    description: z.string().max(MAX_DESIGN_DESC_LENGTH).optional(),
+});
+/** A placement zone for grouping components. */
+const placementZoneSchema = z.object({
+    outline: z.array(point2DSchema).min(3),
+    layer: z.nativeEnum(PlacementSide),
+    zoneType: z.nativeEnum(PlacementZoneType),
+    name: z.string().min(1).max(MAX_ID_LENGTH),
+    allowedRefs: z.array(z.string()).optional(),
+    description: z.string().max(MAX_DESIGN_DESC_LENGTH).optional(),
+});
+/** A mounting hole specification. */
+const mountingHoleSchema = z.object({
+    x: z.number(),
+    y: z.number(),
+    diameterMm: z.number().positive(),
+    type: z.nativeEnum(MountingHoleType).default(MountingHoleType.Unplated),
+    plated: z.boolean().default(false),
+});
+/** A fiducial mark. */
+const fiducialSchema = z.object({
+    x: z.number(),
+    y: z.number(),
+    type: z.enum(['global', 'local']),
+    top: z.boolean(),
+    bottom: z.boolean().optional(),
+});
+/** A test pad specification. */
+const testPadSchema = z.object({
+    x: z.number(),
+    y: z.number(),
+    netName: z.string().min(1),
+    diameterMm: z.number().positive(),
+    layer: z.nativeEnum(PlacementSide),
+    label: z.string().max(MAX_ID_LENGTH).optional(),
+});
+export const PcbIntentSchema = z.object({
+    // ── Board outline & dimensions ─────────────────────────────────────────
+    layerCount: z.number().int().positive().max(MAX_ID_LENGTH).optional(),
+    stackup: z.string().max(MAX_SCOPE_LENGTH).optional(),
+    widthMm: z.number().positive().optional(),
+    heightMm: z.number().positive().optional(),
+    material: z.string().max(MAX_NAME_LENGTH).optional(),
+    notes: z.string().max(MAX_STRING_LENGTH).optional(),
+    // ── PCB constraint fields ──────────────────────────────────────────────
+    boardOutline: boardOutlineSchema.optional(),
+    layerStack: z.array(layerStackEntrySchema).optional(),
+    netClasses: z.array(netClassRuleSchema).optional(),
+    clearanceRules: z.array(clearanceRuleSchema).optional(),
+    keepoutAreas: z.array(keepoutAreaSchema).optional(),
+    placementZones: z.array(placementZoneSchema).optional(),
+    mountingHoles: z.array(mountingHoleSchema).optional(),
+    fiducials: z.array(fiducialSchema).optional(),
+    testPads: z.array(testPadSchema).optional(),
+});
+// ── Manufacturing Intent ──────────────────────────────────────────────────
+export const ManufacturingIntentSchema = z.object({
+    quantity: z.number().int().positive().optional(),
+    process: z.enum(['lead-free', 'lead-based', 'mixed']).optional(),
+    timelineWeeks: z.number().int().positive().optional(),
+    notes: z.string().max(MAX_STRING_LENGTH).optional(),
+});
+// ── CircuitIR ─────────────────────────────────────────────────────────────
+export const CircuitIRSchema = z
+    .object({
+    $schema: z.literal(CIRCUIT_IR_SCHEMA_VERSION).default(CIRCUIT_IR_SCHEMA_VERSION),
+    metadata: metadataSchema,
+    blocks: z.array(BlockSchema).default([]),
+    devices: z.array(DeviceSchema).default([]),
+    nets: z.array(NetSchema).default([]),
+    rails: z.array(PowerRailSchema).default([]),
+    interfaces: z.array(InterfaceSchema).default([]),
+    constraints: z.array(ConstraintSchema).default([]),
+    bom: BomIntentSchema.default({ excludeRefs: [], preferredVendors: [] }),
+    pcb: PcbIntentSchema.default({}),
+    manufacturing: ManufacturingIntentSchema.default({}),
+})
+    .strict()
+    .refine((data) => {
+    // All device refs and net node refs must reference valid devices
+    const deviceIds = new Set(data.devices.map((d) => d.id));
+    for (const net of data.nets) {
+        for (const node of net.nodes) {
+            if (!deviceIds.has(node.deviceRef)) {
+                return false;
+            }
+        }
+    }
+    return true;
+}, {
+    message: 'All net node deviceRefs must reference a valid device ID',
+    path: ['nets'],
+})
+    .refine((data) => {
+    // All blockRefs must reference valid blocks
+    const blockIds = new Set(data.blocks.map((b) => b.id));
+    for (const device of data.devices) {
+        if (device.blockRef && !blockIds.has(device.blockRef)) {
+            return false;
+        }
+    }
+    return true;
+}, {
+    message: 'All device blockRefs must reference a valid block ID',
+    path: ['devices'],
+});
+// ── Validation helper ─────────────────────────────────────────────────────
+/**
+ * Parse and validate an unknown input as a CircuitIR.
+ *
+ * Returns the validated CircuitIR on success.
+ * Throws `CircuitError` with structured errors on failure.
+ */
+export function validateCircuitIR(input) {
+    const result = CircuitIRSchema.safeParse(input);
+    if (!result.success) {
+        const errors = fromZodError(result.error, 'circuitIR');
+        throw new CircuitError({
+            code: CircuitErrorCode.CIRCUIT_IR_INVALID,
+            message: 'CircuitIR validation failed',
+            errors,
+        });
+    }
+    return result.data;
+}
+/**
+ * Type guard: check whether an unknown value is a valid CircuitIR.
+ */
+export function isCircuitIR(value) {
+    return CircuitIRSchema.safeParse(value).success;
+}
+//# sourceMappingURL=circuit-ir.js.map

package/dist/circuit/circuit-ir.js.map

@@ -0,0 +1 @@
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package/dist/circuit/compiler.d.ts

@@ -0,0 +1,55 @@
+/**
+ * DesignIntent → CircuitIR compiler.
+ *
+ * This module provides the compile boundary: a validated DesignIntent is
+ * compiled into a draft CircuitIR.  The CircuitIR must then pass a review
+ * gate (human or automated) before it is marked as "validated" and consumed
+ * by downstream EasyEDA tools.
+ *
+ * The compiler:
+ *   1. Validates the input DesignIntent.
+ *   2. Transforms functional block requirements into Blocks.
+ *   3. Creates power Rails from the DesignIntent's rail requirements.
+ *   4. Creates empty Device slots with traceability refs.
+ *   5. Generates placeholder Nets for each power rail.
+ *   6. Copies manufacturing, mechanical, and safety intent into CircuitIR fields.
+ *   7. Preserves all traceability IDs.
+ *
+ * @module
+ */
+import { DesignIntent } from './design-intent.js';
+import { CircuitIR } from './circuit-ir.js';
+import { ValidationStatus } from './types.js';
+export interface CompileOptions {
+    /** If true, skip DesignIntent validation (assumes pre-validated input). */
+    skipValidation?: boolean;
+    /** Optional override for the CircuitIR validation status after compile. */
+    initialStatus?: ValidationStatus;
+}
+export interface CompileResult {
+    /** The compiled CircuitIR (draft — must pass review gate). */
+    circuitIR: CircuitIR;
+    /** The original DesignIntent, preserved for traceability. */
+    designIntent: DesignIntent;
+    /** Compile warnings (non-fatal issues the compiler wants to flag). */
+    warnings: string[];
+}
+/**
+ * Compile a validated DesignIntent into a draft CircuitIR.
+ *
+ * Throws `CircuitError` if:
+ *   - The input fails DesignIntent validation (unless `skipValidation`).
+ *   - The board type is not supported by the compiler.
+ */
+export declare function compile(input: unknown, options?: CompileOptions): CompileResult;
+/**
+ * Transition a CircuitIR from "draft" to "validated" or "rejected".
+ *
+ * Downstream EasyEDA tools MUST check that the CircuitIR they consume
+ * is in "validated" status before proceeding with mutations.
+ */
+export declare function setValidationStatus(circuitIR: CircuitIR, status: ValidationStatus.Validated | ValidationStatus.Rejected, _reason?: string): CircuitIR;
+/**
+ * Check whether a CircuitIR is validated and ready for EasyEDA operations.
+ */
+export declare function isReadyForEasyEDA(circuitIR: CircuitIR): boolean;

package/dist/circuit/compiler.js

@@ -0,0 +1,197 @@
+/**
+ * DesignIntent → CircuitIR compiler.
+ *
+ * This module provides the compile boundary: a validated DesignIntent is
+ * compiled into a draft CircuitIR.  The CircuitIR must then pass a review
+ * gate (human or automated) before it is marked as "validated" and consumed
+ * by downstream EasyEDA tools.
+ *
+ * The compiler:
+ *   1. Validates the input DesignIntent.
+ *   2. Transforms functional block requirements into Blocks.
+ *   3. Creates power Rails from the DesignIntent's rail requirements.
+ *   4. Creates empty Device slots with traceability refs.
+ *   5. Generates placeholder Nets for each power rail.
+ *   6. Copies manufacturing, mechanical, and safety intent into CircuitIR fields.
+ *   7. Preserves all traceability IDs.
+ *
+ * @module
+ */
+import { DesignIntentSchema } from './design-intent.js';
+import { CircuitIRSchema, CIRCUIT_IR_SCHEMA_VERSION, } from './circuit-ir.js';
+import { ValidationStatus, NetType } from './types.js';
+import { CircuitError, CircuitErrorCode, fromZodError } from './errors.js';
+// ── Defaults ──────────────────────────────────────────────────────────────
+const DEFAULT_OPTIONS = {
+    skipValidation: false,
+    initialStatus: ValidationStatus.Draft,
+};
+// ── Compile helpers ───────────────────────────────────────────────────────
+function compileBlocks(designIntent) {
+    return designIntent.requirements.functionalBlocks.map((fb) => ({
+        id: `block-${fb.id}`,
+        name: fb.name,
+        type: fb.type,
+        description: fb.purpose,
+        designIntentRef: [{ requirementId: fb.id, note: fb.purpose }],
+        children: [],
+    }));
+}
+function compilePowerRails(designIntent, blocks) {
+    return designIntent.requirements.power.rails.map((r) => {
+        // Find which block this rail belongs to by matching the description / context
+        const sourceBlock = blocks.find((b) => r.description && b.description?.toLowerCase().includes(r.description.toLowerCase()));
+        return {
+            id: `rail-${r.id}`,
+            name: r.id,
+            voltage: r.voltage,
+            tolerance: r.tolerance,
+            maxCurrentAmps: r.maxCurrentAmps,
+            sourceBlockRef: sourceBlock?.id,
+            sinkBlockRefs: [],
+            designIntentRef: [{ requirementId: r.id }],
+            metadata: [],
+        };
+    });
+}
+function compileDeviceStubs(blocks) {
+    // We create one stub Device per block as a placeholder. The user fills
+    // in actual MPNs during the planning step.
+    return blocks.map((block) => ({
+        id: `dev-${block.id}`,
+        ref: `U?`,
+        mpn: undefined,
+        manufacturer: undefined,
+        package: undefined,
+        datasheet: '',
+        lcsc: undefined,
+        blockRef: block.id,
+        designIntentRef: block.designIntentRef,
+        metadata: [],
+    }));
+}
+function compilePowerNets(rails) {
+    return rails.map((rail) => ({
+        id: `net-${rail.id}`,
+        name: rail.name,
+        type: NetType.Power,
+        nodes: [],
+        blockRef: rail.sourceBlockRef,
+        designIntentRef: rail.designIntentRef,
+        metadata: [],
+    }));
+}
+function buildCircuitIR(designIntent, blocks, rails, devices, nets, opts) {
+    return {
+        $schema: CIRCUIT_IR_SCHEMA_VERSION,
+        metadata: {
+            version: '1.0.0',
+            createdAt: new Date().toISOString(),
+            designIntentRef: designIntent.project.name,
+            validationStatus: opts.initialStatus ?? ValidationStatus.Draft,
+        },
+        blocks,
+        devices,
+        nets,
+        rails,
+        interfaces: [],
+        constraints: [],
+        bom: { excludeRefs: [], preferredVendors: [] },
+        pcb: {
+            layerCount: designIntent.requirements.mechanical.layers,
+            widthMm: designIntent.requirements.mechanical.widthMm,
+            heightMm: designIntent.requirements.mechanical.heightMm,
+            boardOutline: undefined,
+            layerStack: undefined,
+            netClasses: undefined,
+            clearanceRules: undefined,
+            keepoutAreas: undefined,
+            placementZones: undefined,
+            mountingHoles: undefined,
+            fiducials: undefined,
+            testPads: undefined,
+        },
+        manufacturing: {
+            quantity: undefined,
+            process: designIntent.requirements.manufacturing.process,
+            timelineWeeks: designIntent.requirements.manufacturing.timelineWeeks,
+        },
+    };
+}
+// ── Compiler ──────────────────────────────────────────────────────────────
+/**
+ * Compile a validated DesignIntent into a draft CircuitIR.
+ *
+ * Throws `CircuitError` if:
+ *   - The input fails DesignIntent validation (unless `skipValidation`).
+ *   - The board type is not supported by the compiler.
+ */
+export function compile(input, options) {
+    const opts = { ...DEFAULT_OPTIONS, ...options };
+    let designIntent;
+    // ── 1. Validate DesignIntent ────────────────────────────────────────────
+    if (!opts.skipValidation) {
+        const parsed = DesignIntentSchema.safeParse(input);
+        if (!parsed.success) {
+            const errors = fromZodError(parsed.error, 'compile.input');
+            throw new CircuitError({
+                code: CircuitErrorCode.DESIGN_INTENT_INVALID,
+                message: 'Cannot compile: DesignIntent validation failed',
+                errors,
+            });
+        }
+        designIntent = parsed.data;
+    }
+    else {
+        designIntent = input;
+    }
+    const warnings = [];
+    // ── 2. Compile Blocks ─────────────────────────────────────────────────
+    const blocks = compileBlocks(designIntent);
+    // ── 3. Compile Power Rails ──────────────────────────────────────────────
+    const rails = compilePowerRails(designIntent, blocks);
+    // ── 4. Create Device stubs ──────────────────────────────────────────────
+    const devices = compileDeviceStubs(blocks);
+    // ── 5. Create power nets ───────────────────────────────────────────────
+    const nets = compilePowerNets(rails);
+    // ── 6. Build CircuitIR ──────────────────────────────────────────────────
+    const circuitIR = buildCircuitIR(designIntent, blocks, rails, devices, nets, opts);
+    // ── 7. Validate output CircuitIR ────────────────────────────────────────
+    const parsed = CircuitIRSchema.safeParse(circuitIR);
+    if (!parsed.success) {
+        const errors = fromZodError(parsed.error, 'compile.output');
+        throw new CircuitError({
+            code: CircuitErrorCode.COMPILE_FAILED,
+            message: 'Compilation produced invalid CircuitIR',
+            errors,
+        });
+    }
+    return {
+        circuitIR: parsed.data,
+        designIntent,
+        warnings,
+    };
+}
+// ── Review gate ───────────────────────────────────────────────────────────
+/**
+ * Transition a CircuitIR from "draft" to "validated" or "rejected".
+ *
+ * Downstream EasyEDA tools MUST check that the CircuitIR they consume
+ * is in "validated" status before proceeding with mutations.
+ */
+export function setValidationStatus(circuitIR, status, _reason) {
+    return {
+        ...circuitIR,
+        metadata: {
+            ...circuitIR.metadata,
+            validationStatus: status,
+        },
+    };
+}
+/**
+ * Check whether a CircuitIR is validated and ready for EasyEDA operations.
+ */
+export function isReadyForEasyEDA(circuitIR) {
+    return circuitIR.metadata.validationStatus === ValidationStatus.Validated;
+}
+//# sourceMappingURL=compiler.js.map

package/dist/circuit/compiler.js.map

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