driverge-mcp 0.1.0-beta.2 → 0.1.0-beta.3

package/README.md

@@ -4,7 +4,7 @@
 <p align="center"><em>Datasheet PDF → embedded C/C++ driver, from any MCP client.</em></p>
 
 <p align="center">
-  <a href="https://www.npmjs.com/package/driverge-mcp"><img alt="npm" src="https://img.shields.io/npm/v/driverge-mcp"></a>
+  <a href="https://www.npmjs.com/package/driverge-mcp"><img alt="npm (beta)" src="https://img.shields.io/npm/v/driverge-mcp/beta"></a>
   <a href="https://github.com/MehmetTopuz/driverge-mcp/actions/workflows/ci.yml"><img alt="CI" src="https://github.com/MehmetTopuz/driverge-mcp/actions/workflows/ci.yml/badge.svg"></a>
   <a href="LICENSE"><img alt="license" src="https://img.shields.io/badge/license-MIT-blue"></a>
   <img alt="status" src="https://img.shields.io/badge/status-closed%20beta-orange">
@@ -108,14 +108,16 @@ changes.
 
 | Target | Bus binding | Buses | Language | Maturity |
 |---|---|---|---|---|
-| **Portable (thin-HAL)** | user-implemented `hal_*` seam | I²C, SPI, UART, CAN | C / C++ | **Beta** — host-tested, gcc-compiled in CI; not yet on hardware |
+| **Portable (thin-HAL)** | user-implemented `<part>_hal_*` seam | I²C, SPI, UART, CAN | C / C++ | **Beta** — host-tested, gcc-compiled in CI; not yet on hardware |
 | **ESP32** | ESP-IDF (`i2c_master_*`, `spi_master`, `uart`, TWAI) | I²C, SPI, UART, CAN | C / C++ | **Experimental** — one informal I²C bring-up; SPI/UART/CAN never on hardware |
-| **STM32** | CubeHAL (`HAL_I2C_*`, `HAL_SPI_*` + GPIO CS, `HAL_UART_*`) | I²C, SPI, UART | C / C++ | **Experimental** — never on hardware |
+| **STM32** | CubeHAL (`HAL_I2C_*`, `HAL_SPI_*` + GPIO CS, `HAL_UART_*`) | I²C, SPI, UART | C / C++ | **Experimental** — 3 hardware field tests (NUCLEO-G474RE, hand-completed); no automated compile gate yet |
 | **Arduino** | `Wire` / `SPI` | — | C++ | not implemented |
 
-STM32 CAN is planned (the bxCAN/FDCAN family split needs its own pass); asking a
-target for a bus it doesn't support fails fast with a clear
-`UnsupportedBusError` rather than emitting a wrong seam. Pass
+STM32 CAN is planned (the bxCAN/FDCAN family split needs its own pass), and a
+next wave of native targets — RP2040/RP2350, TI MSPM0, NXP MCX/i.MX RT,
+Nuvoton NuMicro, Microchip PIC, and eventually Zephyr — is on the
+[Roadmap](#roadmap). Asking a target for a bus it doesn't support fails fast
+with a clear `UnsupportedBusError` rather than emitting a wrong seam. Pass
 `language: "cpp"` to `generate_driver` for a class-based C++ driver
 (`.hpp`/`.cpp`) instead of the default C output — same registers, same seam,
 same validation. What "Beta" and "Experimental" mean exactly is spelled out in
@@ -136,8 +138,8 @@ The extraction pipeline is regression-tested against real datasheets from
 | LSM6DSRX | STMicroelectronics | register map | 31 regs, 91 bit-fields |
 | MAX30102 | Maxim Integrated | register map | 20 regs, 33 bit-fields |
 
-Other tested parts (ADXL345, MLX90614, AEAT-8811, PCA9685, VL53L3CX, TLE5014)
-extract **partially** or **defer** to the host AI — the pipeline says so
+Other tested parts (ADXL345, MLX90614, AEAT-8811, PCA9685, VL53L3CX, TLE5014,
+TCA6408A) extract **partially** or **defer** to the host AI — the pipeline says so
 explicitly instead of guessing. The full, always-current matrix lives in the
 [coverage scorecard](tests/scorecard/scorecard.snap.md).
 
@@ -146,17 +148,20 @@ explicitly instead of guessing. The full, always-current matrix lives in the
 Driverge is in **closed beta** (`0.1.0-beta.x`, npm `beta` dist-tag).
 
 **Proven today (host-level):**
-- The full deterministic test suite is green (440-plus tests) on a clean
+- The full deterministic test suite is green (540-plus tests) on a clean
   TypeScript build, and the **portable** driver is compiled by a real `gcc`
-  gate in CI.
-- The extraction pipeline is regression-tested against **13 real datasheets**
-  and reports its own coverage honestly — 7 fully extracted, 3 partial, 3
+  gate in CI (including a multi-driver link gate).
+- The extraction pipeline is regression-tested against **14 real datasheets**
+  and reports its own coverage honestly — 7 fully extracted, 4 partial, 3
   deferred (see the [coverage scorecard](tests/scorecard/scorecard.snap.md)).
 
 **Not yet proven — this is the beta → v0.1.0 gate:**
-- **On-hardware behavior is not gated.** Only one informal ESP32 bring-up has
-  run (MPU-9250, hand-completed); there is no clean, repeatable hardware pass
-  yet, and STM32 has never run on silicon.
+- **On-hardware behavior is not gated by CI.** STM32 has now run on real
+  hardware — three NUCLEO-G474RE field tests (onsemi FXL6408 I²C, TI TUSS4470
+  SPI, Microchip CAP1206 I²C), each hand-completed and folded back into the
+  generator — and ESP32 has one informal I²C bring-up (MPU-9250). There is still
+  no clean, repeatable automated hardware pass, so every generated driver needs
+  review before you flash it.
 - The native ESP32/STM32 seams are not yet built by an automated compile gate
   (ESP-IDF / CubeIDE) — only the portable target is.
 - Only one MCP client has been exercised end-to-end.
@@ -206,23 +211,27 @@ re-parse, and the full JSON stays readable at `driverge://datasheet/<ref>`.
 ### The thin-HAL seam
 
 Generated drivers touch hardware through a tiny per-bus seam — and nothing
-else:
+else. Seam symbols are **prefixed with the part's slug** (e.g.
+`bme280_hal_i2c_read`) so two Driverge drivers can link into one firmware
+image without symbol collisions:
 
-| Bus | Seam functions (plus `hal_delay_ms`) |
+| Bus | Seam functions (plus `<part>_hal_delay_ms`) |
 |---|---|
-| I²C | `hal_i2c_read`, `hal_i2c_write` |
-| SPI | `hal_spi_transfer` (one call = one CS-framed transaction) |
-| UART | `hal_uart_write`, `hal_uart_read` |
-| CAN | `hal_can_transfer` (one call = one frame exchange) |
+| I²C | `<part>_hal_i2c_read`, `<part>_hal_i2c_write` |
+| SPI | `<part>_hal_spi_transfer(tx, rx, len)` (one call = one CS-framed **full-duplex** transaction; `rx` may be `NULL` for write-only, and write-then-read devices are served by padding `tx` with dummy bytes) |
+| UART | `<part>_hal_uart_write`, `<part>_hal_uart_read` |
+| CAN | `<part>_hal_can_transfer` (one call = one frame exchange) |
 
 The transfer seams return `int` — **`0` on success, non-zero on a bus error**
 (NACK, timeout) — and the generated register accessors propagate that status
 instead of swallowing it; native seams (ESP32, STM32) return their vendor
-status, which is already `0` on success. `validate_driver` enforces seam
-purity: a driver that calls a vendor peripheral API outside the seam fails the
-lint. Buses with no universal register-access primitive (UART, CAN) get their
-device-specific framing as a marked `TODO(driverge)` gap, completed by the host
-AI and then linted.
+status, which is already `0` on success. Native targets also emit a seam
+companion header (`<part>_hal_stm32.h` / `<part>_hal_esp32.h`) declaring the
+one-time `bind` call that points the seam at your peripheral handle.
+`validate_driver` enforces seam purity: a driver that calls a vendor
+peripheral API outside the seam fails the lint. Buses with no universal
+register-access primitive (UART, CAN) get their device-specific framing as a
+marked `TODO(driverge)` gap, completed by the host AI and then linted.
 
 ### The fill-in loop
 
@@ -277,6 +286,7 @@ development.
 | Env var | Default | Purpose |
 |---|---|---|
 | `DRIVERGE_OUT_ROOT` | server's working directory | Root that `generate_driver`'s `out_dir` writes are confined to. Any `out_dir` that resolves outside this root is rejected (`out_dir "…" escapes the allowed root`). Set it to the directory you want drivers written into. |
+| `DRIVERGE_MAX_PDF_BYTES` | `67108864` (64 MiB) | Maximum PDF size `analyze_datasheet` will read. A larger file is rejected with a clear "PDF too large" error before any parsing — bounds memory use on a hostile or accidentally huge input. |
 
 Set it in the MCP config's `env` block, e.g.:
 
@@ -431,6 +441,13 @@ datasheet prose, and `validate_driver` checks the result.
   (I²C, SPI, UART, CAN) ✅; C or C++ output ✅. *(current)*
 - **v1.0** — broader vendor/part coverage, STM32 CAN (bxCAN/FDCAN), and a
   stable, versioned JSON schema.
+- **v1.x** — new native MCU targets (same portable thin-HAL core, one seam
+  file per platform; prioritized by beta-tester demand): **RP2040/RP2350**
+  (pico-sdk), **TI MSPM0** (DriverLib), **NXP MCX / i.MX RT** (MCUXpresso
+  `fsl_lpi2c`/`fsl_lpspi`), **Nuvoton NuMicro** (BSP Standard Driver), and
+  **Microchip PIC** (MCC Melody for 8/16-bit; Harmony v3 for PIC32).
+- **Later** — a **Zephyr** meta-target (devicetree-based `i2c`/`spi` API):
+  one seam covering Nordic nRF and every other Zephyr-supported vendor.
 
 Day-to-day progress is tracked in the [CHANGELOG](CHANGELOG.md).
 

package/dist/codegen/esp32.d.ts

@@ -1,11 +1,14 @@
 import type { DatasheetJson } from "../schema/types.js";
 import type { CodegenLanguage, DriverArtifact } from "./types.js";
 /**
- * Portable core + an ESP-IDF seam implementation for the same part. With
- * language "c" (default) the seam is `<slug>_hal_esp32.c`, unchanged from
- * before. With language "cpp" the seam becomes `<slug>_hal_esp32.cpp` and its
- * core include is `#include "<slug>.hpp"` (see coreInclude/seamPath above) —
- * everything else in the seam content is identical either way.
+ * Portable core + an ESP-IDF seam implementation + a seam companion header for
+ * the same part. With language "c" (default) the seam is `<slug>_hal_esp32.c`;
+ * with language "cpp" it is `<slug>_hal_esp32.cpp` and its core include is
+ * `#include "<slug>.hpp"` (see coreInclude/seamPath above) — everything else
+ * in the seam content is identical either way. The companion header
+ * (`<slug>_hal_esp32.h`) is always a plain `.h` file, in BOTH language runs.
+ * File order in the artifact: [core header, core source, companion header,
+ * seam source] — see tests/codegen/esp32.test.ts.
  */
 export declare function generateEsp32Driver(json: DatasheetJson, opts?: {
     language?: CodegenLanguage;

package/dist/codegen/esp32.js

@@ -1,18 +1,28 @@
 // ESP32 (ESP-IDF) target. Per platform-code-generation-targets, a native target
 // does NOT replace the thin HAL — it *pre-fills* the seam. So the ESP32 driver is
 // the exact portable core (unchanged, still platform-agnostic) PLUS a
-// <part>_hal_esp32.c that implements the bus's thin-HAL seam + hal_delay_ms with
-// ESP-IDF v5 drivers. The user drops all three files into an ESP-IDF component;
-// only the board's bus/pin bring-up stays a TODO(driverge).
+// <slug>_hal_esp32.c that implements the bus's thin-HAL seam + <slug>_hal_delay_ms
+// with ESP-IDF v5 drivers, PLUS a <slug>_hal_esp32.h companion header declaring
+// the <slug>_esp32_bind(...) prototype the seam .c defines. The user drops all
+// four files into an ESP-IDF component; only the board's bus/pin bring-up
+// stays a TODO(driverge).
+//
+// Session E (2026-07-11 field-test findings — see raw/stm32-test-results/*.md
+// and the approved plan, whose findings generalize to every native target):
+// every seam symbol is PER-DRIVER PREFIXED (`<slug>_hal_*` — see busSeam in
+// portable.ts), so two Driverge drivers in one project never collide at link.
+// The SPI seam is also now a single full-duplex <slug>_hal_spi_transfer(tx,
+// rx, len) — one spi_transaction_t (length = len*8, tx_buffer/rx_buffer, no
+// SPI_DEVICE_HALFDUPLEX flag) — matching the portable core's contract exactly.
 //
 // I2C/SPI/UART/CAN only: the I2C seam references `${PREFIX}_I2C_ADDR`, a macro
 // the portable core only defines for I2C parts; the SPI seam needs the portable
-// core's hal_spi_transfer declaration; the UART seam (Session B) wraps ESP-IDF's
-// uart driver around hal_uart_write/hal_uart_read; the CAN seam (Session C)
-// wraps ESP-IDF's TWAI (Two-Wire Automotive Interface, ESP-IDF's CAN 2.0
-// controller) driver around hal_can_transfer — any other bus (unknown) has no
-// ESP-IDF seam here, so this target refuses (UnsupportedBusError) rather than
-// emit an uncompilable seam.
+// core's <slug>_hal_spi_transfer declaration; the UART seam (Session B) wraps
+// ESP-IDF's uart driver around <slug>_hal_uart_write/<slug>_hal_uart_read; the
+// CAN seam (Session C) wraps ESP-IDF's TWAI (Two-Wire Automotive Interface,
+// ESP-IDF's CAN 2.0 controller) driver around <slug>_hal_can_transfer — any
+// other bus (unknown) has no ESP-IDF seam here, so this target refuses
+// (UnsupportedBusError) rather than emit an uncompilable seam.
 import { prefixOf, slug } from "./ident.js";
 import { generatePortableCppDriver } from "./portable-cpp.js";
 import { generatePortableDriver } from "./portable.js";
@@ -26,24 +36,73 @@ import { UnsupportedBusError } from "./types.js";
 // nothing: the .hpp declares the hal_* seam inside `extern "C"`, so compiling
 // this seam as C++ still emits plain C-linkage definitions the class methods
 // can call, and both ESP-IDF and a C++-enabled CubeMX project compile .cpp
-// sources natively.
+// sources natively. The seam companion header (Session E) stays a plain `.h`
+// file in BOTH language runs — its own `extern "C"` guard makes it valid from
+// either a C or a C++ translation unit, so there is nothing to switch on
+// `language` for (see companionHeaderEsp32 below).
 function coreInclude(name, language) {
     return `#include "${name}.${language === "cpp" ? "hpp" : "h"}"`;
 }
 function seamPath(name, language) {
     return `${name}_hal_esp32.${language === "cpp" ? "cpp" : "c"}`;
 }
+function companionHeaderName(name) {
+    return `${name}_hal_esp32.h`;
+}
+/**
+ * Session E: the seam companion header. Declares the `<slug>_esp32_bind(...)`
+ * prototype the seam .c/.cpp defines — the CAP1206/FXL6408 field sessions both
+ * had to hand-write this prototype into their own application code
+ * (raw/stm32-test-results/*.md §6) because Driverge never emitted it.
+ * `includeLine` is the ESP-IDF driver header the bind signature's vendor
+ * type(s) need (driver/i2c_master.h, driver/spi_master.h, driver/uart.h,
+ * driver/twai.h); `bindProtoLine` is the exact signature (identical to the
+ * `<ret> <slug>_esp32_bind(...) {` line the seam defines, just with a
+ * trailing `;` instead of a body) — passed in by each halImplX below so the
+ * header and the definition can never drift.
+ */
+function companionHeaderEsp32(name, prefix, includeLine, bindProtoLine) {
+    const guard = `${prefix}_HAL_ESP32_H`;
+    const content = [
+        "/*",
+        ` * ${prefix} — ESP-IDF HAL seam companion header (generated by Driverge).`,
+        " *",
+        ` * Declares ${name}_esp32_bind(), which ${name}_hal_esp32.c/.cpp defines.`,
+        " * Include this header from your application code to call it after bus/",
+        " * peripheral bring-up.",
+        " */",
+        `#ifndef ${guard}`,
+        `#define ${guard}`,
+        "",
+        "#ifdef __cplusplus",
+        'extern "C" {',
+        "#endif",
+        "",
+        includeLine,
+        "",
+        bindProtoLine,
+        "",
+        "#ifdef __cplusplus",
+        "}",
+        "#endif",
+        `#endif /* ${guard} */`,
+        "",
+    ].join("\n");
+    return { path: companionHeaderName(name), content };
+}
 function halImplI2c(name, prefix, language) {
     const content = [
         "/*",
         ` * ${prefix} — ESP-IDF (i2c_master) HAL seam implementation (generated by Driverge).`,
         " *",
         " * Drop this beside the portable core; it fills the thin-HAL seam with the",
-        " * ESP-IDF v5 i2c_master driver. In your app: create an I2C master bus with",
-        ` * i2c_new_master_bus() for your SDA/SCL pins, then call ${name}_esp32_bind()`,
-        " * once before using the driver. The driver core stays byte-for-byte portable.",
+        " * ESP-IDF v5 i2c_master driver. See the companion header",
+        ` * (${companionHeaderName(name)}) for the ${name}_esp32_bind() prototype —`,
+        " * call it once (after i2c_new_master_bus()) before using the driver. The",
+        " * driver core stays byte-for-byte portable.",
         " */",
         coreInclude(name, language),
+        `#include "${companionHeaderName(name)}"`,
         "#include <string.h>",
         '#include "driver/i2c_master.h"',
         '#include "freertos/FreeRTOS.h"',
@@ -66,7 +125,7 @@ function halImplI2c(name, prefix, language) {
         `    return i2c_master_bus_add_device(bus, &cfg, &s_${name}_dev);`,
         "}",
         "",
-        "int hal_i2c_write(uint8_t addr, uint8_t reg, uint8_t *data, uint16_t len) {",
+        `int ${name}_hal_i2c_write(uint8_t addr, uint8_t reg, uint8_t *data, uint16_t len) {`,
         "    uint8_t buf[33];",
         "    (void)addr; /* the device handle already encodes the bus address */",
         "    if ((size_t)len + 1u > sizeof buf) {",
@@ -77,17 +136,18 @@ function halImplI2c(name, prefix, language) {
         `    return i2c_master_transmit(s_${name}_dev, buf, (size_t)len + 1u, ${prefix}_I2C_TIMEOUT_MS);`,
         "}",
         "",
-        "int hal_i2c_read(uint8_t addr, uint8_t reg, uint8_t *data, uint16_t len) {",
+        `int ${name}_hal_i2c_read(uint8_t addr, uint8_t reg, uint8_t *data, uint16_t len) {`,
         "    (void)addr;",
         `    return i2c_master_transmit_receive(s_${name}_dev, &reg, 1, data, len, ${prefix}_I2C_TIMEOUT_MS);`,
         "}",
         "",
-        "void hal_delay_ms(uint32_t ms) {",
+        `void ${name}_hal_delay_ms(uint32_t ms) {`,
         "    vTaskDelay(pdMS_TO_TICKS(ms));",
         "}",
         "",
     ].join("\n");
-    return { path: seamPath(name, language), content };
+    const header = companionHeaderEsp32(name, prefix, '#include "driver/i2c_master.h"', `esp_err_t ${name}_esp32_bind(i2c_master_bus_handle_t bus, uint32_t scl_speed_hz);`);
+    return [header, { path: seamPath(name, language), content }];
 }
 function halImplSpi(name, prefix, language) {
     const content = [
@@ -95,13 +155,14 @@ function halImplSpi(name, prefix, language) {
         ` * ${prefix} — ESP-IDF (spi_master) HAL seam implementation (generated by Driverge).`,
         " *",
         " * Drop this beside the portable core; it fills the thin-HAL seam with the",
-        " * ESP-IDF v5 spi_master driver: one half-duplex, polling transaction per",
-        ` * hal_spi_transfer() call. In your app: bring up the SPI bus with`,
-        " * spi_bus_initialize() for your MOSI/MISO/SCLK pins, then call",
-        ` * ${name}_esp32_bind() once before using the driver. The driver core stays`,
-        " * byte-for-byte portable.",
+        " * ESP-IDF v5 spi_master driver: one full-duplex, polling transaction per",
+        ` * ${name}_hal_spi_transfer() call. See the companion header`,
+        ` * (${companionHeaderName(name)}) for the ${name}_esp32_bind() prototype —`,
+        " * call it once (after spi_bus_initialize()) before using the driver. The",
+        " * driver core stays byte-for-byte portable.",
         " */",
         coreInclude(name, language),
+        `#include "${companionHeaderName(name)}"`,
         "#include <string.h>",
         '#include "driver/spi_master.h"',
         '#include "freertos/FreeRTOS.h"',
@@ -114,7 +175,6 @@ function halImplSpi(name, prefix, language) {
         " * see fill_in_brief.hal_setup_todo for the SPI mode this part expects. */",
         `esp_err_t ${name}_esp32_bind(spi_host_device_t host, int cs_gpio, int clock_hz) {`,
         "    spi_device_interface_config_t cfg = {",
-        "        .flags = SPI_DEVICE_HALFDUPLEX,",
         "        .spics_io_num = cs_gpio,",
         "        .clock_speed_hz = clock_hz,",
         "        .mode = 0, /* see fill_in_brief.hal_setup_todo for this part's SPI mode */",
@@ -123,22 +183,24 @@ function halImplSpi(name, prefix, language) {
         `    return spi_bus_add_device(host, &cfg, &s_${name}_dev);`,
         "}",
         "",
-        "int hal_spi_transfer(const uint8_t *tx, uint16_t tx_len, uint8_t *rx, uint16_t rx_len) {",
+        "/* Full-duplex: ONE spi_transaction_t clocks tx out and rx in together — no",
+        " * half-duplex device flag needed; hardware CS works fine in full-duplex too. */",
+        `int ${name}_hal_spi_transfer(const uint8_t *tx, uint8_t *rx, uint16_t len) {`,
         "    spi_transaction_t t;",
         "    memset(&t, 0, sizeof t);",
-        "    t.length = 8 * tx_len;",
-        "    t.rxlength = 8 * rx_len;",
+        "    t.length = 8 * len;",
         "    t.tx_buffer = tx;",
         "    t.rx_buffer = rx;",
         `    return spi_device_polling_transmit(s_${name}_dev, &t);`,
         "}",
         "",
-        "void hal_delay_ms(uint32_t ms) {",
+        `void ${name}_hal_delay_ms(uint32_t ms) {`,
         "    vTaskDelay(pdMS_TO_TICKS(ms));",
         "}",
         "",
     ].join("\n");
-    return { path: seamPath(name, language), content };
+    const header = companionHeaderEsp32(name, prefix, '#include "driver/spi_master.h"', `esp_err_t ${name}_esp32_bind(spi_host_device_t host, int cs_gpio, int clock_hz);`);
+    return [header, { path: seamPath(name, language), content }];
 }
 function halImplUart(name, prefix, language) {
     const content = [
@@ -146,13 +208,14 @@ function halImplUart(name, prefix, language) {
         ` * ${prefix} — ESP-IDF (uart) HAL seam implementation (generated by Driverge).`,
         " *",
         " * Drop this beside the portable core; it fills the thin-HAL seam with the",
-        " * ESP-IDF v5 UART driver. In your app: configure and install the UART driver",
-        " * (uart_param_config + uart_driver_install) for your TX/RX pins, port, and",
-        ` * this part's baud rate, then call ${name}_esp32_bind() once before using the`,
-        " * driver. The driver core stays byte-for-byte portable. See",
+        " * ESP-IDF v5 UART driver. See the companion header",
+        ` * (${companionHeaderName(name)}) for the ${name}_esp32_bind() prototype —`,
+        " * call it once (after uart_param_config + uart_driver_install) before",
+        " * using the driver. The driver core stays byte-for-byte portable. See",
         " * fill_in_brief.hal_setup_todo for the baud rate/config to use.",
         " */",
         coreInclude(name, language),
+        `#include "${companionHeaderName(name)}"`,
         '#include "driver/uart.h"',
         '#include "freertos/FreeRTOS.h"',
         '#include "freertos/task.h"',
@@ -165,11 +228,11 @@ function halImplUart(name, prefix, language) {
         `    s_${name}_port = port;`,
         "}",
         "",
-        "void hal_uart_write(const uint8_t *data, uint16_t len) {",
+        `void ${name}_hal_uart_write(const uint8_t *data, uint16_t len) {`,
         `    uart_write_bytes(s_${name}_port, (const char *)data, len);`,
         "}",
         "",
-        "uint16_t hal_uart_read(uint8_t *data, uint16_t len, uint32_t timeout_ms) {",
+        `uint16_t ${name}_hal_uart_read(uint8_t *data, uint16_t len, uint32_t timeout_ms) {`,
         `    int n = uart_read_bytes(s_${name}_port, data, len, pdMS_TO_TICKS(timeout_ms));`,
         "    if (n < 0) {",
         "        return 0;",
@@ -177,12 +240,13 @@ function halImplUart(name, prefix, language) {
         "    return (uint16_t)n;",
         "}",
         "",
-        "void hal_delay_ms(uint32_t ms) {",
+        `void ${name}_hal_delay_ms(uint32_t ms) {`,
         "    vTaskDelay(pdMS_TO_TICKS(ms));",
         "}",
         "",
     ].join("\n");
-    return { path: seamPath(name, language), content };
+    const header = companionHeaderEsp32(name, prefix, '#include "driver/uart.h"', `void ${name}_esp32_bind(uart_port_t port);`);
+    return [header, { path: seamPath(name, language), content }];
 }
 function halImplCan(name, prefix, language) {
     const content = [
@@ -191,10 +255,10 @@ function halImplCan(name, prefix, language) {
         " *",
         " * Drop this beside the portable core; it fills the thin-HAL seam with the",
         " * ESP-IDF v5 TWAI (Two-Wire Automotive Interface — ESP-IDF's CAN 2.0",
-        " * controller) driver. In your app: install and start the TWAI driver",
-        " * (twai_driver_install + twai_start) for your TX/RX GPIOs and this part's",
-        ` * bitrate, then call ${name}_esp32_bind() once before using the driver.`,
-        " * The driver core stays byte-for-byte portable. See",
+        " * controller) driver. See the companion header",
+        ` * (${companionHeaderName(name)}) for the ${name}_esp32_bind() prototype —`,
+        " * call it once (after twai_driver_install()/twai_start()) before using the",
+        " * driver. The driver core stays byte-for-byte portable. See",
         " * fill_in_brief.hal_setup_todo for the bitrate/acceptance-filter config.",
         " *",
         ` * ${name}_esp32_bind() deliberately takes NO arguments: unlike I2C/SPI/UART`,
@@ -204,6 +268,7 @@ function halImplCan(name, prefix, language) {
         " * signature parity with the other targets' bind().",
         " */",
         coreInclude(name, language),
+        `#include "${companionHeaderName(name)}"`,
         "#include <string.h>",
         '#include "driver/twai.h"',
         '#include "freertos/FreeRTOS.h"',
@@ -214,7 +279,7 @@ function halImplCan(name, prefix, language) {
         `void ${name}_esp32_bind(void) {`,
         "}",
         "",
-        "int hal_can_transfer(uint32_t id, const uint8_t *tx, uint8_t tx_len, uint8_t *rx, uint8_t *rx_len, uint32_t timeout_ms) {",
+        `int ${name}_hal_can_transfer(uint32_t id, const uint8_t *tx, uint8_t tx_len, uint8_t *rx, uint8_t *rx_len, uint32_t timeout_ms) {`,
         "    twai_message_t tx_msg;",
         "    memset(&tx_msg, 0, sizeof tx_msg);",
         "    tx_msg.identifier = id;",
@@ -241,19 +306,23 @@ function halImplCan(name, prefix, language) {
         "    return 0;",
         "}",
         "",
-        "void hal_delay_ms(uint32_t ms) {",
+        `void ${name}_hal_delay_ms(uint32_t ms) {`,
         "    vTaskDelay(pdMS_TO_TICKS(ms));",
         "}",
         "",
     ].join("\n");
-    return { path: seamPath(name, language), content };
+    const header = companionHeaderEsp32(name, prefix, '#include "driver/twai.h"', `void ${name}_esp32_bind(void);`);
+    return [header, { path: seamPath(name, language), content }];
 }
 /**
- * Portable core + an ESP-IDF seam implementation for the same part. With
- * language "c" (default) the seam is `<slug>_hal_esp32.c`, unchanged from
- * before. With language "cpp" the seam becomes `<slug>_hal_esp32.cpp` and its
- * core include is `#include "<slug>.hpp"` (see coreInclude/seamPath above) —
- * everything else in the seam content is identical either way.
+ * Portable core + an ESP-IDF seam implementation + a seam companion header for
+ * the same part. With language "c" (default) the seam is `<slug>_hal_esp32.c`;
+ * with language "cpp" it is `<slug>_hal_esp32.cpp` and its core include is
+ * `#include "<slug>.hpp"` (see coreInclude/seamPath above) — everything else
+ * in the seam content is identical either way. The companion header
+ * (`<slug>_hal_esp32.h`) is always a plain `.h` file, in BOTH language runs.
+ * File order in the artifact: [core header, core source, companion header,
+ * seam source] — see tests/codegen/esp32.test.ts.
  */
 export function generateEsp32Driver(json, opts = {}) {
     const bus = json.protocol.bus;
@@ -264,22 +333,23 @@ export function generateEsp32Driver(json, opts = {}) {
     const prefix = prefixOf(json.metadata.part);
     const language = opts.language ?? "c";
     const base = language === "cpp" ? generatePortableCppDriver(json) : generatePortableDriver(json);
-    const hal = bus === "SPI"
+    const [companionHeader, hal] = bus === "SPI"
         ? halImplSpi(name, prefix, language)
         : bus === "UART"
             ? halImplUart(name, prefix, language)
             : bus === "CAN"
                 ? halImplCan(name, prefix, language)
                 : halImplI2c(name, prefix, language);
+    const headerName = companionHeaderName(name);
     const hal_setup_todo = bus === "SPI"
-        ? `Bring up the ESP-IDF SPI bus (spi_bus_initialize with your MOSI/MISO/SCLK pins and host), then call ${name}_esp32_bind(host, cs_gpio, clock_hz) before the first driver call. Confirm this part's SPI mode (0-3) and maximum clock speed from the datasheet's SPI timing section.`
+        ? `Bring up the ESP-IDF SPI bus (spi_bus_initialize with your MOSI/MISO/SCLK pins and host), then call ${name}_esp32_bind(host, cs_gpio, clock_hz) before the first driver call (prototype in ${headerName}). Confirm this part's SPI mode (0-3) and maximum clock speed from the datasheet's SPI timing section.`
         : bus === "UART"
-            ? `Install the ESP-IDF UART driver (uart_param_config + uart_driver_install) on your chosen port with this part's baud rate/parity/stop-bits (see the datasheet's serial interface section), then call ${name}_esp32_bind(port) before the first driver call.`
+            ? `Install the ESP-IDF UART driver (uart_param_config + uart_driver_install) on your chosen port with this part's baud rate/parity/stop-bits (see the datasheet's serial interface section), then call ${name}_esp32_bind(port) before the first driver call (prototype in ${headerName}).`
             : bus === "CAN"
-                ? `Install and start the ESP-IDF TWAI driver (twai_driver_install + twai_start) on your chosen TX/RX GPIOs with this part's bitrate and an acceptance filter covering its message IDs (see the datasheet's CAN bus timing/message-ID section), then call ${name}_esp32_bind() before the first driver call.`
-                : `Bring up the ESP-IDF I2C master bus (i2c_new_master_bus with your SDA/SCL GPIOs and port), then call ${name}_esp32_bind(bus, 400000) before the first driver call. Tune ${prefix}_I2C_TIMEOUT_MS if needed.`;
+                ? `Install and start the ESP-IDF TWAI driver (twai_driver_install + twai_start) on your chosen TX/RX GPIOs with this part's bitrate and an acceptance filter covering its message IDs (see the datasheet's CAN bus timing/message-ID section), then call ${name}_esp32_bind() before the first driver call (prototype in ${headerName}).`
+                : `Bring up the ESP-IDF I2C master bus (i2c_new_master_bus with your SDA/SCL GPIOs and port), then call ${name}_esp32_bind(bus, 400000) before the first driver call (prototype in ${headerName}). Tune ${prefix}_I2C_TIMEOUT_MS if needed.`;
     return {
-        files: [...base.files, hal],
+        files: [...base.files, companionHeader, hal],
         fill_in_brief: {
             ...base.fill_in_brief,
             hal_setup_todo,

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