dld-books 1.0.0

package/README.md

@@ -0,0 +1,79 @@
+# Digital Logic Design Books
+
+A community-driven JavaScript dataset of solved **Digital Logic Design** questions.
+
+This repository currently includes structured chapter-wise solutions from **Logic and Computer Design Fundamentals** in [`dld-books-solutions.js`](./dld-books-solutions.js).
+
+## Project Goals
+
+- Build a clean, structured collection of DLD solved problems.
+- Keep answers short, practical, and easy to search.
+- Expand coverage to more chapters and books over time.
+
+## Repository Structure
+
+- `dld-books-solutions.js`: Main dataset exported as JavaScript objects.
+- `package.json`: Project metadata.
+
+## Usage
+
+### 1. Clone the repository
+
+```bash
+git clone https://github.com/SENODROOM/Digital-Logic-Design-Books.git
+cd Digital-Logic-Design-Books
+```
+
+### 2. Import the data in JavaScript
+
+```js
+import { logic_and_computer_design_fundamental } from './dld-books-solutions.js';
+
+console.log(logic_and_computer_design_fundamental.Ch1[0]);
+```
+
+## Data Format
+
+Each question entry follows this structure:
+
+```js
+{
+  id: '1-1',
+  category: '...',
+  title: '...',
+  question: '...',
+  shortAnswer: '...'
+}
+```
+
+## Contributing
+
+Contributions are welcome and needed.
+
+If you want to help, you can:
+
+- Add new solved questions.
+- Improve correctness of existing answers.
+- Improve wording and formatting for readability.
+- Add solutions from additional DLD books.
+- Report mistakes through issues.
+
+### Contribution Steps
+
+1. Fork the repository.
+2. Create a branch: `git checkout -b feat/your-change`.
+3. Make your changes.
+4. Commit clearly: `git commit -m "Add ChX solved problems"`.
+5. Push and open a Pull Request.
+
+Please keep submissions consistent with the existing object structure and chapter grouping.
+
+## Issues
+
+Found an error or missing solution?
+
+Open an issue here: [GitHub Issues](https://github.com/SENODROOM/Digital-Logic-Design-Books/issues)
+
+## License
+
+ISC

package/dld-books-solutions.js

@@ -0,0 +1,503 @@
+export const logic_and_computer_design_fundamental = {
+    Ch1: [
+        {
+            id: '1-1',
+            category: 'Wind Sensor & Binary Conversion',
+            title: 'Wind Measurement System - Anemometer Signal Processing',
+            question: 'This problem concerns wind measurements made by the wireless weather station. The wind speed is to be measured with a rotating anemometer connected by a shaft to an enclosed disk that is one-half clear and one-half black. There is a light above and a photodiode below the disk. The photodiode produces a 3V signal when exposed to light and a 0V signal when not exposed. (a) Sketch the relative appearance of voltage waveforms if (1) the wind is calm, (2) when the wind is 10 mph, and (3) when the wind is 100 mph. (b) Explain what information the microcomputer must have and tasks it must perform to convert the voltage waveforms into binary numbers representing wind speed in miles per hour.',
+            shortAnswer: 'Wind speed creates frequency changes in voltage signal: Calm=DC, 10mph=low frequency, 100mph=high frequency. Microcomputer counts transitions, calculates frequency, applies calibration formula, converts to binary.',
+        },
+        {
+            id: '1-2',
+            category: 'Temperature Conversion',
+            title: 'Discrete Quantized Voltage & Binary Code for Temperatures',
+            question: 'Using the scheme in Example 1-1, find the discrete, quantized value of voltage and the binary code for each of the following Fahrenheit temperatures: -34, +31, +77, and +108.',
+            shortAnswer: '-34°F: 0.6V → 10 → 00001010₂ | +31°F: 7.1V → 121 → 01111001₂ | +77°F: 11.7V → 199 → 11000111₂ | +108°F: 14.8V → 252 → 11111100₂',
+        },
+        {
+            id: '1-3',
+            category: 'Number Systems',
+            title: 'Binary, Octal, and Hexadecimal Representation (16-31)',
+            question: 'List the binary, octal, and hexadecimal numbers from 16 to 31.',
+            shortAnswer: '16: 10000₂, 20₈, 10₁₆ through 31: 11111₂, 37₈, 1F₁₆',
+        },
+        {
+            id: '1-4',
+            category: 'Memory Bits',
+            title: 'Exact Number of Bits in Memory',
+            question: 'What is the exact number of bits in a memory that contains (a) 128K bits; (b) 32M bits?',
+            shortAnswer: '(a) 128K = 2¹⁷ = 131,072 bits | (b) 32M = 2²⁵ = 33,554,432 bits',
+        },
+        {
+            id: '1-5',
+            category: 'Memory Calculation',
+            title: 'Number of Bits in 1 Terabyte',
+            question: 'How many bits are in 1 TB?',
+            shortAnswer: '1 TB = 2⁴³ bits = 8,796,093,022,208 bits (≈8.8 trillion bits)',
+        },
+        {
+            id: '1-6',
+            category: 'Binary to Decimal',
+            title: 'Largest Binary Integer in N Bits',
+            question: 'What is the decimal equivalent of the largest binary integer that can be obtained with (a) 11 bits and (b) 25 bits?',
+            shortAnswer: '(a) 11 bits: 2¹¹ - 1 = 2,047 | (b) 25 bits: 2²⁵ - 1 = 33,554,431',
+        },
+        {
+            id: '1-7',
+            category: 'Binary to Decimal',
+            title: 'Convert Binary to Decimal',
+            question: 'Convert the following binary numbers to decimal: 1001101, 101001.101, and 10101110.1001.',
+            shortAnswer: '1001101₂ = 77₁₀ | 101001.101₂ = 41.625₁₀ | 10101110.1001₂ = 174.5625₁₀',
+        },
+        {
+            id: '1-8',
+            category: 'Decimal to Binary',
+            title: 'Convert Decimal to Binary',
+            question: 'Convert the following decimal numbers to binary: 187, 891, 2014, and 20486.',
+            shortAnswer: '187₁₀ = 10111011₂ | 891₁₀ = 1101111011₂ | 2014₁₀ = 11111011110₂ | 20486₁₀ = 100111111111110₂',
+        },
+        {
+            id: '1-9',
+            category: 'Base Conversion',
+            title: 'Complete Number System Conversion Table',
+            question: 'Convert numbers from given base to other three bases: Decimal 369.3125, Binary 101111101.101, Octal 326.5, Hexadecimal F3C7A',
+            shortAnswer: '369.3125₁₀ = 101110001.0101₂ = 561.24₈ = 171.5₁₆ | 101111101.101₂ = 381.625₁₀ = 575.5₈ = 17D.A₁₆ | 326.5₈ = 214.625₁₀ = 011010110.101₂ = D6.A₁₆ | F3C7A₁₆ = 998522₁₀ = 11110011110001111010₂ = 3636172₈',
+        },
+        {
+            id: '1-10',
+            category: 'Base Conversion',
+            title: 'Decimal to Other Bases Using Subtraction Method',
+            question: 'Convert: (a) 7562.45 to octal, (b) 1938.257 to hexadecimal, (c) 175.175 to binary.',
+            shortAnswer: '(a) 7562.45₁₀ = 16612.3463₈ | (b) 1938.257₁₀ = 792.41CA₁₆ | (c) 175.175₁₀ = 10101111.0010110₂',
+        },
+        {
+            id: '1-11',
+            category: 'Base Conversion',
+            title: 'Base 2 as Intermediate for Conversions',
+            question: 'Perform conversions using base 2 as intermediate: (a) (673.6)₈ to hex, (b) (E7C.B)₁₆ to octal, (c) (310.2)₄ to octal.',
+            shortAnswer: '(a) 673.6₈ → 110111011.110₂ → 1BB.C₁₆ | (b) E7C.B₁₆ → 111001111100.1011₂ → 7174.54₈ | (c) 310.2₄ → 110100.10₂ → 64.4₈',
+        },
+        {
+            id: '1-12',
+            category: 'Binary Arithmetic',
+            title: 'Binary Multiplication',
+            question: 'Perform: (a) 1010 × 1100, (b) 0110 × 1001, (c) 1111001 × 0110101.',
+            shortAnswer: '(a) 1010 × 1100 = 1111000₂ (120₁₀) | (b) 0110 × 1001 = 110110₂ (54₁₀) | (c) 1111001 × 0110101 = 1100011110101₂ (6413₁₀)',
+        },
+        {
+            id: '1-13',
+            category: 'Binary Division',
+            title: 'Binary Division with Quotient and Remainder',
+            question: 'Perform binary division 1010110 ÷ 101 to obtain quotient and remainder.',
+            shortAnswer: '1010110₂ ÷ 101₂ = 10001₂ remainder 1₂ | Verification: 86₁₀ ÷ 5₁₀ = 17 remainder 1',
+        },
+        {
+            id: '1-14',
+            category: 'Weighted Number Systems',
+            title: 'Base 12 System with Special Weights (Dozen/Gross)',
+            question: 'Base 12 system: 12³=great gross, 12²=gross, 12=dozen. (a) How many cans in 6 gross 5 dozen and 4? (b) Represent 7569₁₀ cans in base 12.',
+            shortAnswer: '(a) 6×144 + 5×12 + 4 = 928 cans | (b) 7569₁₀ = 4469₁₂',
+        },
+        {
+            id: '1-15',
+            category: 'Base 20 Number System',
+            title: 'Historical Base 20 System and Conversion',
+            question: 'Base 20 system: (a) Write digits 0-19, (b) Convert 2014₁₀ to base 20, (c) Convert (BC1)₂₀ to decimal.',
+            shortAnswer: '(a) 0-9, A-J | (b) 2014₁₀ = 50E₂₀ | (c) BC1₂₀ = 4641₁₀',
+        },
+        {
+            id: '1-16',
+            category: 'Radix Calculation',
+            title: 'Determining the Radix from Representations',
+            question: 'Determine radix r: (a) (BEE)ᵣ = (2699)₁₀, (b) (365)ᵣ = (194)₁₀.',
+            shortAnswer: '(a) r = 15 | (b) r = 7',
+        },
+        {
+            id: '1-17',
+            category: 'Custom Radix Problem',
+            title: 'Chicken Intelligence: Multi-Base Calculation',
+            question: 'If ((34)ᵣ + (24)ᵣ) × (21)ᵣ = (1480)ᵣ and r = total toes, how many toes per foot?',
+            shortAnswer: '3 toes per foot (r = 6 total toes)',
+        },
+        {
+            id: '1-18',
+            category: 'BCD Conversion',
+            title: 'Binary Representations of BCD Numbers',
+            question: 'Find binary for BCD: (a) 0100 1000 0110 0111, (b) 0011 0111 1000.0111 0101.',
+            shortAnswer: '(a) 4867₁₀ = 1001100000011₂ | (b) 378.75₁₀ = 101111010.11₂',
+        },
+        {
+            id: '1-19',
+            category: 'Decimal to BCD',
+            title: 'Represent Decimal Numbers in BCD',
+            question: 'Represent in BCD: 715 and 354.',
+            shortAnswer: '715₁₀ = 0111 0001 0101 BCD | 354₁₀ = 0011 0101 0100 BCD',
+        },
+        {
+            id: '1-20',
+            category: 'BCD to Binary Algorithm',
+            title: 'Convert BCD to Binary Using Shift Algorithm',
+            question: 'Execute algorithm for: (a) 0111 1000, (b) 0011 1001 0111.',
+            shortAnswer: '(a) 78₁₀ → 01001110₂ | (b) 397₁₀ → 110001101₂',
+        },
+        {
+            id: '1-21',
+            category: 'Binary to BCD Algorithm',
+            title: 'Convert Binary to BCD Using Shift-Left Algorithm',
+            question: 'Execute for: (a) 1111000, (b) 01110010111.',
+            shortAnswer: '(a) 120₁₀ → 0001 0010 0000 BCD | (b) 919₁₀ → 1001 0001 1001 BCD',
+        },
+        {
+            id: '1-22',
+            category: 'ASCII Encoding',
+            title: 'ASCII Case Conversion - Bit Manipulation',
+            question: 'What bit position must be complemented to change ASCII letter from uppercase to lowercase and vice versa?',
+            shortAnswer: 'Bit position 5 (2⁵ = 32). Toggle with XOR 0x20 or 00100000₂',
+        },
+        {
+            id: '1-23',
+            category: 'ASCII Parity',
+            title: 'ASCII Character Names with Parity Bits',
+            question: 'Write your full name in ASCII with (a) even parity and (b) odd parity in leftmost bit.',
+            shortAnswer: 'Add parity bit to make total 1s even (even parity) or odd (odd parity). Example: J=01001010 → 11001010 (even) or 01001010 (odd)',
+        },
+        {
+            id: '1-24',
+            category: 'ASCII Decoding',
+            title: 'Decode ASCII Binary Sequence',
+            question: 'Decode: 1000111 1101111 0100000 1000011 1100001 1110100 1110011 0100001',
+            shortAnswer: '"Go Cats!" (G=71, o=111, space=32, C=67, a=97, t=116, s=115, !=33)',
+        },
+        {
+            id: '1-25',
+            category: 'Number Representation',
+            title: 'Multiple Representations of Decimal 255',
+            question: 'Show 255 in: (a) binary, (b) BCD, (c) ASCII, (d) ASCII with odd parity.',
+            shortAnswer: '(a) 11111111₂ | (b) 0010 0101 0101 BCD | (c) 0110010 0110101 0110101 ASCII | (d) 00110010 10110101 10110101 ASCII-odd',
+        },
+        {
+            id: '1-26',
+            category: 'Unicode & Extended ASCII',
+            title: 'Encode International Names in Unicode',
+            question: 'Encode names using: (a) U+0040, (b) U+00A2, (c) U+20AC, (d) U+1F6B2.',
+            shortAnswer: '(a) @ | (b) ¢ | (c) € | (d) 🚲',
+        },
+        {
+            id: '1-27',
+            category: 'Gray Code',
+            title: 'Generate Gray Code Sequence with Parity',
+            question: 'List 7-bit Gray code for 32-47 with odd parity bit in rightmost position.',
+            shortAnswer: '32: 1100001, 33: 1100010, 34: 1100111, ... (Gray code ensures only 1 bit changes between consecutive numbers)',
+        },
+        {
+            id: '1-28',
+            category: 'Gray Code',
+            title: 'Find Hexadecimal Gray Code Value',
+            question: 'Using Section 1-7 procedure, find the hexadecimal Gray code.',
+            shortAnswer: 'Hex Gray: 0, 1, 3, 2, 6, 7, 5, 4, C, D, F, E, A, B, 9, 8',
+        },
+        {
+            id: '1-29',
+            category: 'Gray Code Application',
+            title: 'Wind Direction Encoding with Gray Code',
+            question: 'Wind direction disk encoder with 000=N. List Gray codes for S, E, W, NW, NE, SE, SW. Why is Gray better than binary?',
+            shortAnswer: 'N=000, NE=001, E=011, SE=010, S=110, SW=111, W=101, NW=100. Gray prevents large errors: only 1 bit changes per step.',
+        },
+        {
+            id: '1-30',
+            category: 'Power Analysis',
+            title: 'Power Consumption: Binary vs Gray Code Counter',
+            question: 'What percentage of power does Gray code counter consume vs binary counter for continuous counting?',
+            shortAnswer: 'Gray ≈ (1 + 1/2ⁿ) × 100% of binary. For n=8: 100.4%. Gray uses slightly more power but reduces errors.',
+        },
+    ],
+    Ch2: [
+        {
+            id: '2-1',
+            category: 'Truth Tables & Boolean Identities',
+            title: 'Demonstrate by Truth Tables',
+            question: '(a) DeMorgan\'s theorem for three variables: (XYZ)\' = X\' + Y\' + Z\' | (b) The second distributive law: X + YZ = (X + Y)(X + Z) | (c) XY\' + Y\'Z + XZ\' = XY\' + Y\'Z + X\'Z',
+            shortAnswer: '(a) Both sides equal for all 8 combinations | (b) Both sides produce identical truth tables | (c) Both expressions have same truth table output',
+        },
+        {
+            id: '2-2',
+            category: 'Algebraic Manipulation',
+            title: 'Prove Boolean Identities Algebraically',
+            question: '(a) X\'Y\' + X\'Y + XY = X\' + Y | (b) A\'B + B\'C\' + AB + B\'C = 1 | (c) Y + X\'Z + XY\' = X + Y + Z | (d) X\'Y\' + Y\'Z + XZ + XY + YZ\' = X\'Y\' + XZ + YZ\'',
+            shortAnswer: '(a) X\'(Y\'+Y) + XY = X\' + XY = X\' + Y | (b) B\'(C\'+C) + B(A\'+A) = B\' + B = 1 | (c) Y(1+X\') + X\'Z = Y + X\' + Z = X + Y + Z | (d) Consensus theorem application',
+        },
+        {
+            id: '2-3',
+            category: 'Algebraic Manipulation',
+            title: 'Prove Boolean Identities (Advanced)',
+            question: '(a) AB\'C\' + BC\'D\' + BC + C\'D = B + C\'D | (b) WY + W\'YZ\' + WXZ + W\'XY\' = WY + W\'XZ\' + XY\'Z\' + XY\'Z | (c) AD\' + A\'B + C\'D + B\'C = (A\'+B\'+C\'+D\')(A+B+C+D)',
+            shortAnswer: '(a) BC(1+D\') + AB\'C\' + C\'D = BC + C\'(AB\'+D) = B + C\'D | (b) Consensus and absorption theorems | (c) Dual relationship proof',
+        },
+        {
+            id: '2-4',
+            category: 'Conditional Proof',
+            title: 'Prove Given A·B=0 and A+B=1',
+            question: 'Given that A·B = 0 and A+B = 1, use algebraic manipulation to prove that (A+C)(A\'+B)(B+C) = B·C',
+            shortAnswer: 'Since A·B=0 and A+B=1, A and B are complements (B=A\'). Substituting: (A+C)(A\'+A\')(A\'+C) = (A+C)(0)(A\'+C) = ... Wait, let me redo: (A+C)(A\'+B)(B+C) with B=A\' gives (A+C)(A\'+A\')(A\'+C) = (A+C)(1)(A\'+C) = AA\' + AC + A\'C + CC = 0 + C(A+A\') + C = C = B\'C since B=A\'',
+        },
+        {
+            id: '2-5',
+            category: 'Boolean Algebra with Binary Strings',
+            title: 'Four-Bit Nibble Boolean Algebra',
+            question: 'Define for 4-bit nibbles (16 elements): (a) OR operation A+B | (b) AND operation A·B | (c) Element 0 | (d) Element 1 | (e) Complement A\'',
+            shortAnswer: '(a) Bitwise OR: 1010 + 1100 = 1110 | (b) Bitwise AND: 1010 · 1100 = 1000 | (c) 0000 | (d) 1111 | (e) Bitwise NOT: (1010)\' = 0101',
+        },
+        {
+            id: '2-6',
+            category: 'Expression Simplification',
+            title: 'Simplify to Minimum Literals',
+            question: '(a) A\'C\' + A\'BC + B\'C | (b) (A\'+B\'+C\')·A\'B\'C\' | (c) ABC\' + AC | (d) A\'BD + A\'CD\' + BD | (e) (A+B)(A+C)(AB\'C\')',
+            shortAnswer: '(a) A\'C\' + B\'C | (b) A\'B\'C\' | (c) AC | (d) BD + A\'CD\' | (e) AB\'C\'',
+        },
+        {
+            id: '2-7',
+            category: 'Literal Reduction',
+            title: 'Reduce to Indicated Literals',
+            question: '(a) X\'Y + XYZ + X\'Y to three literals | (b) X + Y(Z + X\' + Z\') to two literals | (c) W\'X(Z\' + Y\'Z) + X(W + W\'YZ) to one literal | (d) (AB+A\'B\')(C\'D\'+CD)+A\'C to four literals',
+            shortAnswer: '(a) Y(X\'+XZ+X\') = Y(X\'+XZ) = X\'Y + XYZ = Y(X\'+XZ) → X\'Y + YZ = Y(X\'+Z) | (b) X + Y(1) = X + Y | (c) X | (d) A\'B\' + AB + A\'C',
+        },
+        {
+            id: '2-8',
+            category: 'DeMorgan\'s Theorem',
+            title: 'Express Using Only Specified Operations',
+            question: 'F = AB\'C + A\'C\' + AB. Express: (a) with only OR and complement | (b) with only AND and complement | (c) with only NAND and complement',
+            shortAnswer: '(a) (A\'+B+C\')\'(A+C)\'(A\'+B\')\' using DeMorgan then OR | (b) Double complement of OR form | (c) NAND is universal, implement using NAND gates only',
+        },
+        {
+            id: '2-9',
+            category: 'Complement Finding',
+            title: 'Find the Complement of Expressions',
+            question: '(a) AB\' + A\'B | (b) (V\'W + X)Y + Z\' | (c) WX(Y\'Z + YZ\') + W\'X(Y\'+Z)(Y+Z\') | (d) (A+B\'+C)(A\'B\'+C)(A+B\'C\')',
+            shortAnswer: '(a) (A\'+B)(A+B\') = A\'B\' + AB | (b) ((V+W\')X\'+Y\')Z | (c) Apply DeMorgan\'s systematically | (d) A\'BC\' + AB + A\'BC',
+        },
+        {
+            id: '2-10',
+            category: 'Truth Tables & Standard Forms',
+            title: 'Truth Table to Minterms and Maxterms',
+            question: 'Obtain truth table and express in sum-of-minterms and product-of-maxterms: (a) (XY+Z)(Y+XZ) | (b) (A\'+B)(B\'+C) | (c) WXY\' + WX\'Z\' + WXZ + YZ\'',
+            shortAnswer: '(a) Build truth table, identify where F=1 for minterms, F=0 for maxterms | (b) Expand and identify minterms/maxterms | (c) 4-variable truth table analysis',
+        },
+        {
+            id: '2-11',
+            category: 'Truth Table Analysis',
+            title: 'Analyze Functions E and F from Truth Table',
+            question: 'Given truth table with X,Y,Z inputs and E,F outputs: (a) List minterms and maxterms of each | (b) List minterms of E\' and F\' | (c) List minterms of E+F and E·F | (d) Express in sum-of-minterms | (e) Simplify to minimum literals',
+            shortAnswer: 'E = Σm(1,2,4,6), F = Σm(0,2,4,7) | E\' = Σm(0,3,5,7), F\' = Σm(1,3,5,6) | E+F = Σm(0,1,2,4,6,7), E·F = Σm(2,4) | E = X\'Y\'Z + X\'YZ\' + XY\'Z\' + XYZ\', F = ... | Simplify using K-maps',
+        },
+        {
+            id: '2-12',
+            category: 'SOP and POS Conversion',
+            title: 'Convert to Sum-of-Products and Product-of-Sums',
+            question: '(a) (AB+C)(B+C\'D) | (b) X\' + X(X\'+Y\')(Y+Z\') | (c) (A+BC\'+CD)(B\'+EF)',
+            shortAnswer: '(a) SOP: AB + BC\'D + CB + CC\'D = AB + BC\'D + BC | POS: Keep factored form | (b) SOP: X\' + XY\'Z\' | (c) Expand using distributive law',
+        },
+        {
+            id: '2-13',
+            category: 'Logic Diagrams',
+            title: 'Draw Logic Diagrams (No Complements Available)',
+            question: 'Draw logic diagrams (complements NOT available): (a) A\'B\'C\' + AB + AC | (b) X(YZ\'+Y\'Z) + W\'(Y\'+X\'Z) | (c) AC(B\'+D) + A\'C(B\'+D\') + BC(A\'+D\')',
+            shortAnswer: '(a) Need inverters for A\',B\',C\', then AND-OR structure | (b) Complex multi-level with XOR-like structures | (c) Multi-level with multiple AND-OR stages',
+        },
+        {
+            id: '2-14',
+            category: '3-Variable K-Map Optimization',
+            title: 'Optimize Using 3-Variable K-Map',
+            question: '(a) F(X,Y,Z) = Σm(2,3,4,7) | (b) F(X,Y,Z) = Σm(0,4,5,6) | (c) F(A,B,C) = Σm(0,2,4,6,7) | (d) F(A,B,C) = Σm(0,1,3,4,6,7)',
+            shortAnswer: '(a) X\'Y + YZ | (b) X\'Y\'Z\' + XY\' + XZ\' | (c) C\' + AB | (d) A\'B\' + C\' + AB',
+        },
+        {
+            id: '2-15',
+            category: '3-Variable K-Map Optimization',
+            title: 'Optimize Boolean Expressions Using K-Map',
+            question: '(a) X\'Z\' + YZ\' + XYZ | (b) A\'B + B\'C + A\'B\'C\' | (c) A\'B\' + AC\' + B\'C + AB\'C\'',
+            shortAnswer: '(a) Z\'(X\'+Y) + XYZ = X\'Z\' + YZ\' + XYZ → Group: Z\'(X\'+Y) + XYZ | (b) A\'B + B\'C + A\'C\' | (c) B\' + AC\'',
+        },
+        {
+            id: '2-16',
+            category: '4-Variable K-Map Optimization',
+            title: 'Optimize Using 4-Variable K-Map',
+            question: '(a) F(A,B,C,D) = Σm(0,2,4,5,8,10,11,15) | (b) F(A,B,C,D) = Σm(0,1,2,4,5,6,10,11) | (c) F(W,X,Y,Z) = Σm(0,2,4,7,8,10,12,13)',
+            shortAnswer: '(a) B\'D\' + A\'BD\' + AB\'C + ACD | (b) C\'D\' + B\'D\' + A\'C\' + A\'BD\' | (c) Z\'Y\' + W\'XZ\' + WXY\' + WXZ',
+        },
+        {
+            id: '2-17',
+            category: '4-Variable K-Map Optimization',
+            title: 'Optimize Boolean Functions Using K-Map',
+            question: '(a) F(W,X,Y,Z) = Σm(0,1,2,4,7,8,10,12) | (b) F(A,B,C,D) = Σm(1,4,5,6,10,11,12,13,15)',
+            shortAnswer: '(a) Y\'Z\' + W\'X\'Z\' + W\'XZ + XYZ | (b) A\'C\'D + BC\' + ABD + AB\'C',
+        },
+        {
+            id: '2-18',
+            category: 'Minterms from K-Map',
+            title: 'Find Minterms by Plotting on K-Map',
+            question: '(a) XY + XZ + X\'YZ | (b) XZ + W\'XY\' + WXY + W\'YZ + WY\'Z | (c) B\'D\' + ABD + A\'BC\'',
+            shortAnswer: '(a) Plot each term, identify all 1s: Σm(3,5,6,7) for 3 vars | (b) 4-variable: Σm(5,7,10,11,12,13,14,15) | (c) Σm(0,2,8,10,11,13,15)',
+        },
+        {
+            id: '2-19',
+            category: 'Prime Implicants',
+            title: 'Find All Prime Implicants and Essential Ones',
+            question: '(a) F(W,X,Y,Z) = Σm(0,2,5,7,8,10,12,13,14,15) | (b) F(A,B,C,D) = Σm(0,2,3,5,7,8,10,11,14,15) | (c) F(A,B,C,D) = Σm(1,3,4,5,9,10,11,12,13,14,15)',
+            shortAnswer: '(a) Prime: W\'XZ, WXZ\', W\'Y\'Z\', XY, XZ. Essential: W\'Y\'Z\', W\'XZ | (b) Find all groups of 1s, identify essential | (c) Systematic PI determination',
+        },
+        {
+            id: '2-20',
+            category: 'Prime Implicant Selection',
+            title: 'Optimize Using Prime Implicant Selection Rule',
+            question: '(a) F(A,B,C,D) = Σm(1,5,6,7,11,12,13,15) | (b) F(W,X,Y,Z) = Σm(0,1,2,3,4,5,10,11,13,15) | (c) F(W,X,Y,Z) = Σm(0,1,2,5,7,8,10,12,14,15)',
+            shortAnswer: '(a) Find all PIs, select essential, cover remaining with minimal PIs | (b) Systematic selection | (c) Petrick\'s method if needed',
+        },
+        {
+            id: '2-21',
+            category: 'Product-of-Sums Optimization',
+            title: 'Optimize in Product-of-Sums Form',
+            question: '(a) F(W,X,Y,Z) = Σm(0,1,2,8,10,12,14,15) | (b) F(A,B,C,D) = ΠM(0,2,6,7,8,9,10,12,14,15)',
+            shortAnswer: '(a) Find POS by grouping 0s: (W\'+X)(X\'+Z)(Y\'+Z\')(W+Y) | (b) Convert maxterms to POS form, group 0s',
+        },
+        {
+            id: '2-22',
+            category: 'SOP and POS Optimization',
+            title: 'Optimize in Both SOP and POS Forms',
+            question: '(a) AC\' + B\'D + A\'CD + AB\'CD | (b) (A\'+B\'+D\')(A+B\'+C\')(A\'+B+D\')(B+C\'+D\') | (c) (A\'+B\'+D)(A\'+D\')(A+B+D\')(A+B\'+C+D)',
+            shortAnswer: '(a) SOP: AC\' + B\'D + A\'CD, POS: (A+B\'+D)(A\'+C\'+D)(A\'+B\'+C) | (b) Expand and simplify | (c) Group terms',
+        },
+        {
+            id: '2-23',
+            category: 'SOP and POS Forms',
+            title: 'Optimize to SOP and POS',
+            question: '(a) F(A,B,C,D) = Σm(2,3,5,7,8,10,12,13) | (b) F(W,X,Y,Z) = ΠM(5,12,13,14)',
+            shortAnswer: '(a) SOP: C\'D + AB\'C\' + A\'BD, POS: (A+B+C)(A\'+C\'+D)(B\'+C+D\') | (b) SOP from maxterms complement',
+        },
+        {
+            id: '2-24',
+            category: 'Don\'t Care Conditions',
+            title: 'Optimize with Don\'t Care Conditions',
+            question: '(a) F(A,B,C) = Σm(2,4,7), d(A,B,C) = Σm(0,1,5,6) | (b) F(A,B,C,D) = Σm(2,5,6,13,15), d = Σm(0,4,8,10,11) | (c) F(W,X,Y,Z) = Σm(1,2,4,10,13), d = Σm(5,7,11,14)',
+            shortAnswer: '(a) Use d to expand groups: F = C + A\'B\' | (b) Treat d as 1s where helpful | (c) Optimal grouping with don\'t cares',
+        },
+        {
+            id: '2-25',
+            category: 'Prime Implicants with Don\'t Cares',
+            title: 'Find PIs and Essential PIs with Don\'t Cares',
+            question: '(a) F(A,B,C) = Σm(3,5,6), d(A,B,C) = Σm(0,7) | (b) [Additional problems with don\'t cares]',
+            shortAnswer: '(a) Include d in PI detection but not in coverage requirement | Essential PIs cover only minterms, not don\'t cares',
+        },
+        {
+            id: '2-26',
+            category: 'SOP and POS with Don\'t Cares',
+            title: 'Optimize in SOP and POS with Don\'t Care Conditions',
+            question: '(a) F(W,X,Y,Z) = Σm(5,6,11,12), d(W,X,Y,Z) = Σm(0,1,2,9,10,14,15) | (b) F(A,B,C,D) = ΠM(3,4,6,11,12,14), d(A,B,C,D) = Σm(0,1,2,7,8,9,10)',
+            shortAnswer: '(a) SOP: W\'X\' + XY\' + WX\'Y, POS: (W+X)(W\'+X\'+Y\')(W\'+X+Y) | (b) Use d to simplify both SOP and POS forms',
+        },
+        {
+            id: '2-27',
+            category: 'XOR Properties',
+            title: 'Prove Dual of XOR is its Complement',
+            question: 'Prove that the dual of the exclusive-OR is also its complement.',
+            shortAnswer: 'XOR: A⊕B = AB\' + A\'B. Dual: (A+B\')(A\'+B) = AA\' + AB + A\'B\' + B\'B = AB + A\'B\' = (A⊕B)\'. The dual equals the complement.',
+        },
+        {
+            id: '2-28',
+            category: 'Gate Implementation',
+            title: 'Implement with XOR and AND Gates (Minimum Inputs)',
+            question: 'Implement F(A,B,C,D) = ABC\'D + AD\' + A\'D using exclusive-OR and AND gates with minimum gate inputs.',
+            shortAnswer: 'F = A(BCD\' + D\') + A\'D = A(B+D\') + A\'D. Use XOR for A⊕D = AD\' + A\'D, AND gates for remaining terms. Total: 2 XOR, 2 AND, 8 inputs.',
+        },
+        {
+            id: '2-29',
+            category: 'Propagation Delay',
+            title: 'Calculate Longest Path Propagation Delay',
+            question: 'NOR gates have t_pd = 0.073 ns, inverter has t_pd = 0.048 ns. Find propagation delay of longest path through the circuit (Figure 2-39).',
+            shortAnswer: 'Longest path has 3 NOR gates + 1 inverter = 3(0.073) + 0.048 = 0.219 + 0.048 = 0.267 ns',
+        },
+        {
+            id: '2-30',
+            category: 'Inverter Waveform Analysis',
+            title: 'Inverter Output with Different Delay Models',
+            question: 'Waveform in Figure 2-40 applied to inverter. Find output: (a) no delay, (b) transport delay 0.06 ns, (c) inertial delay 0.06 ns with rejection time 0.04 ns.',
+            shortAnswer: '(a) Immediate inversion | (b) Output shifted by 0.06 ns | (c) Pulses < 0.04 ns rejected, output delayed by 0.06 ns',
+        },
+        {
+            id: '2-31',
+            category: 'Gate Delay Analysis',
+            title: 'Find Delay from Each Input to Output',
+            question: 'In Figure 2-41: (a) Find t_PHL and t_PLH for each path with t_PHL=0.20ns, t_PLH=0.36ns per gate | (b) Using t_pd=0.28ns per gate | (c) Compare and discuss differences.',
+            shortAnswer: '(a) Calculate for each path through gates | (b) Simpler calculation with average | (c) Average method approximates asymmetric delays',
+        },
+        {
+            id: '2-32',
+            category: 'Inertial Delay',
+            title: 'Rejection Time Condition for Inertial Delays',
+            question: 'Why must rejection time for inertial delays be ≤ propagation delay to determine delayed output?',
+            shortAnswer: 'If rejection time > propagation delay, valid transitions could be filtered out. The condition ensures only glitches shorter than the gate\'s response time are rejected.',
+        },
+        {
+            id: '2-33',
+            category: 'Inertial Delay Model',
+            title: 'Develop Inertial Delay Model from Gate Parameters',
+            question: 'Given t_PHL=0.05ns, t_PLH=0.10ns. (a) For positive pulse (LHL), find propagation delay and rejection time | (b) Discuss applicability for negative pulse (HLH).',
+            shortAnswer: '(a) t_pd = (0.05+0.10)/2 = 0.075ns, rejection time typically = min(t_PHL,t_PLH) = 0.05ns | (b) Asymmetric delays affect pulse width differently',
+        },
+        {
+            id: '2-34',
+            category: 'VHDL Structural Description',
+            title: 'Logic Diagram from VHDL Structural Description',
+            question: 'Find logic diagram corresponding to VHDL structural description in Figure 2-42. Complemented inputs not available.',
+            shortAnswer: 'Analyze VHDL code: NOT gates for complements, AND gates for products, OR gate for final sum. Draw equivalent gate-level diagram with inverters.',
+        },
+        {
+            id: '2-35',
+            category: 'VHDL Structural Description',
+            title: 'Write Structural VHDL for Circuit',
+            question: 'Using Figure 2-28 framework, write structural VHDL for circuit in Figure 2-43. Replace X,Y,Z with X(2:0). Consult func_prims package.',
+            shortAnswer: 'Define entity with X input vector, instantiate NAND gates from func_prims, connect signals according to Figure 2-43 logic diagram.',
+        },
+        {
+            id: '2-36',
+            category: 'VHDL Structural Description',
+            title: 'Structural VHDL for Circuit in Figure 2-44',
+            question: 'Write structural VHDL description for circuit in Figure 2-44 using func_prims package. Compile and simulate for all 16 input combinations.',
+            shortAnswer: 'Identify gate types in Figure 2-44, declare component instances, map ports to signals, verify with testbench covering all 4-input combinations.',
+        },
+        {
+            id: '2-37',
+            category: 'VHDL Dataflow to Logic',
+            title: 'Minimum Two-Level Logic from VHDL Dataflow',
+            question: 'Find logic diagram representing minimum two-level logic for VHDL dataflow in Figure 2-45. Complemented inputs available.',
+            shortAnswer: 'Analyze dataflow VHDL: f <= b and (a or (a_n and c)) or (b_n and c and d_n). Simplify Boolean expression, implement with AND-OR two-level logic.',
+        },
+        {
+            id: '2-38',
+            category: 'VHDL Dataflow Description',
+            title: 'Dataflow VHDL for Circuit in Figure 2-43',
+            question: 'Write dataflow VHDL description for circuit in Figure 2-43 using Boolean equation for output F.',
+            shortAnswer: 'Derive F from Figure 2-43 gate connections. Write concurrent signal assignments: F <= (X and Y) nand (Y nand Z) etc., using dataflow style.',
+        },
+        {
+            id: '2-39',
+            category: 'Verilog Structural Description',
+            title: 'Logic Diagram from Verilog Structural Description',
+            question: 'Find logic diagram corresponding to Verilog structural description in Figure 2-46. Complemented inputs not available.',
+            shortAnswer: 'Parse Verilog module: NOT gates (g0,g1), AND gates (g2-g5), OR gate (g6). Draw diagram showing x1-x4 inputs, intermediate signals n1-n6, output f.',
+        },
+        {
+            id: '2-40',
+            category: 'Verilog Structural Description',
+            title: 'Structural Verilog for Circuit in Figure 2-44',
+            question: 'Using Figure 2-33 framework, write structural Verilog for circuit in Figure 2-44. Compile and simulate for all 16 input combinations.',
+            shortAnswer: 'Define module with 4 inputs, declare wire signals, instantiate NOT, AND, OR gates using gate primitives, connect according to Figure 2-44.',
+        },
+        {
+            id: '2-41',
+            category: 'Verilog Structural Description',
+            title: 'Structural Verilog for Circuit in Figure 2-43',
+            question: 'Using Figure 2-46 framework, write structural Verilog for circuit in Figure 2-43. Replace X,Y,Z with input [2:0] X.',
+            shortAnswer: 'Module with input [2:0] X, output F. Instantiate NAND gates: nand g1(n1, X[2], X[1]), etc. Connect intermediate signals to final output F.',
+        },
+    ]
+}

package/package.json

@@ -0,0 +1,20 @@
+{
+  "name": "dld-books",
+  "version": "1.0.0",
+  "description": "A community-driven JavaScript dataset of solved Digital Logic Design questions",
+  "main": "dld-books-solutions.js",
+  "scripts": {
+    "test": "echo \"Error: no test specified\" && exit 1"
+  },
+  "repository": {
+    "type": "git",
+    "url": "git+https://github.com/SENODROOM/Digital-Logic-Design-Books.git"
+  },
+  "keywords": [],
+  "author": "",
+  "license": "ISC",
+  "bugs": {
+    "url": "https://github.com/SENODROOM/Digital-Logic-Design-Books/issues"
+  },
+  "homepage": "https://github.com/SENODROOM/Digital-Logic-Design-Books#readme"
+}