circuit-json 0.0.531 → 0.0.532

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
package/README.md CHANGED
@@ -42,7 +42,6 @@ https://github.com/user-attachments/assets/2f28b7ba-689e-4d80-85b2-5bdef84b41f8
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  <!-- toc:start -->
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44
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  - [Circuit JSON Specification `circuit-json`](#circuit-json-specification-circuit-json)
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-
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  - [Things You Can Do With Circuit JSON](#things-you-can-do-with-circuit-json)
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  - [Typescript Usage](#typescript-usage)
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@@ -79,6 +78,7 @@ https://github.com/user-attachments/assets/2f28b7ba-689e-4d80-85b2-5bdef84b41f8
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  - [SourceProjectMetadata](#sourceprojectmetadata)
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  - [SourcePropertyIgnoredWarning](#sourcepropertyignoredwarning)
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  - [SourceRefdesConventionWarning](#sourcerefdesconventionwarning)
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+ - [SourceRuntimeError](#sourceruntimeerror)
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  - [SourceSimpleAmmeter](#sourcesimpleammeter)
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  - [SourceSimpleBattery](#sourcesimplebattery)
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  - [SourceSimpleCapacitor](#sourcesimplecapacitor)
@@ -113,19 +113,20 @@ https://github.com/user-attachments/assets/2f28b7ba-689e-4d80-85b2-5bdef84b41f8
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  - [UnknownErrorFindingPart](#unknownerrorfindingpart)
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  - [CAD Components](#cad-components)
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  - [CadCable](#cadcable)
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+ - [CadCollisionError](#cadcollisionerror)
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  - [CadComponent](#cadcomponent)
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  - [CadReferenceSurface](#cadreferencesurface)
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  - [PCB Elements](#pcb-elements)
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- - [PcbFabricatorExtraChargeWarning](#pcbfabricatorextrachargewarning)
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  - [PcbAutoroutingError](#pcbautoroutingerror)
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  - [PcbBend](#pcbbend)
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  - [PcbBoard](#pcbboard)
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  - [PcbBreakoutPoint](#pcbbreakoutpoint)
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+ - [PcbBusLengthSkewError](#pcbbuslengthskewerror)
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  - [PcbBusRoutingConstraintError](#pcbbusroutingconstrainterror)
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  - [PcbBusRoutingConstraintWarning](#pcbbusroutingconstraintwarning)
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- - [PcbBusLengthSkewError](#pcbbuslengthskewerror)
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  - [PcbComponent](#pcbcomponent)
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128
  - [PcbComponentInvalidLayerError](#pcbcomponentinvalidlayererror)
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+ - [PcbComponentMissingCourtyardWarning](#pcbcomponentmissingcourtyardwarning)
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  - [PcbComponentNotOnBoardEdgeError](#pcbcomponentnotonboardedgeerror)
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  - [PcbComponentOutsideBoardError](#pcbcomponentoutsideboarderror)
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132
  - [PcbConnectorNotInAccessibleOrientationWarning](#pcbconnectornotinaccessibleorientationwarning)
@@ -143,6 +144,7 @@ https://github.com/user-attachments/assets/2f28b7ba-689e-4d80-85b2-5bdef84b41f8
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  - [PcbFabricationNotePath](#pcbfabricationnotepath)
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  - [PcbFabricationNoteRect](#pcbfabricationnoterect)
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  - [PcbFabricationNoteText](#pcbfabricationnotetext)
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+ - [PcbFabricatorExtraChargeWarning](#pcbfabricatorextrachargewarning)
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  - [PcbFootprintOverlapError](#pcbfootprintoverlaperror)
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  - [PcbGroundPlane](#pcbgroundplane)
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  - [PcbGroundPlaneRegion](#pcbgroundplaneregion)
@@ -163,6 +165,7 @@ https://github.com/user-attachments/assets/2f28b7ba-689e-4d80-85b2-5bdef84b41f8
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  - [PcbPadTraceClearanceError](#pcbpadtraceclearanceerror)
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  - [PcbPanel](#pcbpanel)
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  - [PcbPanelizationPlacementError](#pcbpanelizationplacementerror)
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+ - [PcbPin1Location](#pcbpin1location)
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  - [PcbPlacementError](#pcbplacementerror)
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  - [PcbPlatedHole](#pcbplatedhole)
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  - [PcbPort](#pcbport)
@@ -178,6 +181,7 @@ https://github.com/user-attachments/assets/2f28b7ba-689e-4d80-85b2-5bdef84b41f8
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  - [PcbSilkscreenPill](#pcbsilkscreenpill)
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  - [PcbSilkscreenRect](#pcbsilkscreenrect)
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  - [PcbSilkscreenText](#pcbsilkscreentext)
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+ - [PcbSoldermaskOpening](#pcbsoldermaskopening)
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  - [PcbSolderPaste](#pcbsolderpaste)
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  - [PcbStackup](#pcbstackup)
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  - [PcbStiffener](#pcbstiffener)
@@ -187,10 +191,10 @@ https://github.com/user-attachments/assets/2f28b7ba-689e-4d80-85b2-5bdef84b41f8
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  - [PcbTraceError](#pcbtraceerror)
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  - [PcbTraceHint](#pcbtracehint)
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  - [PcbTraceMissingError](#pcbtracemissingerror)
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+ - [PcbTraceStyleWarning](#pcbtracestylewarning)
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  - [PcbTraceTooLongError](#pcbtracetoolongerror)
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  - [PcbTraceTooLongWarning](#pcbtracetoolongwarning)
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  - [PcbTraceTooManyViasWarning](#pcbtracetoomanyviaswarning)
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- - [PcbTraceStyleWarning](#pcbtracestylewarning)
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  - [PcbTraceWarning](#pcbtracewarning)
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  - [PcbVia](#pcbvia)
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  - [PcbViaClearanceError](#pcbviaclearanceerror)
@@ -216,15 +220,15 @@ https://github.com/user-attachments/assets/2f28b7ba-689e-4d80-85b2-5bdef84b41f8
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  - [SchematicPort](#schematicport)
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  - [SchematicRect](#schematicrect)
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  - [SchematicSheet](#schematicsheet)
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+ - [SchematicSheetStylingWarning](#schematicsheetstylingwarning)
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  - [SchematicSymbol](#schematicsymbol)
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  - [SchematicTable](#schematictable)
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  - [SchematicTableCell](#schematictablecell)
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  - [SchematicText](#schematictext)
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+ - [SchematicTextPart](#schematictextpart)
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  - [SchematicTrace](#schematictrace)
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  - [SchematicVoltageProbe](#schematicvoltageprobe)
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  - [Simulation Elements](#simulation-elements)
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- - [SimulationReturnCurrentContact](#simulationreturncurrentcontact)
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- - [SimulationReturnCurrentGridJson](#simulationreturncurrentgridjson)
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  - [SimulationAcSweepCurrentGraph](#simulationacsweepcurrentgraph)
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  - [SimulationAcSweepVoltageGraph](#simulationacsweepvoltagegraph)
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  - [SimulationAnalysisResult](#simulationanalysisresult)
@@ -244,7 +248,9 @@ https://github.com/user-attachments/assets/2f28b7ba-689e-4d80-85b2-5bdef84b41f8
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  - [SimulationPcbReturnCurrentHeatmap](#simulationpcbreturncurrentheatmap)
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  - [SimulationPcbReturnCurrentMarker](#simulationpcbreturncurrentmarker)
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  - [SimulationPcbReturnCurrentResult](#simulationpcbreturncurrentresult)
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+ - [SimulationReturnCurrentContact](#simulationreturncurrentcontact)
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  - [SimulationReturnCurrentExcitation](#simulationreturncurrentexcitation)
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+ - [SimulationReturnCurrentGridJson](#simulationreturncurrentgridjson)
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  - [SimulationSpiceSubcircuit](#simulationspicesubcircuit)
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  - [SimulationSwitch](#simulationswitch)
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  - [SimulationTerminalPort](#simulationterminalport)
@@ -253,6 +259,10 @@ https://github.com/user-attachments/assets/2f28b7ba-689e-4d80-85b2-5bdef84b41f8
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  - [SimulationUnknownExperimentError](#simulationunknownexperimenterror)
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  - [SimulationVoltageProbe](#simulationvoltageprobe)
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  - [SimulationVoltageSource](#simulationvoltagesource)
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+ - [Drawing Elements](#drawing-elements)
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+ - [DrawingPage](#drawingpage)
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+ - [DrawingPageTitleBlock](#drawingpagetitleblock)
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+ - [DrawingPartView](#drawingpartview)
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  <!-- toc:end -->
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@@ -273,9 +283,7 @@ const resistor: SourceSimpleResistor = simple_source_resistor.parse({
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  console.log(resistor.resistance) // 1000
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275
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  // This is the common way to parse/transform any element
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- any_circuit_element.parse({
277
- /* ... */
278
- })
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+ any_circuit_element.parse({/* ... */})
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  ```
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281
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  ## Base Units
@@ -382,11 +390,11 @@ interface SourceBus {
382
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  target_differential_impedance?: number
383
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  /** Ordered polarity for a resolved point-to-point differential pair. */
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  differential_pair?: {
385
- positive_source_trace_id: string
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- negative_source_trace_id: string
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- trace_gap?: number
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- max_uncoupled_length?: number
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- }
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+ positive_source_trace_id: string
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+ negative_source_trace_id: string
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+ trace_gap?: number
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+ max_uncoupled_length?: number
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+ }
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  /** Additional traces for length comparison, without changing electrical membership. */
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  length_match_source_trace_ids?: string[]
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400
  min_length?: SourceBusRouteLength
@@ -406,17 +414,16 @@ interface SourceBus {
406
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407
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  /** A routed length in mm, or an offset from the longest endpoint Manhattan distance.
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  * Explicit references are resolved source traces; omitted references use the bus
409
- * members and length_match_source_trace_ids. */
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- type SourceBusRouteLength =
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+ * members and length_match_source_trace_ids. */ type SourceBusRouteLength =
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  | number
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  | {
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- reference: "longest_manhattan"
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- source_trace_ids?: string[]
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- offset?: number
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- }
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+ reference: "longest_manhattan"
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+ source_trace_ids?: string[]
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+ offset?: number
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+ }
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424
 
418
- /** Centerline separation in mm or a multiple of the larger local trace width. */
419
- type SourceBusTraceSpacing = number | { width_multiplier: number }
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+ /** Centerline separation in mm or a multiple of the larger local trace width. */ type SourceBusTraceSpacing =
426
+ number | { width_multiplier: number }
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427
  ```
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422
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  ### SourceComponentAvailabilityWarning
@@ -439,7 +446,6 @@ interface SourceComponentAvailabilityWarning {
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  }
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  ```
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442
-
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  ### SourceComponentBase
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  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/source/base/source_component_base.ts)
@@ -537,6 +543,7 @@ interface SourceConfusingNetNameWarning {
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  Datasheet information for a manufacturer part number, supplied with Circuit JSON.
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539
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  ```typescript
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+ /** Datasheet information for a manufacturer part number, supplied with Circuit JSON. */
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  interface SourceDatasheet {
541
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  type: "source_datasheet"
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  source_datasheet_id: string
@@ -650,7 +657,7 @@ interface SourceManuallyPlacedVia {
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  type: "source_manually_placed_via"
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  source_manually_placed_via_id: string
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  source_group_id: string
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- source_net_id: string
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+ source_net_id?: string
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  subcircuit_id?: string
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  source_trace_id?: string
656
663
  }
@@ -808,6 +815,8 @@ interface SourcePcbGroundPlane {
808
815
 
809
816
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/source/properties/source_pin_attributes.ts)
810
817
 
818
+ Allowed relative deviation from requires_voltage, e.g. 0.05 for ±5%.
819
+
811
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  ```typescript
812
821
  interface SourcePinAttributes {
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  is_input?: boolean
@@ -996,6 +1005,22 @@ interface SourceRefdesConventionWarning {
996
1005
  }
997
1006
  ```
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1007
 
1008
+ ### SourceRuntimeError
1009
+
1010
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/source/source_runtime_error.ts)
1011
+
1012
+ ```typescript
1013
+ interface SourceRuntimeError extends Pick<
1014
+ BaseCircuitJsonError,
1015
+ "message" | "error_type"
1016
+ > {
1017
+ type: "source_runtime_error"
1018
+ source_runtime_error_id: string
1019
+ error_type: "source_runtime_error"
1020
+ phase_name?: string
1021
+ }
1022
+ ```
1023
+
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  ### SourceSimpleAmmeter
1000
1025
 
1001
1026
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/source/source_simple_ammeter.ts)
@@ -1063,8 +1088,14 @@ Defines a simple connector component
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  /** Defines a simple connector component */
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  interface SourceSimpleConnector extends SourceComponentBase {
1065
1090
  ftype: "simple_connector"
1066
- standard?: "usb_c" | "m2"
1091
+ /** Connector interface or product family, such as usb_c, m2, or jst_ph */
1092
+ standard?: SourceSimpleConnectorStandard
1093
+ /** Number of electrical circuits in the connector */
1094
+ pin_count?: number
1067
1095
  }
1096
+
1097
+ type SourceSimpleConnectorStandard =
1098
+ (typeof source_simple_connector_standards)[number]
1068
1099
  ```
1069
1100
 
1070
1101
  ### SourceSimpleCrystal
@@ -1504,6 +1535,26 @@ interface CadCable {
1504
1535
  }
1505
1536
  ```
1506
1537
 
1538
+ ### CadCollisionError
1539
+
1540
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/cad/cad_collision_error.ts)
1541
+
1542
+ Union silhouette of solid intersection, projected along face normal (mm²
1543
+
1544
+ ```typescript
1545
+ interface CadCollisionError extends BaseCircuitJsonError {
1546
+ type: "cad_collision_error"
1547
+ cad_collision_error_id: string
1548
+ error_type: "cad_collision_error"
1549
+ cad_component_ids: string[]
1550
+ pcb_component_ids?: string[]
1551
+ source_component_ids: string[]
1552
+ /** Union silhouette of solid intersection, projected along face normal (mm² */
1553
+ intersection_area_mm2: number
1554
+ threshold_area_mm2: number
1555
+ }
1556
+ ```
1557
+
1507
1558
  ### CadComponent
1508
1559
 
1509
1560
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/cad/cad_component.ts)
@@ -1583,41 +1634,6 @@ interface CadReferenceSurface {
1583
1634
 
1584
1635
  ## PCB Elements
1585
1636
 
1586
- ### PcbFabricatorExtraChargeWarning
1587
-
1588
- [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_fabricator_extra_charge_warning.ts)
1589
-
1590
- Records an extra charge for the selected fabricator preset. An intended trigger
1591
- is a via hole diameter strictly below 0.3 mm with `jlcpcb_economy`,
1592
- `jlcpcb_standard`, `jlcpcb_economy_20260912`, or `jlcpcb_standard_20260912`.
1593
- A diameter of exactly 0.3 mm does not meet this condition. The producer detects
1594
- the condition and emits this record; parsing Circuit JSON does not run the check.
1595
-
1596
- ```typescript
1597
- interface PcbFabricatorExtraChargeWarning {
1598
- type: "pcb_fabricator_extra_charge_warning"
1599
- pcb_fabricator_extra_charge_warning_id: string
1600
- warning_type: "pcb_fabricator_extra_charge_warning"
1601
- message: string
1602
- fabricator_preset: string
1603
- pcb_board_id?: string
1604
- pcb_via_ids?: string[]
1605
- subcircuit_id?: string
1606
- }
1607
- ```
1608
-
1609
- The ID and `warning_type` are generated when omitted from input. For example:
1610
-
1611
- ```json
1612
- {
1613
- "type": "pcb_fabricator_extra_charge_warning",
1614
- "fabricator_preset": "jlcpcb_economy",
1615
- "message": "Via hole diameter 0.25 mm is below 0.3 mm and incurs an extra charge",
1616
- "pcb_board_id": "pcb_board_0",
1617
- "pcb_via_ids": ["pcb_via_0"]
1618
- }
1619
- ```
1620
-
1621
1637
  ### PcbAutoroutingError
1622
1638
 
1623
1639
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_autorouting_error.ts)
@@ -1659,8 +1675,6 @@ interface PcbBend {
1659
1675
  }
1660
1676
  ```
1661
1677
 
1662
- [Examples and coordinate/rendering semantics](docs/pcb-flex.md)
1663
-
1664
1678
  ### PcbBoard
1665
1679
 
1666
1680
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_board.ts)
@@ -1692,7 +1706,7 @@ interface PcbBoard extends ManufacturingDrcProperties {
1692
1706
  center: Point
1693
1707
  outline?: Point[]
1694
1708
  shape?: "rect" | "polygon"
1695
- material: "fr4" | "fr1"
1709
+ material: "fr4" | "fr1" | "flex"
1696
1710
  solder_mask_color?: string
1697
1711
  silkscreen_color?: string
1698
1712
  anchor_position?: Point
@@ -1723,35 +1737,6 @@ interface PcbBreakoutPoint {
1723
1737
  }
1724
1738
  ```
1725
1739
 
1726
- ### PcbBusRoutingConstraintError
1727
-
1728
- [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_bus_routing_constraint_error.ts)
1729
-
1730
- A discriminated union of bus/pair constraint violations. Every variant includes `source_bus_id`, `source_trace_ids`, `pcb_trace_ids`, `message`, and the error identity fields. Lengths and centerline spacing are mm; impedance is ohms. Spacing variants also require `other_pcb_trace_id` and may include `other_source_trace_id`.
1731
-
1732
- | `routing_rule` | Required measurements | Optional bounds |
1733
- | --- | --- | --- |
1734
- | `length_skew` | `actual_length_skew`, `maximum_length_skew` | — |
1735
- | `min_length` | `actual_trace_length`, `minimum_trace_length` | — |
1736
- | `max_length` | `actual_trace_length`, `maximum_trace_length` | — |
1737
- | `target_length` | `actual_trace_length`, `target_trace_length`, `length_tolerance` | — |
1738
- | `pcb_trace_spacing` | `actual_centerline_spacing`, `minimum_centerline_spacing` | — |
1739
- | `pcb_spacing_to_other_signals` | `actual_centerline_spacing`, `minimum_centerline_spacing` | — |
1740
- | `impedance_target` | `target_impedance` | `minimum_impedance`, `maximum_impedance` (at least one) |
1741
-
1742
- ```typescript
1743
- if (error.routing_rule === "max_length") {
1744
- // Narrowed to the maximum-length variant; these fields are required.
1745
- console.log(error.actual_trace_length, error.maximum_trace_length)
1746
- }
1747
- ```
1748
-
1749
- ### PcbBusRoutingConstraintWarning
1750
-
1751
- [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_bus_routing_constraint_warning.ts)
1752
-
1753
- An unverified constraint, discriminated by `routing_rule`: `route_geometry`, `reference_geometry`, `spacing_geometry`, `target_length`, or `physical_impedance`. Every variant includes `source_bus_id`, `source_trace_ids`, `pcb_trace_ids`, `message`, and warning identity fields. Missing geometry uses an empty `pcb_trace_ids` array; these warnings contain no measurements and must not be interpreted as a pass.
1754
-
1755
1740
  ### PcbBusLengthSkewError
1756
1741
 
1757
1742
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_bus_length_skew_error.ts)
@@ -1773,6 +1758,66 @@ interface PcbBusLengthSkewError extends BaseCircuitJsonError {
1773
1758
  }
1774
1759
  ```
1775
1760
 
1761
+ ### PcbBusRoutingConstraintError
1762
+
1763
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_bus_routing_constraint_error.ts)
1764
+
1765
+ ```typescript
1766
+ type PcbBusRoutingConstraintError =
1767
+ WithErrorContext<PcbBusRoutingConstraintViolation>
1768
+
1769
+ /** Rule-specific routing measurements. Lengths and centreline spacing are mm; impedance is ohms. */ type PcbBusRoutingConstraintViolation =
1770
+ | {
1771
+ routing_rule: "length_skew"
1772
+ actual_length_skew: number
1773
+ maximum_length_skew: number
1774
+ }
1775
+ | {
1776
+ routing_rule: "min_length"
1777
+ actual_trace_length: number
1778
+ minimum_trace_length: number
1779
+ }
1780
+ | {
1781
+ routing_rule: "max_length"
1782
+ actual_trace_length: number
1783
+ maximum_trace_length: number
1784
+ }
1785
+ | {
1786
+ routing_rule: "target_length"
1787
+ actual_trace_length: number
1788
+ target_trace_length: number
1789
+ length_tolerance: number
1790
+ }
1791
+ | {
1792
+ routing_rule: "pcb_trace_spacing"
1793
+ other_pcb_trace_id: string
1794
+ other_source_trace_id?: string
1795
+ actual_centerline_spacing: number
1796
+ minimum_centerline_spacing: number
1797
+ }
1798
+ | {
1799
+ routing_rule: "pcb_spacing_to_other_signals"
1800
+ other_pcb_trace_id: string
1801
+ other_source_trace_id?: string
1802
+ actual_centerline_spacing: number
1803
+ minimum_centerline_spacing: number
1804
+ }
1805
+ | {
1806
+ routing_rule: "impedance_target"
1807
+ target_impedance: number
1808
+ minimum_impedance?: number
1809
+ maximum_impedance?: number
1810
+ }
1811
+ ```
1812
+
1813
+ ### PcbBusRoutingConstraintWarning
1814
+
1815
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_bus_routing_constraint_warning.ts)
1816
+
1817
+ ```typescript
1818
+ type PcbBusRoutingConstraintWarning = WithWarningContext<WarningRule>
1819
+ ```
1820
+
1776
1821
  ### PcbComponent
1777
1822
 
1778
1823
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_component.ts)
@@ -1804,6 +1849,25 @@ interface PcbComponentInvalidLayerError extends BaseCircuitJsonError {
1804
1849
  }
1805
1850
  ```
1806
1851
 
1852
+ ### PcbComponentMissingCourtyardWarning
1853
+
1854
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_component_missing_courtyard_warning.ts)
1855
+
1856
+ Warning emitted when a PCB component has no courtyard geometry
1857
+
1858
+ ```typescript
1859
+ /** Warning emitted when a PCB component has no courtyard geometry */
1860
+ interface PcbComponentMissingCourtyardWarning {
1861
+ type: "pcb_component_missing_courtyard_warning"
1862
+ pcb_component_missing_courtyard_warning_id: string
1863
+ warning_type: "pcb_component_missing_courtyard_warning"
1864
+ message: string
1865
+ pcb_component_id: string
1866
+ source_component_id?: string
1867
+ subcircuit_id?: string
1868
+ }
1869
+ ```
1870
+
1807
1871
  ### PcbComponentNotOnBoardEdgeError
1808
1872
 
1809
1873
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_component_not_on_board_edge_error.ts)
@@ -2217,15 +2281,36 @@ interface PcbFabricationNoteText {
2217
2281
  layer: VisibleLayer
2218
2282
  anchor_position: Point
2219
2283
  anchor_alignment:
2220
- | "center"
2221
- | "top_left"
2222
- | "top_right"
2223
- | "bottom_left"
2224
- | "bottom_right"
2284
+ "center" | "top_left" | "top_right" | "bottom_left" | "bottom_right"
2225
2285
  color?: string
2226
2286
  }
2227
2287
  ```
2228
2288
 
2289
+ ### PcbFabricatorExtraChargeWarning
2290
+
2291
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_fabricator_extra_charge_warning.ts)
2292
+
2293
+ Selected preset, for example jlcpcb_economy or jlcpcb_standard_20260912.
2294
+
2295
+ ```typescript
2296
+ /** Warning that a design feature incurs an extra charge for the selected
2297
+ * fabricator preset. For JLCPCB economy or standard presets (including dated
2298
+ * variants), via hole diameters below 0.3 mm are an intended use case.
2299
+ * The producer detects the condition; this record describes the warning. */
2300
+ interface PcbFabricatorExtraChargeWarning {
2301
+ type: "pcb_fabricator_extra_charge_warning"
2302
+ pcb_fabricator_extra_charge_warning_id: string
2303
+ warning_type: "pcb_fabricator_extra_charge_warning"
2304
+ message: string
2305
+ /** Selected preset, for example jlcpcb_economy or jlcpcb_standard_20260912. */
2306
+ fabricator_preset: string
2307
+ pcb_board_id?: string
2308
+ /** Vias responsible for the extra charge, when the warning concerns vias. */
2309
+ pcb_via_ids?: string[]
2310
+ subcircuit_id?: string
2311
+ }
2312
+ ```
2313
+
2229
2314
  ### PcbFootprintOverlapError
2230
2315
 
2231
2316
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_footprint_overlap_error.ts)
@@ -2346,24 +2431,13 @@ interface PcbHoleCircle {
2346
2431
 
2347
2432
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_keepout.ts)
2348
2433
 
2349
- A keepout region on specified PCB layers, with rectangle, circle, or outline geometry.
2350
-
2351
- `warning_only: true` makes the region advisory: routing and copper placement may
2352
- cross it, and overlap checks should emit `pcb_keepout_overlap_warning` records
2353
- instead of errors for that keepout. Omitted or `false` retains normal enforcement.
2354
- The parser preserves omission; it does not insert a default. Only boolean values
2355
- are accepted. `excluded_pcb_component_ids` continues to exempt the listed
2356
- components from keepout diagnostics, including warnings.
2357
-
2358
- This is a data contract: parsing a keepout does not run routing or DRC. Producers
2359
- and consumers must implement the advisory behavior. Unrelated DRC violations and
2360
- violations of other, enforcing keepouts remain errors. Existing documents require
2361
- no migration; older consumers may ignore the flag and enforce the region normally.
2434
+ PCB components excluded from keepout DRC enforcement.
2362
2435
 
2363
2436
  ```typescript
2364
2437
  interface PcbKeepoutOutline {
2365
2438
  type: "pcb_keepout"
2366
2439
  shape: "outline"
2440
+ pcb_component_id?: string
2367
2441
  pcb_group_id?: string
2368
2442
  subcircuit_id?: string
2369
2443
  outline: Point[]
@@ -2373,17 +2447,21 @@ interface PcbKeepoutOutline {
2373
2447
  description?: string
2374
2448
  /** PCB components excluded from keepout DRC enforcement. */
2375
2449
  excluded_pcb_component_ids?: string[]
2376
- /**
2377
- * When true, this keepout is advisory: it does not block routing or copper
2450
+ /** When true, this keepout is advisory: it does not block routing or copper
2378
2451
  * placement, and DRC reports overlaps as pcb_keepout_overlap_warning records.
2379
- * False or omitted preserves normal enforcement. Component exclusions still apply.
2380
- */
2452
+ * False or omitted preserves normal enforcement. Component exclusions still apply. */
2453
+
2381
2454
  warning_only?: boolean
2455
+ /** Allow trace crossings without keepout diagnostics; copper pours remain excluded. */
2456
+ allow_traces?: boolean
2457
+ /** Allow components and their pads/plated holes without keepout diagnostics; copper pours remain excluded. */
2458
+ allow_placements?: boolean
2382
2459
  }
2383
2460
 
2384
2461
  interface PCBKeepoutRect {
2385
2462
  type: "pcb_keepout"
2386
2463
  shape: "rect"
2464
+ pcb_component_id?: string
2387
2465
  pcb_group_id?: string
2388
2466
  subcircuit_id?: string
2389
2467
  center: Point
@@ -2394,17 +2472,21 @@ interface PCBKeepoutRect {
2394
2472
  description?: string
2395
2473
  /** PCB components excluded from keepout DRC enforcement. */
2396
2474
  excluded_pcb_component_ids?: string[]
2397
- /**
2398
- * When true, this keepout is advisory: it does not block routing or copper
2475
+ /** When true, this keepout is advisory: it does not block routing or copper
2399
2476
  * placement, and DRC reports overlaps as pcb_keepout_overlap_warning records.
2400
- * False or omitted preserves normal enforcement. Component exclusions still apply.
2401
- */
2477
+ * False or omitted preserves normal enforcement. Component exclusions still apply. */
2478
+
2402
2479
  warning_only?: boolean
2480
+ /** Allow trace crossings without keepout diagnostics; copper pours remain excluded. */
2481
+ allow_traces?: boolean
2482
+ /** Allow components and their pads/plated holes without keepout diagnostics; copper pours remain excluded. */
2483
+ allow_placements?: boolean
2403
2484
  }
2404
2485
 
2405
2486
  interface PCBKeepoutCircle {
2406
2487
  type: "pcb_keepout"
2407
2488
  shape: "circle"
2489
+ pcb_component_id?: string
2408
2490
  pcb_group_id?: string
2409
2491
  subcircuit_id?: string
2410
2492
  center: Point
@@ -2414,12 +2496,15 @@ interface PCBKeepoutCircle {
2414
2496
  description?: string
2415
2497
  /** PCB components excluded from keepout DRC enforcement. */
2416
2498
  excluded_pcb_component_ids?: string[]
2417
- /**
2418
- * When true, this keepout is advisory: it does not block routing or copper
2499
+ /** When true, this keepout is advisory: it does not block routing or copper
2419
2500
  * placement, and DRC reports overlaps as pcb_keepout_overlap_warning records.
2420
- * False or omitted preserves normal enforcement. Component exclusions still apply.
2421
- */
2501
+ * False or omitted preserves normal enforcement. Component exclusions still apply. */
2502
+
2422
2503
  warning_only?: boolean
2504
+ /** Allow trace crossings without keepout diagnostics; copper pours remain excluded. */
2505
+ allow_traces?: boolean
2506
+ /** Allow components and their pads/plated holes without keepout diagnostics; copper pours remain excluded. */
2507
+ allow_placements?: boolean
2423
2508
  }
2424
2509
 
2425
2510
  type PCBKeepout = PCBKeepoutRect | PCBKeepoutCircle | PcbKeepoutOutline
@@ -2637,11 +2722,7 @@ interface PcbNoteText {
2637
2722
  text?: string
2638
2723
  anchor_position: Point
2639
2724
  anchor_alignment:
2640
- | "center"
2641
- | "top_left"
2642
- | "top_right"
2643
- | "bottom_left"
2644
- | "bottom_right"
2725
+ "center" | "top_left" | "top_right" | "bottom_left" | "bottom_right"
2645
2726
  layer: VisibleLayer
2646
2727
  is_mirrored_from_top_view?: boolean
2647
2728
  color?: string
@@ -2749,6 +2830,24 @@ interface PcbPanelizationPlacementError extends BaseCircuitJsonError {
2749
2830
  }
2750
2831
  ```
2751
2832
 
2833
+ ### PcbPin1Location
2834
+
2835
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/properties/pcb_pin1_location.ts)
2836
+
2837
+ ```typescript
2838
+ type PcbPin1Location =
2839
+ | "leftside_top"
2840
+ | "leftside_bottom"
2841
+ | "rightside_top"
2842
+ | "rightside_bottom"
2843
+ | "topside_left"
2844
+ | "topside_right"
2845
+ | "bottomside_left"
2846
+ | "bottomside_right"
2847
+
2848
+ type PcbPin1LocationRotation = 0 | 90 | 180 | 270
2849
+ ```
2850
+
2752
2851
  ### PcbPlacementError
2753
2852
 
2754
2853
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_placement_error.ts)
@@ -2973,7 +3072,6 @@ interface PcbPreflightRoutingError extends BaseCircuitJsonError {
2973
3072
  }
2974
3073
  ```
2975
3074
 
2976
-
2977
3075
  ### PcbRouteHints
2978
3076
 
2979
3077
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/properties/pcb_route_hints.ts)
@@ -3178,6 +3276,21 @@ interface PcbSilkscreenText {
3178
3276
  }
3179
3277
  ```
3180
3278
 
3279
+ ### PcbSoldermaskOpening
3280
+
3281
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_soldermask_opening.ts)
3282
+
3283
+ ```typescript
3284
+ interface PcbSoldermaskOpeningBase {
3285
+ type: "pcb_soldermask_opening"
3286
+ pcb_soldermask_opening_id: string
3287
+ layer: "top" | "bottom"
3288
+ pcb_component_id?: string
3289
+ pcb_group_id?: string
3290
+ subcircuit_id?: string
3291
+ }
3292
+ ```
3293
+
3181
3294
  ### PcbSolderPaste
3182
3295
 
3183
3296
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_solder_paste.ts)
@@ -3261,18 +3374,17 @@ interface PcbDielectricStackupLayer {
3261
3374
  }
3262
3375
 
3263
3376
  type PcbStackupLayer =
3264
- | PcbSoldermaskStackupLayer
3265
- | PcbCopperStackupLayer
3266
- | PcbDielectricStackupLayer
3377
+ PcbSoldermaskStackupLayer | PcbCopperStackupLayer | PcbDielectricStackupLayer
3267
3378
  ```
3268
3379
 
3269
3380
  ### PcbStiffener
3270
3381
 
3271
3382
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_stiffener.ts)
3272
3383
 
3273
- Defines bonded mechanical reinforcement with rectangular or polygon geometry.
3384
+ Common properties of bonded PCB reinforcement.
3274
3385
 
3275
3386
  ```typescript
3387
+ /** Common properties of bonded PCB reinforcement. */
3276
3388
  interface PcbStiffenerBase {
3277
3389
  type: "pcb_stiffener"
3278
3390
  pcb_stiffener_id: string
@@ -3289,33 +3401,8 @@ interface PcbStiffenerBase {
3289
3401
  /** Adhesive thickness in mm; omission means unspecified, not zero. */
3290
3402
  adhesive_thickness?: Length
3291
3403
  }
3292
-
3293
- interface PcbStiffenerRect extends PcbStiffenerBase {
3294
- shape: "rect"
3295
- /** Relative to the flat board center, in mm. */
3296
- center: Point
3297
- /** Degrees counterclockwise in the flat top view; omission means zero. */
3298
- rotation?: Rotation
3299
- width: Length
3300
- height: Length
3301
- outline?: never
3302
- }
3303
-
3304
- interface PcbStiffenerPolygon extends PcbStiffenerBase {
3305
- shape: "polygon"
3306
- /** Implicitly closed vertices relative to the flat board center, in mm. All placement/rotation is baked in. */
3307
- outline: Point[]
3308
- center?: never
3309
- rotation?: never
3310
- width?: never
3311
- height?: never
3312
- }
3313
-
3314
- type PcbStiffener = PcbStiffenerRect | PcbStiffenerPolygon
3315
3404
  ```
3316
3405
 
3317
- [Examples and coordinate/rendering semantics](docs/pcb-flex.md)
3318
-
3319
3406
  ### PcbText
3320
3407
 
3321
3408
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_text.ts)
@@ -3364,18 +3451,17 @@ interface PcbThermalSpoke {
3364
3451
 
3365
3452
  ### PcbTrace
3366
3453
 
3367
- A `wire` route point can taper its outgoing segment using `start_width`,
3368
- `end_width`, and `width_interpolation_mode` (`linear` or `quadratic`).
3369
- See the [wire taper geometry contract](docs/pcb-trace-teardrops.md).
3370
-
3371
3454
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_trace.ts)
3372
3455
 
3456
+ Outgoing segment taper; all three fields must be specified together.
3457
+
3373
3458
  ```typescript
3374
3459
  interface PcbTraceRoutePointWire {
3375
3460
  route_type: "wire"
3376
3461
  x: Distance
3377
3462
  y: Distance
3378
3463
  width: Distance
3464
+ /** Outgoing segment taper; all three fields must be specified together. */
3379
3465
  start_width?: Distance
3380
3466
  end_width?: Distance
3381
3467
  width_interpolation_mode?: "linear" | "quadratic"
@@ -3386,24 +3472,8 @@ interface PcbTraceRoutePointWire {
3386
3472
  layer: LayerRef
3387
3473
  }
3388
3474
 
3389
- interface PcbTraceRoutePointVia {
3390
- route_type: "via"
3391
- x: Distance
3392
- y: Distance
3393
- copper_pour_id?: string
3394
- is_inside_copper_pour?: boolean
3395
- hole_diameter?: Distance
3396
- outer_diameter?: Distance
3397
- tented_on_top?: boolean
3398
- tented_on_bottom?: boolean
3399
- from_layer: LayerRef
3400
- to_layer: LayerRef
3401
- }
3402
-
3403
3475
  type PcbTraceRoutePoint =
3404
- | PcbTraceRoutePointWire
3405
- | PcbTraceRoutePointVia
3406
- | PcbTraceRoutePointThroughPad
3476
+ PcbTraceRoutePointWire | PcbTraceRoutePointVia | PcbTraceRoutePointThroughPad
3407
3477
  ```
3408
3478
 
3409
3479
  ### PcbTraceError
@@ -3465,6 +3535,38 @@ interface PcbTraceMissingError extends BaseCircuitJsonError {
3465
3535
  }
3466
3536
  ```
3467
3537
 
3538
+ ### PcbTraceStyleWarning
3539
+
3540
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_trace_style_warning.ts)
3541
+
3542
+ A long segment at an odd angle, identified by its trace and route endpoints.
3543
+
3544
+ ```typescript
3545
+ /** A long segment at an odd angle, identified by its trace and route endpoints. */
3546
+ interface PcbTraceStyleWarning {
3547
+ type: "pcb_trace_style_warning"
3548
+ pcb_trace_style_warning_id: string
3549
+ warning_type: "pcb_trace_style_warning"
3550
+ message: string
3551
+ styling_issue_type: "long_segment_at_odd_angle"
3552
+ pcb_trace_id: string
3553
+ source_trace_id?: string
3554
+ subcircuit_id?: string
3555
+ layer: LayerRef
3556
+ start_route_index: number
3557
+ end_route_index: number
3558
+ segment_start: Point
3559
+ segment_end: Point
3560
+ center: Point
3561
+ segment_length: Distance
3562
+ minimum_segment_length: Distance
3563
+ angle_degrees: number
3564
+ nearest_allowed_angle_degrees: number
3565
+ angle_deviation_degrees: number
3566
+ angle_tolerance_degrees: number
3567
+ }
3568
+ ```
3569
+
3468
3570
  ### PcbTraceTooLongError
3469
3571
 
3470
3572
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_trace_too_long_error.ts)
@@ -3531,38 +3633,6 @@ interface PcbTraceTooManyViasWarning {
3531
3633
  }
3532
3634
  ```
3533
3635
 
3534
- ### PcbTraceStyleWarning
3535
-
3536
- [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_trace_style_warning.ts)
3537
-
3538
- A long segment at an odd angle, identified by its trace and route endpoints.
3539
-
3540
- ```typescript
3541
- /** A long segment at an odd angle, identified by its trace and route endpoints. */
3542
- interface PcbTraceStyleWarning {
3543
- type: "pcb_trace_style_warning"
3544
- pcb_trace_style_warning_id: string
3545
- warning_type: "pcb_trace_style_warning"
3546
- message: string
3547
- styling_issue_type: "long_segment_at_odd_angle"
3548
- pcb_trace_id: string
3549
- source_trace_id?: string
3550
- subcircuit_id?: string
3551
- layer: LayerRef
3552
- start_route_index: number
3553
- end_route_index: number
3554
- segment_start: Point
3555
- segment_end: Point
3556
- center: Point
3557
- segment_length: Distance
3558
- minimum_segment_length: Distance
3559
- angle_degrees: number
3560
- nearest_allowed_angle_degrees: number
3561
- angle_deviation_degrees: number
3562
- angle_tolerance_degrees: number
3563
- }
3564
- ```
3565
-
3566
3636
  ### PcbTraceWarning
3567
3637
 
3568
3638
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_trace_warning.ts)
@@ -3614,6 +3684,8 @@ interface PcbVia {
3614
3684
  /** PCB ports belonging to this via, including layer ports and aliases. */
3615
3685
  pcb_port_ids?: string[]
3616
3686
  pcb_trace_id?: string
3687
+ source_trace_id?: string
3688
+ source_net_id?: string
3617
3689
  net_is_assignable?: boolean
3618
3690
  net_assigned?: boolean
3619
3691
  tented_on_top?: boolean
@@ -3621,10 +3693,6 @@ interface PcbVia {
3621
3693
  }
3622
3694
  ```
3623
3695
 
3624
- Legacy `is_tented` input is deprecated and transformed into `tented_on_top` and
3625
- `tented_on_bottom`. Explicit per-side values take precedence. Parsed output omits
3626
- `is_tented`; both per-side fields are optional.
3627
-
3628
3696
  ### PcbViaClearanceError
3629
3697
 
3630
3698
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_via_clearance_error.ts)
@@ -3797,8 +3865,7 @@ interface SchematicPortArrangementBySides {
3797
3865
  }
3798
3866
 
3799
3867
  type SchematicPortArrangement =
3800
- | SchematicPortArrangementBySize
3801
- | SchematicPortArrangementBySides
3868
+ SchematicPortArrangementBySize | SchematicPortArrangementBySides
3802
3869
  ```
3803
3870
 
3804
3871
  ### SchematicComponentOverlapWarning
@@ -3847,9 +3914,7 @@ interface SchematicComponentStylingWarning {
3847
3914
 
3848
3915
  ```typescript
3849
3916
  type SchematicDebugObject =
3850
- | SchematicDebugRect
3851
- | SchematicDebugLine
3852
- | SchematicDebugPoint
3917
+ SchematicDebugRect | SchematicDebugLine | SchematicDebugPoint
3853
3918
 
3854
3919
  interface SchematicDebugRect {
3855
3920
  type: "schematic_debug_object"
@@ -3893,9 +3958,7 @@ interface SchematicElementOutsideSheetWarning {
3893
3958
  message: string
3894
3959
  schematic_sheet_id: string
3895
3960
  schematic_element_type:
3896
- | "schematic_component"
3897
- | "schematic_net_label"
3898
- | "schematic_trace"
3961
+ "schematic_component" | "schematic_net_label" | "schematic_trace"
3899
3962
  schematic_element_id: string
3900
3963
  }
3901
3964
  ```
@@ -3917,7 +3980,7 @@ interface SchematicError extends BaseCircuitJsonError {
3917
3980
 
3918
3981
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/schematic/schematic_graphic.ts)
3919
3982
 
3920
- References a graphic asset or inline SVG content with optional centered layout bounds on a schematic sheet. At least one graphic source is required.
3983
+ References a graphic asset or inline SVG content on a schematic sheet.
3921
3984
 
3922
3985
  ```typescript
3923
3986
  /** References a graphic asset or inline SVG content on a schematic sheet. */
@@ -4043,6 +4106,8 @@ interface SchematicMissingSheetWarning {
4043
4106
 
4044
4107
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/schematic/schematic_net_label.ts)
4045
4108
 
4109
+ Display-only superscript suffix, e.g. "1" in GND¹. Does not change net identity.
4110
+
4046
4111
  ```typescript
4047
4112
  interface SchematicNetLabel {
4048
4113
  type: "schematic_net_label"
@@ -4107,6 +4172,11 @@ interface SchematicPort {
4107
4172
  true_ccw_index?: number
4108
4173
  pin_number?: number
4109
4174
  display_pin_label?: string
4175
+ /** Ordered parts of the pin label with per-part styling.
4176
+ * For example, `A~{BC}D` is represented as `A`, overlined `BC`, then `D`.
4177
+ * Consumers that do not support styled text can use `display_pin_label`. */
4178
+
4179
+ display_pin_label_text_parts?: SchematicTextPart[]
4110
4180
  display_pin_label_font_size?: number
4111
4181
  subcircuit_id?: string
4112
4182
  is_connected?: boolean
@@ -4158,7 +4228,7 @@ interface SchematicSheet {
4158
4228
  schematic_sheet_id: string
4159
4229
  name?: string
4160
4230
  sheet_index?: number
4161
- sheet_size?: "a4" | "ansi_b"
4231
+ sheet_size?: SchematicSheetSize
4162
4232
  sheet_width?: number
4163
4233
  sheet_height?: number
4164
4234
  subcircuit_id?: string
@@ -4166,6 +4236,25 @@ interface SchematicSheet {
4166
4236
  }
4167
4237
  ```
4168
4238
 
4239
+ ### SchematicSheetStylingWarning
4240
+
4241
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/schematic/schematic_sheet_styling_warning.ts)
4242
+
4243
+ Style warning emitted when a schematic sheet uses a non-default size.
4244
+
4245
+ ```typescript
4246
+ /** Style warning emitted when a schematic sheet uses a non-default size. */
4247
+ interface SchematicSheetStylingWarning {
4248
+ type: "schematic_sheet_styling_warning"
4249
+ schematic_sheet_styling_warning_id: string
4250
+ warning_type: "schematic_sheet_styling_warning"
4251
+ message: string
4252
+ schematic_sheet_id: string
4253
+ styling_issue_type: "non_default_sheet_size"
4254
+ subcircuit_id?: string
4255
+ }
4256
+ ```
4257
+
4169
4258
  ### SchematicSymbol
4170
4259
 
4171
4260
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/schematic/schematic_symbol.ts)
@@ -4234,6 +4323,8 @@ interface SchematicTableCell {
4234
4323
 
4235
4324
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/schematic/schematic_text.ts)
4236
4325
 
4326
+ Display-only superscript suffix, e.g. "1" in GND¹ for an inline net label.
4327
+
4237
4328
  ```typescript
4238
4329
  interface SchematicText {
4239
4330
  type: "schematic_text"
@@ -4241,7 +4332,17 @@ interface SchematicText {
4241
4332
  schematic_component_id?: string
4242
4333
  schematic_symbol_id?: string
4243
4334
  schematic_text_id: string
4335
+ /** Set when the text annotates a trace rather than a component, as an inline
4336
+ * net label does - the net name drawn alongside a point-to-point wire instead
4337
+ * of as an anchored `schematic_net_label`. Lets consumers tell such a label
4338
+ * apart from free-standing text and resolve the net it belongs to. */
4339
+
4340
+ source_trace_id?: string
4244
4341
  text: string
4342
+ /** Ordered parts with per-part display options.
4343
+ * Consumers that do not support styled text can use `text`. */
4344
+
4345
+ text_parts?: SchematicTextPart[]
4245
4346
  /** Display-only superscript suffix, e.g. "1" in GND¹ for an inline net label. */
4246
4347
  display_superscript?: string
4247
4348
  font_size: number
@@ -4256,6 +4357,22 @@ interface SchematicText {
4256
4357
  }
4257
4358
  ```
4258
4359
 
4360
+ ### SchematicTextPart
4361
+
4362
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/schematic/schematic_text_part.ts)
4363
+
4364
+ One part of schematic text with its display options.
4365
+
4366
+ ```typescript
4367
+ /** One part of schematic text with its display options. */
4368
+ interface SchematicTextPart {
4369
+ /** The literal text displayed for this part. */
4370
+ text: string
4371
+ /** Draw a line above this part, typically indicating an active-low signal. */
4372
+ is_overlined?: boolean
4373
+ }
4374
+ ```
4375
+
4259
4376
  ### SchematicTrace
4260
4377
 
4261
4378
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/schematic/schematic_trace.ts)
@@ -4298,53 +4415,6 @@ interface SchematicVoltageProbe {
4298
4415
 
4299
4416
  ## Simulation Elements
4300
4417
 
4301
- ### SimulationReturnCurrentContact
4302
-
4303
- [Source](https://github.com/tscircuit/circuit-json/blob/main/src/simulation/simulation_return_current_contact.ts)
4304
-
4305
- ```typescript
4306
- interface SimulationReturnCurrentContactBase {
4307
- x: number
4308
- y: number
4309
- layer: LayerRef
4310
- }
4311
-
4312
- interface SimulationReturnCurrentPortContact extends SimulationReturnCurrentContactBase {
4313
- contact_type: "pcb_port"
4314
- pcb_port_id: string
4315
- }
4316
-
4317
- interface SimulationReturnCurrentViaContact extends SimulationReturnCurrentContactBase {
4318
- contact_type: "pcb_via"
4319
- pcb_via_id: string
4320
- }
4321
-
4322
- interface SimulationReturnCurrentCopperPourContact extends SimulationReturnCurrentContactBase {
4323
- contact_type: "pcb_copper_pour"
4324
- pcb_copper_pour_id: string
4325
- }
4326
- ```
4327
-
4328
- ### SimulationReturnCurrentGridJson
4329
-
4330
- [Source](https://github.com/tscircuit/circuit-json/blob/main/src/simulation/simulation_return_current_grid_json.ts)
4331
-
4332
- ```typescript
4333
- type SimulationReturnCurrentGridJson =
4334
- | {
4335
- field_type: "real"
4336
- sheet_current_x: (number | null)[]
4337
- sheet_current_y: (number | null)[]
4338
- }
4339
- | {
4340
- field_type: "complex_phasor"
4341
- sheet_current_x_real: (number | null)[]
4342
- sheet_current_x_imag: (number | null)[]
4343
- sheet_current_y_real: (number | null)[]
4344
- sheet_current_y_imag: (number | null)[]
4345
- }
4346
- ```
4347
-
4348
4418
  ### SimulationAcSweepCurrentGraph
4349
4419
 
4350
4420
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/simulation/simulation_ac_sweep_current_graph.ts)
@@ -4387,8 +4457,7 @@ interface SimulationAcSweepVoltageGraph {
4387
4457
 
4388
4458
  ```typescript
4389
4459
  type SimulationAnalysisResult =
4390
- | SimulationVoltageAnalysisResult
4391
- | SimulationCurrentAnalysisResult
4460
+ SimulationVoltageAnalysisResult | SimulationCurrentAnalysisResult
4392
4461
 
4393
4462
  type SimulationNonTransientVoltageAnalysisResult =
4394
4463
  | SimulationDcOperatingPointVoltage
@@ -4401,12 +4470,10 @@ type SimulationNonTransientCurrentAnalysisResult =
4401
4470
  | SimulationAcSweepCurrentGraph
4402
4471
 
4403
4472
  type SimulationVoltageAnalysisResult =
4404
- | SimulationTransientVoltageGraph
4405
- | SimulationNonTransientVoltageAnalysisResult
4473
+ SimulationTransientVoltageGraph | SimulationNonTransientVoltageAnalysisResult
4406
4474
 
4407
4475
  type SimulationCurrentAnalysisResult =
4408
- | SimulationTransientCurrentGraph
4409
- | SimulationNonTransientCurrentAnalysisResult
4476
+ SimulationTransientCurrentGraph | SimulationNonTransientCurrentAnalysisResult
4410
4477
  ```
4411
4478
 
4412
4479
  ### SimulationComplexSample
@@ -4447,8 +4514,7 @@ interface SimulationCurrentProbe {
4447
4514
 
4448
4515
  ```typescript
4449
4516
  type SimulationCurrentSource =
4450
- | SimulationDcCurrentSource
4451
- | SimulationAcCurrentSource
4517
+ SimulationDcCurrentSource | SimulationAcCurrentSource
4452
4518
 
4453
4519
  /** Defines a DC current source for simulation purposes. It forces a current
4454
4520
  * between two source ports. */
@@ -4567,6 +4633,8 @@ interface SimulationExperiment {
4567
4633
  simulation_experiment_id: string
4568
4634
  name: string
4569
4635
  experiment_type: ExperimentType
4636
+ subcircuit_id?: string
4637
+ spice_engine?: string
4570
4638
  time_per_step?: number // ms
4571
4639
  start_time_ms?: number // ms
4572
4640
  end_time_ms?: number // ms
@@ -4652,20 +4720,17 @@ type SimulationParameterSweep =
4652
4720
  | SimulationVoltageParameterSweep
4653
4721
  | SimulationCurrentParameterSweep
4654
4722
 
4655
- interface SimulationResistanceParameterSweep
4656
- extends SimulationParameterSweepBase {
4723
+ interface SimulationResistanceParameterSweep extends SimulationParameterSweepBase {
4657
4724
  parameter_type: "resistance"
4658
4725
  resistor_source_component_id: string
4659
4726
  }
4660
4727
 
4661
- interface SimulationCapacitanceParameterSweep
4662
- extends SimulationParameterSweepBase {
4728
+ interface SimulationCapacitanceParameterSweep extends SimulationParameterSweepBase {
4663
4729
  parameter_type: "capacitance"
4664
4730
  capacitor_source_component_id: string
4665
4731
  }
4666
4732
 
4667
- interface SimulationInductanceParameterSweep
4668
- extends SimulationParameterSweepBase {
4733
+ interface SimulationInductanceParameterSweep extends SimulationParameterSweepBase {
4669
4734
  parameter_type: "inductance"
4670
4735
  inductor_source_component_id: string
4671
4736
  }
@@ -4743,8 +4808,7 @@ interface SimulationPcbReturnCurrentHeatmap {
4743
4808
 
4744
4809
  ```typescript
4745
4810
  type SimulationPcbReturnCurrentMarker =
4746
- | SimulationPcbReturnCurrentPortMarker
4747
- | SimulationPcbReturnCurrentViaMarker
4811
+ SimulationPcbReturnCurrentPortMarker | SimulationPcbReturnCurrentViaMarker
4748
4812
 
4749
4813
  interface SimulationReturnCurrentMarkerBase {
4750
4814
  type: "simulation_pcb_return_current_marker"
@@ -4791,6 +4855,33 @@ interface SimulationPcbReturnCurrentResult {
4791
4855
  }
4792
4856
  ```
4793
4857
 
4858
+ ### SimulationReturnCurrentContact
4859
+
4860
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/simulation/simulation_return_current_contact.ts)
4861
+
4862
+ ```typescript
4863
+ interface SimulationReturnCurrentContactBase {
4864
+ x: number
4865
+ y: number
4866
+ layer: LayerRef
4867
+ }
4868
+
4869
+ interface SimulationReturnCurrentPortContact extends SimulationReturnCurrentContactBase {
4870
+ contact_type: "pcb_port"
4871
+ pcb_port_id: string
4872
+ }
4873
+
4874
+ interface SimulationReturnCurrentViaContact extends SimulationReturnCurrentContactBase {
4875
+ contact_type: "pcb_via"
4876
+ pcb_via_id: string
4877
+ }
4878
+
4879
+ interface SimulationReturnCurrentCopperPourContact extends SimulationReturnCurrentContactBase {
4880
+ contact_type: "pcb_copper_pour"
4881
+ pcb_copper_pour_id: string
4882
+ }
4883
+ ```
4884
+
4794
4885
  ### SimulationReturnCurrentExcitation
4795
4886
 
4796
4887
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/simulation/simulation_return_current_excitation.ts)
@@ -4810,6 +4901,26 @@ interface SimulationReturnCurrentExcitation {
4810
4901
  }
4811
4902
  ```
4812
4903
 
4904
+ ### SimulationReturnCurrentGridJson
4905
+
4906
+ [Source](https://github.com/tscircuit/circuit-json/blob/main/src/simulation/simulation_return_current_grid_json.ts)
4907
+
4908
+ ```typescript
4909
+ type SimulationReturnCurrentGridJson =
4910
+ | {
4911
+ field_type: "real"
4912
+ sheet_current_x: (number | null)[]
4913
+ sheet_current_y: (number | null)[]
4914
+ }
4915
+ | {
4916
+ field_type: "complex_phasor"
4917
+ sheet_current_x_real: (number | null)[]
4918
+ sheet_current_x_imag: (number | null)[]
4919
+ sheet_current_y_real: (number | null)[]
4920
+ sheet_current_y_imag: (number | null)[]
4921
+ }
4922
+ ```
4923
+
4813
4924
  ### SimulationSpiceSubcircuit
4814
4925
 
4815
4926
  [Source](https://github.com/tscircuit/circuit-json/blob/main/src/simulation/simulation_spice_subcircuit.ts)
@@ -4893,6 +5004,7 @@ interface SimulationTransientVoltageGraph {
4893
5004
  type: "simulation_transient_voltage_graph"
4894
5005
  simulation_transient_voltage_graph_id: string
4895
5006
  simulation_experiment_id: string
5007
+ simulation_voltage_probe_id?: string
4896
5008
  simulation_parameter_sweep_coordinate?: SimulationParameterSweepCoordinate
4897
5009
  timestamps_ms?: number[]
4898
5010
  voltage_levels: number[]
@@ -4951,8 +5063,7 @@ interface SimulationVoltageProbe {
4951
5063
 
4952
5064
  ```typescript
4953
5065
  type SimulationVoltageSource =
4954
- | SimulationDcVoltageSource
4955
- | SimulationAcVoltageSource
5066
+ SimulationDcVoltageSource | SimulationAcVoltageSource
4956
5067
 
4957
5068
  /** Defines a DC voltage source for simulation purposes. It applies a voltage
4958
5069
  * difference between two source ports. */
@@ -4994,4 +5105,71 @@ interface SimulationAcVoltageSource {
4994
5105
  }
4995
5106
  ```
4996
5107
 
5108
+ ## Drawing Elements
5109
+
5110
+ ### DrawingPage
5111
+
5112
+ ```typescript
5113
+ interface DrawingPage {
5114
+ type: "drawing_page"
5115
+ drawing_page_id: string
5116
+ name?: string
5117
+ display_name?: string
5118
+ page_size?: DrawingPageSize
5119
+ orientation?: "landscape" | "portrait"
5120
+ width: number
5121
+ height: number
5122
+ }
5123
+ ```
5124
+
5125
+ ### DrawingPageTitleBlock
5126
+
5127
+ ```typescript
5128
+ interface DrawingPageTitleBlock {
5129
+ type: "drawing_page_title_block"
5130
+ drawing_page_title_block_id: string
5131
+ drawing_page_id: string
5132
+ title: string
5133
+ legal_owner?: string
5134
+ identification_number?: string
5135
+ revision_index?: string
5136
+ date_of_issue?: string
5137
+ creator?: string
5138
+ approval_person?: string
5139
+ sheet_number?: number
5140
+ number_of_sheets?: number
5141
+ }
5142
+ ```
5143
+
5144
+ ### DrawingPartView
5145
+
5146
+ ```typescript
5147
+ interface DrawingPartView {
5148
+ type: "drawing_part_view"
5149
+ drawing_part_view_id: string
5150
+ drawing_page_id: string
5151
+ /** Resolved geometry selection for this part view; omitted selectors mean the entire assembly. */
5152
+ source_group_id?: string
5153
+ source_component_ids?: string[]
5154
+ name?: string
5155
+ display_name?: string
5156
+ direction: DrawingPartViewDirection
5157
+ center: { x: number; y: number }
5158
+ width: number
5159
+ height: number
5160
+ /** Model-to-paper ratio; omitted means fit with a margin. */
5161
+ scale?: number
5162
+ /** False when omitted. Hidden edges are dashed. */
5163
+ show_hidden_edges?: boolean
5164
+ section?: DrawingSectionPlane
5165
+ }
5166
+
5167
+ interface DrawingSectionPlane {
5168
+ axis: "x" | "y" | "z"
5169
+ offset: number
5170
+ keep_side: "less" | "greater"
5171
+ hatch_spacing?: number
5172
+ }
5173
+ ```
5174
+
4997
5175
  <!-- circuit-json-docs:end -->