circuit-json 0.0.486 → 0.0.487
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/README.md +6 -1
- package/dist/index.d.mts +165 -4
- package/dist/index.mjs +10 -1
- package/dist/index.mjs.map +1 -1
- package/package.json +1 -1
package/README.md
CHANGED
|
@@ -2922,10 +2922,15 @@ interface PcbVia {
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|
|
2922
2922
|
pcb_trace_id?: string
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|
2923
2923
|
net_is_assignable?: boolean
|
|
2924
2924
|
net_assigned?: boolean
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|
2925
|
-
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|
2925
|
+
tented_on_top?: boolean
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2926
|
+
tented_on_bottom?: boolean
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2926
2927
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}
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2927
2928
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```
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2928
2929
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2930
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+
Legacy `is_tented` input is deprecated and transformed into `tented_on_top` and
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2931
|
+
`tented_on_bottom`. Explicit per-side values take precedence. Parsed output omits
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2932
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+
`is_tented`; both per-side fields are optional.
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2933
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+
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2929
2934
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### PcbViaClearanceError
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2930
2935
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2931
2936
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[Source](https://github.com/tscircuit/circuit-json/blob/main/src/pcb/pcb_via_clearance_error.ts)
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package/dist/index.d.mts
CHANGED
|
@@ -8341,7 +8341,7 @@ interface PcbNet {
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|
|
8341
8341
|
highlight_color?: string;
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8342
8342
|
}
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8343
8343
|
|
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8344
|
-
declare const pcb_via: z.ZodObject<{
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8344
|
+
declare const pcb_via: z.ZodEffects<z.ZodObject<{
|
|
8345
8345
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type: z.ZodLiteral<"pcb_via">;
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8346
8346
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pcb_via_id: z.ZodDefault<z.ZodOptional<z.ZodString>>;
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8347
8347
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pcb_group_id: z.ZodOptional<z.ZodString>;
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@@ -8385,7 +8385,10 @@ declare const pcb_via: z.ZodObject<{
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|
8385
8385
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source_net_id: z.ZodOptional<z.ZodString>;
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8386
8386
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net_is_assignable: z.ZodOptional<z.ZodBoolean>;
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8387
8387
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net_assigned: z.ZodOptional<z.ZodBoolean>;
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8388
|
+
/** @deprecated Use tented_on_top and tented_on_bottom instead. */
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8388
8389
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is_tented: z.ZodOptional<z.ZodBoolean>;
|
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8390
|
+
tented_on_top: z.ZodOptional<z.ZodBoolean>;
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8391
|
+
tented_on_bottom: z.ZodOptional<z.ZodBoolean>;
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8389
8392
|
}, "strip", z.ZodTypeAny, {
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8390
8393
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type: "pcb_via";
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8391
8394
|
x: number;
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@@ -8405,6 +8408,8 @@ declare const pcb_via: z.ZodObject<{
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8405
8408
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net_is_assignable?: boolean | undefined;
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8406
8409
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net_assigned?: boolean | undefined;
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8407
8410
|
is_tented?: boolean | undefined;
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|
8411
|
+
tented_on_top?: boolean | undefined;
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8412
|
+
tented_on_bottom?: boolean | undefined;
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8408
8413
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}, {
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8409
8414
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type: "pcb_via";
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8410
8415
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x: string | number;
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@@ -8430,6 +8435,55 @@ declare const pcb_via: z.ZodObject<{
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8430
8435
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net_is_assignable?: boolean | undefined;
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8431
8436
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net_assigned?: boolean | undefined;
|
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8432
8437
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is_tented?: boolean | undefined;
|
|
8438
|
+
tented_on_top?: boolean | undefined;
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|
8439
|
+
tented_on_bottom?: boolean | undefined;
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|
8440
|
+
}>, {
|
|
8441
|
+
type: "pcb_via";
|
|
8442
|
+
x: number;
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|
8443
|
+
y: number;
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|
8444
|
+
layers: ("top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8")[];
|
|
8445
|
+
hole_diameter: number;
|
|
8446
|
+
outer_diameter: number;
|
|
8447
|
+
pcb_via_id: string;
|
|
8448
|
+
to_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | undefined;
|
|
8449
|
+
subcircuit_id?: string | undefined;
|
|
8450
|
+
pcb_group_id?: string | undefined;
|
|
8451
|
+
from_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | undefined;
|
|
8452
|
+
source_trace_id?: string | undefined;
|
|
8453
|
+
pcb_trace_id?: string | undefined;
|
|
8454
|
+
source_net_id?: string | undefined;
|
|
8455
|
+
subcircuit_connectivity_map_key?: string | undefined;
|
|
8456
|
+
net_is_assignable?: boolean | undefined;
|
|
8457
|
+
net_assigned?: boolean | undefined;
|
|
8458
|
+
tented_on_top?: boolean | undefined;
|
|
8459
|
+
tented_on_bottom?: boolean | undefined;
|
|
8460
|
+
}, {
|
|
8461
|
+
type: "pcb_via";
|
|
8462
|
+
x: string | number;
|
|
8463
|
+
y: string | number;
|
|
8464
|
+
layers: ("top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | {
|
|
8465
|
+
name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8";
|
|
8466
|
+
})[];
|
|
8467
|
+
to_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | {
|
|
8468
|
+
name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8";
|
|
8469
|
+
} | undefined;
|
|
8470
|
+
subcircuit_id?: string | undefined;
|
|
8471
|
+
pcb_group_id?: string | undefined;
|
|
8472
|
+
hole_diameter?: string | number | undefined;
|
|
8473
|
+
outer_diameter?: string | number | undefined;
|
|
8474
|
+
from_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | {
|
|
8475
|
+
name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8";
|
|
8476
|
+
} | undefined;
|
|
8477
|
+
source_trace_id?: string | undefined;
|
|
8478
|
+
pcb_trace_id?: string | undefined;
|
|
8479
|
+
source_net_id?: string | undefined;
|
|
8480
|
+
pcb_via_id?: string | undefined;
|
|
8481
|
+
subcircuit_connectivity_map_key?: string | undefined;
|
|
8482
|
+
net_is_assignable?: boolean | undefined;
|
|
8483
|
+
net_assigned?: boolean | undefined;
|
|
8484
|
+
is_tented?: boolean | undefined;
|
|
8485
|
+
tented_on_top?: boolean | undefined;
|
|
8486
|
+
tented_on_bottom?: boolean | undefined;
|
|
8433
8487
|
}>;
|
|
8434
8488
|
type PcbViaInput = z.input<typeof pcb_via>;
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|
8435
8489
|
/**
|
|
@@ -8455,7 +8509,8 @@ interface PcbVia {
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|
|
8455
8509
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source_net_id?: string;
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|
8456
8510
|
net_is_assignable?: boolean;
|
|
8457
8511
|
net_assigned?: boolean;
|
|
8458
|
-
|
|
8512
|
+
tented_on_top?: boolean;
|
|
8513
|
+
tented_on_bottom?: boolean;
|
|
8459
8514
|
}
|
|
8460
8515
|
/**
|
|
8461
8516
|
* @deprecated use PcbVia
|
|
@@ -43220,7 +43275,7 @@ declare const any_circuit_element: z.ZodUnion<[z.ZodObject<{
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|
|
43220
43275
|
warning_type?: "pcb_trace_too_many_vias_warning" | undefined;
|
|
43221
43276
|
source_net_id?: string | undefined;
|
|
43222
43277
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pcb_trace_too_many_vias_warning_id?: string | undefined;
|
|
43223
|
-
}>, z.ZodObject<{
|
|
43278
|
+
}>, z.ZodEffects<z.ZodObject<{
|
|
43224
43279
|
type: z.ZodLiteral<"pcb_via">;
|
|
43225
43280
|
pcb_via_id: z.ZodDefault<z.ZodOptional<z.ZodString>>;
|
|
43226
43281
|
pcb_group_id: z.ZodOptional<z.ZodString>;
|
|
@@ -43263,6 +43318,8 @@ declare const any_circuit_element: z.ZodUnion<[z.ZodObject<{
|
|
|
43263
43318
|
net_is_assignable: z.ZodOptional<z.ZodBoolean>;
|
|
43264
43319
|
net_assigned: z.ZodOptional<z.ZodBoolean>;
|
|
43265
43320
|
is_tented: z.ZodOptional<z.ZodBoolean>;
|
|
43321
|
+
tented_on_top: z.ZodOptional<z.ZodBoolean>;
|
|
43322
|
+
tented_on_bottom: z.ZodOptional<z.ZodBoolean>;
|
|
43266
43323
|
}, "strip", z.ZodTypeAny, {
|
|
43267
43324
|
type: "pcb_via";
|
|
43268
43325
|
x: number;
|
|
@@ -43282,6 +43339,8 @@ declare const any_circuit_element: z.ZodUnion<[z.ZodObject<{
|
|
|
43282
43339
|
net_is_assignable?: boolean | undefined;
|
|
43283
43340
|
net_assigned?: boolean | undefined;
|
|
43284
43341
|
is_tented?: boolean | undefined;
|
|
43342
|
+
tented_on_top?: boolean | undefined;
|
|
43343
|
+
tented_on_bottom?: boolean | undefined;
|
|
43285
43344
|
}, {
|
|
43286
43345
|
type: "pcb_via";
|
|
43287
43346
|
x: string | number;
|
|
@@ -43307,6 +43366,55 @@ declare const any_circuit_element: z.ZodUnion<[z.ZodObject<{
|
|
|
43307
43366
|
net_is_assignable?: boolean | undefined;
|
|
43308
43367
|
net_assigned?: boolean | undefined;
|
|
43309
43368
|
is_tented?: boolean | undefined;
|
|
43369
|
+
tented_on_top?: boolean | undefined;
|
|
43370
|
+
tented_on_bottom?: boolean | undefined;
|
|
43371
|
+
}>, {
|
|
43372
|
+
type: "pcb_via";
|
|
43373
|
+
x: number;
|
|
43374
|
+
y: number;
|
|
43375
|
+
layers: ("top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8")[];
|
|
43376
|
+
hole_diameter: number;
|
|
43377
|
+
outer_diameter: number;
|
|
43378
|
+
pcb_via_id: string;
|
|
43379
|
+
to_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | undefined;
|
|
43380
|
+
subcircuit_id?: string | undefined;
|
|
43381
|
+
pcb_group_id?: string | undefined;
|
|
43382
|
+
from_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | undefined;
|
|
43383
|
+
source_trace_id?: string | undefined;
|
|
43384
|
+
pcb_trace_id?: string | undefined;
|
|
43385
|
+
source_net_id?: string | undefined;
|
|
43386
|
+
subcircuit_connectivity_map_key?: string | undefined;
|
|
43387
|
+
net_is_assignable?: boolean | undefined;
|
|
43388
|
+
net_assigned?: boolean | undefined;
|
|
43389
|
+
tented_on_top?: boolean | undefined;
|
|
43390
|
+
tented_on_bottom?: boolean | undefined;
|
|
43391
|
+
}, {
|
|
43392
|
+
type: "pcb_via";
|
|
43393
|
+
x: string | number;
|
|
43394
|
+
y: string | number;
|
|
43395
|
+
layers: ("top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | {
|
|
43396
|
+
name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8";
|
|
43397
|
+
})[];
|
|
43398
|
+
to_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | {
|
|
43399
|
+
name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8";
|
|
43400
|
+
} | undefined;
|
|
43401
|
+
subcircuit_id?: string | undefined;
|
|
43402
|
+
pcb_group_id?: string | undefined;
|
|
43403
|
+
hole_diameter?: string | number | undefined;
|
|
43404
|
+
outer_diameter?: string | number | undefined;
|
|
43405
|
+
from_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | {
|
|
43406
|
+
name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8";
|
|
43407
|
+
} | undefined;
|
|
43408
|
+
source_trace_id?: string | undefined;
|
|
43409
|
+
pcb_trace_id?: string | undefined;
|
|
43410
|
+
source_net_id?: string | undefined;
|
|
43411
|
+
pcb_via_id?: string | undefined;
|
|
43412
|
+
subcircuit_connectivity_map_key?: string | undefined;
|
|
43413
|
+
net_is_assignable?: boolean | undefined;
|
|
43414
|
+
net_assigned?: boolean | undefined;
|
|
43415
|
+
is_tented?: boolean | undefined;
|
|
43416
|
+
tented_on_top?: boolean | undefined;
|
|
43417
|
+
tented_on_bottom?: boolean | undefined;
|
|
43310
43418
|
}>, z.ZodDiscriminatedUnion<"shape", [z.ZodObject<{
|
|
43311
43419
|
type: z.ZodLiteral<"pcb_smtpad">;
|
|
43312
43420
|
shape: z.ZodLiteral<"circle">;
|
|
@@ -63685,7 +63793,7 @@ declare const any_soup_element: z.ZodUnion<[z.ZodObject<{
|
|
|
63685
63793
|
warning_type?: "pcb_trace_too_many_vias_warning" | undefined;
|
|
63686
63794
|
source_net_id?: string | undefined;
|
|
63687
63795
|
pcb_trace_too_many_vias_warning_id?: string | undefined;
|
|
63688
|
-
}>, z.ZodObject<{
|
|
63796
|
+
}>, z.ZodEffects<z.ZodObject<{
|
|
63689
63797
|
type: z.ZodLiteral<"pcb_via">;
|
|
63690
63798
|
pcb_via_id: z.ZodDefault<z.ZodOptional<z.ZodString>>;
|
|
63691
63799
|
pcb_group_id: z.ZodOptional<z.ZodString>;
|
|
@@ -63728,6 +63836,8 @@ declare const any_soup_element: z.ZodUnion<[z.ZodObject<{
|
|
|
63728
63836
|
net_is_assignable: z.ZodOptional<z.ZodBoolean>;
|
|
63729
63837
|
net_assigned: z.ZodOptional<z.ZodBoolean>;
|
|
63730
63838
|
is_tented: z.ZodOptional<z.ZodBoolean>;
|
|
63839
|
+
tented_on_top: z.ZodOptional<z.ZodBoolean>;
|
|
63840
|
+
tented_on_bottom: z.ZodOptional<z.ZodBoolean>;
|
|
63731
63841
|
}, "strip", z.ZodTypeAny, {
|
|
63732
63842
|
type: "pcb_via";
|
|
63733
63843
|
x: number;
|
|
@@ -63747,6 +63857,55 @@ declare const any_soup_element: z.ZodUnion<[z.ZodObject<{
|
|
|
63747
63857
|
net_is_assignable?: boolean | undefined;
|
|
63748
63858
|
net_assigned?: boolean | undefined;
|
|
63749
63859
|
is_tented?: boolean | undefined;
|
|
63860
|
+
tented_on_top?: boolean | undefined;
|
|
63861
|
+
tented_on_bottom?: boolean | undefined;
|
|
63862
|
+
}, {
|
|
63863
|
+
type: "pcb_via";
|
|
63864
|
+
x: string | number;
|
|
63865
|
+
y: string | number;
|
|
63866
|
+
layers: ("top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | {
|
|
63867
|
+
name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8";
|
|
63868
|
+
})[];
|
|
63869
|
+
to_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | {
|
|
63870
|
+
name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8";
|
|
63871
|
+
} | undefined;
|
|
63872
|
+
subcircuit_id?: string | undefined;
|
|
63873
|
+
pcb_group_id?: string | undefined;
|
|
63874
|
+
hole_diameter?: string | number | undefined;
|
|
63875
|
+
outer_diameter?: string | number | undefined;
|
|
63876
|
+
from_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | {
|
|
63877
|
+
name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8";
|
|
63878
|
+
} | undefined;
|
|
63879
|
+
source_trace_id?: string | undefined;
|
|
63880
|
+
pcb_trace_id?: string | undefined;
|
|
63881
|
+
source_net_id?: string | undefined;
|
|
63882
|
+
pcb_via_id?: string | undefined;
|
|
63883
|
+
subcircuit_connectivity_map_key?: string | undefined;
|
|
63884
|
+
net_is_assignable?: boolean | undefined;
|
|
63885
|
+
net_assigned?: boolean | undefined;
|
|
63886
|
+
is_tented?: boolean | undefined;
|
|
63887
|
+
tented_on_top?: boolean | undefined;
|
|
63888
|
+
tented_on_bottom?: boolean | undefined;
|
|
63889
|
+
}>, {
|
|
63890
|
+
type: "pcb_via";
|
|
63891
|
+
x: number;
|
|
63892
|
+
y: number;
|
|
63893
|
+
layers: ("top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8")[];
|
|
63894
|
+
hole_diameter: number;
|
|
63895
|
+
outer_diameter: number;
|
|
63896
|
+
pcb_via_id: string;
|
|
63897
|
+
to_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | undefined;
|
|
63898
|
+
subcircuit_id?: string | undefined;
|
|
63899
|
+
pcb_group_id?: string | undefined;
|
|
63900
|
+
from_layer?: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | "inner7" | "inner8" | undefined;
|
|
63901
|
+
source_trace_id?: string | undefined;
|
|
63902
|
+
pcb_trace_id?: string | undefined;
|
|
63903
|
+
source_net_id?: string | undefined;
|
|
63904
|
+
subcircuit_connectivity_map_key?: string | undefined;
|
|
63905
|
+
net_is_assignable?: boolean | undefined;
|
|
63906
|
+
net_assigned?: boolean | undefined;
|
|
63907
|
+
tented_on_top?: boolean | undefined;
|
|
63908
|
+
tented_on_bottom?: boolean | undefined;
|
|
63750
63909
|
}, {
|
|
63751
63910
|
type: "pcb_via";
|
|
63752
63911
|
x: string | number;
|
|
@@ -63772,6 +63931,8 @@ declare const any_soup_element: z.ZodUnion<[z.ZodObject<{
|
|
|
63772
63931
|
net_is_assignable?: boolean | undefined;
|
|
63773
63932
|
net_assigned?: boolean | undefined;
|
|
63774
63933
|
is_tented?: boolean | undefined;
|
|
63934
|
+
tented_on_top?: boolean | undefined;
|
|
63935
|
+
tented_on_bottom?: boolean | undefined;
|
|
63775
63936
|
}>, z.ZodDiscriminatedUnion<"shape", [z.ZodObject<{
|
|
63776
63937
|
type: z.ZodLiteral<"pcb_smtpad">;
|
|
63777
63938
|
shape: z.ZodLiteral<"circle">;
|
package/dist/index.mjs
CHANGED
|
@@ -2689,7 +2689,16 @@ var pcb_via = z123.object({
|
|
|
2689
2689
|
source_net_id: z123.string().min(1).optional(),
|
|
2690
2690
|
net_is_assignable: z123.boolean().optional(),
|
|
2691
2691
|
net_assigned: z123.boolean().optional(),
|
|
2692
|
-
|
|
2692
|
+
/** @deprecated Use tented_on_top and tented_on_bottom instead. */
|
|
2693
|
+
is_tented: z123.boolean().optional(),
|
|
2694
|
+
tented_on_top: z123.boolean().optional(),
|
|
2695
|
+
tented_on_bottom: z123.boolean().optional()
|
|
2696
|
+
}).transform(({ is_tented, ...via }) => {
|
|
2697
|
+
if (is_tented !== void 0) {
|
|
2698
|
+
via.tented_on_top ??= is_tented;
|
|
2699
|
+
via.tented_on_bottom ??= is_tented;
|
|
2700
|
+
}
|
|
2701
|
+
return via;
|
|
2693
2702
|
}).describe("Defines a via on the PCB");
|
|
2694
2703
|
expectTypesMatch(true);
|
|
2695
2704
|
|