circuit-json-to-spice 0.0.24 → 0.0.25
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/package.json +1 -1
- package/tests/examples/ac-voltage-source.test.tsx +2 -21
- package/tests/examples/assets/AC-voltage-source.json +474 -0
- package/tests/examples/assets/Boost-converter-circuit.json +1739 -0
- package/tests/examples/assets/circuit-with-multiple-components.json +558 -0
- package/tests/examples/assets/circuit-with-unrelated-voltage-source-components.json +3890 -0
- package/tests/examples/assets/circuit1-simple-resistor-divider.json +298 -0
- package/tests/examples/assets/example01.json +301 -0
- package/tests/examples/assets/simple-resistor-divider.json +1620 -0
- package/tests/examples/boost-converter.test.tsx +2 -71
- package/tests/examples/circuit1.test.tsx +4 -32
- package/tests/examples/circuit2.test.tsx +2 -45
- package/tests/examples/example01.test.tsx +3 -22
- package/tests/examples/voltage-divider.test.tsx +2 -49
- package/tests/unit/assets/RC-circuit-with-trace.json +354 -0
- package/tests/unit/assets/circuit-with-simulation-voltage-source.json +978 -0
- package/tests/unit/assets/single-resistor-circuit.json +190 -0
- package/tests/unit/circuit-json-conversion.test.tsx +7 -57
- package/tests/fixtures/getTestFixture.tsx +0 -7
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[
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{
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"type": "source_project_metadata",
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"source_project_metadata_id": "source_project_metadata_0",
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"software_used_string": "@tscircuit/core@0.0.874"
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},
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{
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"type": "source_group",
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"source_group_id": "source_group_0",
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"is_subcircuit": true,
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"was_automatically_named": true,
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_0",
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"name": "pin1",
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"pin_number": 1,
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"port_hints": ["pin1", "anode", "pos", "left", "1"],
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_1",
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"name": "pin2",
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"pin_number": 2,
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"port_hints": ["pin2", "cathode", "neg", "right", "2"],
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0",
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"subcircuit_connectivity_map_key": "unnamedsubcircuit4_connectivity_net0"
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},
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{
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"type": "source_component",
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"source_component_id": "source_component_0",
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"ftype": "simple_resistor",
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"name": "R1",
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"resistance": 1000,
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"display_resistance": "1kΩ",
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"are_pins_interchangeable": true,
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"source_group_id": "source_group_0"
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},
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{
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"type": "source_net",
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"source_net_id": "source_net_0",
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"name": "GND",
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"member_source_group_ids": [],
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"is_ground": true,
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"is_power": false,
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"is_positive_voltage_source": false,
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"subcircuit_id": "subcircuit_source_group_0",
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"subcircuit_connectivity_map_key": "unnamedsubcircuit4_connectivity_net0"
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},
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{
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"type": "source_board",
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"source_board_id": "source_board_0",
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"source_group_id": "source_group_0"
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},
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{
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"type": "source_trace",
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"source_trace_id": "source_trace_0",
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"connected_source_port_ids": ["source_port_1"],
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"connected_source_net_ids": ["source_net_0"],
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"subcircuit_id": "subcircuit_source_group_0",
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"display_name": ".R1 > .pin2 to net.GND",
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"subcircuit_connectivity_map_key": "unnamedsubcircuit4_connectivity_net0"
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},
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{
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"type": "source_pin_missing_trace_warning",
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"source_pin_missing_trace_warning_id": "source_pin_missing_trace_warning_0",
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"message": "Port pin1 on R1 is missing a trace",
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"source_component_id": "source_component_0",
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"source_port_id": "source_port_0",
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"subcircuit_id": "subcircuit_source_group_0",
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"warning_type": "source_pin_missing_trace_warning"
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},
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{
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"type": "schematic_component",
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"schematic_component_id": "schematic_component_0",
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"center": {
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"x": 0,
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"y": 0
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},
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"size": {
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"width": 1.1,
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"height": 0.388910699999999
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},
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"source_component_id": "source_component_0",
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"is_box_with_pins": true,
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"symbol_name": "boxresistor_right",
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"symbol_display_value": "1kΩ",
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"schematic_group_id": "schematic_group_0"
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},
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{
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"type": "schematic_group",
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"schematic_group_id": "schematic_group_0",
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"is_subcircuit": true,
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"subcircuit_id": "subcircuit_source_group_0",
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"name": "unnamed_board1",
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"center": {
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"x": 0,
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"y": 0
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},
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"width": 0,
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"height": 0,
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"schematic_component_ids": [],
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"source_group_id": "source_group_0"
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},
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{
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"type": "schematic_port",
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"schematic_port_id": "schematic_port_0",
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"schematic_component_id": "schematic_component_0",
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"center": {
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"x": -0.55,
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"y": 0
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},
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"source_port_id": "source_port_0",
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"facing_direction": "left",
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"distance_from_component_edge": 0.4,
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"pin_number": 1,
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"display_pin_label": "anode",
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"is_connected": false
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},
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{
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"type": "schematic_port",
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"schematic_port_id": "schematic_port_1",
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"schematic_component_id": "schematic_component_0",
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"center": {
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"x": 0.55,
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"y": 0
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},
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"source_port_id": "source_port_1",
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"facing_direction": "right",
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"distance_from_component_edge": 0.4,
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"pin_number": 2,
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"display_pin_label": "cathode",
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"is_connected": false
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},
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{
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"type": "schematic_net_label",
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"schematic_net_label_id": "schematic_net_label_0",
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"text": "GND",
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"anchor_position": {
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"x": 0.55,
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"y": 0
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},
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"center": {
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"x": 0.7000000000000001,
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"y": 0
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},
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"anchor_side": "left",
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"source_net_id": "source_net_0"
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},
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{
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"type": "pcb_component",
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"pcb_component_id": "pcb_component_0",
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"center": {
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"x": 0,
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"y": 0
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},
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"width": 0,
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"height": 0,
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"layer": "top",
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"rotation": 0,
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0",
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"do_not_place": false,
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"obstructs_within_bounds": true
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},
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{
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"type": "pcb_missing_footprint_error",
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"pcb_missing_footprint_error_id": "pcb_missing_footprint_error_0",
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"message": "No footprint found for component: <resistor#0 name=\".R1\" />",
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"source_component_id": "source_component_0",
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"error_type": "pcb_missing_footprint_error"
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},
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{
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"type": "pcb_board",
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"pcb_board_id": "pcb_board_0",
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"center": {
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"x": 0,
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"y": 0
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},
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"thickness": 1.4,
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"num_layers": 2,
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"width": 0,
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"height": 0,
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"material": "fr4"
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}
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]
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import { test, expect } from "bun:test"
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import { circuitJsonToSpice } from "lib/circuitJsonToSpice"
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import type { AnyCircuitElement } from "circuit-json"
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import
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import
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import singleResistorCircuit from "./assets/single-resistor-circuit.json"
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import rcCircuitWithTrace from "./assets/RC-circuit-with-trace.json"
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import circuitWithSimulationVoltageSource from "./assets/circuit-with-simulation-voltage-source.json"
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test("empty circuit JSON", () => {
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const circuitJson: AnyCircuitElement[] = []
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})
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test("single resistor circuit", async () => {
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const
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circuit.add(
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<board>
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<resistor name="R1" resistance="1k" />
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<trace from="net.GND" to={sel.R1.pin2} />
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</board>,
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)
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await circuit.renderUntilSettled()
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const circuitJson = circuit.getCircuitJson()
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const circuitJson = singleResistorCircuit as any
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const netlist = circuitJsonToSpice(circuitJson)
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expect(netlist.components).toHaveLength(1)
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})
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test("RC circuit with trace", async () => {
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const
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circuit.add(
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<board>
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<resistor name="R1" resistance="1k" />
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<capacitor name="C1" capacitance="1uF" />
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<trace from={sel.R1.pin2} to={sel.C1.pin1} />
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<trace from="net.GND1" to={sel.R1.pin1} />
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<trace from="net.GND2" to={sel.C1.pin2} />
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</board>,
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)
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await circuit.renderUntilSettled()
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const circuitJson = circuit.getCircuitJson()
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const circuitJson = rcCircuitWithTrace as any
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const netlist = circuitJsonToSpice(circuitJson)
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expect(netlist.components).toHaveLength(2)
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@@ -66,33 +42,7 @@ test("RC circuit with trace", async () => {
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})
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test("circuit with simulation voltage source", async () => {
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const
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circuit.add(
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<board>
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<resistor name="R1" resistance="1k" />
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<chip
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name="U1"
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footprint="soic8"
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pinLabels={{
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pin2: "GND",
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pin3: "VOUT",
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}}
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pinAttributes={{
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VOUT: { providesPower: true, providesVoltage: 5 },
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GND: { providesGround: true },
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}}
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/>
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<trace from={"net.VCC"} to={sel<"VOUT">("U1").VOUT} />
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<trace from={"net.GND"} to={sel<"GND">("U1").GND} />
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<trace from={"net.VCC"} to={sel.R1.pin1} />
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<trace from={"net.GND"} to={sel.R1.pin2} />
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</board>,
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)
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await circuit.renderUntilSettled()
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const circuitJson = circuit.getCircuitJson()
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const circuitJson = circuitWithSimulationVoltageSource as any
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const netlist = circuitJsonToSpice(circuitJson)
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expect(netlist.components).toHaveLength(2)
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@@ -118,7 +68,7 @@ test("simple switch uses simulation switch control", () => {
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source_component_id: "SW1",
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name: "SW1",
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ftype: "simple_switch",
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}
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},
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{
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type: "source_net",
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source_net_id: "net_gnd",
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