ac6502 1.16.1 → 1.17.0

package/dist/tests/IO/ACIA.test.js.map

@@ -1 +1 @@
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package/package.json

@@ -1,6 +1,6 @@
 {
   "name": "ac6502",
-  "version": "1.16.1",
+  "version": "1.17.0",
   "description": "Emulator for the A.C. Wright 6502 project",
   "main": "dist/lib.js",
   "types": "dist/lib.d.ts",

package/src/components/CPU.ts

@@ -375,6 +375,20 @@ export class CPU {
     }
   }
 
+  // IZP - Zero Page Indirect - (zp)
+  // 65C02-only addressing mode used by ORA/AND/EOR/ADC/STA/LDA/CMP/SBC (zp)
+  private IZP(): number {
+    const t = this.read(this.pc)
+    this.incPC()
+
+    const lo = this.read(t & 0x00FF)
+    const hi = this.read((t + 1) & 0x00FF)
+
+    this.addrAbs = (hi << 8) | lo
+
+    return 0
+  }
+
   // IAX - Indexed Absolute Indirect - (a,x)
   // Used by JMP (addr,X) on 65C02
   private IAX(): number {
@@ -1191,7 +1205,7 @@ export class CPU {
 
     { name: 'BPL', cycles: 2, opcode: this.BPL.bind(this), addrMode: this.REL.bind(this) },
     { name: 'ORA', cycles: 5, opcode: this.ORA.bind(this), addrMode: this.IZY.bind(this) },
-    { name: '???', cycles: 2, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
+    { name: 'ORA', cycles: 5, opcode: this.ORA.bind(this), addrMode: this.IZP.bind(this) },
     { name: '???', cycles: 8, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
     { name: 'TRB', cycles: 5, opcode: this.TRB.bind(this), addrMode: this.ZP0.bind(this) },
     { name: 'ORA', cycles: 4, opcode: this.ORA.bind(this), addrMode: this.ZPX.bind(this) },
@@ -1225,7 +1239,7 @@ export class CPU {
 
     { name: 'BMI', cycles: 2, opcode: this.BMI.bind(this), addrMode: this.REL.bind(this) },
     { name: 'AND', cycles: 5, opcode: this.AND.bind(this), addrMode: this.IZY.bind(this) },
-    { name: '???', cycles: 2, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
+    { name: 'AND', cycles: 5, opcode: this.AND.bind(this), addrMode: this.IZP.bind(this) },
     { name: '???', cycles: 8, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
     { name: '???', cycles: 4, opcode: this.NOP.bind(this), addrMode: this.IMP.bind(this) },
     { name: 'AND', cycles: 4, opcode: this.AND.bind(this), addrMode: this.ZPX.bind(this) },
@@ -1259,7 +1273,7 @@ export class CPU {
 
     { name: 'BVC', cycles: 2, opcode: this.BVC.bind(this), addrMode: this.REL.bind(this) },
     { name: 'EOR', cycles: 5, opcode: this.EOR.bind(this), addrMode: this.IZY.bind(this) },
-    { name: '???', cycles: 2, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
+    { name: 'EOR', cycles: 5, opcode: this.EOR.bind(this), addrMode: this.IZP.bind(this) },
     { name: '???', cycles: 8, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
     { name: '???', cycles: 4, opcode: this.NOP.bind(this), addrMode: this.IMP.bind(this) },
     { name: 'EOR', cycles: 4, opcode: this.EOR.bind(this), addrMode: this.ZPX.bind(this) },
@@ -1293,7 +1307,7 @@ export class CPU {
 
     { name: 'BVS', cycles: 2, opcode: this.BVS.bind(this), addrMode: this.REL.bind(this) },
     { name: 'ADC', cycles: 5, opcode: this.ADC.bind(this), addrMode: this.IZY.bind(this) },
-    { name: '???', cycles: 2, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
+    { name: 'ADC', cycles: 5, opcode: this.ADC.bind(this), addrMode: this.IZP.bind(this) },
     { name: '???', cycles: 8, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
     { name: 'STZ', cycles: 4, opcode: this.STZ.bind(this), addrMode: this.ZPX.bind(this) },
     { name: 'ADC', cycles: 4, opcode: this.ADC.bind(this), addrMode: this.ZPX.bind(this) },
@@ -1327,7 +1341,7 @@ export class CPU {
 
     { name: 'BCC', cycles: 2, opcode: this.BCC.bind(this), addrMode: this.REL.bind(this) },
     { name: 'STA', cycles: 6, opcode: this.STA.bind(this), addrMode: this.IZY.bind(this) },
-    { name: '???', cycles: 2, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
+    { name: 'STA', cycles: 5, opcode: this.STA.bind(this), addrMode: this.IZP.bind(this) },
     { name: '???', cycles: 6, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
     { name: 'STY', cycles: 4, opcode: this.STY.bind(this), addrMode: this.ZPX.bind(this) },
     { name: 'STA', cycles: 4, opcode: this.STA.bind(this), addrMode: this.ZPX.bind(this) },
@@ -1361,7 +1375,7 @@ export class CPU {
 
     { name: 'BCS', cycles: 2, opcode: this.BCS.bind(this), addrMode: this.REL.bind(this) },
     { name: 'LDA', cycles: 5, opcode: this.LDA.bind(this), addrMode: this.IZY.bind(this) },
-    { name: '???', cycles: 2, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
+    { name: 'LDA', cycles: 5, opcode: this.LDA.bind(this), addrMode: this.IZP.bind(this) },
     { name: '???', cycles: 5, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
     { name: 'LDY', cycles: 4, opcode: this.LDY.bind(this), addrMode: this.ZPX.bind(this) },
     { name: 'LDA', cycles: 4, opcode: this.LDA.bind(this), addrMode: this.ZPX.bind(this) },
@@ -1395,7 +1409,7 @@ export class CPU {
 
     { name: 'BNE', cycles: 2, opcode: this.BNE.bind(this), addrMode: this.REL.bind(this) },
     { name: 'CMP', cycles: 5, opcode: this.CMP.bind(this), addrMode: this.IZY.bind(this) },
-    { name: '???', cycles: 2, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
+    { name: 'CMP', cycles: 5, opcode: this.CMP.bind(this), addrMode: this.IZP.bind(this) },
     { name: '???', cycles: 8, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
     { name: '???', cycles: 4, opcode: this.NOP.bind(this), addrMode: this.IMP.bind(this) },
     { name: 'CMP', cycles: 4, opcode: this.CMP.bind(this), addrMode: this.ZPX.bind(this) },
@@ -1429,7 +1443,7 @@ export class CPU {
 
     { name: 'BEQ', cycles: 2, opcode: this.BEQ.bind(this), addrMode: this.REL.bind(this) },
     { name: 'SBC', cycles: 5, opcode: this.SBC.bind(this), addrMode: this.IZY.bind(this) },
-    { name: '???', cycles: 2, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
+    { name: 'SBC', cycles: 5, opcode: this.SBC.bind(this), addrMode: this.IZP.bind(this) },
     { name: '???', cycles: 8, opcode: this.XXX.bind(this), addrMode: this.IMP.bind(this) },
     { name: '???', cycles: 4, opcode: this.NOP.bind(this), addrMode: this.IMP.bind(this) },
     { name: 'SBC', cycles: 4, opcode: this.SBC.bind(this), addrMode: this.ZPX.bind(this) },

package/src/components/IO/ACIA.ts

@@ -32,6 +32,10 @@ export class ACIA implements IO {
   private irqFlag: boolean = false
   private echoMode: boolean = false
 
+  // Receive queue — buffers incoming bytes from host serial port
+  // and delivers them one at a time via tick() to the single-byte rxRegister
+  private rxQueue: number[] = []
+
   /**
    * Read from ACIA register
    */
@@ -188,9 +192,22 @@ export class ACIA implements IO {
       if ((this.commandRegister & 0x0C) === 0x04) {
         this.irqFlag = true
       }
+    }
 
-      // Echo mode: received data echoed back
-      // (echo of transmitted data is handled in onData)
+    // Deliver next queued byte to rxRegister when empty
+    if (!this.rxRegFull && this.rxQueue.length > 0) {
+      this.rxRegister = this.rxQueue.shift()!
+      this.rxRegFull = true
+
+      // Trigger receive IRQ if enabled (bit 1 = 0 means enabled, active low)
+      if (!(this.commandRegister & 0x02)) {
+        this.irqFlag = true
+      }
+
+      // Echo mode: automatically transmit received data
+      if (this.echoMode && this.transmit) {
+        this.transmit(this.rxRegister)
+      }
     }
 
     // Return IRQ status
@@ -214,28 +231,13 @@ export class ACIA implements IO {
     this.framingError = false
     this.irqFlag = false
     this.echoMode = false
+    this.rxQueue = []
   }
 
   /**
-   * Receive data from external source
+   * Receive data from external source — queues the byte for delivery via tick()
    */
   onData(data: number): void {
-    if (this.rxRegFull) {
-      // Overrun: new data arrived before the previous byte was read
-      this.overrun = true
-    }
-
-    this.rxRegister = data & 0xFF
-    this.rxRegFull = true
-    
-    // Trigger receive IRQ if enabled (bit 1 = 0 means enabled, active low)
-    if (!(this.commandRegister & 0x02)) {
-      this.irqFlag = true
-    }
-
-    // Echo mode: automatically transmit received data
-    if (this.echoMode && this.transmit) {
-      this.transmit(data & 0xFF)
-    }
+    this.rxQueue.push(data & 0xFF)
   }
 }

package/src/index.ts

@@ -12,7 +12,7 @@ import sdl from '@kmamal/sdl'
 import { readFile, writeFile } from 'fs/promises'
 import { existsSync } from 'fs'
 
-const VERSION = '1.16.1'
+const VERSION = '1.17.0'
 const WIDTH = 320
 const HEIGHT = 240
 

package/src/tests/CPU.test.ts

@@ -249,6 +249,57 @@ describe('CPU', () => {
       
       expect(cpu.a).toBe(0x88)
     })
+
+    test('LDA (zp) [65C02] should load via zero-page indirect', () => {
+      // Zero-page pointer at $40/$41 -> $1234
+      memory[0x0040] = 0x34
+      memory[0x0041] = 0x12
+      memory[0x1234] = 0x77
+      memory[0x8000] = 0xB2  // LDA (zp)
+      memory[0x8001] = 0x40
+      memory[0xFFFC] = 0x00
+      memory[0xFFFD] = 0x80
+
+      cpu.reset()
+      cpu.step()
+
+      expect(cpu.a).toBe(0x77)
+    })
+
+    test('LDA (zp) [65C02] should wrap pointer high byte at zero-page boundary', () => {
+      // Pointer at $FF/$00 (wraps within zero page)
+      memory[0x00FF] = 0xCD
+      memory[0x0000] = 0xAB
+      memory[0xABCD] = 0x55
+      memory[0x8000] = 0xB2  // LDA (zp)
+      memory[0x8001] = 0xFF
+      memory[0xFFFC] = 0x00
+      memory[0xFFFD] = 0x80
+
+      cpu.reset()
+      cpu.step()
+
+      expect(cpu.a).toBe(0x55)
+    })
+
+    test('CMP (zp) [65C02] should compare via zero-page indirect', () => {
+      memory[0x0030] = 0x00
+      memory[0x0031] = 0x90
+      memory[0x9000] = 0x42
+      memory[0x8000] = 0xA9  // LDA #$42
+      memory[0x8001] = 0x42
+      memory[0x8002] = 0xD2  // CMP (zp)
+      memory[0x8003] = 0x30
+      memory[0xFFFC] = 0x00
+      memory[0xFFFD] = 0x80
+
+      cpu.reset()
+      cpu.step()  // LDA
+      cpu.step()  // CMP
+
+      expect(cpu.st & CPU.Z).toBe(CPU.Z)
+      expect(cpu.st & CPU.C).toBe(CPU.C)
+    })
   })
 
   describe('Store Instructions', () => {

package/src/tests/IO/ACIA.test.ts

@@ -34,6 +34,7 @@ describe('ACIA (6551 ACIA)', () => {
 
       it('should read data from receive buffer', () => {
         serialCard.onData(0x42)
+        serialCard.tick(1000000)
         const data = serialCard.read(0x00)
         expect(data).toBe(0x42)
       })
@@ -41,12 +42,14 @@ describe('ACIA (6551 ACIA)', () => {
       it('should mask data to 8 bits', () => {
         serialCard.write(0x00, 0x1FF) // More than 8 bits
         serialCard.onData(0x1FF)
+        serialCard.tick(1000000)
         const data = serialCard.read(0x00)
         expect(data).toBe(0xFF)
       })
 
       it('should return last received data if no new data available', () => {
         serialCard.onData(0x42)
+        serialCard.tick(1000000)
         let data = serialCard.read(0x00) // Read the data
         data = serialCard.read(0x00) // Read again with empty buffer
         // Should return last value received
@@ -57,12 +60,14 @@ describe('ACIA (6551 ACIA)', () => {
     describe('Status Register (0x01)', () => {
       it('should report Receive Data Register Full when data available', () => {
         serialCard.onData(0x50)
+        serialCard.tick(1000000)
         const status = serialCard.read(0x01)
         expect(status & 0x08).toBe(0x08) // RDRF bit set
       })
 
       it('should clear RDRF after reading data', () => {
         serialCard.onData(0x50)
+        serialCard.tick(1000000)
         serialCard.read(0x00) // Read the data
         const status = serialCard.read(0x01)
         expect(status & 0x08).toBe(0) // RDRF bit clear
@@ -130,6 +135,7 @@ describe('ACIA (6551 ACIA)', () => {
       it('should enable receive IRQ when RIIE bit (bit 1) is clear', () => {
         serialCard.write(0x02, 0x04) // bit 1 = 0: receive IRQ enabled
         serialCard.onData(0x42)
+        serialCard.tick(1000000)
 
         const status = serialCard.read(0x01)
         expect(status & 0x80).toBe(0x80) // IRQ flag set in status
@@ -138,6 +144,7 @@ describe('ACIA (6551 ACIA)', () => {
       it('should disable receive IRQ when RIIE bit (bit 1) is set', () => {
         serialCard.write(0x02, 0x02) // RIIE=1: receive IRQ disabled (R6551: bit1=1 disables)
         serialCard.onData(0x42)
+        serialCard.tick(1000000)
 
         const status = serialCard.read(0x01)
         expect(status & 0x80).toBe(0) // IRQ flag not set
@@ -149,8 +156,9 @@ describe('ACIA (6551 ACIA)', () => {
 
         serialCard.write(0x02, 0x10) // REM=1: echo mode enabled (bit 4 per 6551 spec)
         serialCard.onData(0x42)
+        serialCard.tick(1000000)
         
-        // In echo mode, received data is echoed immediately via transmit callback
+        // In echo mode, received data is echoed when delivered to rxRegister via tick
         expect(mockTransmit).toHaveBeenCalledWith(0x42)
       })
     })
@@ -218,27 +226,39 @@ describe('ACIA (6551 ACIA)', () => {
   describe('Data Reception', () => {
     it('should receive data from external source', () => {
       serialCard.onData(0x55)
+      serialCard.tick(1000000)
       const data = serialCard.read(0x00)
       expect(data).toBe(0x55)
     })
 
     it('should set RDRF flag when data received', () => {
       serialCard.onData(0x55)
+      serialCard.tick(1000000)
       const status = serialCard.read(0x01)
       expect(status & 0x08).toBe(0x08)
     })
 
-    it('should handle multiple received bytes (overrun)', () => {
+    it('should queue multiple received bytes and deliver them in order', () => {
       serialCard.onData(0x41) // 'A'
-      serialCard.onData(0x42) // 'B' - overwrites, causes overrun
-      serialCard.onData(0x43) // 'C' - overwrites again
+      serialCard.onData(0x42) // 'B'
+      serialCard.onData(0x43) // 'C'
+
+      // First byte delivered on tick
+      serialCard.tick(1000000)
+      expect(serialCard.read(0x00)).toBe(0x41)
+
+      // Second byte delivered on next tick after read
+      serialCard.tick(1000000)
+      expect(serialCard.read(0x00)).toBe(0x42)
 
-      // Single-byte RX: only last byte remains
+      // Third byte
+      serialCard.tick(1000000)
       expect(serialCard.read(0x00)).toBe(0x43)
     })
 
     it('should mask received data to 8 bits', () => {
       serialCard.onData(0x1FF)
+      serialCard.tick(1000000)
       const data = serialCard.read(0x00)
       expect(data).toBe(0xFF)
     })
@@ -248,6 +268,7 @@ describe('ACIA (6551 ACIA)', () => {
     it('should set IRQ flag on receive when interrupt enabled', () => {
       serialCard.write(0x02, 0x00) // bit 1 = 0: receive IRQ enabled
       serialCard.onData(0x42)
+      serialCard.tick(1000000)
 
       expect(serialCard.read(0x01) & 0x80).toBe(0x80) // IRQ flag set
     })
@@ -270,6 +291,7 @@ describe('ACIA (6551 ACIA)', () => {
     it('should not set IRQ flag on receive when disabled', () => {
       serialCard.write(0x02, 0x02) // RIIE=1: receive IRQ disabled
       serialCard.onData(0x42)
+      serialCard.tick(1000000)
 
       const status = serialCard.read(0x01)
       expect(status & 0x80).toBe(0) // IRQ flag not set
@@ -278,6 +300,7 @@ describe('ACIA (6551 ACIA)', () => {
     it('should clear IRQ flag when data is read', () => {
       serialCard.write(0x02, 0x00) // Enable receive IRQ
       serialCard.onData(0x42)
+      serialCard.tick(1000000)
 
       expect(serialCard.read(0x01) & 0x80).toBe(0x80) // IRQ set
 
@@ -287,30 +310,49 @@ describe('ACIA (6551 ACIA)', () => {
     })
   })
 
-  describe('Overrun Handling', () => {
-    it('should detect overrun condition', () => {
+  describe('Receive Queue', () => {
+    it('should buffer multiple bytes and deliver in order', () => {
       serialCard.onData(0x42)
-      const statusBefore = serialCard.read(0x01)
-      
-      // Send another byte before first is read
       serialCard.onData(0x43)
-      const statusAfter = serialCard.read(0x01)
 
-      expect(statusAfter & 0x04).toBe(0x04) // Overrun flag set
+      // First byte delivered on tick
+      serialCard.tick(1000000)
+      expect(serialCard.read(0x01) & 0x08).toBe(0x08) // RDRF set
+      expect(serialCard.read(0x00)).toBe(0x42)
+
+      // Second byte delivered on next tick
+      serialCard.tick(1000000)
+      expect(serialCard.read(0x01) & 0x08).toBe(0x08) // RDRF set
+      expect(serialCard.read(0x00)).toBe(0x43)
+
+      // Queue empty
+      serialCard.tick(1000000)
+      expect(serialCard.read(0x01) & 0x08).toBe(0) // RDRF clear
     })
 
-    it('should clear overrun when data register is read', () => {
+    it('should not deliver next byte until current is read', () => {
       serialCard.onData(0x42)
-      serialCard.onData(0x43) // Cause overrun (rx still full)
-      
-      // Overrun flag is set
-      const statusBefore = serialCard.read(0x01)
-      expect(statusBefore & 0x04).toBe(0x04)
-      
-      // Reading data clears overrun
-      serialCard.read(0x00)
-      const statusAfter = serialCard.read(0x01)
-      expect(statusAfter & 0x04).toBe(0)
+      serialCard.onData(0x43)
+
+      serialCard.tick(1000000) // delivers 0x42
+      serialCard.tick(1000000) // rxRegFull still true, 0x43 stays in queue
+      serialCard.tick(1000000) // still waiting
+
+      expect(serialCard.read(0x00)).toBe(0x42) // first byte still there
+
+      serialCard.tick(1000000) // NOW delivers 0x43
+      expect(serialCard.read(0x00)).toBe(0x43)
+    })
+
+    it('should clear queue on reset', () => {
+      serialCard.onData(0x42)
+      serialCard.onData(0x43)
+      serialCard.onData(0x44)
+
+      serialCard.reset(true)
+
+      serialCard.tick(1000000)
+      expect(serialCard.read(0x01) & 0x08).toBe(0) // RDRF clear — queue was emptied
     })
   })
 
@@ -321,8 +363,9 @@ describe('ACIA (6551 ACIA)', () => {
 
       serialCard.write(0x02, 0x10) // REM=1: echo mode enabled (bit 4 per 6551 spec)
       serialCard.onData(0x42)
+      serialCard.tick(1000000)
 
-      // Echo happens immediately in onData via transmit callback
+      // Echo happens when byte is delivered from queue to rxRegister in tick
       expect(mockTransmit).toHaveBeenCalledWith(0x42)
     })
 
@@ -332,6 +375,7 @@ describe('ACIA (6551 ACIA)', () => {
 
       serialCard.write(0x02, 0x00) // Echo mode disabled
       serialCard.onData(0x42)
+      serialCard.tick(1000000)
 
       expect(mockTransmit).not.toHaveBeenCalled()
     })
@@ -342,6 +386,7 @@ describe('ACIA (6551 ACIA)', () => {
 
       serialCard.write(0x02, 0x10) // Echo mode enabled
       serialCard.onData(0x42)
+      serialCard.tick(1000000)
 
       // Echo goes directly through transmit callback, TDRE stays set
       const status = serialCard.read(0x01)
@@ -371,6 +416,7 @@ describe('ACIA (6551 ACIA)', () => {
       serialCard.write(0x00, 0x43)
       serialCard.write(0x02, 0xFF) // Set command register
       serialCard.onData(0x44)
+      serialCard.tick(1000000)
       
       // Now perform programmed reset
       serialCard.write(0x01, 0x00) // Programmed reset via status register write
@@ -386,6 +432,7 @@ describe('ACIA (6551 ACIA)', () => {
       serialCard.write(0x02, 0xFF)
       serialCard.write(0x03, 0xFF)
       serialCard.onData(0x42)
+      serialCard.tick(1000000)
 
       serialCard.reset(true)
 
@@ -405,6 +452,7 @@ describe('ACIA (6551 ACIA)', () => {
 
     it('should clear receive buffer on reset', () => {
       serialCard.onData(0x42)
+      serialCard.tick(1000000)
       
       serialCard.reset(true)