@yowasp/yosys 0.37.67-dev.638 → 0.37.647

package/gen/{bundle-browser.js → bundle.js}

@@ -1,3 +1,22 @@
+// node_modules/@yowasp/runtime/lib/fetch.js
+var fetch;
+if (typeof process === "object" && process.release?.name === "node") {
+  fetch = async function(url, options) {
+    if (url.protocol === "file:") {
+      const { readFile } = await import("fs/promises");
+      let contentType = "application/octet-stream";
+      if (url.pathname.endsWith(".wasm"))
+        contentType = "application/wasm";
+      return new Response(await readFile(url), { headers: { "Content-Type": contentType } });
+    } else {
+      return globalThis.fetch(url, options);
+    }
+  };
+} else {
+  fetch = globalThis.fetch;
+}
+var fetch_default = fetch;
+
 // node_modules/@yowasp/runtime/lib/wasi-virt.js
 var Exit = class extends Error {
   constructor(code = 0) {
@@ -410,8 +429,37 @@ function lineBuffered(processLine) {
   };
 }
 
-// node_modules/@yowasp/runtime/lib/api-base.js
-var BaseApplication = class {
+// node_modules/@yowasp/runtime/lib/api.js
+async function fetchObject(obj, fetchFn) {
+  const promises = [];
+  for (const [key, value] of Object.entries(obj)) {
+    if (typeof value === "string" || value instanceof Uint8Array) {
+      promises.push(Promise.resolve([key, value]));
+    } else if (value instanceof URL) {
+      promises.push(fetchFn(value).then((fetched) => [key, fetched]));
+    } else {
+      promises.push(fetchObject(value, fetchFn).then((fetched) => [key, fetched]));
+    }
+  }
+  for (const [key, value] of await Promise.all(promises))
+    obj[key] = value;
+  return obj;
+}
+function fetchWebAssembly(url) {
+  return fetch_default(url).then(WebAssembly.compileStreaming);
+}
+function fetchUint8Array(url) {
+  return fetch_default(url).then((resp) => resp.arrayBuffer()).then((buf) => new Uint8Array(buf));
+}
+function fetchResources({ modules, filesystem }) {
+  return Promise.all([
+    fetchObject(modules, fetchWebAssembly),
+    fetchObject(filesystem, fetchUint8Array)
+  ]).then(([modules2, filesystem2]) => {
+    return { modules: modules2, filesystem: filesystem2 };
+  });
+}
+var Application = class {
   constructor(resourceFileURL2, instantiate2, argv0) {
     this.resourceFileURL = resourceFileURL2;
     this.resources = null;
@@ -421,7 +469,7 @@ var BaseApplication = class {
   // The `printLine` option is deprecated and not documented but still accepted for compatibility.
   async run(args = null, files = {}, { stdout, stderr, decodeASCII = true, printLine } = {}) {
     if (this.resources === null)
-      this.resources = await this._fetchResources();
+      this.resources = await import(this.resourceFileURL).then(fetchResources);
     if (args === null)
       return;
     const environment = new Environment();
@@ -455,44 +503,6 @@ var BaseApplication = class {
       return files;
     }
   }
-  async _fetchResources() {
-    const { modules, filesystem } = await import(this.resourceFileURL);
-    return {
-      modules: await this._fetchObject(modules, this._fetchWebAssembly),
-      filesystem: await this._fetchObject(filesystem, this._fetchUint8Array)
-    };
-  }
-  async _fetchObject(obj, fetchFn) {
-    const promises = [];
-    for (const [key, value] of Object.entries(obj)) {
-      if (value instanceof URL) {
-        promises.push(fetchFn(value).then((fetched) => [key, fetched]));
-      } else if (typeof value === "string" || value instanceof Uint8Array) {
-        promises.push(Promise.resolve([key, value]));
-      } else {
-        promises.push(this._fetchObject(value, fetchFn).then((fetched) => [key, fetched]));
-      }
-    }
-    for (const [key, value] of await Promise.all(promises))
-      obj[key] = value;
-    return obj;
-  }
-  async _fetchUint8Array(_url) {
-    throw "not implemented";
-  }
-  async _fetchWebAssembly(_url) {
-    throw "not implemented";
-  }
-};
-
-// node_modules/@yowasp/runtime/lib/api-browser.js
-var Application = class extends BaseApplication {
-  _fetchUint8Array(url) {
-    return fetch(url).then((resp) => resp.arrayBuffer()).then((buf) => new Uint8Array(buf));
-  }
-  _fetchWebAssembly(url) {
-    return fetch(url).then(WebAssembly.compileStreaming);
-  }
 };
 
 // gen/yosys.js

package/gen/resources-yosys.js

@@ -132,7 +132,7 @@ export const filesystem = {
                                 "cxxrtl_capi_vcd.cc": "/*\n *  yosys -- Yosys Open SYnthesis Suite\n *\n *  Copyright (C) 2020  whitequark <whitequark@whitequark.org>\n *\n *  Permission to use, copy, modify, and/or distribute this software for any\n *  purpose with or without fee is hereby granted.\n *\n *  THE SOFTWARE IS PROVIDED \"AS IS\" AND THE AUTHOR DISCLAIMS ALL WARRANTIES\n *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF\n *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR\n *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES\n *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN\n *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF\n *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.\n *\n */\n\n// This file is a part of the CXXRTL C API. It should be used together with `cxxrtl/capi/cxxrtl_capi_vcd.h`.\n\n#include <cxxrtl/capi/cxxrtl_capi_vcd.h>\n#include <cxxrtl/cxxrtl_vcd.h>\n\nextern const cxxrtl::debug_items &cxxrtl_debug_items_from_handle(cxxrtl_handle handle);\n\nstruct _cxxrtl_vcd {\n\tcxxrtl::vcd_writer writer;\n\tbool flush = false;\n};\n\ncxxrtl_vcd cxxrtl_vcd_create() {\n\treturn new _cxxrtl_vcd;\n}\n\nvoid cxxrtl_vcd_destroy(cxxrtl_vcd vcd) {\n\tdelete vcd;\n}\n\nvoid cxxrtl_vcd_timescale(cxxrtl_vcd vcd, int number, const char *unit) {\n\tvcd->writer.timescale(number, unit);\n}\n\nvoid cxxrtl_vcd_add(cxxrtl_vcd vcd, const char *name, cxxrtl_object *object) {\n\t// Note the copy. We don't know whether `object` came from a design (in which case it is\n\t// an instance of `debug_item`), or from user code (in which case it is an instance of\n\t// `cxxrtl_object`), so casting the pointer wouldn't be safe.\n\tvcd->writer.add(name, cxxrtl::debug_item(*object));\n}\n\nvoid cxxrtl_vcd_add_from(cxxrtl_vcd vcd, cxxrtl_handle handle) {\n\tvcd->writer.add(cxxrtl_debug_items_from_handle(handle));\n}\n\nvoid cxxrtl_vcd_add_from_if(cxxrtl_vcd vcd, cxxrtl_handle handle, void *data,\n\t\t\t\t\t\t\t\t\t\t\t\t\t\tint (*filter)(void *data, const char *name,\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t              const cxxrtl_object *object)) {\n\tvcd->writer.add(cxxrtl_debug_items_from_handle(handle),\n\t\t[=](const std::string &name, const cxxrtl::debug_item &item) {\n\t\t\treturn filter(data, name.c_str(), static_cast<const cxxrtl_object*>(&item));\n\t\t});\n}\n\nvoid cxxrtl_vcd_add_from_without_memories(cxxrtl_vcd vcd, cxxrtl_handle handle) {\n\tvcd->writer.add_without_memories(cxxrtl_debug_items_from_handle(handle));\n}\n\nvoid cxxrtl_vcd_sample(cxxrtl_vcd vcd, uint64_t time) {\n\tif (vcd->flush) {\n\t\tvcd->writer.buffer.clear();\n\t\tvcd->flush = false;\n\t}\n\tvcd->writer.sample(time);\n}\n\nvoid cxxrtl_vcd_read(cxxrtl_vcd vcd, const char **data, size_t *size) {\n\tif (vcd->flush) {\n\t\tvcd->writer.buffer.clear();\n\t\tvcd->flush = false;\n\t}\n\t*data = vcd->writer.buffer.c_str();\n\t*size = vcd->writer.buffer.size();\n\tvcd->flush = true;\n}\n",
                                 "cxxrtl_capi_vcd.h": "/*\n *  yosys -- Yosys Open SYnthesis Suite\n *\n *  Copyright (C) 2020  whitequark <whitequark@whitequark.org>\n *\n *  Permission to use, copy, modify, and/or distribute this software for any\n *  purpose with or without fee is hereby granted.\n *\n *  THE SOFTWARE IS PROVIDED \"AS IS\" AND THE AUTHOR DISCLAIMS ALL WARRANTIES\n *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF\n *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR\n *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES\n *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN\n *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF\n *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.\n *\n */\n\n#ifndef CXXRTL_CAPI_VCD_H\n#define CXXRTL_CAPI_VCD_H\n\n// This file is a part of the CXXRTL C API. It should be used together with `cxxrtl_vcd_capi.cc`.\n//\n// The CXXRTL C API for VCD writing makes it possible to insert virtual probes into designs and\n// dump waveforms to Value Change Dump files.\n\n#include <stddef.h>\n#include <stdint.h>\n\n#include <cxxrtl/capi/cxxrtl_capi.h>\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n// Opaque reference to a VCD writer.\ntypedef struct _cxxrtl_vcd *cxxrtl_vcd;\n\n// Create a VCD writer.\ncxxrtl_vcd cxxrtl_vcd_create();\n\n// Release all resources used by a VCD writer.\nvoid cxxrtl_vcd_destroy(cxxrtl_vcd vcd);\n\n// Set VCD timescale.\n//\n// The `number` must be 1, 10, or 100, and the `unit` must be one of `\"s\"`, `\"ms\"`, `\"us\"`, `\"ns\"`,\n// `\"ps\"`, or `\"fs\"`.\n//\n// Timescale can only be set before the first call to `cxxrtl_vcd_sample`.\nvoid cxxrtl_vcd_timescale(cxxrtl_vcd vcd, int number, const char *unit);\n\n// Schedule a specific CXXRTL object to be sampled.\n//\n// The `name` is a full hierarchical name as described for `cxxrtl_get`; it does not need to match\n// the original name of `object`, if any. The `object` must outlive the VCD writer, but there are\n// no other requirements; if desired, it can be provided by user code, rather than come from\n// a design.\n//\n// Objects can only be scheduled before the first call to `cxxrtl_vcd_sample`.\nvoid cxxrtl_vcd_add(cxxrtl_vcd vcd, const char *name, struct cxxrtl_object *object);\n\n// Schedule all CXXRTL objects in a simulation.\n//\n// The design `handle` must outlive the VCD writer.\n//\n// Objects can only be scheduled before the first call to `cxxrtl_vcd_sample`.\nvoid cxxrtl_vcd_add_from(cxxrtl_vcd vcd, cxxrtl_handle handle);\n\n// Schedule CXXRTL objects in a simulation that match a given predicate.\n//\n// For every object in the simulation, `filter` is called with the provided `data`, the full\n// hierarchical name of the object (see `cxxrtl_get` for details), and the object description.\n// The object will be sampled if the predicate returns a non-zero value.\n//\n// Objects can only be scheduled before the first call to `cxxrtl_vcd_sample`.\nvoid cxxrtl_vcd_add_from_if(cxxrtl_vcd vcd, cxxrtl_handle handle, void *data,\n                            int (*filter)(void *data, const char *name,\n                                          const struct cxxrtl_object *object));\n\n// Schedule all CXXRTL objects in a simulation except for memories.\n//\n// The design `handle` must outlive the VCD writer.\n//\n// Objects can only be scheduled before the first call to `cxxrtl_vcd_sample`.\nvoid cxxrtl_vcd_add_from_without_memories(cxxrtl_vcd vcd, cxxrtl_handle handle);\n\n// Sample all scheduled objects.\n//\n// First, `time` is written to the internal buffer. Second, the values of every signal changed since\n// the previous call to `cxxrtl_vcd_sample` (all values if this is the first call) are written to\n// the internal buffer. The contents of the buffer can be retrieved with `cxxrtl_vcd_read`.\nvoid cxxrtl_vcd_sample(cxxrtl_vcd vcd, uint64_t time);\n\n// Retrieve buffered VCD data.\n//\n// The pointer to the start of the next chunk of VCD data is assigned to `*data`, and the length\n// of that chunk is assigned to `*size`. The pointer to the data is valid until the next call to\n// `cxxrtl_vcd_sample` or `cxxrtl_vcd_read`. Once all of the buffered data has been retrieved,\n// this function will always return zero sized chunks.\nvoid cxxrtl_vcd_read(cxxrtl_vcd vcd, const char **data, size_t *size);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n",
                             },
-                            "cxxrtl.h": "/*\n *  yosys -- Yosys Open SYnthesis Suite\n *\n *  Copyright (C) 2019-2020  whitequark <whitequark@whitequark.org>\n *\n *  Permission to use, copy, modify, and/or distribute this software for any\n *  purpose with or without fee is hereby granted.\n *\n *  THE SOFTWARE IS PROVIDED \"AS IS\" AND THE AUTHOR DISCLAIMS ALL WARRANTIES\n *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF\n *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR\n *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES\n *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN\n *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF\n *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.\n *\n */\n\n// This file is included by the designs generated with `write_cxxrtl`. It is not used in Yosys itself.\n//\n// The CXXRTL support library implements compile time specialized arbitrary width arithmetics, as well as provides\n// composite lvalues made out of bit slices and concatenations of lvalues. This allows the `write_cxxrtl` pass\n// to perform a straightforward translation of RTLIL structures to readable C++, relying on the C++ compiler\n// to unwrap the abstraction and generate efficient code.\n\n#ifndef CXXRTL_H\n#define CXXRTL_H\n\n#include <cstddef>\n#include <cstdint>\n#include <cassert>\n#include <limits>\n#include <type_traits>\n#include <tuple>\n#include <vector>\n#include <map>\n#include <algorithm>\n#include <memory>\n#include <functional>\n#include <sstream>\n\n// `cxxrtl::debug_item` has to inherit from `cxxrtl_object` to satisfy strict aliasing requirements.\n#include <cxxrtl/capi/cxxrtl_capi.h>\n\n#ifndef __has_attribute\n#\tdefine __has_attribute(x) 0\n#endif\n\n// CXXRTL essentially uses the C++ compiler as a hygienic macro engine that feeds an instruction selector.\n// It generates a lot of specialized template functions with relatively large bodies that, when inlined\n// into the caller and (for those with loops) unrolled, often expose many new optimization opportunities.\n// Because of this, most of the CXXRTL runtime must be always inlined for best performance.\n#if __has_attribute(always_inline)\n#define CXXRTL_ALWAYS_INLINE inline __attribute__((__always_inline__))\n#else\n#define CXXRTL_ALWAYS_INLINE inline\n#endif\n// Conversely, some functions in the generated code are extremely large yet very cold, with both of these\n// properties being extreme enough to confuse C++ compilers into spending pathological amounts of time\n// on a futile (the code becomes worse) attempt to optimize the least important parts of code.\n#if __has_attribute(optnone)\n#define CXXRTL_EXTREMELY_COLD __attribute__((__optnone__))\n#elif __has_attribute(optimize)\n#define CXXRTL_EXTREMELY_COLD __attribute__((__optimize__(0)))\n#else\n#define CXXRTL_EXTREMELY_COLD\n#endif\n\n// CXXRTL uses assert() to check for C++ contract violations (which may result in e.g. undefined behavior\n// of the simulation code itself), and CXXRTL_ASSERT to check for RTL contract violations (which may at\n// most result in undefined simulation results).\n//\n// Though by default, CXXRTL_ASSERT() expands to assert(), it may be overridden e.g. when integrating\n// the simulation into another process that should survive violating RTL contracts.\n#ifndef CXXRTL_ASSERT\n#ifndef CXXRTL_NDEBUG\n#define CXXRTL_ASSERT(x) assert(x)\n#else\n#define CXXRTL_ASSERT(x)\n#endif\n#endif\n\nnamespace cxxrtl {\n\n// All arbitrary-width values in CXXRTL are backed by arrays of unsigned integers called chunks. The chunk size\n// is the same regardless of the value width to simplify manipulating values via FFI interfaces, e.g. driving\n// and introspecting the simulation in Python.\n//\n// It is practical to use chunk sizes between 32 bits and platform register size because when arithmetics on\n// narrower integer types is legalized by the C++ compiler, it inserts code to clear the high bits of the register.\n// However, (a) most of our operations do not change those bits in the first place because of invariants that are\n// invisible to the compiler, (b) we often operate on non-power-of-2 values and have to clear the high bits anyway.\n// Therefore, using relatively wide chunks and clearing the high bits explicitly and only when we know they may be\n// clobbered results in simpler generated code.\ntypedef uint32_t chunk_t;\ntypedef uint64_t wide_chunk_t;\n\ntemplate<typename T>\nstruct chunk_traits {\n\tstatic_assert(std::is_integral<T>::value && std::is_unsigned<T>::value,\n\t              \"chunk type must be an unsigned integral type\");\n\tusing type = T;\n\tstatic constexpr size_t bits = std::numeric_limits<T>::digits;\n\tstatic constexpr T mask = std::numeric_limits<T>::max();\n};\n\ntemplate<class T>\nstruct expr_base;\n\ntemplate<size_t Bits>\nstruct value : public expr_base<value<Bits>> {\n\tstatic constexpr size_t bits = Bits;\n\n\tusing chunk = chunk_traits<chunk_t>;\n\tstatic constexpr chunk::type msb_mask = (Bits % chunk::bits == 0) ? chunk::mask\n\t\t: chunk::mask >> (chunk::bits - (Bits % chunk::bits));\n\n\tstatic constexpr size_t chunks = (Bits + chunk::bits - 1) / chunk::bits;\n\tchunk::type data[chunks] = {};\n\n\tvalue() = default;\n\ttemplate<typename... Init>\n\texplicit constexpr value(Init ...init) : data{init...} {}\n\n\tvalue(const value<Bits> &) = default;\n\tvalue<Bits> &operator=(const value<Bits> &) = default;\n\n\tvalue(value<Bits> &&) = default;\n\tvalue<Bits> &operator=(value<Bits> &&) = default;\n\n\t// A (no-op) helper that forces the cast to value<>.\n\tCXXRTL_ALWAYS_INLINE\n\tconst value<Bits> &val() const {\n\t\treturn *this;\n\t}\n\n\tstd::string str() const {\n\t\tstd::stringstream ss;\n\t\tss << *this;\n\t\treturn ss.str();\n\t}\n\n\t// Conversion operations.\n\t//\n\t// These functions ensure that a conversion is never out of range, and should be always used, if at all\n\t// possible, instead of direct manipulation of the `data` member. For very large types, .slice() and\n\t// .concat() can be used to split them into more manageable parts.\n\ttemplate<class IntegerT>\n\tCXXRTL_ALWAYS_INLINE\n\tIntegerT get() const {\n\t\tstatic_assert(std::numeric_limits<IntegerT>::is_integer && !std::numeric_limits<IntegerT>::is_signed,\n\t\t              \"get<T>() requires T to be an unsigned integral type\");\n\t\tstatic_assert(std::numeric_limits<IntegerT>::digits >= Bits,\n\t\t              \"get<T>() requires T to be at least as wide as the value is\");\n\t\tIntegerT result = 0;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult |= IntegerT(data[n]) << (n * chunk::bits);\n\t\treturn result;\n\t}\n\n\ttemplate<class IntegerT>\n\tCXXRTL_ALWAYS_INLINE\n\tvoid set(IntegerT other) {\n\t\tstatic_assert(std::numeric_limits<IntegerT>::is_integer && !std::numeric_limits<IntegerT>::is_signed,\n\t\t              \"set<T>() requires T to be an unsigned integral type\");\n\t\tstatic_assert(std::numeric_limits<IntegerT>::digits >= Bits,\n\t\t              \"set<T>() requires the value to be at least as wide as T is\");\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tdata[n] = (other >> (n * chunk::bits)) & chunk::mask;\n\t}\n\n\t// Operations with compile-time parameters.\n\t//\n\t// These operations are used to implement slicing, concatenation, and blitting.\n\t// The trunc, zext and sext operations add or remove most significant bits (i.e. on the left);\n\t// the rtrunc and rzext operations add or remove least significant bits (i.e. on the right).\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> trunc() const {\n\t\tstatic_assert(NewBits <= Bits, \"trunc() may not increase width\");\n\t\tvalue<NewBits> result;\n\t\tfor (size_t n = 0; n < result.chunks; n++)\n\t\t\tresult.data[n] = data[n];\n\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\treturn result;\n\t}\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> zext() const {\n\t\tstatic_assert(NewBits >= Bits, \"zext() may not decrease width\");\n\t\tvalue<NewBits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = data[n];\n\t\treturn result;\n\t}\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> sext() const {\n\t\tstatic_assert(NewBits >= Bits, \"sext() may not decrease width\");\n\t\tvalue<NewBits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = data[n];\n\t\tif (is_neg()) {\n\t\t\tresult.data[chunks - 1] |= ~msb_mask;\n\t\t\tfor (size_t n = chunks; n < result.chunks; n++)\n\t\t\t\tresult.data[n] = chunk::mask;\n\t\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\t}\n\t\treturn result;\n\t}\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> rtrunc() const {\n\t\tstatic_assert(NewBits <= Bits, \"rtrunc() may not increase width\");\n\t\tvalue<NewBits> result;\n\t\tconstexpr size_t shift_chunks = (Bits - NewBits) / chunk::bits;\n\t\tconstexpr size_t shift_bits   = (Bits - NewBits) % chunk::bits;\n\t\tchunk::type carry = 0;\n\t\tif (shift_chunks + result.chunks < chunks) {\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[shift_chunks + result.chunks] << (chunk::bits - shift_bits);\n\t\t}\n\t\tfor (size_t n = result.chunks; n > 0; n--) {\n\t\t\tresult.data[n - 1] = carry | (data[shift_chunks + n - 1] >> shift_bits);\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[shift_chunks + n - 1] << (chunk::bits - shift_bits);\n\t\t}\n\t\treturn result;\n\t}\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> rzext() const {\n\t\tstatic_assert(NewBits >= Bits, \"rzext() may not decrease width\");\n\t\tvalue<NewBits> result;\n\t\tconstexpr size_t shift_chunks = (NewBits - Bits) / chunk::bits;\n\t\tconstexpr size_t shift_bits   = (NewBits - Bits) % chunk::bits;\n\t\tchunk::type carry = 0;\n\t\tfor (size_t n = 0; n < chunks; n++) {\n\t\t\tresult.data[shift_chunks + n] = (data[n] << shift_bits) | carry;\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[n] >> (chunk::bits - shift_bits);\n\t\t}\n\t\tif (shift_chunks + chunks < result.chunks)\n\t\t\tresult.data[shift_chunks + chunks] = carry;\n\t\treturn result;\n\t}\n\n\t// Bit blit operation, i.e. a partial read-modify-write.\n\ttemplate<size_t Stop, size_t Start>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<Bits> blit(const value<Stop - Start + 1> &source) const {\n\t\tstatic_assert(Stop >= Start, \"blit() may not reverse bit order\");\n\t\tconstexpr chunk::type start_mask = ~(chunk::mask << (Start % chunk::bits));\n\t\tconstexpr chunk::type stop_mask = (Stop % chunk::bits + 1 == chunk::bits) ? 0\n\t\t\t: (chunk::mask << (Stop % chunk::bits + 1));\n\t\tvalue<Bits> masked = *this;\n\t\tif (Start / chunk::bits == Stop / chunk::bits) {\n\t\t\tmasked.data[Start / chunk::bits] &= stop_mask | start_mask;\n\t\t} else {\n\t\t\tmasked.data[Start / chunk::bits] &= start_mask;\n\t\t\tfor (size_t n = Start / chunk::bits + 1; n < Stop / chunk::bits; n++)\n\t\t\t\tmasked.data[n] = 0;\n\t\t\tmasked.data[Stop / chunk::bits] &= stop_mask;\n\t\t}\n\t\tvalue<Bits> shifted = source\n\t\t\t.template rzext<Stop + 1>()\n\t\t\t.template zext<Bits>();\n\t\treturn masked.bit_or(shifted);\n\t}\n\n\t// Helpers for selecting extending or truncating operation depending on whether the result is wider or narrower\n\t// than the operand. In C++17 these can be replaced with `if constexpr`.\n\ttemplate<size_t NewBits, typename = void>\n\tstruct zext_cast {\n\t\tCXXRTL_ALWAYS_INLINE\n\t\tvalue<NewBits> operator()(const value<Bits> &val) {\n\t\t\treturn val.template zext<NewBits>();\n\t\t}\n\t};\n\n\ttemplate<size_t NewBits>\n\tstruct zext_cast<NewBits, typename std::enable_if<(NewBits < Bits)>::type> {\n\t\tCXXRTL_ALWAYS_INLINE\n\t\tvalue<NewBits> operator()(const value<Bits> &val) {\n\t\t\treturn val.template trunc<NewBits>();\n\t\t}\n\t};\n\n\ttemplate<size_t NewBits, typename = void>\n\tstruct sext_cast {\n\t\tCXXRTL_ALWAYS_INLINE\n\t\tvalue<NewBits> operator()(const value<Bits> &val) {\n\t\t\treturn val.template sext<NewBits>();\n\t\t}\n\t};\n\n\ttemplate<size_t NewBits>\n\tstruct sext_cast<NewBits, typename std::enable_if<(NewBits < Bits)>::type> {\n\t\tCXXRTL_ALWAYS_INLINE\n\t\tvalue<NewBits> operator()(const value<Bits> &val) {\n\t\t\treturn val.template trunc<NewBits>();\n\t\t}\n\t};\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> zcast() const {\n\t\treturn zext_cast<NewBits>()(*this);\n\t}\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> scast() const {\n\t\treturn sext_cast<NewBits>()(*this);\n\t}\n\n\t// Bit replication is far more efficient than the equivalent concatenation.\n\ttemplate<size_t Count>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<Bits * Count> repeat() const {\n\t\tstatic_assert(Bits == 1, \"repeat() is implemented only for 1-bit values\");\n\t\treturn *this ? value<Bits * Count>().bit_not() : value<Bits * Count>();\n\t}\n\n\t// Operations with run-time parameters (offsets, amounts, etc).\n\t//\n\t// These operations are used for computations.\n\tbool bit(size_t offset) const {\n\t\treturn data[offset / chunk::bits] & (1 << (offset % chunk::bits));\n\t}\n\n\tvoid set_bit(size_t offset, bool value = true) {\n\t\tsize_t offset_chunks = offset / chunk::bits;\n\t\tsize_t offset_bits = offset % chunk::bits;\n\t\tdata[offset_chunks] &= ~(1 << offset_bits);\n\t\tdata[offset_chunks] |= value ? 1 << offset_bits : 0;\n\t}\n\n\texplicit operator bool() const {\n\t\treturn !is_zero();\n\t}\n\n\tbool is_zero() const {\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tif (data[n] != 0)\n\t\t\t\treturn false;\n\t\treturn true;\n\t}\n\n\tbool is_neg() const {\n\t\treturn data[chunks - 1] & (1 << ((Bits - 1) % chunk::bits));\n\t}\n\n\tbool operator ==(const value<Bits> &other) const {\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tif (data[n] != other.data[n])\n\t\t\t\treturn false;\n\t\treturn true;\n\t}\n\n\tbool operator !=(const value<Bits> &other) const {\n\t\treturn !(*this == other);\n\t}\n\n\tvalue<Bits> bit_not() const {\n\t\tvalue<Bits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = ~data[n];\n\t\tresult.data[chunks - 1] &= msb_mask;\n\t\treturn result;\n\t}\n\n\tvalue<Bits> bit_and(const value<Bits> &other) const {\n\t\tvalue<Bits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = data[n] & other.data[n];\n\t\treturn result;\n\t}\n\n\tvalue<Bits> bit_or(const value<Bits> &other) const {\n\t\tvalue<Bits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = data[n] | other.data[n];\n\t\treturn result;\n\t}\n\n\tvalue<Bits> bit_xor(const value<Bits> &other) const {\n\t\tvalue<Bits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = data[n] ^ other.data[n];\n\t\treturn result;\n\t}\n\n\tvalue<Bits> update(const value<Bits> &val, const value<Bits> &mask) const {\n\t\treturn bit_and(mask.bit_not()).bit_or(val.bit_and(mask));\n\t}\n\n\ttemplate<size_t AmountBits>\n\tvalue<Bits> shl(const value<AmountBits> &amount) const {\n\t\t// Ensure our early return is correct by prohibiting values larger than 4 Gbit.\n\t\tstatic_assert(Bits <= chunk::mask, \"shl() of unreasonably large values is not supported\");\n\t\t// Detect shifts definitely large than Bits early.\n\t\tfor (size_t n = 1; n < amount.chunks; n++)\n\t\t\tif (amount.data[n] != 0)\n\t\t\t\treturn {};\n\t\t// Past this point we can use the least significant chunk as the shift size.\n\t\tsize_t shift_chunks = amount.data[0] / chunk::bits;\n\t\tsize_t shift_bits   = amount.data[0] % chunk::bits;\n\t\tif (shift_chunks >= chunks)\n\t\t\treturn {};\n\t\tvalue<Bits> result;\n\t\tchunk::type carry = 0;\n\t\tfor (size_t n = 0; n < chunks - shift_chunks; n++) {\n\t\t\tresult.data[shift_chunks + n] = (data[n] << shift_bits) | carry;\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[n] >> (chunk::bits - shift_bits);\n\t\t}\n\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\treturn result;\n\t}\n\n\ttemplate<size_t AmountBits, bool Signed = false>\n\tvalue<Bits> shr(const value<AmountBits> &amount) const {\n\t\t// Ensure our early return is correct by prohibiting values larger than 4 Gbit.\n\t\tstatic_assert(Bits <= chunk::mask, \"shr() of unreasonably large values is not supported\");\n\t\t// Detect shifts definitely large than Bits early.\n\t\tfor (size_t n = 1; n < amount.chunks; n++)\n\t\t\tif (amount.data[n] != 0)\n\t\t\t\treturn (Signed && is_neg()) ? value<Bits>().bit_not() : value<Bits>();\n\t\t// Past this point we can use the least significant chunk as the shift size.\n\t\tsize_t shift_chunks = amount.data[0] / chunk::bits;\n\t\tsize_t shift_bits   = amount.data[0] % chunk::bits;\n\t\tif (shift_chunks >= chunks)\n\t\t\treturn (Signed && is_neg()) ? value<Bits>().bit_not() : value<Bits>();\n\t\tvalue<Bits> result;\n\t\tchunk::type carry = 0;\n\t\tfor (size_t n = 0; n < chunks - shift_chunks; n++) {\n\t\t\tresult.data[chunks - shift_chunks - 1 - n] = carry | (data[chunks - 1 - n] >> shift_bits);\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[chunks - 1 - n] << (chunk::bits - shift_bits);\n\t\t}\n\t\tif (Signed && is_neg()) {\n\t\t\tsize_t top_chunk_idx  = amount.data[0] > Bits ? 0 : (Bits - amount.data[0]) / chunk::bits;\n\t\t\tsize_t top_chunk_bits = amount.data[0] > Bits ? 0 : (Bits - amount.data[0]) % chunk::bits;\n\t\t\tfor (size_t n = top_chunk_idx + 1; n < chunks; n++)\n\t\t\t\tresult.data[n] = chunk::mask;\n\t\t\tif (amount.data[0] != 0)\n\t\t\t\tresult.data[top_chunk_idx] |= chunk::mask << top_chunk_bits;\n\t\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\t}\n\t\treturn result;\n\t}\n\n\ttemplate<size_t AmountBits>\n\tvalue<Bits> sshr(const value<AmountBits> &amount) const {\n\t\treturn shr<AmountBits, /*Signed=*/true>(amount);\n\t}\n\n\ttemplate<size_t ResultBits, size_t SelBits>\n\tvalue<ResultBits> bmux(const value<SelBits> &sel) const {\n\t\tstatic_assert(ResultBits << SelBits == Bits, \"invalid sizes used in bmux()\");\n\t\tsize_t amount = sel.data[0] * ResultBits;\n\t\tsize_t shift_chunks = amount / chunk::bits;\n\t\tsize_t shift_bits   = amount % chunk::bits;\n\t\tvalue<ResultBits> result;\n\t\tchunk::type carry = 0;\n\t\tif (ResultBits % chunk::bits + shift_bits > chunk::bits)\n\t\t\tcarry = data[result.chunks + shift_chunks] << (chunk::bits - shift_bits);\n\t\tfor (size_t n = 0; n < result.chunks; n++) {\n\t\t\tresult.data[result.chunks - 1 - n] = carry | (data[result.chunks + shift_chunks - 1 - n] >> shift_bits);\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[result.chunks + shift_chunks - 1 - n] << (chunk::bits - shift_bits);\n\t\t}\n\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\treturn result;\n\t}\n\n\ttemplate<size_t ResultBits, size_t SelBits>\n\tvalue<ResultBits> demux(const value<SelBits> &sel) const {\n\t\tstatic_assert(Bits << SelBits == ResultBits, \"invalid sizes used in demux()\");\n\t\tsize_t amount = sel.data[0] * Bits;\n\t\tsize_t shift_chunks = amount / chunk::bits;\n\t\tsize_t shift_bits   = amount % chunk::bits;\n\t\tvalue<ResultBits> result;\n\t\tchunk::type carry = 0;\n\t\tfor (size_t n = 0; n < chunks; n++) {\n\t\t\tresult.data[shift_chunks + n] = (data[n] << shift_bits) | carry;\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[n] >> (chunk::bits - shift_bits);\n\t\t}\n\t\tif (Bits % chunk::bits + shift_bits > chunk::bits)\n\t\t\tresult.data[shift_chunks + chunks] = carry;\n\t\treturn result;\n\t}\n\n\tsize_t ctpop() const {\n\t\tsize_t count = 0;\n\t\tfor (size_t n = 0; n < chunks; n++) {\n\t\t\t// This loop implements the population count idiom as recognized by LLVM and GCC.\n\t\t\tfor (chunk::type x = data[n]; x != 0; count++)\n\t\t\t\tx = x & (x - 1);\n\t\t}\n\t\treturn count;\n\t}\n\n\tsize_t ctlz() const {\n\t\tsize_t count = 0;\n\t\tfor (size_t n = 0; n < chunks; n++) {\n\t\t\tchunk::type x = data[chunks - 1 - n];\n\t\t\t// First add to `count` as if the chunk is zero\n\t\t\tconstexpr size_t msb_chunk_bits = Bits % chunk::bits != 0 ? Bits % chunk::bits : chunk::bits;\n\t\t\tcount += (n == 0 ? msb_chunk_bits : chunk::bits);\n\t\t\t// If the chunk isn't zero, correct the `count` value and return\n\t\t\tif (x != 0) {\n\t\t\t\tfor (; x != 0; count--)\n\t\t\t\t\tx >>= 1;\n\t\t\t\tbreak;\n\t\t\t}\n\t\t}\n\t\treturn count;\n\t}\n\n\ttemplate<bool Invert, bool CarryIn>\n\tstd::pair<value<Bits>, bool /*CarryOut*/> alu(const value<Bits> &other) const {\n\t\tvalue<Bits> result;\n\t\tbool carry = CarryIn;\n\t\tfor (size_t n = 0; n < result.chunks; n++) {\n\t\t\tresult.data[n] = data[n] + (Invert ? ~other.data[n] : other.data[n]) + carry;\n\t\t\tif (result.chunks - 1 == n)\n\t\t\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\t\tcarry = (result.data[n] <  data[n]) ||\n\t\t\t        (result.data[n] == data[n] && carry);\n\t\t}\n\t\treturn {result, carry};\n\t}\n\n\tvalue<Bits> add(const value<Bits> &other) const {\n\t\treturn alu</*Invert=*/false, /*CarryIn=*/false>(other).first;\n\t}\n\n\tvalue<Bits> sub(const value<Bits> &other) const {\n\t\treturn alu</*Invert=*/true, /*CarryIn=*/true>(other).first;\n\t}\n\n\tvalue<Bits> neg() const {\n\t\treturn value<Bits> { 0u }.sub(*this);\n\t}\n\n\tbool ucmp(const value<Bits> &other) const {\n\t\tbool carry;\n\t\tstd::tie(std::ignore, carry) = alu</*Invert=*/true, /*CarryIn=*/true>(other);\n\t\treturn !carry; // a.ucmp(b) ≡ a u< b\n\t}\n\n\tbool scmp(const value<Bits> &other) const {\n\t\tvalue<Bits> result;\n\t\tbool carry;\n\t\tstd::tie(result, carry) = alu</*Invert=*/true, /*CarryIn=*/true>(other);\n\t\tbool overflow = (is_neg() == !other.is_neg()) && (is_neg() != result.is_neg());\n\t\treturn result.is_neg() ^ overflow; // a.scmp(b) ≡ a s< b\n\t}\n\n\ttemplate<size_t ResultBits>\n\tvalue<ResultBits> mul(const value<Bits> &other) const {\n\t\tvalue<ResultBits> result;\n\t\twide_chunk_t wide_result[result.chunks + 1] = {};\n\t\tfor (size_t n = 0; n < chunks; n++) {\n\t\t\tfor (size_t m = 0; m < chunks && n + m < result.chunks; m++) {\n\t\t\t\twide_result[n + m] += wide_chunk_t(data[n]) * wide_chunk_t(other.data[m]);\n\t\t\t\twide_result[n + m + 1] += wide_result[n + m] >> chunk::bits;\n\t\t\t\twide_result[n + m] &= chunk::mask;\n\t\t\t}\n\t\t}\n\t\tfor (size_t n = 0; n < result.chunks; n++) {\n\t\t\tresult.data[n] = wide_result[n];\n\t\t}\n\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\treturn result;\n\t}\n\n\tstd::pair<value<Bits>, value<Bits>> udivmod(value<Bits> divisor) const {\n\t\tvalue<Bits> quotient;\n\t\tvalue<Bits> dividend = *this;\n\t\tif (dividend.ucmp(divisor))\n\t\t\treturn {/*quotient=*/value<Bits>{0u}, /*remainder=*/dividend};\n\t\tint64_t divisor_shift = divisor.ctlz() - dividend.ctlz();\n\t\tassert(divisor_shift >= 0);\n\t\tdivisor = divisor.shl(value<Bits>{(chunk::type) divisor_shift});\n\t\tfor (size_t step = 0; step <= divisor_shift; step++) {\n\t\t\tquotient = quotient.shl(value<Bits>{1u});\n\t\t\tif (!dividend.ucmp(divisor)) {\n\t\t\t\tdividend = dividend.sub(divisor);\n\t\t\t\tquotient.set_bit(0, true);\n\t\t\t}\n\t\t\tdivisor = divisor.shr(value<Bits>{1u});\n\t\t}\n\t\treturn {quotient, /*remainder=*/dividend};\n\t}\n\n\tstd::pair<value<Bits>, value<Bits>> sdivmod(const value<Bits> &other) const {\n\t\tvalue<Bits + 1> quotient;\n\t\tvalue<Bits + 1> remainder;\n\t\tvalue<Bits + 1> dividend = sext<Bits + 1>();\n\t\tvalue<Bits + 1> divisor = other.template sext<Bits + 1>();\n\t\tif (dividend.is_neg()) dividend = dividend.neg();\n\t\tif (divisor.is_neg()) divisor = divisor.neg();\n\t\tstd::tie(quotient, remainder) = dividend.udivmod(divisor);\n\t\tif (dividend.is_neg() != divisor.is_neg()) quotient = quotient.neg();\n\t\tif (dividend.is_neg()) remainder = remainder.neg();\n\t\treturn {quotient.template trunc<Bits>(), remainder.template trunc<Bits>()};\n\t}\n};\n\n// Expression template for a slice, usable as lvalue or rvalue, and composable with other expression templates here.\ntemplate<class T, size_t Stop, size_t Start>\nstruct slice_expr : public expr_base<slice_expr<T, Stop, Start>> {\n\tstatic_assert(Stop >= Start, \"slice_expr() may not reverse bit order\");\n\tstatic_assert(Start < T::bits && Stop < T::bits, \"slice_expr() must be within bounds\");\n\tstatic constexpr size_t bits = Stop - Start + 1;\n\n\tT &expr;\n\n\tslice_expr(T &expr) : expr(expr) {}\n\tslice_expr(const slice_expr<T, Stop, Start> &) = delete;\n\n\tCXXRTL_ALWAYS_INLINE\n\toperator value<bits>() const {\n\t\treturn static_cast<const value<T::bits> &>(expr)\n\t\t\t.template rtrunc<T::bits - Start>()\n\t\t\t.template trunc<bits>();\n\t}\n\n\tCXXRTL_ALWAYS_INLINE\n\tslice_expr<T, Stop, Start> &operator=(const value<bits> &rhs) {\n\t\t// Generic partial assignment implemented using a read-modify-write operation on the sliced expression.\n\t\texpr = static_cast<const value<T::bits> &>(expr)\n\t\t\t.template blit<Stop, Start>(rhs);\n\t\treturn *this;\n\t}\n\n\t// A helper that forces the cast to value<>, which allows deduction to work.\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<bits> val() const {\n\t\treturn static_cast<const value<bits> &>(*this);\n\t}\n};\n\n// Expression template for a concatenation, usable as lvalue or rvalue, and composable with other expression templates here.\ntemplate<class T, class U>\nstruct concat_expr : public expr_base<concat_expr<T, U>> {\n\tstatic constexpr size_t bits = T::bits + U::bits;\n\n\tT &ms_expr;\n\tU &ls_expr;\n\n\tconcat_expr(T &ms_expr, U &ls_expr) : ms_expr(ms_expr), ls_expr(ls_expr) {}\n\tconcat_expr(const concat_expr<T, U> &) = delete;\n\n\tCXXRTL_ALWAYS_INLINE\n\toperator value<bits>() const {\n\t\tvalue<bits> ms_shifted = static_cast<const value<T::bits> &>(ms_expr)\n\t\t\t.template rzext<bits>();\n\t\tvalue<bits> ls_extended = static_cast<const value<U::bits> &>(ls_expr)\n\t\t\t.template zext<bits>();\n\t\treturn ms_shifted.bit_or(ls_extended);\n\t}\n\n\tCXXRTL_ALWAYS_INLINE\n\tconcat_expr<T, U> &operator=(const value<bits> &rhs) {\n\t\tms_expr = rhs.template rtrunc<T::bits>();\n\t\tls_expr = rhs.template trunc<U::bits>();\n\t\treturn *this;\n\t}\n\n\t// A helper that forces the cast to value<>, which allows deduction to work.\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<bits> val() const {\n\t\treturn static_cast<const value<bits> &>(*this);\n\t}\n};\n\n// Base class for expression templates, providing helper methods for operations that are valid on both rvalues and lvalues.\n//\n// Note that expression objects (slices and concatenations) constructed in this way should NEVER be captured because\n// they refer to temporaries that will, in general, only live until the end of the statement. For example, both of\n// these snippets perform use-after-free:\n//\n//    const auto &a = val.slice<7,0>().slice<1>();\n//    value<1> b = a;\n//\n//    auto &&c = val.slice<7,0>().slice<1>();\n//    c = value<1>{1u};\n//\n// An easy way to write code using slices and concatenations safely is to follow two simple rules:\n//   * Never explicitly name any type except `value<W>` or `const value<W> &`.\n//   * Never use a `const auto &` or `auto &&` in any such expression.\n// Then, any code that compiles will be well-defined.\ntemplate<class T>\nstruct expr_base {\n\ttemplate<size_t Stop, size_t Start = Stop>\n\tCXXRTL_ALWAYS_INLINE\n\tslice_expr<const T, Stop, Start> slice() const {\n\t\treturn {*static_cast<const T *>(this)};\n\t}\n\n\ttemplate<size_t Stop, size_t Start = Stop>\n\tCXXRTL_ALWAYS_INLINE\n\tslice_expr<T, Stop, Start> slice() {\n\t\treturn {*static_cast<T *>(this)};\n\t}\n\n\ttemplate<class U>\n\tCXXRTL_ALWAYS_INLINE\n\tconcat_expr<const T, typename std::remove_reference<const U>::type> concat(const U &other) const {\n\t\treturn {*static_cast<const T *>(this), other};\n\t}\n\n\ttemplate<class U>\n\tCXXRTL_ALWAYS_INLINE\n\tconcat_expr<T, typename std::remove_reference<U>::type> concat(U &&other) {\n\t\treturn {*static_cast<T *>(this), other};\n\t}\n};\n\ntemplate<size_t Bits>\nstd::ostream &operator<<(std::ostream &os, const value<Bits> &val) {\n\tauto old_flags = os.flags(std::ios::right);\n\tauto old_width = os.width(0);\n\tauto old_fill  = os.fill('0');\n\tos << val.bits << '\\'' << std::hex;\n\tfor (size_t n = val.chunks - 1; n != (size_t)-1; n--) {\n\t\tif (n == val.chunks - 1 && Bits % value<Bits>::chunk::bits != 0)\n\t\t\tos.width((Bits % value<Bits>::chunk::bits + 3) / 4);\n\t\telse\n\t\t\tos.width((value<Bits>::chunk::bits + 3) / 4);\n\t\tos << val.data[n];\n\t}\n\tos.fill(old_fill);\n\tos.width(old_width);\n\tos.flags(old_flags);\n\treturn os;\n}\n\ntemplate<size_t Bits>\nstruct value_formatted {\n\tconst value<Bits> &val;\n\tbool character;\n\tbool justify_left;\n\tchar padding;\n\tint width;\n\tint base;\n\tbool signed_;\n\tbool plus;\n\n\tvalue_formatted(const value<Bits> &val, bool character, bool justify_left, char padding, int width, int base, bool signed_, bool plus) :\n\t\tval(val), character(character), justify_left(justify_left), padding(padding), width(width), base(base), signed_(signed_), plus(plus) {}\n\tvalue_formatted(const value_formatted<Bits> &) = delete;\n\tvalue_formatted<Bits> &operator=(const value_formatted<Bits> &rhs) = delete;\n};\n\ntemplate<size_t Bits>\nstd::ostream &operator<<(std::ostream &os, const value_formatted<Bits> &vf)\n{\n\tvalue<Bits> val = vf.val;\n\n\tstd::string buf;\n\n\t// We might want to replace some of these bit() calls with direct\n\t// chunk access if it turns out to be slow enough to matter.\n\n\tif (!vf.character) {\n\t\tsize_t width = Bits;\n\t\tif (vf.base != 10) {\n\t\t\twidth = 0;\n\t\t\tfor (size_t index = 0; index < Bits; index++)\n\t\t\t\tif (val.bit(index))\n\t\t\t\t\twidth = index + 1;\n\t\t}\n\n\t\tif (vf.base == 2) {\n\t\t\tfor (size_t i = width; i > 0; i--)\n\t\t\t\tbuf += (val.bit(i - 1) ? '1' : '0');\n\t\t} else if (vf.base == 8 || vf.base == 16) {\n\t\t\tsize_t step = (vf.base == 16) ? 4 : 3;\n\t\t\tfor (size_t index = 0; index < width; index += step) {\n\t\t\t\tuint8_t value = val.bit(index) | (val.bit(index + 1) << 1) | (val.bit(index + 2) << 2);\n\t\t\t\tif (step == 4)\n\t\t\t\t\tvalue |= val.bit(index + 3) << 3;\n\t\t\t\tbuf += \"0123456789abcdef\"[value];\n\t\t\t}\n\t\t\tstd::reverse(buf.begin(), buf.end());\n\t\t} else if (vf.base == 10) {\n\t\t\tbool negative = vf.signed_ && val.is_neg();\n\t\t\tif (negative)\n\t\t\t\tval = val.neg();\n\t\t\tif (val.is_zero())\n\t\t\t\tbuf += '0';\n\t\t\twhile (!val.is_zero()) {\n\t\t\t\tvalue<Bits> quotient, remainder;\n\t\t\t\tif (Bits >= 4)\n\t\t\t\t\tstd::tie(quotient, remainder) = val.udivmod(value<Bits>{10u});\n\t\t\t\telse\n\t\t\t\t\tstd::tie(quotient, remainder) = std::make_pair(value<Bits>{0u}, val);\n\t\t\t\tbuf += '0' + remainder.template trunc<(Bits > 4 ? 4 : Bits)>().val().template get<uint8_t>();\n\t\t\t\tval = quotient;\n\t\t\t}\n\t\t\tif (negative || vf.plus)\n\t\t\t\tbuf += negative ? '-' : '+';\n\t\t\tstd::reverse(buf.begin(), buf.end());\n\t\t} else assert(false);\n\t} else {\n\t\tbuf.reserve(Bits/8);\n\t\tfor (int i = 0; i < Bits; i += 8) {\n\t\t\tchar ch = 0;\n\t\t\tfor (int j = 0; j < 8 && i + j < int(Bits); j++)\n\t\t\t\tif (val.bit(i + j))\n\t\t\t\t\tch |= 1 << j;\n\t\t\tif (ch != 0)\n\t\t\t\tbuf.append({ch});\n\t\t}\n\t\tstd::reverse(buf.begin(), buf.end());\n\t}\n\n\tassert(vf.width == 0 || vf.padding != '\\0');\n\tif (!vf.justify_left && buf.size() < vf.width) {\n\t\tsize_t pad_width = vf.width - buf.size();\n\t\tif (vf.padding == '0' && (buf.front() == '+' || buf.front() == '-')) {\n\t\t\tos << buf.front();\n\t\t\tbuf.erase(0, 1);\n\t\t}\n\t\tos << std::string(pad_width, vf.padding);\n\t}\n\tos << buf;\n\tif (vf.justify_left && buf.size() < vf.width)\n\t\tos << std::string(vf.width - buf.size(), vf.padding);\n\n\treturn os;\n}\n\n// An object that can be passed to a `commit()` method in order to produce a replay log of every state change in\n// the simulation.\nstruct observer {\n\t// Called when the `commit()` method for a wire is about to update the `chunks` chunks at `base` with `chunks` chunks\n\t// at `value` that have a different bit pattern. It is guaranteed that `chunks` is equal to the wire chunk count and\n\t// `base` points to the first chunk.\n\tvirtual void on_commit(size_t chunks, const chunk_t *base, const chunk_t *value) = 0;\n\n\t// Called when the `commit()` method for a memory is about to update the `chunks` chunks at `&base[chunks * index]`\n\t// with `chunks` chunks at `value` that have a different bit pattern. It is guaranteed that `chunks` is equal to\n\t// the memory element chunk count and `base` points to the first chunk of the first element of the memory.\n\tvirtual void on_commit(size_t chunks, const chunk_t *base, const chunk_t *value, size_t index) = 0;\n};\n\n// The `null_observer` class has the same interface as `observer`, but has no invocation overhead, since its methods\n// are final and have no implementation. This allows the observer feature to be zero-cost when not in use.\nstruct null_observer final: observer {\n\tvoid on_commit(size_t chunks, const chunk_t *base, const chunk_t *value) override {}\n\tvoid on_commit(size_t chunks, const chunk_t *base, const chunk_t *value, size_t index) override {}\n};\n\ntemplate<size_t Bits>\nstruct wire {\n\tstatic constexpr size_t bits = Bits;\n\n\tvalue<Bits> curr;\n\tvalue<Bits> next;\n\n\twire() = default;\n\texplicit constexpr wire(const value<Bits> &init) : curr(init), next(init) {}\n\ttemplate<typename... Init>\n\texplicit constexpr wire(Init ...init) : curr{init...}, next{init...} {}\n\n\t// Copying and copy-assigning values is natural. If, however, a value is replaced with a wire,\n\t// e.g. because a module is built with a different optimization level, then existing code could\n\t// unintentionally copy a wire instead, which would create a subtle but serious bug. To make sure\n\t// this doesn't happen, prohibit copying and copy-assigning wires.\n\twire(const wire<Bits> &) = delete;\n\twire<Bits> &operator=(const wire<Bits> &) = delete;\n\n\twire(wire<Bits> &&) = default;\n\twire<Bits> &operator=(wire<Bits> &&) = default;\n\n\ttemplate<class IntegerT>\n\tCXXRTL_ALWAYS_INLINE\n\tIntegerT get() const {\n\t\treturn curr.template get<IntegerT>();\n\t}\n\n\ttemplate<class IntegerT>\n\tCXXRTL_ALWAYS_INLINE\n\tvoid set(IntegerT other) {\n\t\tnext.template set<IntegerT>(other);\n\t}\n\n\t// This method intentionally takes a mandatory argument (to make it more difficult to misuse in\n\t// black box implementations, leading to missed observer events). It is generic over its argument\n\t// to make sure the `on_commit` call is devirtualized. This is somewhat awkward but lets us keep\n\t// a single implementation for both this method and the one in `memory`.\n\ttemplate<class ObserverT>\n\tbool commit(ObserverT &observer) {\n\t\tif (curr != next) {\n\t\t\tobserver.on_commit(curr.chunks, curr.data, next.data);\n\t\t\tcurr = next;\n\t\t\treturn true;\n\t\t}\n\t\treturn false;\n\t}\n};\n\ntemplate<size_t Bits>\nstd::ostream &operator<<(std::ostream &os, const wire<Bits> &val) {\n\tos << val.curr;\n\treturn os;\n}\n\ntemplate<size_t Width>\nstruct memory {\n\tconst size_t depth;\n\tstd::unique_ptr<value<Width>[]> data;\n\n\texplicit memory(size_t depth) : depth(depth), data(new value<Width>[depth]) {}\n\n\tmemory(const memory<Width> &) = delete;\n\tmemory<Width> &operator=(const memory<Width> &) = delete;\n\n\tmemory(memory<Width> &&) = default;\n\tmemory<Width> &operator=(memory<Width> &&other) {\n\t\tassert(depth == other.depth);\n\t\tdata = std::move(other.data);\n\t\twrite_queue = std::move(other.write_queue);\n\t\treturn *this;\n\t}\n\n\t// An operator for direct memory reads. May be used at any time during the simulation.\n\tconst value<Width> &operator [](size_t index) const {\n\t\tassert(index < depth);\n\t\treturn data[index];\n\t}\n\n\t// An operator for direct memory writes. May only be used before the simulation is started. If used\n\t// after the simulation is started, the design may malfunction.\n\tvalue<Width> &operator [](size_t index) {\n\t\tassert(index < depth);\n\t\treturn data[index];\n\t}\n\n\t// A simple way to make a writable memory would be to use an array of wires instead of an array of values.\n\t// However, there are two significant downsides to this approach: first, it has large overhead (2× space\n\t// overhead, and O(depth) time overhead during commit); second, it does not simplify handling write port\n\t// priorities. Although in principle write ports could be ordered or conditionally enabled in generated\n\t// code based on their priorities and selected addresses, the feedback arc set problem is computationally\n\t// expensive, and the heuristic based algorithms are not easily modified to guarantee (rather than prefer)\n\t// a particular write port evaluation order.\n\t//\n\t// The approach used here instead is to queue writes into a buffer during the eval phase, then perform\n\t// the writes during the commit phase in the priority order. This approach has low overhead, with both space\n\t// and time proportional to the amount of write ports. Because virtually every memory in a practical design\n\t// has at most two write ports, linear search is used on every write, being the fastest and simplest approach.\n\tstruct write {\n\t\tsize_t index;\n\t\tvalue<Width> val;\n\t\tvalue<Width> mask;\n\t\tint priority;\n\t};\n\tstd::vector<write> write_queue;\n\n\tvoid update(size_t index, const value<Width> &val, const value<Width> &mask, int priority = 0) {\n\t\tassert(index < depth);\n\t\t// Queue up the write while keeping the queue sorted by priority.\n\t\twrite_queue.insert(\n\t\t\tstd::upper_bound(write_queue.begin(), write_queue.end(), priority,\n\t\t\t\t[](const int a, const write& b) { return a < b.priority; }),\n\t\t\twrite { index, val, mask, priority });\n\t}\n\n\t// See the note for `wire::commit()`.\n\ttemplate<class ObserverT>\n\tbool commit(ObserverT &observer) {\n\t\tbool changed = false;\n\t\tfor (const write &entry : write_queue) {\n\t\t\tvalue<Width> elem = data[entry.index];\n\t\t\telem = elem.update(entry.val, entry.mask);\n\t\t\tif (data[entry.index] != elem) {\n\t\t\t\tobserver.on_commit(value<Width>::chunks, data[0].data, elem.data, entry.index);\n\t\t\t\tchanged |= true;\n\t\t\t}\n\t\t\tdata[entry.index] = elem;\n\t\t}\n\t\twrite_queue.clear();\n\t\treturn changed;\n\t}\n};\n\nstruct metadata {\n\tconst enum {\n\t\tMISSING = 0,\n\t\tUINT   \t= 1,\n\t\tSINT   \t= 2,\n\t\tSTRING \t= 3,\n\t\tDOUBLE \t= 4,\n\t} value_type;\n\n\t// In debug mode, using the wrong .as_*() function will assert.\n\t// In release mode, using the wrong .as_*() function will safely return a default value.\n\tconst uint64_t    uint_value = 0;\n\tconst int64_t     sint_value = 0;\n\tconst std::string string_value = \"\";\n\tconst double      double_value = 0.0;\n\n\tmetadata() : value_type(MISSING) {}\n\tmetadata(uint64_t value) : value_type(UINT), uint_value(value) {}\n\tmetadata(int64_t value) : value_type(SINT), sint_value(value) {}\n\tmetadata(const std::string &value) : value_type(STRING), string_value(value) {}\n\tmetadata(const char *value) : value_type(STRING), string_value(value) {}\n\tmetadata(double value) : value_type(DOUBLE), double_value(value) {}\n\n\tmetadata(const metadata &) = default;\n\tmetadata &operator=(const metadata &) = delete;\n\n\tuint64_t as_uint() const {\n\t\tassert(value_type == UINT);\n\t\treturn uint_value;\n\t}\n\n\tint64_t as_sint() const {\n\t\tassert(value_type == SINT);\n\t\treturn sint_value;\n\t}\n\n\tconst std::string &as_string() const {\n\t\tassert(value_type == STRING);\n\t\treturn string_value;\n\t}\n\n\tdouble as_double() const {\n\t\tassert(value_type == DOUBLE);\n\t\treturn double_value;\n\t}\n};\n\ntypedef std::map<std::string, metadata> metadata_map;\n\n// Tag class to disambiguate values/wires and their aliases.\nstruct debug_alias {};\n\n// Tag declaration to disambiguate values and debug outlines.\nusing debug_outline = ::_cxxrtl_outline;\n\n// This structure is intended for consumption via foreign function interfaces, like Python's ctypes.\n// Because of this it uses a C-style layout that is easy to parse rather than more idiomatic C++.\n//\n// To avoid violating strict aliasing rules, this structure has to be a subclass of the one used\n// in the C API, or it would not be possible to cast between the pointers to these.\n//\n// The `attrs` member cannot be owned by this structure because a `cxxrtl_object` can be created\n// from external C code.\nstruct debug_item : ::cxxrtl_object {\n\t// Object types.\n\tenum : uint32_t {\n\t\tVALUE   = CXXRTL_VALUE,\n\t\tWIRE    = CXXRTL_WIRE,\n\t\tMEMORY  = CXXRTL_MEMORY,\n\t\tALIAS   = CXXRTL_ALIAS,\n\t\tOUTLINE = CXXRTL_OUTLINE,\n\t};\n\n\t// Object flags.\n\tenum : uint32_t {\n\t\tINPUT  = CXXRTL_INPUT,\n\t\tOUTPUT = CXXRTL_OUTPUT,\n\t\tINOUT  = CXXRTL_INOUT,\n\t\tDRIVEN_SYNC = CXXRTL_DRIVEN_SYNC,\n\t\tDRIVEN_COMB = CXXRTL_DRIVEN_COMB,\n\t\tUNDRIVEN    = CXXRTL_UNDRIVEN,\n\t};\n\n\tdebug_item(const ::cxxrtl_object &object) : cxxrtl_object(object) {}\n\n\ttemplate<size_t Bits>\n\tdebug_item(value<Bits> &item, size_t lsb_offset = 0, uint32_t flags_ = 0) {\n\t\tstatic_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"value<Bits> is not compatible with C layout\");\n\t\ttype    = VALUE;\n\t\tflags   = flags_;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = item.data;\n\t\tnext    = item.data;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits>\n\tdebug_item(const value<Bits> &item, size_t lsb_offset = 0) {\n\t\tstatic_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"value<Bits> is not compatible with C layout\");\n\t\ttype    = VALUE;\n\t\tflags   = DRIVEN_COMB;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = const_cast<chunk_t*>(item.data);\n\t\tnext    = nullptr;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits>\n\tdebug_item(wire<Bits> &item, size_t lsb_offset = 0, uint32_t flags_ = 0) {\n\t\tstatic_assert(sizeof(item.curr) == value<Bits>::chunks * sizeof(chunk_t) &&\n\t\t              sizeof(item.next) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"wire<Bits> is not compatible with C layout\");\n\t\ttype    = WIRE;\n\t\tflags   = flags_;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = item.curr.data;\n\t\tnext    = item.next.data;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Width>\n\tdebug_item(memory<Width> &item, size_t zero_offset = 0) {\n\t\tstatic_assert(sizeof(item.data[0]) == value<Width>::chunks * sizeof(chunk_t),\n\t\t              \"memory<Width> is not compatible with C layout\");\n\t\ttype    = MEMORY;\n\t\tflags   = 0;\n\t\twidth   = Width;\n\t\tlsb_at  = 0;\n\t\tdepth   = item.depth;\n\t\tzero_at = zero_offset;\n\t\tcurr    = item.data ? item.data[0].data : nullptr;\n\t\tnext    = nullptr;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits>\n\tdebug_item(debug_alias, const value<Bits> &item, size_t lsb_offset = 0) {\n\t\tstatic_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"value<Bits> is not compatible with C layout\");\n\t\ttype    = ALIAS;\n\t\tflags   = DRIVEN_COMB;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = const_cast<chunk_t*>(item.data);\n\t\tnext    = nullptr;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits>\n\tdebug_item(debug_alias, const wire<Bits> &item, size_t lsb_offset = 0) {\n\t\tstatic_assert(sizeof(item.curr) == value<Bits>::chunks * sizeof(chunk_t) &&\n\t\t              sizeof(item.next) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"wire<Bits> is not compatible with C layout\");\n\t\ttype    = ALIAS;\n\t\tflags   = DRIVEN_COMB;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = const_cast<chunk_t*>(item.curr.data);\n\t\tnext    = nullptr;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits>\n\tdebug_item(debug_outline &group, const value<Bits> &item, size_t lsb_offset = 0) {\n\t\tstatic_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"value<Bits> is not compatible with C layout\");\n\t\ttype    = OUTLINE;\n\t\tflags   = DRIVEN_COMB;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = const_cast<chunk_t*>(item.data);\n\t\tnext    = nullptr;\n\t\toutline = &group;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits, class IntegerT>\n\tIntegerT get() const {\n\t\tassert(width == Bits && depth == 1);\n\t\tvalue<Bits> item;\n\t\tstd::copy(curr, curr + value<Bits>::chunks, item.data);\n\t\treturn item.template get<IntegerT>();\n\t}\n\n\ttemplate<size_t Bits, class IntegerT>\n\tvoid set(IntegerT other) const {\n\t\tassert(width == Bits && depth == 1);\n\t\tvalue<Bits> item;\n\t\titem.template set<IntegerT>(other);\n\t\tstd::copy(item.data, item.data + value<Bits>::chunks, next);\n\t}\n};\nstatic_assert(std::is_standard_layout<debug_item>::value, \"debug_item is not compatible with C layout\");\n\n} // namespace cxxrtl\n\ntypedef struct _cxxrtl_attr_set {\n\tcxxrtl::metadata_map map;\n} *cxxrtl_attr_set;\n\nnamespace cxxrtl {\n\n// Representation of an attribute set in the C++ interface.\nusing debug_attrs = ::_cxxrtl_attr_set;\n\nstruct debug_items {\n\tstd::map<std::string, std::vector<debug_item>> table;\n\tstd::map<std::string, std::unique_ptr<debug_attrs>> attrs_table;\n\n\tvoid add(const std::string &name, debug_item &&item, metadata_map &&item_attrs = {}) {\n\t\tstd::unique_ptr<debug_attrs> &attrs = attrs_table[name];\n\t\tif (attrs.get() == nullptr)\n\t\t\tattrs = std::unique_ptr<debug_attrs>(new debug_attrs);\n\t\tfor (auto attr : item_attrs)\n\t\t\tattrs->map.insert(attr);\n\t\titem.attrs = attrs.get();\n\t\tstd::vector<debug_item> &parts = table[name];\n\t\tparts.emplace_back(item);\n\t\tstd::sort(parts.begin(), parts.end(),\n\t\t\t[](const debug_item &a, const debug_item &b) {\n\t\t\t\treturn a.lsb_at < b.lsb_at;\n\t\t\t});\n\t}\n\n\tsize_t count(const std::string &name) const {\n\t\tif (table.count(name) == 0)\n\t\t\treturn 0;\n\t\treturn table.at(name).size();\n\t}\n\n\tconst std::vector<debug_item> &parts_at(const std::string &name) const {\n\t\treturn table.at(name);\n\t}\n\n\tconst debug_item &at(const std::string &name) const {\n\t\tconst std::vector<debug_item> &parts = table.at(name);\n\t\tassert(parts.size() == 1);\n\t\treturn parts.at(0);\n\t}\n\n\tconst debug_item &operator [](const std::string &name) const {\n\t\treturn at(name);\n\t}\n\n\tconst metadata_map &attrs(const std::string &name) const {\n\t\treturn attrs_table.at(name)->map;\n\t}\n};\n\n// Tag class to disambiguate the default constructor used by the toplevel module that calls reset(),\n// and the constructor of interior modules that should not call it.\nstruct interior {};\n\nstruct module {\n\tmodule() {}\n\tvirtual ~module() {}\n\n\t// Modules with black boxes cannot be copied. Although not all designs include black boxes,\n\t// delete the copy constructor and copy assignment operator to make sure that any downstream\n\t// code that manipulates modules doesn't accidentally depend on their availability.\n\tmodule(const module &) = delete;\n\tmodule &operator=(const module &) = delete;\n\n\tmodule(module &&) = default;\n\tmodule &operator=(module &&) = default;\n\n\tvirtual void reset() = 0;\n\n\tvirtual bool eval() = 0;\n\tvirtual bool commit() = 0;\n\n\tunsigned int steps = 0;\n\n\tsize_t step() {\n\t\t++steps;\n\t\tsize_t deltas = 0;\n\t\tbool converged = false;\n\t\tdo {\n\t\t\tconverged = eval();\n\t\t\tdeltas++;\n\t\t} while (commit() && !converged);\n\t\treturn deltas;\n\t}\n\n\tvirtual void debug_info(debug_items &items, std::string path = \"\") {\n\t\t(void)items, (void)path;\n\t}\n};\n\n} // namespace cxxrtl\n\n// Internal structures used to communicate with the implementation of the C interface.\n\ntypedef struct _cxxrtl_toplevel {\n\tstd::unique_ptr<cxxrtl::module> module;\n} *cxxrtl_toplevel;\n\ntypedef struct _cxxrtl_outline {\n\tstd::function<void()> eval;\n} *cxxrtl_outline;\n\n// Definitions of internal Yosys cells. Other than the functions in this namespace, CXXRTL is fully generic\n// and indepenent of Yosys implementation details.\n//\n// The `write_cxxrtl` pass translates internal cells (cells with names that start with `$`) to calls of these\n// functions. All of Yosys arithmetic and logical cells perform sign or zero extension on their operands,\n// whereas basic operations on arbitrary width values require operands to be of the same width. These functions\n// bridge the gap by performing the necessary casts. They are named similar to `cell_A[B]`, where A and B are `u`\n// if the corresponding operand is unsigned, and `s` if it is signed.\nnamespace cxxrtl_yosys {\n\nusing namespace cxxrtl;\n\n// std::max isn't constexpr until C++14 for no particular reason (it's an oversight), so we define our own.\ntemplate<class T>\nCXXRTL_ALWAYS_INLINE\nconstexpr T max(const T &a, const T &b) {\n\treturn a > b ? a : b;\n}\n\n// Logic operations\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> logic_not(const value<BitsA> &a) {\n\treturn value<BitsY> { a ? 0u : 1u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> logic_and(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn value<BitsY> { (bool(a) && bool(b)) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> logic_or(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn value<BitsY> { (bool(a) || bool(b)) ? 1u : 0u };\n}\n\n// Reduction operations\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> reduce_and(const value<BitsA> &a) {\n\treturn value<BitsY> { a.bit_not().is_zero() ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> reduce_or(const value<BitsA> &a) {\n\treturn value<BitsY> { a ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> reduce_xor(const value<BitsA> &a) {\n\treturn value<BitsY> { (a.ctpop() % 2) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> reduce_xnor(const value<BitsA> &a) {\n\treturn value<BitsY> { (a.ctpop() % 2) ? 0u : 1u };\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> reduce_bool(const value<BitsA> &a) {\n\treturn value<BitsY> { a ? 1u : 0u };\n}\n\n// Bitwise operations\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> not_u(const value<BitsA> &a) {\n\treturn a.template zcast<BitsY>().bit_not();\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> not_s(const value<BitsA> &a) {\n\treturn a.template scast<BitsY>().bit_not();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> and_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().bit_and(b.template zcast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> and_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().bit_and(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> or_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().bit_or(b.template zcast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> or_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().bit_or(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> xor_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().bit_xor(b.template zcast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> xor_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().bit_xor(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> xnor_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().bit_xor(b.template zcast<BitsY>()).bit_not();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> xnor_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().bit_xor(b.template scast<BitsY>()).bit_not();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shl_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().shl(b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shl_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().shl(b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sshl_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().shl(b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sshl_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().shl(b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shr_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.shr(b).template zcast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shr_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.shr(b).template scast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sshr_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.shr(b).template zcast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sshr_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.sshr(b).template scast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shift_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shr_uu<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shift_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shr_su<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shift_us(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn b.is_neg() ? shl_uu<BitsY>(a, b.template sext<BitsB + 1>().neg()) : shr_uu<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shift_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn b.is_neg() ? shl_su<BitsY>(a, b.template sext<BitsB + 1>().neg()) : shr_su<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shiftx_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shift_uu<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shiftx_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shift_su<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shiftx_us(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shift_us<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shiftx_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shift_ss<BitsY>(a, b);\n}\n\n// Comparison operations\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> eq_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY>{ a.template zext<BitsExt>() == b.template zext<BitsExt>() ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> eq_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY>{ a.template sext<BitsExt>() == b.template sext<BitsExt>() ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> ne_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY>{ a.template zext<BitsExt>() != b.template zext<BitsExt>() ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> ne_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY>{ a.template sext<BitsExt>() != b.template sext<BitsExt>() ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> eqx_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn eq_uu<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> eqx_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn eq_ss<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> nex_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn ne_uu<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> nex_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn ne_ss<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> gt_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { b.template zext<BitsExt>().ucmp(a.template zext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> gt_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { b.template sext<BitsExt>().scmp(a.template sext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> ge_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { !a.template zext<BitsExt>().ucmp(b.template zext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> ge_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { !a.template sext<BitsExt>().scmp(b.template sext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> lt_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { a.template zext<BitsExt>().ucmp(b.template zext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> lt_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { a.template sext<BitsExt>().scmp(b.template sext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> le_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { !b.template zext<BitsExt>().ucmp(a.template zext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> le_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { !b.template sext<BitsExt>().scmp(a.template sext<BitsExt>()) ? 1u : 0u };\n}\n\n// Arithmetic operations\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> pos_u(const value<BitsA> &a) {\n\treturn a.template zcast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> pos_s(const value<BitsA> &a) {\n\treturn a.template scast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> neg_u(const value<BitsA> &a) {\n\treturn a.template zcast<BitsY>().neg();\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> neg_s(const value<BitsA> &a) {\n\treturn a.template scast<BitsY>().neg();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> add_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().add(b.template zcast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> add_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().add(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sub_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().sub(b.template zcast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sub_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().sub(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> mul_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsM = BitsA >= BitsB ? BitsA : BitsB;\n\treturn a.template zcast<BitsM>().template mul<BitsY>(b.template zcast<BitsM>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> mul_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().template mul<BitsY>(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nstd::pair<value<BitsY>, value<BitsY>> divmod_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t Bits = max(BitsY, max(BitsA, BitsB));\n\tvalue<Bits> quotient;\n\tvalue<Bits> remainder;\n\tvalue<Bits> dividend = a.template zext<Bits>();\n\tvalue<Bits> divisor = b.template zext<Bits>();\n\tstd::tie(quotient, remainder) = dividend.udivmod(divisor);\n\treturn {quotient.template trunc<BitsY>(), remainder.template trunc<BitsY>()};\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nstd::pair<value<BitsY>, value<BitsY>> divmod_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t Bits = max(BitsY, max(BitsA, BitsB));\n\tvalue<Bits> quotient;\n\tvalue<Bits> remainder;\n\tvalue<Bits> dividend = a.template sext<Bits>();\n\tvalue<Bits> divisor = b.template sext<Bits>();\n\tstd::tie(quotient, remainder) = dividend.sdivmod(divisor);\n\treturn {quotient.template trunc<BitsY>(), remainder.template trunc<BitsY>()};\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> div_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_uu<BitsY>(a, b).first;\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> div_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_ss<BitsY>(a, b).first;\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> mod_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_uu<BitsY>(a, b).second;\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> mod_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_ss<BitsY>(a, b).second;\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> modfloor_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_uu<BitsY>(a, b).second;\n}\n\n// GHDL Modfloor operator. Returns r=a mod b, such that r has the same sign as b and\n// a=b*N+r where N is some integer\n// In practical terms, when a and b have different signs and the remainder returned by divmod_ss is not 0\n// then return the remainder + b\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> modfloor_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tvalue<BitsY> r;\n\tr = divmod_ss<BitsY>(a, b).second;\n\tif((b.is_neg() != a.is_neg()) && !r.is_zero())\n\t\treturn add_ss<BitsY>(b, r);\n\treturn r;\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> divfloor_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_uu<BitsY>(a, b).first;\n}\n\n// Divfloor. Similar to above: returns q=a//b, where q has the sign of a*b and a=b*q+N.\n// In other words, returns (truncating) a/b, except if a and b have different signs\n// and there's non-zero remainder, subtract one more towards floor.\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> divfloor_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tvalue<BitsY> q, r;\n\tstd::tie(q, r) = divmod_ss<BitsY>(a, b);\n\tif ((b.is_neg() != a.is_neg()) && !r.is_zero())\n\t\treturn sub_uu<BitsY>(q, value<1> { 1u });\n\treturn q;\n\n}\n\n// Memory helper\nstruct memory_index {\n\tbool valid;\n\tsize_t index;\n\n\ttemplate<size_t BitsAddr>\n\tmemory_index(const value<BitsAddr> &addr, size_t offset, size_t depth) {\n\t\tstatic_assert(value<BitsAddr>::chunks <= 1, \"memory address is too wide\");\n\t\tsize_t offset_index = addr.data[0];\n\n\t\tvalid = (offset_index >= offset && offset_index < offset + depth);\n\t\tindex = offset_index - offset;\n\t}\n};\n\n} // namespace cxxrtl_yosys\n\n#endif\n",
+                            "cxxrtl.h": "/*\n *  yosys -- Yosys Open SYnthesis Suite\n *\n *  Copyright (C) 2019-2020  whitequark <whitequark@whitequark.org>\n *\n *  Permission to use, copy, modify, and/or distribute this software for any\n *  purpose with or without fee is hereby granted.\n *\n *  THE SOFTWARE IS PROVIDED \"AS IS\" AND THE AUTHOR DISCLAIMS ALL WARRANTIES\n *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF\n *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR\n *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES\n *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN\n *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF\n *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.\n *\n */\n\n// This file is included by the designs generated with `write_cxxrtl`. It is not used in Yosys itself.\n//\n// The CXXRTL support library implements compile time specialized arbitrary width arithmetics, as well as provides\n// composite lvalues made out of bit slices and concatenations of lvalues. This allows the `write_cxxrtl` pass\n// to perform a straightforward translation of RTLIL structures to readable C++, relying on the C++ compiler\n// to unwrap the abstraction and generate efficient code.\n\n#ifndef CXXRTL_H\n#define CXXRTL_H\n\n#include <cstddef>\n#include <cstdint>\n#include <cstring>\n#include <cassert>\n#include <limits>\n#include <type_traits>\n#include <tuple>\n#include <vector>\n#include <map>\n#include <algorithm>\n#include <memory>\n#include <functional>\n#include <sstream>\n\n// `cxxrtl::debug_item` has to inherit from `cxxrtl_object` to satisfy strict aliasing requirements.\n#include <cxxrtl/capi/cxxrtl_capi.h>\n\n#ifndef __has_attribute\n#\tdefine __has_attribute(x) 0\n#endif\n\n// CXXRTL essentially uses the C++ compiler as a hygienic macro engine that feeds an instruction selector.\n// It generates a lot of specialized template functions with relatively large bodies that, when inlined\n// into the caller and (for those with loops) unrolled, often expose many new optimization opportunities.\n// Because of this, most of the CXXRTL runtime must be always inlined for best performance.\n#if __has_attribute(always_inline)\n#define CXXRTL_ALWAYS_INLINE inline __attribute__((__always_inline__))\n#else\n#define CXXRTL_ALWAYS_INLINE inline\n#endif\n// Conversely, some functions in the generated code are extremely large yet very cold, with both of these\n// properties being extreme enough to confuse C++ compilers into spending pathological amounts of time\n// on a futile (the code becomes worse) attempt to optimize the least important parts of code.\n#if __has_attribute(optnone)\n#define CXXRTL_EXTREMELY_COLD __attribute__((__optnone__))\n#elif __has_attribute(optimize)\n#define CXXRTL_EXTREMELY_COLD __attribute__((__optimize__(0)))\n#else\n#define CXXRTL_EXTREMELY_COLD\n#endif\n\n// CXXRTL uses assert() to check for C++ contract violations (which may result in e.g. undefined behavior\n// of the simulation code itself), and CXXRTL_ASSERT to check for RTL contract violations (which may at\n// most result in undefined simulation results).\n//\n// Though by default, CXXRTL_ASSERT() expands to assert(), it may be overridden e.g. when integrating\n// the simulation into another process that should survive violating RTL contracts.\n#ifndef CXXRTL_ASSERT\n#ifndef CXXRTL_NDEBUG\n#define CXXRTL_ASSERT(x) assert(x)\n#else\n#define CXXRTL_ASSERT(x)\n#endif\n#endif\n\nnamespace cxxrtl {\n\n// All arbitrary-width values in CXXRTL are backed by arrays of unsigned integers called chunks. The chunk size\n// is the same regardless of the value width to simplify manipulating values via FFI interfaces, e.g. driving\n// and introspecting the simulation in Python.\n//\n// It is practical to use chunk sizes between 32 bits and platform register size because when arithmetics on\n// narrower integer types is legalized by the C++ compiler, it inserts code to clear the high bits of the register.\n// However, (a) most of our operations do not change those bits in the first place because of invariants that are\n// invisible to the compiler, (b) we often operate on non-power-of-2 values and have to clear the high bits anyway.\n// Therefore, using relatively wide chunks and clearing the high bits explicitly and only when we know they may be\n// clobbered results in simpler generated code.\ntypedef uint32_t chunk_t;\ntypedef uint64_t wide_chunk_t;\n\ntemplate<typename T>\nstruct chunk_traits {\n\tstatic_assert(std::is_integral<T>::value && std::is_unsigned<T>::value,\n\t              \"chunk type must be an unsigned integral type\");\n\tusing type = T;\n\tstatic constexpr size_t bits = std::numeric_limits<T>::digits;\n\tstatic constexpr T mask = std::numeric_limits<T>::max();\n};\n\ntemplate<class T>\nstruct expr_base;\n\ntemplate<size_t Bits>\nstruct value : public expr_base<value<Bits>> {\n\tstatic constexpr size_t bits = Bits;\n\n\tusing chunk = chunk_traits<chunk_t>;\n\tstatic constexpr chunk::type msb_mask = (Bits % chunk::bits == 0) ? chunk::mask\n\t\t: chunk::mask >> (chunk::bits - (Bits % chunk::bits));\n\n\tstatic constexpr size_t chunks = (Bits + chunk::bits - 1) / chunk::bits;\n\tchunk::type data[chunks] = {};\n\n\tvalue() = default;\n\ttemplate<typename... Init>\n\texplicit constexpr value(Init ...init) : data{init...} {}\n\n\tvalue(const value<Bits> &) = default;\n\tvalue<Bits> &operator=(const value<Bits> &) = default;\n\n\tvalue(value<Bits> &&) = default;\n\tvalue<Bits> &operator=(value<Bits> &&) = default;\n\n\t// A (no-op) helper that forces the cast to value<>.\n\tCXXRTL_ALWAYS_INLINE\n\tconst value<Bits> &val() const {\n\t\treturn *this;\n\t}\n\n\tstd::string str() const {\n\t\tstd::stringstream ss;\n\t\tss << *this;\n\t\treturn ss.str();\n\t}\n\n\t// Conversion operations.\n\t//\n\t// These functions ensure that a conversion is never out of range, and should be always used, if at all\n\t// possible, instead of direct manipulation of the `data` member. For very large types, .slice() and\n\t// .concat() can be used to split them into more manageable parts.\n\ttemplate<class IntegerT, typename std::enable_if<!std::is_signed<IntegerT>::value, int>::type = 0>\n\tCXXRTL_ALWAYS_INLINE\n\tIntegerT get() const {\n\t\tstatic_assert(std::numeric_limits<IntegerT>::is_integer && !std::numeric_limits<IntegerT>::is_signed,\n\t\t              \"get<T>() requires T to be an unsigned integral type\");\n\t\tstatic_assert(std::numeric_limits<IntegerT>::digits >= Bits,\n\t\t              \"get<T>() requires T to be at least as wide as the value is\");\n\t\tIntegerT result = 0;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult |= IntegerT(data[n]) << (n * chunk::bits);\n\t\treturn result;\n\t}\n\n\ttemplate<class IntegerT, typename std::enable_if<std::is_signed<IntegerT>::value, int>::type = 0>\n\tCXXRTL_ALWAYS_INLINE\n\tIntegerT get() const {\n\t\tauto unsigned_result = get<typename std::make_unsigned<IntegerT>::type>();\n\t\tIntegerT result;\n\t\tmemcpy(&result, &unsigned_result, sizeof(IntegerT));\n\t\treturn result;\n\t}\n\n\ttemplate<class IntegerT, typename std::enable_if<!std::is_signed<IntegerT>::value, int>::type = 0>\n\tCXXRTL_ALWAYS_INLINE\n\tvoid set(IntegerT value) {\n\t\tstatic_assert(std::numeric_limits<IntegerT>::is_integer && !std::numeric_limits<IntegerT>::is_signed,\n\t\t              \"set<T>() requires T to be an unsigned integral type\");\n\t\tstatic_assert(std::numeric_limits<IntegerT>::digits >= Bits,\n\t\t              \"set<T>() requires the value to be at least as wide as T is\");\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tdata[n] = (value >> (n * chunk::bits)) & chunk::mask;\n\t}\n\n\ttemplate<class IntegerT, typename std::enable_if<std::is_signed<IntegerT>::value, int>::type = 0>\n\tCXXRTL_ALWAYS_INLINE\n\tvoid set(IntegerT value) {\n\t\ttypename std::make_unsigned<IntegerT>::type unsigned_value;\n\t\tmemcpy(&unsigned_value, &value, sizeof(IntegerT));\n\t\tset(unsigned_value);\n\t}\n\n\t// Operations with compile-time parameters.\n\t//\n\t// These operations are used to implement slicing, concatenation, and blitting.\n\t// The trunc, zext and sext operations add or remove most significant bits (i.e. on the left);\n\t// the rtrunc and rzext operations add or remove least significant bits (i.e. on the right).\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> trunc() const {\n\t\tstatic_assert(NewBits <= Bits, \"trunc() may not increase width\");\n\t\tvalue<NewBits> result;\n\t\tfor (size_t n = 0; n < result.chunks; n++)\n\t\t\tresult.data[n] = data[n];\n\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\treturn result;\n\t}\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> zext() const {\n\t\tstatic_assert(NewBits >= Bits, \"zext() may not decrease width\");\n\t\tvalue<NewBits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = data[n];\n\t\treturn result;\n\t}\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> sext() const {\n\t\tstatic_assert(NewBits >= Bits, \"sext() may not decrease width\");\n\t\tvalue<NewBits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = data[n];\n\t\tif (is_neg()) {\n\t\t\tresult.data[chunks - 1] |= ~msb_mask;\n\t\t\tfor (size_t n = chunks; n < result.chunks; n++)\n\t\t\t\tresult.data[n] = chunk::mask;\n\t\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\t}\n\t\treturn result;\n\t}\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> rtrunc() const {\n\t\tstatic_assert(NewBits <= Bits, \"rtrunc() may not increase width\");\n\t\tvalue<NewBits> result;\n\t\tconstexpr size_t shift_chunks = (Bits - NewBits) / chunk::bits;\n\t\tconstexpr size_t shift_bits   = (Bits - NewBits) % chunk::bits;\n\t\tchunk::type carry = 0;\n\t\tif (shift_chunks + result.chunks < chunks) {\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[shift_chunks + result.chunks] << (chunk::bits - shift_bits);\n\t\t}\n\t\tfor (size_t n = result.chunks; n > 0; n--) {\n\t\t\tresult.data[n - 1] = carry | (data[shift_chunks + n - 1] >> shift_bits);\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[shift_chunks + n - 1] << (chunk::bits - shift_bits);\n\t\t}\n\t\treturn result;\n\t}\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> rzext() const {\n\t\tstatic_assert(NewBits >= Bits, \"rzext() may not decrease width\");\n\t\tvalue<NewBits> result;\n\t\tconstexpr size_t shift_chunks = (NewBits - Bits) / chunk::bits;\n\t\tconstexpr size_t shift_bits   = (NewBits - Bits) % chunk::bits;\n\t\tchunk::type carry = 0;\n\t\tfor (size_t n = 0; n < chunks; n++) {\n\t\t\tresult.data[shift_chunks + n] = (data[n] << shift_bits) | carry;\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[n] >> (chunk::bits - shift_bits);\n\t\t}\n\t\tif (shift_chunks + chunks < result.chunks)\n\t\t\tresult.data[shift_chunks + chunks] = carry;\n\t\treturn result;\n\t}\n\n\t// Bit blit operation, i.e. a partial read-modify-write.\n\ttemplate<size_t Stop, size_t Start>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<Bits> blit(const value<Stop - Start + 1> &source) const {\n\t\tstatic_assert(Stop >= Start, \"blit() may not reverse bit order\");\n\t\tconstexpr chunk::type start_mask = ~(chunk::mask << (Start % chunk::bits));\n\t\tconstexpr chunk::type stop_mask = (Stop % chunk::bits + 1 == chunk::bits) ? 0\n\t\t\t: (chunk::mask << (Stop % chunk::bits + 1));\n\t\tvalue<Bits> masked = *this;\n\t\tif (Start / chunk::bits == Stop / chunk::bits) {\n\t\t\tmasked.data[Start / chunk::bits] &= stop_mask | start_mask;\n\t\t} else {\n\t\t\tmasked.data[Start / chunk::bits] &= start_mask;\n\t\t\tfor (size_t n = Start / chunk::bits + 1; n < Stop / chunk::bits; n++)\n\t\t\t\tmasked.data[n] = 0;\n\t\t\tmasked.data[Stop / chunk::bits] &= stop_mask;\n\t\t}\n\t\tvalue<Bits> shifted = source\n\t\t\t.template rzext<Stop + 1>()\n\t\t\t.template zext<Bits>();\n\t\treturn masked.bit_or(shifted);\n\t}\n\n\t// Helpers for selecting extending or truncating operation depending on whether the result is wider or narrower\n\t// than the operand. In C++17 these can be replaced with `if constexpr`.\n\ttemplate<size_t NewBits, typename = void>\n\tstruct zext_cast {\n\t\tCXXRTL_ALWAYS_INLINE\n\t\tvalue<NewBits> operator()(const value<Bits> &val) {\n\t\t\treturn val.template zext<NewBits>();\n\t\t}\n\t};\n\n\ttemplate<size_t NewBits>\n\tstruct zext_cast<NewBits, typename std::enable_if<(NewBits < Bits)>::type> {\n\t\tCXXRTL_ALWAYS_INLINE\n\t\tvalue<NewBits> operator()(const value<Bits> &val) {\n\t\t\treturn val.template trunc<NewBits>();\n\t\t}\n\t};\n\n\ttemplate<size_t NewBits, typename = void>\n\tstruct sext_cast {\n\t\tCXXRTL_ALWAYS_INLINE\n\t\tvalue<NewBits> operator()(const value<Bits> &val) {\n\t\t\treturn val.template sext<NewBits>();\n\t\t}\n\t};\n\n\ttemplate<size_t NewBits>\n\tstruct sext_cast<NewBits, typename std::enable_if<(NewBits < Bits)>::type> {\n\t\tCXXRTL_ALWAYS_INLINE\n\t\tvalue<NewBits> operator()(const value<Bits> &val) {\n\t\t\treturn val.template trunc<NewBits>();\n\t\t}\n\t};\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> zcast() const {\n\t\treturn zext_cast<NewBits>()(*this);\n\t}\n\n\ttemplate<size_t NewBits>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<NewBits> scast() const {\n\t\treturn sext_cast<NewBits>()(*this);\n\t}\n\n\t// Bit replication is far more efficient than the equivalent concatenation.\n\ttemplate<size_t Count>\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<Bits * Count> repeat() const {\n\t\tstatic_assert(Bits == 1, \"repeat() is implemented only for 1-bit values\");\n\t\treturn *this ? value<Bits * Count>().bit_not() : value<Bits * Count>();\n\t}\n\n\t// Operations with run-time parameters (offsets, amounts, etc).\n\t//\n\t// These operations are used for computations.\n\tbool bit(size_t offset) const {\n\t\treturn data[offset / chunk::bits] & (1 << (offset % chunk::bits));\n\t}\n\n\tvoid set_bit(size_t offset, bool value = true) {\n\t\tsize_t offset_chunks = offset / chunk::bits;\n\t\tsize_t offset_bits = offset % chunk::bits;\n\t\tdata[offset_chunks] &= ~(1 << offset_bits);\n\t\tdata[offset_chunks] |= value ? 1 << offset_bits : 0;\n\t}\n\n\texplicit operator bool() const {\n\t\treturn !is_zero();\n\t}\n\n\tbool is_zero() const {\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tif (data[n] != 0)\n\t\t\t\treturn false;\n\t\treturn true;\n\t}\n\n\tbool is_neg() const {\n\t\treturn data[chunks - 1] & (1 << ((Bits - 1) % chunk::bits));\n\t}\n\n\tbool operator ==(const value<Bits> &other) const {\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tif (data[n] != other.data[n])\n\t\t\t\treturn false;\n\t\treturn true;\n\t}\n\n\tbool operator !=(const value<Bits> &other) const {\n\t\treturn !(*this == other);\n\t}\n\n\tvalue<Bits> bit_not() const {\n\t\tvalue<Bits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = ~data[n];\n\t\tresult.data[chunks - 1] &= msb_mask;\n\t\treturn result;\n\t}\n\n\tvalue<Bits> bit_and(const value<Bits> &other) const {\n\t\tvalue<Bits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = data[n] & other.data[n];\n\t\treturn result;\n\t}\n\n\tvalue<Bits> bit_or(const value<Bits> &other) const {\n\t\tvalue<Bits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = data[n] | other.data[n];\n\t\treturn result;\n\t}\n\n\tvalue<Bits> bit_xor(const value<Bits> &other) const {\n\t\tvalue<Bits> result;\n\t\tfor (size_t n = 0; n < chunks; n++)\n\t\t\tresult.data[n] = data[n] ^ other.data[n];\n\t\treturn result;\n\t}\n\n\tvalue<Bits> update(const value<Bits> &val, const value<Bits> &mask) const {\n\t\treturn bit_and(mask.bit_not()).bit_or(val.bit_and(mask));\n\t}\n\n\ttemplate<size_t AmountBits>\n\tvalue<Bits> shl(const value<AmountBits> &amount) const {\n\t\t// Ensure our early return is correct by prohibiting values larger than 4 Gbit.\n\t\tstatic_assert(Bits <= chunk::mask, \"shl() of unreasonably large values is not supported\");\n\t\t// Detect shifts definitely large than Bits early.\n\t\tfor (size_t n = 1; n < amount.chunks; n++)\n\t\t\tif (amount.data[n] != 0)\n\t\t\t\treturn {};\n\t\t// Past this point we can use the least significant chunk as the shift size.\n\t\tsize_t shift_chunks = amount.data[0] / chunk::bits;\n\t\tsize_t shift_bits   = amount.data[0] % chunk::bits;\n\t\tif (shift_chunks >= chunks)\n\t\t\treturn {};\n\t\tvalue<Bits> result;\n\t\tchunk::type carry = 0;\n\t\tfor (size_t n = 0; n < chunks - shift_chunks; n++) {\n\t\t\tresult.data[shift_chunks + n] = (data[n] << shift_bits) | carry;\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[n] >> (chunk::bits - shift_bits);\n\t\t}\n\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\treturn result;\n\t}\n\n\ttemplate<size_t AmountBits, bool Signed = false>\n\tvalue<Bits> shr(const value<AmountBits> &amount) const {\n\t\t// Ensure our early return is correct by prohibiting values larger than 4 Gbit.\n\t\tstatic_assert(Bits <= chunk::mask, \"shr() of unreasonably large values is not supported\");\n\t\t// Detect shifts definitely large than Bits early.\n\t\tfor (size_t n = 1; n < amount.chunks; n++)\n\t\t\tif (amount.data[n] != 0)\n\t\t\t\treturn (Signed && is_neg()) ? value<Bits>().bit_not() : value<Bits>();\n\t\t// Past this point we can use the least significant chunk as the shift size.\n\t\tsize_t shift_chunks = amount.data[0] / chunk::bits;\n\t\tsize_t shift_bits   = amount.data[0] % chunk::bits;\n\t\tif (shift_chunks >= chunks)\n\t\t\treturn (Signed && is_neg()) ? value<Bits>().bit_not() : value<Bits>();\n\t\tvalue<Bits> result;\n\t\tchunk::type carry = 0;\n\t\tfor (size_t n = 0; n < chunks - shift_chunks; n++) {\n\t\t\tresult.data[chunks - shift_chunks - 1 - n] = carry | (data[chunks - 1 - n] >> shift_bits);\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[chunks - 1 - n] << (chunk::bits - shift_bits);\n\t\t}\n\t\tif (Signed && is_neg()) {\n\t\t\tsize_t top_chunk_idx  = amount.data[0] > Bits ? 0 : (Bits - amount.data[0]) / chunk::bits;\n\t\t\tsize_t top_chunk_bits = amount.data[0] > Bits ? 0 : (Bits - amount.data[0]) % chunk::bits;\n\t\t\tfor (size_t n = top_chunk_idx + 1; n < chunks; n++)\n\t\t\t\tresult.data[n] = chunk::mask;\n\t\t\tif (amount.data[0] != 0)\n\t\t\t\tresult.data[top_chunk_idx] |= chunk::mask << top_chunk_bits;\n\t\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\t}\n\t\treturn result;\n\t}\n\n\ttemplate<size_t AmountBits>\n\tvalue<Bits> sshr(const value<AmountBits> &amount) const {\n\t\treturn shr<AmountBits, /*Signed=*/true>(amount);\n\t}\n\n\ttemplate<size_t ResultBits, size_t SelBits>\n\tvalue<ResultBits> bmux(const value<SelBits> &sel) const {\n\t\tstatic_assert(ResultBits << SelBits == Bits, \"invalid sizes used in bmux()\");\n\t\tsize_t amount = sel.data[0] * ResultBits;\n\t\tsize_t shift_chunks = amount / chunk::bits;\n\t\tsize_t shift_bits   = amount % chunk::bits;\n\t\tvalue<ResultBits> result;\n\t\tchunk::type carry = 0;\n\t\tif (ResultBits % chunk::bits + shift_bits > chunk::bits)\n\t\t\tcarry = data[result.chunks + shift_chunks] << (chunk::bits - shift_bits);\n\t\tfor (size_t n = 0; n < result.chunks; n++) {\n\t\t\tresult.data[result.chunks - 1 - n] = carry | (data[result.chunks + shift_chunks - 1 - n] >> shift_bits);\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[result.chunks + shift_chunks - 1 - n] << (chunk::bits - shift_bits);\n\t\t}\n\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\treturn result;\n\t}\n\n\ttemplate<size_t ResultBits, size_t SelBits>\n\tvalue<ResultBits> demux(const value<SelBits> &sel) const {\n\t\tstatic_assert(Bits << SelBits == ResultBits, \"invalid sizes used in demux()\");\n\t\tsize_t amount = sel.data[0] * Bits;\n\t\tsize_t shift_chunks = amount / chunk::bits;\n\t\tsize_t shift_bits   = amount % chunk::bits;\n\t\tvalue<ResultBits> result;\n\t\tchunk::type carry = 0;\n\t\tfor (size_t n = 0; n < chunks; n++) {\n\t\t\tresult.data[shift_chunks + n] = (data[n] << shift_bits) | carry;\n\t\t\tcarry = (shift_bits == 0) ? 0\n\t\t\t\t: data[n] >> (chunk::bits - shift_bits);\n\t\t}\n\t\tif (Bits % chunk::bits + shift_bits > chunk::bits)\n\t\t\tresult.data[shift_chunks + chunks] = carry;\n\t\treturn result;\n\t}\n\n\tsize_t ctpop() const {\n\t\tsize_t count = 0;\n\t\tfor (size_t n = 0; n < chunks; n++) {\n\t\t\t// This loop implements the population count idiom as recognized by LLVM and GCC.\n\t\t\tfor (chunk::type x = data[n]; x != 0; count++)\n\t\t\t\tx = x & (x - 1);\n\t\t}\n\t\treturn count;\n\t}\n\n\tsize_t ctlz() const {\n\t\tsize_t count = 0;\n\t\tfor (size_t n = 0; n < chunks; n++) {\n\t\t\tchunk::type x = data[chunks - 1 - n];\n\t\t\t// First add to `count` as if the chunk is zero\n\t\t\tconstexpr size_t msb_chunk_bits = Bits % chunk::bits != 0 ? Bits % chunk::bits : chunk::bits;\n\t\t\tcount += (n == 0 ? msb_chunk_bits : chunk::bits);\n\t\t\t// If the chunk isn't zero, correct the `count` value and return\n\t\t\tif (x != 0) {\n\t\t\t\tfor (; x != 0; count--)\n\t\t\t\t\tx >>= 1;\n\t\t\t\tbreak;\n\t\t\t}\n\t\t}\n\t\treturn count;\n\t}\n\n\ttemplate<bool Invert, bool CarryIn>\n\tstd::pair<value<Bits>, bool /*CarryOut*/> alu(const value<Bits> &other) const {\n\t\tvalue<Bits> result;\n\t\tbool carry = CarryIn;\n\t\tfor (size_t n = 0; n < result.chunks; n++) {\n\t\t\tresult.data[n] = data[n] + (Invert ? ~other.data[n] : other.data[n]) + carry;\n\t\t\tif (result.chunks - 1 == n)\n\t\t\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\t\tcarry = (result.data[n] <  data[n]) ||\n\t\t\t        (result.data[n] == data[n] && carry);\n\t\t}\n\t\treturn {result, carry};\n\t}\n\n\tvalue<Bits> add(const value<Bits> &other) const {\n\t\treturn alu</*Invert=*/false, /*CarryIn=*/false>(other).first;\n\t}\n\n\tvalue<Bits> sub(const value<Bits> &other) const {\n\t\treturn alu</*Invert=*/true, /*CarryIn=*/true>(other).first;\n\t}\n\n\tvalue<Bits> neg() const {\n\t\treturn value<Bits> { 0u }.sub(*this);\n\t}\n\n\tbool ucmp(const value<Bits> &other) const {\n\t\tbool carry;\n\t\tstd::tie(std::ignore, carry) = alu</*Invert=*/true, /*CarryIn=*/true>(other);\n\t\treturn !carry; // a.ucmp(b) ≡ a u< b\n\t}\n\n\tbool scmp(const value<Bits> &other) const {\n\t\tvalue<Bits> result;\n\t\tbool carry;\n\t\tstd::tie(result, carry) = alu</*Invert=*/true, /*CarryIn=*/true>(other);\n\t\tbool overflow = (is_neg() == !other.is_neg()) && (is_neg() != result.is_neg());\n\t\treturn result.is_neg() ^ overflow; // a.scmp(b) ≡ a s< b\n\t}\n\n\ttemplate<size_t ResultBits>\n\tvalue<ResultBits> mul(const value<Bits> &other) const {\n\t\tvalue<ResultBits> result;\n\t\twide_chunk_t wide_result[result.chunks + 1] = {};\n\t\tfor (size_t n = 0; n < chunks; n++) {\n\t\t\tfor (size_t m = 0; m < chunks && n + m < result.chunks; m++) {\n\t\t\t\twide_result[n + m] += wide_chunk_t(data[n]) * wide_chunk_t(other.data[m]);\n\t\t\t\twide_result[n + m + 1] += wide_result[n + m] >> chunk::bits;\n\t\t\t\twide_result[n + m] &= chunk::mask;\n\t\t\t}\n\t\t}\n\t\tfor (size_t n = 0; n < result.chunks; n++) {\n\t\t\tresult.data[n] = wide_result[n];\n\t\t}\n\t\tresult.data[result.chunks - 1] &= result.msb_mask;\n\t\treturn result;\n\t}\n\n\tstd::pair<value<Bits>, value<Bits>> udivmod(value<Bits> divisor) const {\n\t\tvalue<Bits> quotient;\n\t\tvalue<Bits> dividend = *this;\n\t\tif (dividend.ucmp(divisor))\n\t\t\treturn {/*quotient=*/value<Bits>{0u}, /*remainder=*/dividend};\n\t\tint64_t divisor_shift = divisor.ctlz() - dividend.ctlz();\n\t\tassert(divisor_shift >= 0);\n\t\tdivisor = divisor.shl(value<Bits>{(chunk::type) divisor_shift});\n\t\tfor (size_t step = 0; step <= divisor_shift; step++) {\n\t\t\tquotient = quotient.shl(value<Bits>{1u});\n\t\t\tif (!dividend.ucmp(divisor)) {\n\t\t\t\tdividend = dividend.sub(divisor);\n\t\t\t\tquotient.set_bit(0, true);\n\t\t\t}\n\t\t\tdivisor = divisor.shr(value<Bits>{1u});\n\t\t}\n\t\treturn {quotient, /*remainder=*/dividend};\n\t}\n\n\tstd::pair<value<Bits>, value<Bits>> sdivmod(const value<Bits> &other) const {\n\t\tvalue<Bits + 1> quotient;\n\t\tvalue<Bits + 1> remainder;\n\t\tvalue<Bits + 1> dividend = sext<Bits + 1>();\n\t\tvalue<Bits + 1> divisor = other.template sext<Bits + 1>();\n\t\tif (dividend.is_neg()) dividend = dividend.neg();\n\t\tif (divisor.is_neg()) divisor = divisor.neg();\n\t\tstd::tie(quotient, remainder) = dividend.udivmod(divisor);\n\t\tif (dividend.is_neg() != divisor.is_neg()) quotient = quotient.neg();\n\t\tif (dividend.is_neg()) remainder = remainder.neg();\n\t\treturn {quotient.template trunc<Bits>(), remainder.template trunc<Bits>()};\n\t}\n};\n\n// Expression template for a slice, usable as lvalue or rvalue, and composable with other expression templates here.\ntemplate<class T, size_t Stop, size_t Start>\nstruct slice_expr : public expr_base<slice_expr<T, Stop, Start>> {\n\tstatic_assert(Stop >= Start, \"slice_expr() may not reverse bit order\");\n\tstatic_assert(Start < T::bits && Stop < T::bits, \"slice_expr() must be within bounds\");\n\tstatic constexpr size_t bits = Stop - Start + 1;\n\n\tT &expr;\n\n\tslice_expr(T &expr) : expr(expr) {}\n\tslice_expr(const slice_expr<T, Stop, Start> &) = delete;\n\n\tCXXRTL_ALWAYS_INLINE\n\toperator value<bits>() const {\n\t\treturn static_cast<const value<T::bits> &>(expr)\n\t\t\t.template rtrunc<T::bits - Start>()\n\t\t\t.template trunc<bits>();\n\t}\n\n\tCXXRTL_ALWAYS_INLINE\n\tslice_expr<T, Stop, Start> &operator=(const value<bits> &rhs) {\n\t\t// Generic partial assignment implemented using a read-modify-write operation on the sliced expression.\n\t\texpr = static_cast<const value<T::bits> &>(expr)\n\t\t\t.template blit<Stop, Start>(rhs);\n\t\treturn *this;\n\t}\n\n\t// A helper that forces the cast to value<>, which allows deduction to work.\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<bits> val() const {\n\t\treturn static_cast<const value<bits> &>(*this);\n\t}\n};\n\n// Expression template for a concatenation, usable as lvalue or rvalue, and composable with other expression templates here.\ntemplate<class T, class U>\nstruct concat_expr : public expr_base<concat_expr<T, U>> {\n\tstatic constexpr size_t bits = T::bits + U::bits;\n\n\tT &ms_expr;\n\tU &ls_expr;\n\n\tconcat_expr(T &ms_expr, U &ls_expr) : ms_expr(ms_expr), ls_expr(ls_expr) {}\n\tconcat_expr(const concat_expr<T, U> &) = delete;\n\n\tCXXRTL_ALWAYS_INLINE\n\toperator value<bits>() const {\n\t\tvalue<bits> ms_shifted = static_cast<const value<T::bits> &>(ms_expr)\n\t\t\t.template rzext<bits>();\n\t\tvalue<bits> ls_extended = static_cast<const value<U::bits> &>(ls_expr)\n\t\t\t.template zext<bits>();\n\t\treturn ms_shifted.bit_or(ls_extended);\n\t}\n\n\tCXXRTL_ALWAYS_INLINE\n\tconcat_expr<T, U> &operator=(const value<bits> &rhs) {\n\t\tms_expr = rhs.template rtrunc<T::bits>();\n\t\tls_expr = rhs.template trunc<U::bits>();\n\t\treturn *this;\n\t}\n\n\t// A helper that forces the cast to value<>, which allows deduction to work.\n\tCXXRTL_ALWAYS_INLINE\n\tvalue<bits> val() const {\n\t\treturn static_cast<const value<bits> &>(*this);\n\t}\n};\n\n// Base class for expression templates, providing helper methods for operations that are valid on both rvalues and lvalues.\n//\n// Note that expression objects (slices and concatenations) constructed in this way should NEVER be captured because\n// they refer to temporaries that will, in general, only live until the end of the statement. For example, both of\n// these snippets perform use-after-free:\n//\n//    const auto &a = val.slice<7,0>().slice<1>();\n//    value<1> b = a;\n//\n//    auto &&c = val.slice<7,0>().slice<1>();\n//    c = value<1>{1u};\n//\n// An easy way to write code using slices and concatenations safely is to follow two simple rules:\n//   * Never explicitly name any type except `value<W>` or `const value<W> &`.\n//   * Never use a `const auto &` or `auto &&` in any such expression.\n// Then, any code that compiles will be well-defined.\ntemplate<class T>\nstruct expr_base {\n\ttemplate<size_t Stop, size_t Start = Stop>\n\tCXXRTL_ALWAYS_INLINE\n\tslice_expr<const T, Stop, Start> slice() const {\n\t\treturn {*static_cast<const T *>(this)};\n\t}\n\n\ttemplate<size_t Stop, size_t Start = Stop>\n\tCXXRTL_ALWAYS_INLINE\n\tslice_expr<T, Stop, Start> slice() {\n\t\treturn {*static_cast<T *>(this)};\n\t}\n\n\ttemplate<class U>\n\tCXXRTL_ALWAYS_INLINE\n\tconcat_expr<const T, typename std::remove_reference<const U>::type> concat(const U &other) const {\n\t\treturn {*static_cast<const T *>(this), other};\n\t}\n\n\ttemplate<class U>\n\tCXXRTL_ALWAYS_INLINE\n\tconcat_expr<T, typename std::remove_reference<U>::type> concat(U &&other) {\n\t\treturn {*static_cast<T *>(this), other};\n\t}\n};\n\ntemplate<size_t Bits>\nstd::ostream &operator<<(std::ostream &os, const value<Bits> &val) {\n\tauto old_flags = os.flags(std::ios::right);\n\tauto old_width = os.width(0);\n\tauto old_fill  = os.fill('0');\n\tos << val.bits << '\\'' << std::hex;\n\tfor (size_t n = val.chunks - 1; n != (size_t)-1; n--) {\n\t\tif (n == val.chunks - 1 && Bits % value<Bits>::chunk::bits != 0)\n\t\t\tos.width((Bits % value<Bits>::chunk::bits + 3) / 4);\n\t\telse\n\t\t\tos.width((value<Bits>::chunk::bits + 3) / 4);\n\t\tos << val.data[n];\n\t}\n\tos.fill(old_fill);\n\tos.width(old_width);\n\tos.flags(old_flags);\n\treturn os;\n}\n\ntemplate<size_t Bits>\nstruct value_formatted {\n\tconst value<Bits> &val;\n\tbool character;\n\tbool justify_left;\n\tchar padding;\n\tint width;\n\tint base;\n\tbool signed_;\n\tbool plus;\n\n\tvalue_formatted(const value<Bits> &val, bool character, bool justify_left, char padding, int width, int base, bool signed_, bool plus) :\n\t\tval(val), character(character), justify_left(justify_left), padding(padding), width(width), base(base), signed_(signed_), plus(plus) {}\n\tvalue_formatted(const value_formatted<Bits> &) = delete;\n\tvalue_formatted<Bits> &operator=(const value_formatted<Bits> &rhs) = delete;\n};\n\ntemplate<size_t Bits>\nstd::ostream &operator<<(std::ostream &os, const value_formatted<Bits> &vf)\n{\n\tvalue<Bits> val = vf.val;\n\n\tstd::string buf;\n\n\t// We might want to replace some of these bit() calls with direct\n\t// chunk access if it turns out to be slow enough to matter.\n\n\tif (!vf.character) {\n\t\tsize_t width = Bits;\n\t\tif (vf.base != 10) {\n\t\t\twidth = 0;\n\t\t\tfor (size_t index = 0; index < Bits; index++)\n\t\t\t\tif (val.bit(index))\n\t\t\t\t\twidth = index + 1;\n\t\t}\n\n\t\tif (vf.base == 2) {\n\t\t\tfor (size_t i = width; i > 0; i--)\n\t\t\t\tbuf += (val.bit(i - 1) ? '1' : '0');\n\t\t} else if (vf.base == 8 || vf.base == 16) {\n\t\t\tsize_t step = (vf.base == 16) ? 4 : 3;\n\t\t\tfor (size_t index = 0; index < width; index += step) {\n\t\t\t\tuint8_t value = val.bit(index) | (val.bit(index + 1) << 1) | (val.bit(index + 2) << 2);\n\t\t\t\tif (step == 4)\n\t\t\t\t\tvalue |= val.bit(index + 3) << 3;\n\t\t\t\tbuf += \"0123456789abcdef\"[value];\n\t\t\t}\n\t\t\tstd::reverse(buf.begin(), buf.end());\n\t\t} else if (vf.base == 10) {\n\t\t\tbool negative = vf.signed_ && val.is_neg();\n\t\t\tif (negative)\n\t\t\t\tval = val.neg();\n\t\t\tif (val.is_zero())\n\t\t\t\tbuf += '0';\n\t\t\twhile (!val.is_zero()) {\n\t\t\t\tvalue<Bits> quotient, remainder;\n\t\t\t\tif (Bits >= 4)\n\t\t\t\t\tstd::tie(quotient, remainder) = val.udivmod(value<Bits>{10u});\n\t\t\t\telse\n\t\t\t\t\tstd::tie(quotient, remainder) = std::make_pair(value<Bits>{0u}, val);\n\t\t\t\tbuf += '0' + remainder.template trunc<(Bits > 4 ? 4 : Bits)>().val().template get<uint8_t>();\n\t\t\t\tval = quotient;\n\t\t\t}\n\t\t\tif (negative || vf.plus)\n\t\t\t\tbuf += negative ? '-' : '+';\n\t\t\tstd::reverse(buf.begin(), buf.end());\n\t\t} else assert(false);\n\t} else {\n\t\tbuf.reserve(Bits/8);\n\t\tfor (int i = 0; i < Bits; i += 8) {\n\t\t\tchar ch = 0;\n\t\t\tfor (int j = 0; j < 8 && i + j < int(Bits); j++)\n\t\t\t\tif (val.bit(i + j))\n\t\t\t\t\tch |= 1 << j;\n\t\t\tif (ch != 0)\n\t\t\t\tbuf.append({ch});\n\t\t}\n\t\tstd::reverse(buf.begin(), buf.end());\n\t}\n\n\tassert(vf.width == 0 || vf.padding != '\\0');\n\tif (!vf.justify_left && buf.size() < vf.width) {\n\t\tsize_t pad_width = vf.width - buf.size();\n\t\tif (vf.padding == '0' && (buf.front() == '+' || buf.front() == '-')) {\n\t\t\tos << buf.front();\n\t\t\tbuf.erase(0, 1);\n\t\t}\n\t\tos << std::string(pad_width, vf.padding);\n\t}\n\tos << buf;\n\tif (vf.justify_left && buf.size() < vf.width)\n\t\tos << std::string(vf.width - buf.size(), vf.padding);\n\n\treturn os;\n}\n\n// An object that can be passed to a `commit()` method in order to produce a replay log of every state change in\n// the simulation.\nstruct observer {\n\t// Called when the `commit()` method for a wire is about to update the `chunks` chunks at `base` with `chunks` chunks\n\t// at `value` that have a different bit pattern. It is guaranteed that `chunks` is equal to the wire chunk count and\n\t// `base` points to the first chunk.\n\tvirtual void on_commit(size_t chunks, const chunk_t *base, const chunk_t *value) = 0;\n\n\t// Called when the `commit()` method for a memory is about to update the `chunks` chunks at `&base[chunks * index]`\n\t// with `chunks` chunks at `value` that have a different bit pattern. It is guaranteed that `chunks` is equal to\n\t// the memory element chunk count and `base` points to the first chunk of the first element of the memory.\n\tvirtual void on_commit(size_t chunks, const chunk_t *base, const chunk_t *value, size_t index) = 0;\n};\n\n// The `null_observer` class has the same interface as `observer`, but has no invocation overhead, since its methods\n// are final and have no implementation. This allows the observer feature to be zero-cost when not in use.\nstruct null_observer final: observer {\n\tvoid on_commit(size_t chunks, const chunk_t *base, const chunk_t *value) override {}\n\tvoid on_commit(size_t chunks, const chunk_t *base, const chunk_t *value, size_t index) override {}\n};\n\ntemplate<size_t Bits>\nstruct wire {\n\tstatic constexpr size_t bits = Bits;\n\n\tvalue<Bits> curr;\n\tvalue<Bits> next;\n\n\twire() = default;\n\texplicit constexpr wire(const value<Bits> &init) : curr(init), next(init) {}\n\ttemplate<typename... Init>\n\texplicit constexpr wire(Init ...init) : curr{init...}, next{init...} {}\n\n\t// Copying and copy-assigning values is natural. If, however, a value is replaced with a wire,\n\t// e.g. because a module is built with a different optimization level, then existing code could\n\t// unintentionally copy a wire instead, which would create a subtle but serious bug. To make sure\n\t// this doesn't happen, prohibit copying and copy-assigning wires.\n\twire(const wire<Bits> &) = delete;\n\twire<Bits> &operator=(const wire<Bits> &) = delete;\n\n\twire(wire<Bits> &&) = default;\n\twire<Bits> &operator=(wire<Bits> &&) = default;\n\n\ttemplate<class IntegerT>\n\tCXXRTL_ALWAYS_INLINE\n\tIntegerT get() const {\n\t\treturn curr.template get<IntegerT>();\n\t}\n\n\ttemplate<class IntegerT>\n\tCXXRTL_ALWAYS_INLINE\n\tvoid set(IntegerT other) {\n\t\tnext.template set<IntegerT>(other);\n\t}\n\n\t// This method intentionally takes a mandatory argument (to make it more difficult to misuse in\n\t// black box implementations, leading to missed observer events). It is generic over its argument\n\t// to make sure the `on_commit` call is devirtualized. This is somewhat awkward but lets us keep\n\t// a single implementation for both this method and the one in `memory`.\n\ttemplate<class ObserverT>\n\tbool commit(ObserverT &observer) {\n\t\tif (curr != next) {\n\t\t\tobserver.on_commit(curr.chunks, curr.data, next.data);\n\t\t\tcurr = next;\n\t\t\treturn true;\n\t\t}\n\t\treturn false;\n\t}\n};\n\ntemplate<size_t Bits>\nstd::ostream &operator<<(std::ostream &os, const wire<Bits> &val) {\n\tos << val.curr;\n\treturn os;\n}\n\ntemplate<size_t Width>\nstruct memory {\n\tconst size_t depth;\n\tstd::unique_ptr<value<Width>[]> data;\n\n\texplicit memory(size_t depth) : depth(depth), data(new value<Width>[depth]) {}\n\n\tmemory(const memory<Width> &) = delete;\n\tmemory<Width> &operator=(const memory<Width> &) = delete;\n\n\tmemory(memory<Width> &&) = default;\n\tmemory<Width> &operator=(memory<Width> &&other) {\n\t\tassert(depth == other.depth);\n\t\tdata = std::move(other.data);\n\t\twrite_queue = std::move(other.write_queue);\n\t\treturn *this;\n\t}\n\n\t// An operator for direct memory reads. May be used at any time during the simulation.\n\tconst value<Width> &operator [](size_t index) const {\n\t\tassert(index < depth);\n\t\treturn data[index];\n\t}\n\n\t// An operator for direct memory writes. May only be used before the simulation is started. If used\n\t// after the simulation is started, the design may malfunction.\n\tvalue<Width> &operator [](size_t index) {\n\t\tassert(index < depth);\n\t\treturn data[index];\n\t}\n\n\t// A simple way to make a writable memory would be to use an array of wires instead of an array of values.\n\t// However, there are two significant downsides to this approach: first, it has large overhead (2× space\n\t// overhead, and O(depth) time overhead during commit); second, it does not simplify handling write port\n\t// priorities. Although in principle write ports could be ordered or conditionally enabled in generated\n\t// code based on their priorities and selected addresses, the feedback arc set problem is computationally\n\t// expensive, and the heuristic based algorithms are not easily modified to guarantee (rather than prefer)\n\t// a particular write port evaluation order.\n\t//\n\t// The approach used here instead is to queue writes into a buffer during the eval phase, then perform\n\t// the writes during the commit phase in the priority order. This approach has low overhead, with both space\n\t// and time proportional to the amount of write ports. Because virtually every memory in a practical design\n\t// has at most two write ports, linear search is used on every write, being the fastest and simplest approach.\n\tstruct write {\n\t\tsize_t index;\n\t\tvalue<Width> val;\n\t\tvalue<Width> mask;\n\t\tint priority;\n\t};\n\tstd::vector<write> write_queue;\n\n\tvoid update(size_t index, const value<Width> &val, const value<Width> &mask, int priority = 0) {\n\t\tassert(index < depth);\n\t\t// Queue up the write while keeping the queue sorted by priority.\n\t\twrite_queue.insert(\n\t\t\tstd::upper_bound(write_queue.begin(), write_queue.end(), priority,\n\t\t\t\t[](const int a, const write& b) { return a < b.priority; }),\n\t\t\twrite { index, val, mask, priority });\n\t}\n\n\t// See the note for `wire::commit()`.\n\ttemplate<class ObserverT>\n\tbool commit(ObserverT &observer) {\n\t\tbool changed = false;\n\t\tfor (const write &entry : write_queue) {\n\t\t\tvalue<Width> elem = data[entry.index];\n\t\t\telem = elem.update(entry.val, entry.mask);\n\t\t\tif (data[entry.index] != elem) {\n\t\t\t\tobserver.on_commit(value<Width>::chunks, data[0].data, elem.data, entry.index);\n\t\t\t\tchanged |= true;\n\t\t\t}\n\t\t\tdata[entry.index] = elem;\n\t\t}\n\t\twrite_queue.clear();\n\t\treturn changed;\n\t}\n};\n\nstruct metadata {\n\tconst enum {\n\t\tMISSING = 0,\n\t\tUINT   \t= 1,\n\t\tSINT   \t= 2,\n\t\tSTRING \t= 3,\n\t\tDOUBLE \t= 4,\n\t} value_type;\n\n\t// In debug mode, using the wrong .as_*() function will assert.\n\t// In release mode, using the wrong .as_*() function will safely return a default value.\n\tconst uint64_t    uint_value = 0;\n\tconst int64_t     sint_value = 0;\n\tconst std::string string_value = \"\";\n\tconst double      double_value = 0.0;\n\n\tmetadata() : value_type(MISSING) {}\n\tmetadata(uint64_t value) : value_type(UINT), uint_value(value) {}\n\tmetadata(int64_t value) : value_type(SINT), sint_value(value) {}\n\tmetadata(const std::string &value) : value_type(STRING), string_value(value) {}\n\tmetadata(const char *value) : value_type(STRING), string_value(value) {}\n\tmetadata(double value) : value_type(DOUBLE), double_value(value) {}\n\n\tmetadata(const metadata &) = default;\n\tmetadata &operator=(const metadata &) = delete;\n\n\tuint64_t as_uint() const {\n\t\tassert(value_type == UINT);\n\t\treturn uint_value;\n\t}\n\n\tint64_t as_sint() const {\n\t\tassert(value_type == SINT);\n\t\treturn sint_value;\n\t}\n\n\tconst std::string &as_string() const {\n\t\tassert(value_type == STRING);\n\t\treturn string_value;\n\t}\n\n\tdouble as_double() const {\n\t\tassert(value_type == DOUBLE);\n\t\treturn double_value;\n\t}\n};\n\ntypedef std::map<std::string, metadata> metadata_map;\n\n// Tag class to disambiguate values/wires and their aliases.\nstruct debug_alias {};\n\n// Tag declaration to disambiguate values and debug outlines.\nusing debug_outline = ::_cxxrtl_outline;\n\n// This structure is intended for consumption via foreign function interfaces, like Python's ctypes.\n// Because of this it uses a C-style layout that is easy to parse rather than more idiomatic C++.\n//\n// To avoid violating strict aliasing rules, this structure has to be a subclass of the one used\n// in the C API, or it would not be possible to cast between the pointers to these.\n//\n// The `attrs` member cannot be owned by this structure because a `cxxrtl_object` can be created\n// from external C code.\nstruct debug_item : ::cxxrtl_object {\n\t// Object types.\n\tenum : uint32_t {\n\t\tVALUE   = CXXRTL_VALUE,\n\t\tWIRE    = CXXRTL_WIRE,\n\t\tMEMORY  = CXXRTL_MEMORY,\n\t\tALIAS   = CXXRTL_ALIAS,\n\t\tOUTLINE = CXXRTL_OUTLINE,\n\t};\n\n\t// Object flags.\n\tenum : uint32_t {\n\t\tINPUT  = CXXRTL_INPUT,\n\t\tOUTPUT = CXXRTL_OUTPUT,\n\t\tINOUT  = CXXRTL_INOUT,\n\t\tDRIVEN_SYNC = CXXRTL_DRIVEN_SYNC,\n\t\tDRIVEN_COMB = CXXRTL_DRIVEN_COMB,\n\t\tUNDRIVEN    = CXXRTL_UNDRIVEN,\n\t};\n\n\tdebug_item(const ::cxxrtl_object &object) : cxxrtl_object(object) {}\n\n\ttemplate<size_t Bits>\n\tdebug_item(value<Bits> &item, size_t lsb_offset = 0, uint32_t flags_ = 0) {\n\t\tstatic_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"value<Bits> is not compatible with C layout\");\n\t\ttype    = VALUE;\n\t\tflags   = flags_;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = item.data;\n\t\tnext    = item.data;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits>\n\tdebug_item(const value<Bits> &item, size_t lsb_offset = 0) {\n\t\tstatic_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"value<Bits> is not compatible with C layout\");\n\t\ttype    = VALUE;\n\t\tflags   = DRIVEN_COMB;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = const_cast<chunk_t*>(item.data);\n\t\tnext    = nullptr;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits>\n\tdebug_item(wire<Bits> &item, size_t lsb_offset = 0, uint32_t flags_ = 0) {\n\t\tstatic_assert(sizeof(item.curr) == value<Bits>::chunks * sizeof(chunk_t) &&\n\t\t              sizeof(item.next) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"wire<Bits> is not compatible with C layout\");\n\t\ttype    = WIRE;\n\t\tflags   = flags_;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = item.curr.data;\n\t\tnext    = item.next.data;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Width>\n\tdebug_item(memory<Width> &item, size_t zero_offset = 0) {\n\t\tstatic_assert(sizeof(item.data[0]) == value<Width>::chunks * sizeof(chunk_t),\n\t\t              \"memory<Width> is not compatible with C layout\");\n\t\ttype    = MEMORY;\n\t\tflags   = 0;\n\t\twidth   = Width;\n\t\tlsb_at  = 0;\n\t\tdepth   = item.depth;\n\t\tzero_at = zero_offset;\n\t\tcurr    = item.data ? item.data[0].data : nullptr;\n\t\tnext    = nullptr;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits>\n\tdebug_item(debug_alias, const value<Bits> &item, size_t lsb_offset = 0) {\n\t\tstatic_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"value<Bits> is not compatible with C layout\");\n\t\ttype    = ALIAS;\n\t\tflags   = DRIVEN_COMB;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = const_cast<chunk_t*>(item.data);\n\t\tnext    = nullptr;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits>\n\tdebug_item(debug_alias, const wire<Bits> &item, size_t lsb_offset = 0) {\n\t\tstatic_assert(sizeof(item.curr) == value<Bits>::chunks * sizeof(chunk_t) &&\n\t\t              sizeof(item.next) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"wire<Bits> is not compatible with C layout\");\n\t\ttype    = ALIAS;\n\t\tflags   = DRIVEN_COMB;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = const_cast<chunk_t*>(item.curr.data);\n\t\tnext    = nullptr;\n\t\toutline = nullptr;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits>\n\tdebug_item(debug_outline &group, const value<Bits> &item, size_t lsb_offset = 0) {\n\t\tstatic_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),\n\t\t              \"value<Bits> is not compatible with C layout\");\n\t\ttype    = OUTLINE;\n\t\tflags   = DRIVEN_COMB;\n\t\twidth   = Bits;\n\t\tlsb_at  = lsb_offset;\n\t\tdepth   = 1;\n\t\tzero_at = 0;\n\t\tcurr    = const_cast<chunk_t*>(item.data);\n\t\tnext    = nullptr;\n\t\toutline = &group;\n\t\tattrs   = nullptr;\n\t}\n\n\ttemplate<size_t Bits, class IntegerT>\n\tIntegerT get() const {\n\t\tassert(width == Bits && depth == 1);\n\t\tvalue<Bits> item;\n\t\tstd::copy(curr, curr + value<Bits>::chunks, item.data);\n\t\treturn item.template get<IntegerT>();\n\t}\n\n\ttemplate<size_t Bits, class IntegerT>\n\tvoid set(IntegerT other) const {\n\t\tassert(width == Bits && depth == 1);\n\t\tvalue<Bits> item;\n\t\titem.template set<IntegerT>(other);\n\t\tstd::copy(item.data, item.data + value<Bits>::chunks, next);\n\t}\n};\nstatic_assert(std::is_standard_layout<debug_item>::value, \"debug_item is not compatible with C layout\");\n\n} // namespace cxxrtl\n\ntypedef struct _cxxrtl_attr_set {\n\tcxxrtl::metadata_map map;\n} *cxxrtl_attr_set;\n\nnamespace cxxrtl {\n\n// Representation of an attribute set in the C++ interface.\nusing debug_attrs = ::_cxxrtl_attr_set;\n\nstruct debug_items {\n\tstd::map<std::string, std::vector<debug_item>> table;\n\tstd::map<std::string, std::unique_ptr<debug_attrs>> attrs_table;\n\n\tvoid add(const std::string &name, debug_item &&item, metadata_map &&item_attrs = {}) {\n\t\tstd::unique_ptr<debug_attrs> &attrs = attrs_table[name];\n\t\tif (attrs.get() == nullptr)\n\t\t\tattrs = std::unique_ptr<debug_attrs>(new debug_attrs);\n\t\tfor (auto attr : item_attrs)\n\t\t\tattrs->map.insert(attr);\n\t\titem.attrs = attrs.get();\n\t\tstd::vector<debug_item> &parts = table[name];\n\t\tparts.emplace_back(item);\n\t\tstd::sort(parts.begin(), parts.end(),\n\t\t\t[](const debug_item &a, const debug_item &b) {\n\t\t\t\treturn a.lsb_at < b.lsb_at;\n\t\t\t});\n\t}\n\n\tsize_t count(const std::string &name) const {\n\t\tif (table.count(name) == 0)\n\t\t\treturn 0;\n\t\treturn table.at(name).size();\n\t}\n\n\tconst std::vector<debug_item> &parts_at(const std::string &name) const {\n\t\treturn table.at(name);\n\t}\n\n\tconst debug_item &at(const std::string &name) const {\n\t\tconst std::vector<debug_item> &parts = table.at(name);\n\t\tassert(parts.size() == 1);\n\t\treturn parts.at(0);\n\t}\n\n\tconst debug_item &operator [](const std::string &name) const {\n\t\treturn at(name);\n\t}\n\n\tconst metadata_map &attrs(const std::string &name) const {\n\t\treturn attrs_table.at(name)->map;\n\t}\n};\n\n// Tag class to disambiguate the default constructor used by the toplevel module that calls reset(),\n// and the constructor of interior modules that should not call it.\nstruct interior {};\n\nstruct module {\n\tmodule() {}\n\tvirtual ~module() {}\n\n\t// Modules with black boxes cannot be copied. Although not all designs include black boxes,\n\t// delete the copy constructor and copy assignment operator to make sure that any downstream\n\t// code that manipulates modules doesn't accidentally depend on their availability.\n\tmodule(const module &) = delete;\n\tmodule &operator=(const module &) = delete;\n\n\tmodule(module &&) = default;\n\tmodule &operator=(module &&) = default;\n\n\tvirtual void reset() = 0;\n\n\tvirtual bool eval() = 0;\n\tvirtual bool commit() = 0;\n\n\tunsigned int steps = 0;\n\n\tsize_t step() {\n\t\t++steps;\n\t\tsize_t deltas = 0;\n\t\tbool converged = false;\n\t\tdo {\n\t\t\tconverged = eval();\n\t\t\tdeltas++;\n\t\t} while (commit() && !converged);\n\t\treturn deltas;\n\t}\n\n\tvirtual void debug_info(debug_items &items, std::string path = \"\") {\n\t\t(void)items, (void)path;\n\t}\n};\n\n} // namespace cxxrtl\n\n// Internal structures used to communicate with the implementation of the C interface.\n\ntypedef struct _cxxrtl_toplevel {\n\tstd::unique_ptr<cxxrtl::module> module;\n} *cxxrtl_toplevel;\n\ntypedef struct _cxxrtl_outline {\n\tstd::function<void()> eval;\n} *cxxrtl_outline;\n\n// Definitions of internal Yosys cells. Other than the functions in this namespace, CXXRTL is fully generic\n// and indepenent of Yosys implementation details.\n//\n// The `write_cxxrtl` pass translates internal cells (cells with names that start with `$`) to calls of these\n// functions. All of Yosys arithmetic and logical cells perform sign or zero extension on their operands,\n// whereas basic operations on arbitrary width values require operands to be of the same width. These functions\n// bridge the gap by performing the necessary casts. They are named similar to `cell_A[B]`, where A and B are `u`\n// if the corresponding operand is unsigned, and `s` if it is signed.\nnamespace cxxrtl_yosys {\n\nusing namespace cxxrtl;\n\n// std::max isn't constexpr until C++14 for no particular reason (it's an oversight), so we define our own.\ntemplate<class T>\nCXXRTL_ALWAYS_INLINE\nconstexpr T max(const T &a, const T &b) {\n\treturn a > b ? a : b;\n}\n\n// Logic operations\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> logic_not(const value<BitsA> &a) {\n\treturn value<BitsY> { a ? 0u : 1u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> logic_and(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn value<BitsY> { (bool(a) && bool(b)) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> logic_or(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn value<BitsY> { (bool(a) || bool(b)) ? 1u : 0u };\n}\n\n// Reduction operations\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> reduce_and(const value<BitsA> &a) {\n\treturn value<BitsY> { a.bit_not().is_zero() ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> reduce_or(const value<BitsA> &a) {\n\treturn value<BitsY> { a ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> reduce_xor(const value<BitsA> &a) {\n\treturn value<BitsY> { (a.ctpop() % 2) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> reduce_xnor(const value<BitsA> &a) {\n\treturn value<BitsY> { (a.ctpop() % 2) ? 0u : 1u };\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> reduce_bool(const value<BitsA> &a) {\n\treturn value<BitsY> { a ? 1u : 0u };\n}\n\n// Bitwise operations\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> not_u(const value<BitsA> &a) {\n\treturn a.template zcast<BitsY>().bit_not();\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> not_s(const value<BitsA> &a) {\n\treturn a.template scast<BitsY>().bit_not();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> and_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().bit_and(b.template zcast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> and_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().bit_and(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> or_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().bit_or(b.template zcast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> or_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().bit_or(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> xor_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().bit_xor(b.template zcast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> xor_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().bit_xor(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> xnor_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().bit_xor(b.template zcast<BitsY>()).bit_not();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> xnor_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().bit_xor(b.template scast<BitsY>()).bit_not();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shl_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().shl(b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shl_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().shl(b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sshl_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().shl(b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sshl_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().shl(b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shr_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.shr(b).template zcast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shr_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.shr(b).template scast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sshr_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.shr(b).template zcast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sshr_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.sshr(b).template scast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shift_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shr_uu<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shift_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shr_su<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shift_us(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn b.is_neg() ? shl_uu<BitsY>(a, b.template sext<BitsB + 1>().neg()) : shr_uu<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shift_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn b.is_neg() ? shl_su<BitsY>(a, b.template sext<BitsB + 1>().neg()) : shr_su<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shiftx_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shift_uu<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shiftx_su(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shift_su<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shiftx_us(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shift_us<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> shiftx_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn shift_ss<BitsY>(a, b);\n}\n\n// Comparison operations\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> eq_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY>{ a.template zext<BitsExt>() == b.template zext<BitsExt>() ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> eq_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY>{ a.template sext<BitsExt>() == b.template sext<BitsExt>() ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> ne_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY>{ a.template zext<BitsExt>() != b.template zext<BitsExt>() ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> ne_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY>{ a.template sext<BitsExt>() != b.template sext<BitsExt>() ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> eqx_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn eq_uu<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> eqx_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn eq_ss<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> nex_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn ne_uu<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> nex_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn ne_ss<BitsY>(a, b);\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> gt_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { b.template zext<BitsExt>().ucmp(a.template zext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> gt_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { b.template sext<BitsExt>().scmp(a.template sext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> ge_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { !a.template zext<BitsExt>().ucmp(b.template zext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> ge_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { !a.template sext<BitsExt>().scmp(b.template sext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> lt_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { a.template zext<BitsExt>().ucmp(b.template zext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> lt_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { a.template sext<BitsExt>().scmp(b.template sext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> le_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { !b.template zext<BitsExt>().ucmp(a.template zext<BitsExt>()) ? 1u : 0u };\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> le_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsExt = max(BitsA, BitsB);\n\treturn value<BitsY> { !b.template sext<BitsExt>().scmp(a.template sext<BitsExt>()) ? 1u : 0u };\n}\n\n// Arithmetic operations\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> pos_u(const value<BitsA> &a) {\n\treturn a.template zcast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> pos_s(const value<BitsA> &a) {\n\treturn a.template scast<BitsY>();\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> neg_u(const value<BitsA> &a) {\n\treturn a.template zcast<BitsY>().neg();\n}\n\ntemplate<size_t BitsY, size_t BitsA>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> neg_s(const value<BitsA> &a) {\n\treturn a.template scast<BitsY>().neg();\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> add_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().add(b.template zcast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> add_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().add(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sub_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template zcast<BitsY>().sub(b.template zcast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> sub_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().sub(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> mul_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t BitsM = BitsA >= BitsB ? BitsA : BitsB;\n\treturn a.template zcast<BitsM>().template mul<BitsY>(b.template zcast<BitsM>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> mul_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn a.template scast<BitsY>().template mul<BitsY>(b.template scast<BitsY>());\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nstd::pair<value<BitsY>, value<BitsY>> divmod_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t Bits = max(BitsY, max(BitsA, BitsB));\n\tvalue<Bits> quotient;\n\tvalue<Bits> remainder;\n\tvalue<Bits> dividend = a.template zext<Bits>();\n\tvalue<Bits> divisor = b.template zext<Bits>();\n\tstd::tie(quotient, remainder) = dividend.udivmod(divisor);\n\treturn {quotient.template trunc<BitsY>(), remainder.template trunc<BitsY>()};\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nstd::pair<value<BitsY>, value<BitsY>> divmod_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tconstexpr size_t Bits = max(BitsY, max(BitsA, BitsB));\n\tvalue<Bits> quotient;\n\tvalue<Bits> remainder;\n\tvalue<Bits> dividend = a.template sext<Bits>();\n\tvalue<Bits> divisor = b.template sext<Bits>();\n\tstd::tie(quotient, remainder) = dividend.sdivmod(divisor);\n\treturn {quotient.template trunc<BitsY>(), remainder.template trunc<BitsY>()};\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> div_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_uu<BitsY>(a, b).first;\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> div_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_ss<BitsY>(a, b).first;\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> mod_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_uu<BitsY>(a, b).second;\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> mod_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_ss<BitsY>(a, b).second;\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> modfloor_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_uu<BitsY>(a, b).second;\n}\n\n// GHDL Modfloor operator. Returns r=a mod b, such that r has the same sign as b and\n// a=b*N+r where N is some integer\n// In practical terms, when a and b have different signs and the remainder returned by divmod_ss is not 0\n// then return the remainder + b\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> modfloor_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tvalue<BitsY> r;\n\tr = divmod_ss<BitsY>(a, b).second;\n\tif((b.is_neg() != a.is_neg()) && !r.is_zero())\n\t\treturn add_ss<BitsY>(b, r);\n\treturn r;\n}\n\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> divfloor_uu(const value<BitsA> &a, const value<BitsB> &b) {\n\treturn divmod_uu<BitsY>(a, b).first;\n}\n\n// Divfloor. Similar to above: returns q=a//b, where q has the sign of a*b and a=b*q+N.\n// In other words, returns (truncating) a/b, except if a and b have different signs\n// and there's non-zero remainder, subtract one more towards floor.\ntemplate<size_t BitsY, size_t BitsA, size_t BitsB>\nCXXRTL_ALWAYS_INLINE\nvalue<BitsY> divfloor_ss(const value<BitsA> &a, const value<BitsB> &b) {\n\tvalue<BitsY> q, r;\n\tstd::tie(q, r) = divmod_ss<BitsY>(a, b);\n\tif ((b.is_neg() != a.is_neg()) && !r.is_zero())\n\t\treturn sub_uu<BitsY>(q, value<1> { 1u });\n\treturn q;\n\n}\n\n// Memory helper\nstruct memory_index {\n\tbool valid;\n\tsize_t index;\n\n\ttemplate<size_t BitsAddr>\n\tmemory_index(const value<BitsAddr> &addr, size_t offset, size_t depth) {\n\t\tstatic_assert(value<BitsAddr>::chunks <= 1, \"memory address is too wide\");\n\t\tsize_t offset_index = addr.data[0];\n\n\t\tvalid = (offset_index >= offset && offset_index < offset + depth);\n\t\tindex = offset_index - offset;\n\t}\n};\n\n} // namespace cxxrtl_yosys\n\n#endif\n",
                             "cxxrtl_vcd.h": "/*\n *  yosys -- Yosys Open SYnthesis Suite\n *\n *  Copyright (C) 2020  whitequark <whitequark@whitequark.org>\n *\n *  Permission to use, copy, modify, and/or distribute this software for any\n *  purpose with or without fee is hereby granted.\n *\n *  THE SOFTWARE IS PROVIDED \"AS IS\" AND THE AUTHOR DISCLAIMS ALL WARRANTIES\n *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF\n *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR\n *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES\n *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN\n *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF\n *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.\n *\n */\n\n#ifndef CXXRTL_VCD_H\n#define CXXRTL_VCD_H\n\n#include <cxxrtl/cxxrtl.h>\n\nnamespace cxxrtl {\n\nclass vcd_writer {\n\tstruct variable {\n\t\tsize_t ident;\n\t\tsize_t width;\n\t\tchunk_t *curr;\n\t\tsize_t cache_offset;\n\t\tdebug_outline *outline;\n\t\tbool *outline_warm;\n\t};\n\n\tstd::vector<std::string> current_scope;\n\tstd::map<debug_outline*, bool> outlines;\n\tstd::vector<variable> variables;\n\tstd::vector<chunk_t> cache;\n\tstd::map<chunk_t*, size_t> aliases;\n\tbool streaming = false;\n\n\tvoid emit_timescale(unsigned number, const std::string &unit) {\n\t\tassert(!streaming);\n\t\tassert(number == 1 || number == 10 || number == 100);\n\t\tassert(unit == \"s\" || unit == \"ms\" || unit == \"us\" ||\n\t\t       unit == \"ns\" || unit == \"ps\" || unit == \"fs\");\n\t\tbuffer += \"$timescale \" + std::to_string(number) + \" \" + unit + \" $end\\n\";\n\t}\n\n\tvoid emit_scope(const std::vector<std::string> &scope) {\n\t\tassert(!streaming);\n\t\twhile (current_scope.size() > scope.size() ||\n\t\t       (current_scope.size() > 0 &&\n\t\t\tcurrent_scope[current_scope.size() - 1] != scope[current_scope.size() - 1])) {\n\t\t\tbuffer += \"$upscope $end\\n\";\n\t\t\tcurrent_scope.pop_back();\n\t\t}\n\t\twhile (current_scope.size() < scope.size()) {\n\t\t\tbuffer += \"$scope module \" + scope[current_scope.size()] + \" $end\\n\";\n\t\t\tcurrent_scope.push_back(scope[current_scope.size()]);\n\t\t}\n\t}\n\n\tvoid emit_ident(size_t ident) {\n\t\tdo {\n\t\t\tbuffer += '!' + ident % 94; // \"base94\"\n\t\t\tident /= 94;\n\t\t} while (ident != 0);\n\t}\n\n\tvoid emit_name(const std::string &name) {\n\t\tfor (char c : name) {\n\t\t\tif (c == ':') {\n\t\t\t\t// Due to a bug, GTKWave cannot parse a colon in the variable name, causing the VCD file\n\t\t\t\t// to be unreadable. It cannot be escaped either, so replace it with the sideways colon.\n\t\t\t\tbuffer += \"..\";\n\t\t\t} else {\n\t\t\t\tbuffer += c;\n\t\t\t}\n\t\t}\n\t}\n\n\tvoid emit_var(const variable &var, const std::string &type, const std::string &name,\n\t              size_t lsb_at, bool multipart) {\n\t\tassert(!streaming);\n\t\tbuffer += \"$var \" + type + \" \" + std::to_string(var.width) + \" \";\n\t\temit_ident(var.ident);\n\t\tbuffer += \" \";\n\t\temit_name(name);\n\t\tif (multipart || name.back() == ']' || lsb_at != 0) {\n\t\t\tif (var.width == 1)\n\t\t\t\tbuffer += \" [\" + std::to_string(lsb_at) + \"]\";\n\t\t\telse\n\t\t\t\tbuffer += \" [\" + std::to_string(lsb_at + var.width - 1) + \":\" + std::to_string(lsb_at) + \"]\";\n\t\t}\n\t\tbuffer += \" $end\\n\";\n\t}\n\n\tvoid emit_enddefinitions() {\n\t\tassert(!streaming);\n\t\tbuffer += \"$enddefinitions $end\\n\";\n\t\tstreaming = true;\n\t}\n\n\tvoid emit_time(uint64_t timestamp) {\n\t\tassert(streaming);\n\t\tbuffer += \"#\" + std::to_string(timestamp) + \"\\n\";\n\t}\n\n\tvoid emit_scalar(const variable &var) {\n\t\tassert(streaming);\n\t\tassert(var.width == 1);\n\t\tbuffer += (*var.curr ? '1' : '0');\n\t\temit_ident(var.ident);\n\t\tbuffer += '\\n';\n\t}\n\n\tvoid emit_vector(const variable &var) {\n\t\tassert(streaming);\n\t\tbuffer += 'b';\n\t\tfor (size_t bit = var.width - 1; bit != (size_t)-1; bit--) {\n\t\t\tbool bit_curr = var.curr[bit / (8 * sizeof(chunk_t))] & (1 << (bit % (8 * sizeof(chunk_t))));\n\t\t\tbuffer += (bit_curr ? '1' : '0');\n\t\t}\n\t\tbuffer += ' ';\n\t\temit_ident(var.ident);\n\t\tbuffer += '\\n';\n\t}\n\n\tvoid reset_outlines() {\n\t\tfor (auto &outline_it : outlines)\n\t\t\toutline_it.second = /*warm=*/(outline_it.first == nullptr);\n\t}\n\n\tvariable &register_variable(size_t width, chunk_t *curr, bool constant = false, debug_outline *outline = nullptr) {\n\t\tif (aliases.count(curr)) {\n\t\t\treturn variables[aliases[curr]];\n\t\t} else {\n\t\t\tauto outline_it = outlines.emplace(outline, /*warm=*/(outline == nullptr)).first;\n\t\t\tconst size_t chunks = (width + (sizeof(chunk_t) * 8 - 1)) / (sizeof(chunk_t) * 8);\n\t\t\taliases[curr] = variables.size();\n\t\t\tif (constant) {\n\t\t\t\tvariables.emplace_back(variable { variables.size(), width, curr, (size_t)-1, outline_it->first, &outline_it->second });\n\t\t\t} else {\n\t\t\t\tvariables.emplace_back(variable { variables.size(), width, curr, cache.size(), outline_it->first, &outline_it->second });\n\t\t\t\tcache.insert(cache.end(), &curr[0], &curr[chunks]);\n\t\t\t}\n\t\t\treturn variables.back();\n\t\t}\n\t}\n\n\tbool test_variable(const variable &var) {\n\t\tif (var.cache_offset == (size_t)-1)\n\t\t\treturn false; // constant\n\t\tif (!*var.outline_warm) {\n\t\t\tvar.outline->eval();\n\t\t\t*var.outline_warm = true;\n\t\t}\n\t\tconst size_t chunks = (var.width + (sizeof(chunk_t) * 8 - 1)) / (sizeof(chunk_t) * 8);\n\t\tif (std::equal(&var.curr[0], &var.curr[chunks], &cache[var.cache_offset])) {\n\t\t\treturn false;\n\t\t} else {\n\t\t\tstd::copy(&var.curr[0], &var.curr[chunks], &cache[var.cache_offset]);\n\t\t\treturn true;\n\t\t}\n\t}\n\n\tstatic std::vector<std::string> split_hierarchy(const std::string &hier_name) {\n\t\tstd::vector<std::string> hierarchy;\n\t\tsize_t prev = 0;\n\t\twhile (true) {\n\t\t\tsize_t curr = hier_name.find_first_of(' ', prev);\n\t\t\tif (curr == std::string::npos) {\n\t\t\t\thierarchy.push_back(hier_name.substr(prev));\n\t\t\t\tbreak;\n\t\t\t} else {\n\t\t\t\thierarchy.push_back(hier_name.substr(prev, curr - prev));\n\t\t\t\tprev = curr + 1;\n\t\t\t}\n\t\t}\n\t\treturn hierarchy;\n\t}\n\npublic:\n\tstd::string buffer;\n\n\tvoid timescale(unsigned number, const std::string &unit) {\n\t\temit_timescale(number, unit);\n\t}\n\n\tvoid add(const std::string &hier_name, const debug_item &item, bool multipart = false) {\n\t\tstd::vector<std::string> scope = split_hierarchy(hier_name);\n\t\tstd::string name = scope.back();\n\t\tscope.pop_back();\n\n\t\temit_scope(scope);\n\t\tswitch (item.type) {\n\t\t\t// Not the best naming but oh well...\n\t\t\tcase debug_item::VALUE:\n\t\t\t\temit_var(register_variable(item.width, item.curr, /*constant=*/item.next == nullptr),\n\t\t\t\t         \"wire\", name, item.lsb_at, multipart);\n\t\t\t\tbreak;\n\t\t\tcase debug_item::WIRE:\n\t\t\t\temit_var(register_variable(item.width, item.curr),\n\t\t\t\t         \"reg\", name, item.lsb_at, multipart);\n\t\t\t\tbreak;\n\t\t\tcase debug_item::MEMORY: {\n\t\t\t\tconst size_t stride = (item.width + (sizeof(chunk_t) * 8 - 1)) / (sizeof(chunk_t) * 8);\n\t\t\t\tfor (size_t index = 0; index < item.depth; index++) {\n\t\t\t\t\tchunk_t *nth_curr = &item.curr[stride * index];\n\t\t\t\t\tstd::string nth_name = name + '[' + std::to_string(index) + ']';\n\t\t\t\t\temit_var(register_variable(item.width, nth_curr),\n\t\t\t\t\t         \"reg\", nth_name, item.lsb_at, multipart);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\t}\n\t\t\tcase debug_item::ALIAS:\n\t\t\t\t// Like VALUE, but, even though `item.next == nullptr` always holds, the underlying value\n\t\t\t\t// can actually change, and must be tracked. In most cases the VCD identifier will be\n\t\t\t\t// unified with the aliased reg, but we should handle the case where only the alias is\n\t\t\t\t// added to the VCD writer, too.\n\t\t\t\temit_var(register_variable(item.width, item.curr),\n\t\t\t\t         \"wire\", name, item.lsb_at, multipart);\n\t\t\t\tbreak;\n\t\t\tcase debug_item::OUTLINE:\n\t\t\t\temit_var(register_variable(item.width, item.curr, /*constant=*/false, item.outline),\n\t\t\t\t         \"wire\", name, item.lsb_at, multipart);\n\t\t\t\tbreak;\n\t\t}\n\t}\n\n\ttemplate<class Filter>\n\tvoid add(const debug_items &items, const Filter &filter) {\n\t\t// `debug_items` is a map, so the items are already sorted in an order optimal for emitting\n\t\t// VCD scope sections.\n\t\tfor (auto &it : items.table)\n\t\t\tfor (auto &part : it.second)\n\t\t\t\tif (filter(it.first, part))\n\t\t\t\t\tadd(it.first, part, it.second.size() > 1);\n\t}\n\n\tvoid add(const debug_items &items) {\n\t\tthis->add(items, [](const std::string &, const debug_item &) {\n\t\t\treturn true;\n\t\t});\n\t}\n\n\tvoid add_without_memories(const debug_items &items) {\n\t\tthis->add(items, [](const std::string &, const debug_item &item) {\n\t\t\treturn item.type != debug_item::MEMORY;\n\t\t});\n\t}\n\n\tvoid sample(uint64_t timestamp) {\n\t\tbool first_sample = !streaming;\n\t\tif (first_sample) {\n\t\t\temit_scope({});\n\t\t\temit_enddefinitions();\n\t\t}\n\t\treset_outlines();\n\t\temit_time(timestamp);\n\t\tfor (auto var : variables)\n\t\t\tif (test_variable(var) || first_sample) {\n\t\t\t\tif (var.width == 1)\n\t\t\t\t\temit_scalar(var);\n\t\t\t\telse\n\t\t\t\t\temit_vector(var);\n\t\t\t}\n\t}\n};\n\n}\n\n#endif\n",
                         },
                     },
@@ -143,7 +143,7 @@ export const filesystem = {
             },
             "frontends": {
                 "ast": {
-                    "ast.h": "/* -*- c++ -*-\n *  yosys -- Yosys Open SYnthesis Suite\n *\n *  Copyright (C) 2012  Claire Xenia Wolf <claire@yosyshq.com>\n *\n *  Permission to use, copy, modify, and/or distribute this software for any\n *  purpose with or without fee is hereby granted, provided that the above\n *  copyright notice and this permission notice appear in all copies.\n *\n *  THE SOFTWARE IS PROVIDED \"AS IS\" AND THE AUTHOR DISCLAIMS ALL WARRANTIES\n *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF\n *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR\n *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES\n *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN\n *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF\n *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.\n *\n *  ---\n *\n *  This is the AST frontend library.\n *\n *  The AST frontend library is not a frontend on it's own but provides a\n *  generic abstract syntax tree (AST) abstraction for HDL code and can be\n *  used by HDL frontends. See \"ast.h\" for an overview of the API and the\n *  Verilog frontend for an usage example.\n *\n */\n\n#ifndef AST_H\n#define AST_H\n\n#include \"kernel/rtlil.h\"\n#include \"kernel/fmt.h\"\n#include <stdint.h>\n#include <set>\n\nYOSYS_NAMESPACE_BEGIN\n\nnamespace AST\n{\n\t// all node types, type2str() must be extended\n\t// whenever a new node type is added here\n\tenum AstNodeType\n\t{\n\t\tAST_NONE,\n\t\tAST_DESIGN,\n\t\tAST_MODULE,\n\t\tAST_TASK,\n\t\tAST_FUNCTION,\n\t\tAST_DPI_FUNCTION,\n\n\t\tAST_WIRE,\n\t\tAST_MEMORY,\n\t\tAST_AUTOWIRE,\n\t\tAST_PARAMETER,\n\t\tAST_LOCALPARAM,\n\t\tAST_DEFPARAM,\n\t\tAST_PARASET,\n\t\tAST_ARGUMENT,\n\t\tAST_RANGE,\n\t\tAST_MULTIRANGE,\n\t\tAST_CONSTANT,\n\t\tAST_REALVALUE,\n\t\tAST_CELLTYPE,\n\t\tAST_IDENTIFIER,\n\t\tAST_PREFIX,\n\t\tAST_ASSERT,\n\t\tAST_ASSUME,\n\t\tAST_LIVE,\n\t\tAST_FAIR,\n\t\tAST_COVER,\n\t\tAST_ENUM,\n\t\tAST_ENUM_ITEM,\n\n\t\tAST_FCALL,\n\t\tAST_TO_BITS,\n\t\tAST_TO_SIGNED,\n\t\tAST_TO_UNSIGNED,\n\t\tAST_SELFSZ,\n\t\tAST_CAST_SIZE,\n\t\tAST_CONCAT,\n\t\tAST_REPLICATE,\n\t\tAST_BIT_NOT,\n\t\tAST_BIT_AND,\n\t\tAST_BIT_OR,\n\t\tAST_BIT_XOR,\n\t\tAST_BIT_XNOR,\n\t\tAST_REDUCE_AND,\n\t\tAST_REDUCE_OR,\n\t\tAST_REDUCE_XOR,\n\t\tAST_REDUCE_XNOR,\n\t\tAST_REDUCE_BOOL,\n\t\tAST_SHIFT_LEFT,\n\t\tAST_SHIFT_RIGHT,\n\t\tAST_SHIFT_SLEFT,\n\t\tAST_SHIFT_SRIGHT,\n\t\tAST_SHIFTX,\n\t\tAST_SHIFT,\n\t\tAST_LT,\n\t\tAST_LE,\n\t\tAST_EQ,\n\t\tAST_NE,\n\t\tAST_EQX,\n\t\tAST_NEX,\n\t\tAST_GE,\n\t\tAST_GT,\n\t\tAST_ADD,\n\t\tAST_SUB,\n\t\tAST_MUL,\n\t\tAST_DIV,\n\t\tAST_MOD,\n\t\tAST_POW,\n\t\tAST_POS,\n\t\tAST_NEG,\n\t\tAST_LOGIC_AND,\n\t\tAST_LOGIC_OR,\n\t\tAST_LOGIC_NOT,\n\t\tAST_TERNARY,\n\t\tAST_MEMRD,\n\t\tAST_MEMWR,\n\t\tAST_MEMINIT,\n\n\t\tAST_TCALL,\n\t\tAST_ASSIGN,\n\t\tAST_CELL,\n\t\tAST_PRIMITIVE,\n\t\tAST_CELLARRAY,\n\t\tAST_ALWAYS,\n\t\tAST_INITIAL,\n\t\tAST_BLOCK,\n\t\tAST_ASSIGN_EQ,\n\t\tAST_ASSIGN_LE,\n\t\tAST_CASE,\n\t\tAST_COND,\n\t\tAST_CONDX,\n\t\tAST_CONDZ,\n\t\tAST_DEFAULT,\n\t\tAST_FOR,\n\t\tAST_WHILE,\n\t\tAST_REPEAT,\n\n\t\tAST_GENVAR,\n\t\tAST_GENFOR,\n\t\tAST_GENIF,\n\t\tAST_GENCASE,\n\t\tAST_GENBLOCK,\n\t\tAST_TECALL,\n\n\t\tAST_POSEDGE,\n\t\tAST_NEGEDGE,\n\t\tAST_EDGE,\n\n\t\tAST_INTERFACE,\n\t\tAST_INTERFACEPORT,\n\t\tAST_INTERFACEPORTTYPE,\n\t\tAST_MODPORT,\n\t\tAST_MODPORTMEMBER,\n\t\tAST_PACKAGE,\n\n\t\tAST_WIRETYPE,\n\t\tAST_TYPEDEF,\n\t\tAST_STRUCT,\n\t\tAST_UNION,\n\t\tAST_STRUCT_ITEM,\n\t\tAST_BIND\n\t};\n\n\tstruct AstSrcLocType {\n\t\tunsigned int first_line, last_line;\n\t\tunsigned int first_column, last_column;\n\t\tAstSrcLocType() : first_line(0), last_line(0), first_column(0), last_column(0) {}\n\t\tAstSrcLocType(int _first_line, int _first_column, int _last_line, int _last_column) : first_line(_first_line), last_line(_last_line), first_column(_first_column), last_column(_last_column) {}\n\t};\n\n\t// convert an node type to a string (e.g. for debug output)\n\tstd::string type2str(AstNodeType type);\n\n\t// The AST is built using instances of this struct\n\tstruct AstNode\n\t{\n\t\t// for dict<> and pool<>\n\t\tunsigned int hashidx_;\n\t\tunsigned int hash() const { return hashidx_; }\n\n\t\t// this nodes type\n\t\tAstNodeType type;\n\n\t\t// the list of child nodes for this node\n\t\tstd::vector<AstNode*> children;\n\n\t\t// the list of attributes assigned to this node\n\t\tstd::map<RTLIL::IdString, AstNode*> attributes;\n\t\tbool get_bool_attribute(RTLIL::IdString id);\n\n\t\t// node content - most of it is unused in most node types\n\t\tstd::string str;\n\t\tstd::vector<RTLIL::State> bits;\n\t\tbool is_input, is_output, is_reg, is_logic, is_signed, is_string, is_wand, is_wor, range_valid, range_swapped, was_checked, is_unsized, is_custom_type;\n\t\tint port_id, range_left, range_right;\n\t\tuint32_t integer;\n\t\tdouble realvalue;\n\t\t// set for IDs typed to an enumeration, not used\n\t\tbool is_enum;\n\n\t\t// if this is a multirange memory then this vector contains offset and length of each dimension\n\t\tstd::vector<int> multirange_dimensions;\n\t\tstd::vector<bool> multirange_swapped; // true if range is swapped\n\n\t\t// this is set by simplify and used during RTLIL generation\n\t\tAstNode *id2ast;\n\n\t\t// this is used by simplify to detect if basic analysis has been performed already on the node\n\t\tbool basic_prep;\n\n\t\t// this is used for ID references in RHS expressions that should use the \"new\" value for non-blocking assignments\n\t\tbool lookahead;\n\n\t\t// this is the original sourcecode location that resulted in this AST node\n\t\t// it is automatically set by the constructor using AST::current_filename and\n\t\t// the AST::get_line_num() callback function.\n\t\tstd::string filename;\n\t\tAstSrcLocType location;\n\n\t\t// are we embedded in an lvalue, param?\n\t\t// (see fixup_hierarchy_flags)\n\t\tbool in_lvalue;\n\t\tbool in_param;\n\t\tbool in_lvalue_from_above;\n\t\tbool in_param_from_above;\n\n\t\t// creating and deleting nodes\n\t\tAstNode(AstNodeType type = AST_NONE, AstNode *child1 = nullptr, AstNode *child2 = nullptr, AstNode *child3 = nullptr, AstNode *child4 = nullptr);\n\t\tAstNode *clone() const;\n\t\tvoid cloneInto(AstNode *other) const;\n\t\tvoid delete_children();\n\t\t~AstNode();\n\n\t\tenum mem2reg_flags\n\t\t{\n\t\t\t/* status flags */\n\t\t\tMEM2REG_FL_ALL       = 0x00000001,\n\t\t\tMEM2REG_FL_ASYNC     = 0x00000002,\n\t\t\tMEM2REG_FL_INIT      = 0x00000004,\n\n\t\t\t/* candidate flags */\n\t\t\tMEM2REG_FL_FORCED    = 0x00000100,\n\t\t\tMEM2REG_FL_SET_INIT  = 0x00000200,\n\t\t\tMEM2REG_FL_SET_ELSE  = 0x00000400,\n\t\t\tMEM2REG_FL_SET_ASYNC = 0x00000800,\n\t\t\tMEM2REG_FL_EQ2       = 0x00001000,\n\t\t\tMEM2REG_FL_CMPLX_LHS = 0x00002000,\n\t\t\tMEM2REG_FL_CONST_LHS = 0x00004000,\n\t\t\tMEM2REG_FL_VAR_LHS   = 0x00008000,\n\n\t\t\t/* proc flags */\n\t\t\tMEM2REG_FL_EQ1       = 0x01000000,\n\t\t};\n\n\t\t// simplify() creates a simpler AST by unrolling for-loops, expanding generate blocks, etc.\n\t\t// it also sets the id2ast pointers so that identifier lookups are fast in genRTLIL()\n\t\tbool simplify(bool const_fold, int stage, int width_hint, bool sign_hint);\n\t\tvoid replace_result_wire_name_in_function(const std::string &from, const std::string &to);\n\t\tAstNode *readmem(bool is_readmemh, std::string mem_filename, AstNode *memory, int start_addr, int finish_addr, bool unconditional_init);\n\t\tvoid expand_genblock(const std::string &prefix);\n\t\tvoid label_genblks(std::set<std::string>& existing, int &counter);\n\t\tvoid mem2reg_as_needed_pass1(dict<AstNode*, pool<std::string>> &mem2reg_places,\n\t\t\t\tdict<AstNode*, uint32_t> &mem2reg_flags, dict<AstNode*, uint32_t> &proc_flags, uint32_t &status_flags);\n\t\tbool mem2reg_as_needed_pass2(pool<AstNode*> &mem2reg_set, AstNode *mod, AstNode *block, AstNode *&async_block);\n\t\tbool mem2reg_check(pool<AstNode*> &mem2reg_set);\n\t\tvoid mem2reg_remove(pool<AstNode*> &mem2reg_set, vector<AstNode*> &delnodes);\n\t\tvoid meminfo(int &mem_width, int &mem_size, int &addr_bits);\n\t\tbool detect_latch(const std::string &var);\n\t\tconst RTLIL::Module* lookup_cell_module();\n\n\t\t// additional functionality for evaluating constant functions\n\t\tstruct varinfo_t {\n\t\t\tRTLIL::Const val;\n\t\t\tint offset;\n\t\t\tbool range_swapped;\n\t\t\tbool is_signed;\n\t\t\tAstNode *arg = nullptr;\n\t\t\tbool explicitly_sized;\n\t\t};\n\t\tbool has_const_only_constructs();\n\t\tbool replace_variables(std::map<std::string, varinfo_t> &variables, AstNode *fcall, bool must_succeed);\n\t\tAstNode *eval_const_function(AstNode *fcall, bool must_succeed);\n\t\tbool is_simple_const_expr();\n\n\t\t// helper for parsing format strings\n\t\tFmt processFormat(int stage, bool sformat_like, int default_base = 10, size_t first_arg_at = 0);\n\n\t\tbool is_recursive_function() const;\n\t\tstd::pair<AstNode*, AstNode*> get_tern_choice();\n\n\t\t// create a human-readable text representation of the AST (for debugging)\n\t\tvoid dumpAst(FILE *f, std::string indent) const;\n\t\tvoid dumpVlog(FILE *f, std::string indent) const;\n\n\t\t// Generate RTLIL for a bind construct\n\t\tstd::vector<RTLIL::Binding *> genBindings() const;\n\n\t\t// used by genRTLIL() for detecting expression width and sign\n\t\tvoid detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *found_real = NULL);\n\t\tvoid detectSignWidth(int &width_hint, bool &sign_hint, bool *found_real = NULL);\n\n\t\t// create RTLIL code for this AST node\n\t\t// for expressions the resulting signal vector is returned\n\t\t// all generated cell instances, etc. are written to the RTLIL::Module pointed to by AST_INTERNAL::current_module\n\t\tRTLIL::SigSpec genRTLIL(int width_hint = -1, bool sign_hint = false);\n\t\tRTLIL::SigSpec genWidthRTLIL(int width, bool sgn, const dict<RTLIL::SigBit, RTLIL::SigBit> *new_subst_ptr = NULL);\n\n\t\t// compare AST nodes\n\t\tbool operator==(const AstNode &other) const;\n\t\tbool operator!=(const AstNode &other) const;\n\t\tbool contains(const AstNode *other) const;\n\n\t\t// helper functions for creating AST nodes for constants\n\t\tstatic AstNode *mkconst_int(uint32_t v, bool is_signed, int width = 32);\n\t\tstatic AstNode *mkconst_bits(const std::vector<RTLIL::State> &v, bool is_signed, bool is_unsized);\n\t\tstatic AstNode *mkconst_bits(const std::vector<RTLIL::State> &v, bool is_signed);\n\t\tstatic AstNode *mkconst_str(const std::vector<RTLIL::State> &v);\n\t\tstatic AstNode *mkconst_str(const std::string &str);\n\n\t\t// helper function for creating sign-extended const objects\n\t\tRTLIL::Const bitsAsConst(int width, bool is_signed);\n\t\tRTLIL::Const bitsAsConst(int width = -1);\n\t\tRTLIL::Const bitsAsUnsizedConst(int width);\n\t\tRTLIL::Const asAttrConst() const;\n\t\tRTLIL::Const asParaConst() const;\n\t\tuint64_t asInt(bool is_signed);\n\t\tbool bits_only_01() const;\n\t\tbool asBool() const;\n\n\t\t// helper functions for real valued const eval\n\t\tint isConst() const; // return '1' for AST_CONSTANT and '2' for AST_REALVALUE\n\t\tdouble asReal(bool is_signed);\n\t\tRTLIL::Const realAsConst(int width);\n\n\t\t// helpers for enum\n\t\tvoid allocateDefaultEnumValues();\n\t\tvoid annotateTypedEnums(AstNode *template_node);\n\n\t\t// helpers for locations\n\t\tstd::string loc_string() const;\n\n\t\t// Helper for looking up identifiers which are prefixed with the current module name\n\t\tstd::string try_pop_module_prefix() const;\n\n\t\t// helper to clone the node with some of its subexpressions replaced with zero (this is used\n\t\t// to evaluate widths of dynamic ranges)\n\t\tAstNode *clone_at_zero();\n\n\t\tvoid set_attribute(RTLIL::IdString key, AstNode *node)\n\t\t{\n\t\t\tattributes[key] = node;\n\t\t\tnode->set_in_param_flag(true);\n\t\t}\n\n\t\t// helper to set in_lvalue/in_param flags from the hierarchy context (the actual flag\n\t\t// can be overridden based on the intrinsic properties of this node, i.e. based on its type)\n\t\tvoid set_in_lvalue_flag(bool flag, bool no_descend = false);\n\t\tvoid set_in_param_flag(bool flag, bool no_descend = false);\n\n\t\t// fix up the hierarchy flags (in_lvalue/in_param) of this node and its children\n\t\t//\n\t\t// to keep the flags in sync, fixup_hierarchy_flags(true) needs to be called once after\n\t\t// parsing the AST to walk the full tree, then plain fixup_hierarchy_flags() performs\n\t\t// localized fixups after modifying children/attributes of a particular node\n\t\tvoid fixup_hierarchy_flags(bool force_descend = false);\n\n\t\t// helper to print errors from simplify/genrtlil code\n\t\t[[noreturn]] void input_error(const char *format, ...) const YS_ATTRIBUTE(format(printf, 2, 3));\n\t};\n\n\t// process an AST tree (ast must point to an AST_DESIGN node) and generate RTLIL code\n\tvoid process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump_ast2, bool no_dump_ptr, bool dump_vlog1, bool dump_vlog2, bool dump_rtlil, bool nolatches, bool nomeminit,\n\t\t\tbool nomem2reg, bool mem2reg, bool noblackbox, bool lib, bool nowb, bool noopt, bool icells, bool pwires, bool nooverwrite, bool overwrite, bool defer, bool autowire);\n\n\t// parametric modules are supported directly by the AST library\n\t// therefore we need our own derivate of RTLIL::Module with overloaded virtual functions\n\tstruct AstModule : RTLIL::Module {\n\t\tAstNode *ast;\n\t\tbool nolatches, nomeminit, nomem2reg, mem2reg, noblackbox, lib, nowb, noopt, icells, pwires, autowire;\n\t\t~AstModule() override;\n\t\tRTLIL::IdString derive(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> &parameters, bool mayfail) override;\n\t\tRTLIL::IdString derive(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> &parameters, const dict<RTLIL::IdString, RTLIL::Module*> &interfaces, const dict<RTLIL::IdString, RTLIL::IdString> &modports, bool mayfail) override;\n\t\tstd::string derive_common(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> &parameters, AstNode **new_ast_out, bool quiet = false);\n\t\tvoid expand_interfaces(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Module *> &local_interfaces) override;\n\t\tbool reprocess_if_necessary(RTLIL::Design *design) override;\n\t\tRTLIL::Module *clone() const override;\n\t\tvoid loadconfig() const;\n\t};\n\n\t// this must be set by the language frontend before parsing the sources\n\t// the AstNode constructor then uses current_filename and get_line_num()\n\t// to initialize the filename and linenum properties of new nodes\n\textern std::string current_filename;\n\textern void (*set_line_num)(int);\n\textern int (*get_line_num)();\n\n\t// set set_line_num and get_line_num to internal dummy functions (done by simplify() and AstModule::derive\n\t// to control the filename and linenum properties of new nodes not generated by a frontend parser)\n\tvoid use_internal_line_num();\n\n\t// call a DPI function\n\tAstNode *dpi_call(const std::string &rtype, const std::string &fname, const std::vector<std::string> &argtypes, const std::vector<AstNode*> &args);\n\n\t// Helper functions related to handling SystemVerilog interfaces\n\tstd::pair<std::string,std::string> split_modport_from_type(std::string name_type);\n\tAstNode * find_modport(AstNode *intf, std::string name);\n\tvoid explode_interface_port(AstNode *module_ast, RTLIL::Module * intfmodule, std::string intfname, AstNode *modport);\n\n\t// Helper for setting the src attribute.\n\tvoid set_src_attr(RTLIL::AttrObject *obj, const AstNode *ast);\n\n\t// struct helper exposed from simplify for genrtlil\n\tAstNode *make_struct_member_range(AstNode *node, AstNode *member_node);\n\tAstNode *get_struct_member(const AstNode *node);\n\n\t// generate standard $paramod... derived module name; parameters should be\n\t// in the order they are declared in the instantiated module\n\tstd::string derived_module_name(std::string stripped_name, const std::vector<std::pair<RTLIL::IdString, RTLIL::Const>> &parameters);\n\n\t// used to provide simplify() access to the current design for looking up\n\t// modules, ports, wires, etc.\n\tvoid set_simplify_design_context(const RTLIL::Design *design);\n}\n\nnamespace AST_INTERNAL\n{\n\t// internal state variables\n\textern bool flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_rtlil, flag_nolatches, flag_nomeminit;\n\textern bool flag_nomem2reg, flag_mem2reg, flag_lib, flag_noopt, flag_icells, flag_pwires, flag_autowire;\n\textern AST::AstNode *current_ast, *current_ast_mod;\n\textern std::map<std::string, AST::AstNode*> current_scope;\n\textern const dict<RTLIL::SigBit, RTLIL::SigBit> *genRTLIL_subst_ptr;\n\textern RTLIL::SigSpec ignoreThisSignalsInInitial;\n\textern AST::AstNode *current_always, *current_top_block, *current_block, *current_block_child;\n\textern RTLIL::Module *current_module;\n\textern bool current_always_clocked;\n\textern dict<std::string, int> current_memwr_count;\n\textern dict<std::string, pool<int>> current_memwr_visible;\n\tstruct LookaheadRewriter;\n\tstruct ProcessGenerator;\n\n\t// Create and add a new AstModule from new_ast, then use it to replace\n\t// old_module in design, renaming old_module to move it out of the way.\n\t// Return the new module.\n\t//\n\t// If original_ast is not null, it will be used as the AST node for the\n\t// new module. Otherwise, new_ast will be used.\n\tRTLIL::Module *\n\tprocess_and_replace_module(RTLIL::Design *design,\n\t                           RTLIL::Module *old_module,\n\t                           AST::AstNode *new_ast,\n\t                           AST::AstNode *original_ast = nullptr);\n}\n\nYOSYS_NAMESPACE_END\n\n#endif\n",
+                    "ast.h": "/* -*- c++ -*-\n *  yosys -- Yosys Open SYnthesis Suite\n *\n *  Copyright (C) 2012  Claire Xenia Wolf <claire@yosyshq.com>\n *\n *  Permission to use, copy, modify, and/or distribute this software for any\n *  purpose with or without fee is hereby granted, provided that the above\n *  copyright notice and this permission notice appear in all copies.\n *\n *  THE SOFTWARE IS PROVIDED \"AS IS\" AND THE AUTHOR DISCLAIMS ALL WARRANTIES\n *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF\n *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR\n *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES\n *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN\n *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF\n *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.\n *\n *  ---\n *\n *  This is the AST frontend library.\n *\n *  The AST frontend library is not a frontend on it's own but provides a\n *  generic abstract syntax tree (AST) abstraction for HDL code and can be\n *  used by HDL frontends. See \"ast.h\" for an overview of the API and the\n *  Verilog frontend for an usage example.\n *\n */\n\n#ifndef AST_H\n#define AST_H\n\n#include \"kernel/rtlil.h\"\n#include \"kernel/fmt.h\"\n#include <stdint.h>\n#include <set>\n\nYOSYS_NAMESPACE_BEGIN\n\nnamespace AST\n{\n\t// all node types, type2str() must be extended\n\t// whenever a new node type is added here\n\tenum AstNodeType\n\t{\n\t\tAST_NONE,\n\t\tAST_DESIGN,\n\t\tAST_MODULE,\n\t\tAST_TASK,\n\t\tAST_FUNCTION,\n\t\tAST_DPI_FUNCTION,\n\n\t\tAST_WIRE,\n\t\tAST_MEMORY,\n\t\tAST_AUTOWIRE,\n\t\tAST_PARAMETER,\n\t\tAST_LOCALPARAM,\n\t\tAST_DEFPARAM,\n\t\tAST_PARASET,\n\t\tAST_ARGUMENT,\n\t\tAST_RANGE,\n\t\tAST_MULTIRANGE,\n\t\tAST_CONSTANT,\n\t\tAST_REALVALUE,\n\t\tAST_CELLTYPE,\n\t\tAST_IDENTIFIER,\n\t\tAST_PREFIX,\n\t\tAST_ASSERT,\n\t\tAST_ASSUME,\n\t\tAST_LIVE,\n\t\tAST_FAIR,\n\t\tAST_COVER,\n\t\tAST_ENUM,\n\t\tAST_ENUM_ITEM,\n\n\t\tAST_FCALL,\n\t\tAST_TO_BITS,\n\t\tAST_TO_SIGNED,\n\t\tAST_TO_UNSIGNED,\n\t\tAST_SELFSZ,\n\t\tAST_CAST_SIZE,\n\t\tAST_CONCAT,\n\t\tAST_REPLICATE,\n\t\tAST_BIT_NOT,\n\t\tAST_BIT_AND,\n\t\tAST_BIT_OR,\n\t\tAST_BIT_XOR,\n\t\tAST_BIT_XNOR,\n\t\tAST_REDUCE_AND,\n\t\tAST_REDUCE_OR,\n\t\tAST_REDUCE_XOR,\n\t\tAST_REDUCE_XNOR,\n\t\tAST_REDUCE_BOOL,\n\t\tAST_SHIFT_LEFT,\n\t\tAST_SHIFT_RIGHT,\n\t\tAST_SHIFT_SLEFT,\n\t\tAST_SHIFT_SRIGHT,\n\t\tAST_SHIFTX,\n\t\tAST_SHIFT,\n\t\tAST_LT,\n\t\tAST_LE,\n\t\tAST_EQ,\n\t\tAST_NE,\n\t\tAST_EQX,\n\t\tAST_NEX,\n\t\tAST_GE,\n\t\tAST_GT,\n\t\tAST_ADD,\n\t\tAST_SUB,\n\t\tAST_MUL,\n\t\tAST_DIV,\n\t\tAST_MOD,\n\t\tAST_POW,\n\t\tAST_POS,\n\t\tAST_NEG,\n\t\tAST_LOGIC_AND,\n\t\tAST_LOGIC_OR,\n\t\tAST_LOGIC_NOT,\n\t\tAST_TERNARY,\n\t\tAST_MEMRD,\n\t\tAST_MEMWR,\n\t\tAST_MEMINIT,\n\n\t\tAST_TCALL,\n\t\tAST_ASSIGN,\n\t\tAST_CELL,\n\t\tAST_PRIMITIVE,\n\t\tAST_CELLARRAY,\n\t\tAST_ALWAYS,\n\t\tAST_INITIAL,\n\t\tAST_BLOCK,\n\t\tAST_ASSIGN_EQ,\n\t\tAST_ASSIGN_LE,\n\t\tAST_CASE,\n\t\tAST_COND,\n\t\tAST_CONDX,\n\t\tAST_CONDZ,\n\t\tAST_DEFAULT,\n\t\tAST_FOR,\n\t\tAST_WHILE,\n\t\tAST_REPEAT,\n\n\t\tAST_GENVAR,\n\t\tAST_GENFOR,\n\t\tAST_GENIF,\n\t\tAST_GENCASE,\n\t\tAST_GENBLOCK,\n\t\tAST_TECALL,\n\n\t\tAST_POSEDGE,\n\t\tAST_NEGEDGE,\n\t\tAST_EDGE,\n\n\t\tAST_INTERFACE,\n\t\tAST_INTERFACEPORT,\n\t\tAST_INTERFACEPORTTYPE,\n\t\tAST_MODPORT,\n\t\tAST_MODPORTMEMBER,\n\t\tAST_PACKAGE,\n\n\t\tAST_WIRETYPE,\n\t\tAST_TYPEDEF,\n\t\tAST_STRUCT,\n\t\tAST_UNION,\n\t\tAST_STRUCT_ITEM,\n\t\tAST_BIND\n\t};\n\n\tstruct AstSrcLocType {\n\t\tunsigned int first_line, last_line;\n\t\tunsigned int first_column, last_column;\n\t\tAstSrcLocType() : first_line(0), last_line(0), first_column(0), last_column(0) {}\n\t\tAstSrcLocType(int _first_line, int _first_column, int _last_line, int _last_column) : first_line(_first_line), last_line(_last_line), first_column(_first_column), last_column(_last_column) {}\n\t};\n\n\t// convert an node type to a string (e.g. for debug output)\n\tstd::string type2str(AstNodeType type);\n\n\t// The AST is built using instances of this struct\n\tstruct AstNode\n\t{\n\t\t// for dict<> and pool<>\n\t\tunsigned int hashidx_;\n\t\tunsigned int hash() const { return hashidx_; }\n\n\t\t// this nodes type\n\t\tAstNodeType type;\n\n\t\t// the list of child nodes for this node\n\t\tstd::vector<AstNode*> children;\n\n\t\t// the list of attributes assigned to this node\n\t\tstd::map<RTLIL::IdString, AstNode*> attributes;\n\t\tbool get_bool_attribute(RTLIL::IdString id);\n\n\t\t// node content - most of it is unused in most node types\n\t\tstd::string str;\n\t\tstd::vector<RTLIL::State> bits;\n\t\tbool is_input, is_output, is_reg, is_logic, is_signed, is_string, is_wand, is_wor, range_valid, range_swapped, was_checked, is_unsized, is_custom_type;\n\t\tint port_id, range_left, range_right;\n\t\tuint32_t integer;\n\t\tdouble realvalue;\n\t\t// set for IDs typed to an enumeration, not used\n\t\tbool is_enum;\n\n\t\t// if this is a multirange memory then this vector contains offset and length of each dimension\n\t\tstd::vector<int> multirange_dimensions;\n\t\tstd::vector<bool> multirange_swapped; // true if range is swapped\n\n\t\t// this is set by simplify and used during RTLIL generation\n\t\tAstNode *id2ast;\n\n\t\t// this is used by simplify to detect if basic analysis has been performed already on the node\n\t\tbool basic_prep;\n\n\t\t// this is used for ID references in RHS expressions that should use the \"new\" value for non-blocking assignments\n\t\tbool lookahead;\n\n\t\t// this is the original sourcecode location that resulted in this AST node\n\t\t// it is automatically set by the constructor using AST::current_filename and\n\t\t// the AST::get_line_num() callback function.\n\t\tstd::string filename;\n\t\tAstSrcLocType location;\n\n\t\t// are we embedded in an lvalue, param?\n\t\t// (see fixup_hierarchy_flags)\n\t\tbool in_lvalue;\n\t\tbool in_param;\n\t\tbool in_lvalue_from_above;\n\t\tbool in_param_from_above;\n\n\t\t// creating and deleting nodes\n\t\tAstNode(AstNodeType type = AST_NONE, AstNode *child1 = nullptr, AstNode *child2 = nullptr, AstNode *child3 = nullptr, AstNode *child4 = nullptr);\n\t\tAstNode *clone() const;\n\t\tvoid cloneInto(AstNode *other) const;\n\t\tvoid delete_children();\n\t\t~AstNode();\n\n\t\tenum mem2reg_flags\n\t\t{\n\t\t\t/* status flags */\n\t\t\tMEM2REG_FL_ALL       = 0x00000001,\n\t\t\tMEM2REG_FL_ASYNC     = 0x00000002,\n\t\t\tMEM2REG_FL_INIT      = 0x00000004,\n\n\t\t\t/* candidate flags */\n\t\t\tMEM2REG_FL_FORCED    = 0x00000100,\n\t\t\tMEM2REG_FL_SET_INIT  = 0x00000200,\n\t\t\tMEM2REG_FL_SET_ELSE  = 0x00000400,\n\t\t\tMEM2REG_FL_SET_ASYNC = 0x00000800,\n\t\t\tMEM2REG_FL_EQ2       = 0x00001000,\n\t\t\tMEM2REG_FL_CMPLX_LHS = 0x00002000,\n\t\t\tMEM2REG_FL_CONST_LHS = 0x00004000,\n\t\t\tMEM2REG_FL_VAR_LHS   = 0x00008000,\n\n\t\t\t/* proc flags */\n\t\t\tMEM2REG_FL_EQ1       = 0x01000000,\n\t\t};\n\n\t\t// simplify() creates a simpler AST by unrolling for-loops, expanding generate blocks, etc.\n\t\t// it also sets the id2ast pointers so that identifier lookups are fast in genRTLIL()\n\t\tbool simplify(bool const_fold, int stage, int width_hint, bool sign_hint);\n\t\tvoid replace_result_wire_name_in_function(const std::string &from, const std::string &to);\n\t\tAstNode *readmem(bool is_readmemh, std::string mem_filename, AstNode *memory, int start_addr, int finish_addr, bool unconditional_init);\n\t\tvoid expand_genblock(const std::string &prefix);\n\t\tvoid label_genblks(std::set<std::string>& existing, int &counter);\n\t\tvoid mem2reg_as_needed_pass1(dict<AstNode*, pool<std::string>> &mem2reg_places,\n\t\t\t\tdict<AstNode*, uint32_t> &mem2reg_flags, dict<AstNode*, uint32_t> &proc_flags, uint32_t &status_flags);\n\t\tbool mem2reg_as_needed_pass2(pool<AstNode*> &mem2reg_set, AstNode *mod, AstNode *block, AstNode *&async_block);\n\t\tbool mem2reg_check(pool<AstNode*> &mem2reg_set);\n\t\tvoid mem2reg_remove(pool<AstNode*> &mem2reg_set, vector<AstNode*> &delnodes);\n\t\tvoid meminfo(int &mem_width, int &mem_size, int &addr_bits);\n\t\tbool detect_latch(const std::string &var);\n\t\tconst RTLIL::Module* lookup_cell_module();\n\n\t\t// additional functionality for evaluating constant functions\n\t\tstruct varinfo_t {\n\t\t\tRTLIL::Const val;\n\t\t\tint offset;\n\t\t\tbool range_swapped;\n\t\t\tbool is_signed;\n\t\t\tAstNode *arg = nullptr;\n\t\t\tbool explicitly_sized;\n\t\t};\n\t\tbool has_const_only_constructs();\n\t\tbool replace_variables(std::map<std::string, varinfo_t> &variables, AstNode *fcall, bool must_succeed);\n\t\tAstNode *eval_const_function(AstNode *fcall, bool must_succeed);\n\t\tbool is_simple_const_expr();\n\n\t\t// helper for parsing format strings\n\t\tFmt processFormat(int stage, bool sformat_like, int default_base = 10, size_t first_arg_at = 0, bool may_fail = false);\n\n\t\tbool is_recursive_function() const;\n\t\tstd::pair<AstNode*, AstNode*> get_tern_choice();\n\n\t\t// create a human-readable text representation of the AST (for debugging)\n\t\tvoid dumpAst(FILE *f, std::string indent) const;\n\t\tvoid dumpVlog(FILE *f, std::string indent) const;\n\n\t\t// Generate RTLIL for a bind construct\n\t\tstd::vector<RTLIL::Binding *> genBindings() const;\n\n\t\t// used by genRTLIL() for detecting expression width and sign\n\t\tvoid detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *found_real = NULL);\n\t\tvoid detectSignWidth(int &width_hint, bool &sign_hint, bool *found_real = NULL);\n\n\t\t// create RTLIL code for this AST node\n\t\t// for expressions the resulting signal vector is returned\n\t\t// all generated cell instances, etc. are written to the RTLIL::Module pointed to by AST_INTERNAL::current_module\n\t\tRTLIL::SigSpec genRTLIL(int width_hint = -1, bool sign_hint = false);\n\t\tRTLIL::SigSpec genWidthRTLIL(int width, bool sgn, const dict<RTLIL::SigBit, RTLIL::SigBit> *new_subst_ptr = NULL);\n\n\t\t// compare AST nodes\n\t\tbool operator==(const AstNode &other) const;\n\t\tbool operator!=(const AstNode &other) const;\n\t\tbool contains(const AstNode *other) const;\n\n\t\t// helper functions for creating AST nodes for constants\n\t\tstatic AstNode *mkconst_int(uint32_t v, bool is_signed, int width = 32);\n\t\tstatic AstNode *mkconst_bits(const std::vector<RTLIL::State> &v, bool is_signed, bool is_unsized);\n\t\tstatic AstNode *mkconst_bits(const std::vector<RTLIL::State> &v, bool is_signed);\n\t\tstatic AstNode *mkconst_str(const std::vector<RTLIL::State> &v);\n\t\tstatic AstNode *mkconst_str(const std::string &str);\n\n\t\t// helper function to create an AST node for a temporary register\n\t\tAstNode *mktemp_logic(const std::string &name, AstNode *mod, bool nosync, int range_left, int range_right, bool is_signed);\n\n\t\t// helper function for creating sign-extended const objects\n\t\tRTLIL::Const bitsAsConst(int width, bool is_signed);\n\t\tRTLIL::Const bitsAsConst(int width = -1);\n\t\tRTLIL::Const bitsAsUnsizedConst(int width);\n\t\tRTLIL::Const asAttrConst() const;\n\t\tRTLIL::Const asParaConst() const;\n\t\tuint64_t asInt(bool is_signed);\n\t\tbool bits_only_01() const;\n\t\tbool asBool() const;\n\n\t\t// helper functions for real valued const eval\n\t\tint isConst() const; // return '1' for AST_CONSTANT and '2' for AST_REALVALUE\n\t\tdouble asReal(bool is_signed);\n\t\tRTLIL::Const realAsConst(int width);\n\n\t\t// helpers for enum\n\t\tvoid allocateDefaultEnumValues();\n\t\tvoid annotateTypedEnums(AstNode *template_node);\n\n\t\t// helpers for locations\n\t\tstd::string loc_string() const;\n\n\t\t// Helper for looking up identifiers which are prefixed with the current module name\n\t\tstd::string try_pop_module_prefix() const;\n\n\t\t// helper to clone the node with some of its subexpressions replaced with zero (this is used\n\t\t// to evaluate widths of dynamic ranges)\n\t\tAstNode *clone_at_zero();\n\n\t\tvoid set_attribute(RTLIL::IdString key, AstNode *node)\n\t\t{\n\t\t\tattributes[key] = node;\n\t\t\tnode->set_in_param_flag(true);\n\t\t}\n\n\t\t// helper to set in_lvalue/in_param flags from the hierarchy context (the actual flag\n\t\t// can be overridden based on the intrinsic properties of this node, i.e. based on its type)\n\t\tvoid set_in_lvalue_flag(bool flag, bool no_descend = false);\n\t\tvoid set_in_param_flag(bool flag, bool no_descend = false);\n\n\t\t// fix up the hierarchy flags (in_lvalue/in_param) of this node and its children\n\t\t//\n\t\t// to keep the flags in sync, fixup_hierarchy_flags(true) needs to be called once after\n\t\t// parsing the AST to walk the full tree, then plain fixup_hierarchy_flags() performs\n\t\t// localized fixups after modifying children/attributes of a particular node\n\t\tvoid fixup_hierarchy_flags(bool force_descend = false);\n\n\t\t// helper to print errors from simplify/genrtlil code\n\t\t[[noreturn]] void input_error(const char *format, ...) const YS_ATTRIBUTE(format(printf, 2, 3));\n\t};\n\n\t// process an AST tree (ast must point to an AST_DESIGN node) and generate RTLIL code\n\tvoid process(RTLIL::Design *design, AstNode *ast, bool nodisplay, bool dump_ast1, bool dump_ast2, bool no_dump_ptr, bool dump_vlog1, bool dump_vlog2, bool dump_rtlil, bool nolatches, bool nomeminit,\n\t\t\tbool nomem2reg, bool mem2reg, bool noblackbox, bool lib, bool nowb, bool noopt, bool icells, bool pwires, bool nooverwrite, bool overwrite, bool defer, bool autowire);\n\n\t// parametric modules are supported directly by the AST library\n\t// therefore we need our own derivate of RTLIL::Module with overloaded virtual functions\n\tstruct AstModule : RTLIL::Module {\n\t\tAstNode *ast;\n\t\tbool nolatches, nomeminit, nomem2reg, mem2reg, noblackbox, lib, nowb, noopt, icells, pwires, autowire;\n\t\t~AstModule() override;\n\t\tRTLIL::IdString derive(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> &parameters, bool mayfail) override;\n\t\tRTLIL::IdString derive(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> &parameters, const dict<RTLIL::IdString, RTLIL::Module*> &interfaces, const dict<RTLIL::IdString, RTLIL::IdString> &modports, bool mayfail) override;\n\t\tstd::string derive_common(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Const> &parameters, AstNode **new_ast_out, bool quiet = false);\n\t\tvoid expand_interfaces(RTLIL::Design *design, const dict<RTLIL::IdString, RTLIL::Module *> &local_interfaces) override;\n\t\tbool reprocess_if_necessary(RTLIL::Design *design) override;\n\t\tRTLIL::Module *clone() const override;\n\t\tvoid loadconfig() const;\n\t};\n\n\t// this must be set by the language frontend before parsing the sources\n\t// the AstNode constructor then uses current_filename and get_line_num()\n\t// to initialize the filename and linenum properties of new nodes\n\textern std::string current_filename;\n\textern void (*set_line_num)(int);\n\textern int (*get_line_num)();\n\n\t// set set_line_num and get_line_num to internal dummy functions (done by simplify() and AstModule::derive\n\t// to control the filename and linenum properties of new nodes not generated by a frontend parser)\n\tvoid use_internal_line_num();\n\n\t// call a DPI function\n\tAstNode *dpi_call(const std::string &rtype, const std::string &fname, const std::vector<std::string> &argtypes, const std::vector<AstNode*> &args);\n\n\t// Helper functions related to handling SystemVerilog interfaces\n\tstd::pair<std::string,std::string> split_modport_from_type(std::string name_type);\n\tAstNode * find_modport(AstNode *intf, std::string name);\n\tvoid explode_interface_port(AstNode *module_ast, RTLIL::Module * intfmodule, std::string intfname, AstNode *modport);\n\n\t// Helper for setting the src attribute.\n\tvoid set_src_attr(RTLIL::AttrObject *obj, const AstNode *ast);\n\n\t// struct helper exposed from simplify for genrtlil\n\tAstNode *make_struct_member_range(AstNode *node, AstNode *member_node);\n\tAstNode *get_struct_member(const AstNode *node);\n\n\t// generate standard $paramod... derived module name; parameters should be\n\t// in the order they are declared in the instantiated module\n\tstd::string derived_module_name(std::string stripped_name, const std::vector<std::pair<RTLIL::IdString, RTLIL::Const>> &parameters);\n\n\t// used to provide simplify() access to the current design for looking up\n\t// modules, ports, wires, etc.\n\tvoid set_simplify_design_context(const RTLIL::Design *design);\n}\n\nnamespace AST_INTERNAL\n{\n\t// internal state variables\n\textern bool flag_nodisplay, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_rtlil, flag_nolatches, flag_nomeminit;\n\textern bool flag_nomem2reg, flag_mem2reg, flag_lib, flag_noopt, flag_icells, flag_pwires, flag_autowire;\n\textern AST::AstNode *current_ast, *current_ast_mod;\n\textern std::map<std::string, AST::AstNode*> current_scope;\n\textern const dict<RTLIL::SigBit, RTLIL::SigBit> *genRTLIL_subst_ptr;\n\textern RTLIL::SigSpec ignoreThisSignalsInInitial;\n\textern AST::AstNode *current_always, *current_top_block, *current_block, *current_block_child;\n\textern RTLIL::Module *current_module;\n\textern bool current_always_clocked;\n\textern dict<std::string, int> current_memwr_count;\n\textern dict<std::string, pool<int>> current_memwr_visible;\n\tstruct LookaheadRewriter;\n\tstruct ProcessGenerator;\n\n\t// Create and add a new AstModule from new_ast, then use it to replace\n\t// old_module in design, renaming old_module to move it out of the way.\n\t// Return the new module.\n\t//\n\t// If original_ast is not null, it will be used as the AST node for the\n\t// new module. Otherwise, new_ast will be used.\n\tRTLIL::Module *\n\tprocess_and_replace_module(RTLIL::Design *design,\n\t                           RTLIL::Module *old_module,\n\t                           AST::AstNode *new_ast,\n\t                           AST::AstNode *original_ast = nullptr);\n}\n\nYOSYS_NAMESPACE_END\n\n#endif\n",
                     "ast_binding.h": "/* -*- c++ -*-\n *  yosys -- Yosys Open SYnthesis Suite\n *\n *  Copyright (C) 2012  Claire Xenia Wolf <claire@yosyshq.com>\n *\n *  Permission to use, copy, modify, and/or distribute this software for any\n *  purpose with or without fee is hereby granted, provided that the above\n *  copyright notice and this permission notice appear in all copies.\n *\n *  THE SOFTWARE IS PROVIDED \"AS IS\" AND THE AUTHOR DISCLAIMS ALL WARRANTIES\n *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF\n *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR\n *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES\n *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN\n *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF\n *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.\n *\n *  ---\n *\n *  This header declares the AST::Binding class\n *\n *  This is used to support the bind directive and is to RTLIL::Binding as\n *  AST::AstModule is to RTLIL::Module, holding a syntax-level representation of\n *  cells until we get to a stage where they make sense. In the case of a bind\n *  directive, this is when we elaborate the design in the hierarchy pass.\n *\n */\n\n#ifndef AST_BINDING_H\n#define AST_BINDING_H\n\n#include \"kernel/rtlil.h\"\n#include \"kernel/binding.h\"\n\n#include <memory>\n\nYOSYS_NAMESPACE_BEGIN\n\nnamespace AST\n{\n\tclass Binding : public RTLIL::Binding\n\t{\n\tpublic:\n\t\tBinding(RTLIL::IdString  target_type,\n\t\t        RTLIL::IdString  target_name,\n\t\t        const AstNode   &cell);\n\n\t\tstd::string describe() const override;\n\n\tprivate:\n\t\t// The syntax-level representation of the cell to be bound.\n\t\tstd::unique_ptr<AstNode> ast_node;\n\t};\n}\n\nYOSYS_NAMESPACE_END\n\n#endif\n",
                 },
                 "blif": {