@vessel-dsp/compiler 0.9.0 → 0.16.0

package/dist/part-catalog.js

@@ -1272,19 +1272,75 @@ const entries = [
     // BA728F", ROHM), Fig. 4's BA718 9-pin SIP block diagram and pin row, which states pin 1
     // through 9 as: VCC, VOUT(1ch), I1, IN1, VEE, IN2, I2, VOUT(2ch), VCC. Electrical
     // characteristics (Ta=25C, VCC=6V, VEE=-6V): "Large signal voltage gain Av ... Min 86 Typ
-    // 100 ... dB". Used as `openLoopGain: decibelGain(100)`, the typ figure, matching this
+    // 100 ... dB". Used as `openLoopGain: 100000`, the typ figure, matching this
     // file's convention for the other op-amps above.
     //
-    // `boss-cs-3.vdsp`'s `IC4` declares only 5 of the real 9 pins, named plainly `pin1`
-    // through `pin5` (no suffix, so `terminalRoleToken` folds every one of them to `null` --
-    // this entry cannot be pinout-guarded, the same bound `identify.ts` documents for a part
-    // numbered `pin1..pinN`). Declaration order there is sequential ascending pin number, the
-    // same convention verified for the NE570 entry above: `pin1`=idx0 through `pin5`=idx4. Read
-    // against the real 9-pin table, that is exactly channel 1's five pins in order -- VCC, OUT1,
-    // I1 (the inverting/feedback node), IN1, VEE -- a self-contained single-op-amp capture of
-    // the chip's first section, with channel 2's pins 6-9 simply absent from this component.
-    // Only the three audio terminals matter to `ideal-opamp`; VCC/VEE are not read (rails come
-    // from the circuit's own supply set, same as every other entry here).
+    // Two shapes share this part id (one entry each, told apart by arity, the M5218 dual-split
+    // precedent): the full 9-pin dual declaration first, then the older 5-pin single-section
+    // capture. The re-traced `boss-cs-3.vdsp` `IC4` declares all nine in strict sequential
+    // ascending pin order (`pin1`..`pin9`, bare names folding to null roles, so this entry
+    // cannot be pinout-guarded and stays on the documented-positional route with the
+    // cross-check below, the NE570 precedent):
+    // 4a: out=pin2 (node 42), -in=pin3/I1 (node 41), +in=pin4/IN1 (node 5, the 4.5 V rail),
+    // VEE=pin5 (node 0, ground); 4b: +in=pin6/IN2 (node 76, SUSTAIN/ATTACK wiper net),
+    // out=pin7 (node 47 into D6), -in=pin8/I2 (node 47, follower strap), VCC=pin1/pin9
+    // (node 4, 9 V). Each section below carries only its own three audio terminals in the
+    // `ideal-opamp` [+, -, out] order; VCC/VEE are not read (rails come from the circuit's
+    // own supply set, same as every other entry here).
+    {
+        "partIds": [
+            "BA718"
+        ],
+        "declaredTypes": [],
+        "terminalRoleGroups": [],
+        "model": {
+            "kind": "sections",
+            "sections": [
+                {
+                    "law": {
+                        "kind": "ideal-opamp",
+                        "railHigh": null,
+                        "railLow": null,
+                        "openLoopGain": 100000
+                    },
+                    "terminals": [
+                        3,
+                        2,
+                        1
+                    ]
+                },
+                {
+                    "law": {
+                        "kind": "ideal-opamp",
+                        "railHigh": null,
+                        "railLow": null,
+                        "openLoopGain": 100000
+                    },
+                    "terminals": [
+                        5,
+                        6,
+                        7
+                    ]
+                }
+            ],
+            "pinout": [
+                null,
+                null,
+                null,
+                null,
+                null,
+                null,
+                null,
+                null,
+                null
+            ]
+        }
+    },
+    // The older BA718 5-pin single-section capture: channel 1's five pins in declaration
+    // order (VCC, OUT1, I1, IN1, VEE), kept working for the pre-retrace capture that declares
+    // only them. Same part id, same typ gain; the 9-pin entry above serves the full dual
+    // declaration. Bare `pin1`..`pin5` names fold to null roles here too, so this entry is
+    // likewise positional with the declaration order as its only assertion.
     {
         "partIds": [
             "BA718"
@@ -4301,6 +4357,114 @@ const entries = [
     // constant is -5.9 mV per dB, over a +/-30 dB range, matching `boss-lm-2`'s own
     // `boss-lm-2-upc1252h2-vca-control.cir` reference deck (`gain_db = -v(ctrl)/0.0059`).
     //
+    // BEHAVIORAL LAW v4 (session-calibrated: threshold/rest-gain + release).
+    // v2 rendered the pedal linear (flat 0.303: the island sigmoid needs volts, GC1
+    // delivers millivolts) and v3 rendered it expanding (the v2 envelope rectified the
+    // cell's virtual-ground node volts, ~100x too small, while raw audio on node 70
+    // pumped the gain). v4 fits the session threshold curves directly: SUSTAIN-coupled
+    // rest (sustainGain -4.23, sustainRef 4.6504 V -- rest gain rises with SUSTAIN,
+    // +27.5 dB across the engine-measured V70 rest span 4.6325->4.6728, inverting the
+    // old -6.8 dB SUSTAIN response with the session curves quoted as cause) plus a
+    // log-domain envelope with a SUSTAIN-tracked knee (envelopeSlope 0.049 V/neper,
+    // kneeBase -0.069 V at V70 4.65 rising 4.36 V/V): below the knee the pedal holds
+    // rest gain, above it each input decade adds the same dB of reduction, and the knee
+    // tracks SUSTAIN so sus-min stays flat to 300 mV while centre and sus-max engage
+    // progressively. Joint fit to the 12-point session sweep (worst residual 0.7 dB);
+    // hot points stay within ~1 dB of the coordinator's renders (no regression).
+    // The island still quotes 4.5 V for its off-chip ctrl_bus (both quoted).
+    //
+    // CENTER (rest span, both quoted): the GC rest moves 4.6325->4.6728 across SUSTAIN
+    // 0->1 (engine-measured at declared defaults). sustainRef 4.6504 V with sustainGain
+    // -4.23 maps that span onto the session rest gains (sus-min -13.2, centre +5.68,
+    // sus-max +14.28 dB at 10 mV in).
+    //
+    // KNEE (threshold moves with SUSTAIN): the knee must sit above 300 mV-equivalent
+    // at sus-min (flat -13.2), near 30-50 mV at centre, and near 10 mV at sus-max --
+    // a fixed knee cannot satisfy 30 mV-off (centre) and 30 mV-on (sus-max) at once,
+    // so it tracks V70 at +4.36 V/V. The chip's true threshold mechanism is
+    // silicon-internal (excluded); LM-2's biasing is unverified (workbench-side).
+    //
+    // SMOOTHING (load-bearing as in v3): node 70 carries tens of millivolts of audio,
+    // so both the external control and the rectified input are smoothed with
+    // attack/release (C8 4.7 uF by R13 10k ~ 47 ms release, D6 charge path ~ 0.5 ms
+    // attack) and held across the Newton loop. Release TC varies with suppression
+    // depth (releaseSlowdown 2400: 50 ms near top, minutes-slow from deep suppression;
+    // releaseShape 6 bends the mid-depth curve down (depth^6 in the slowdown
+    // exponent): 56 ms at half depth instead of 2.45 s, endpoints pinned
+    // (50 ms at top for session-3 immediacy, 120 s at full depth for
+    // cross-take persistence). The v6 pick-attack fit: in-stream gain was
+    // frozen (identical peak/sustain gains across 30-1000 ms dips), so the
+    // engine passed dry ratios through while hardware breathes in the dips;
+    // the shape restores dip recovery without touching settled tones, the v4
+    // threshold fit, or the session-8 shutdown path;
+    // H1 base-attack fix (drive numbers as cause: full-pedal Mayer feed
+    // 20.9 uA peak / 3.51 uA RMS with the jack carrying 0.23 V peaks --
+    // 2.2x the fixture feed that already breathes to 17x -- and GC pooled
+    // identical in peak and body windows (4.6729 vs 4.6728 V), so the miss
+    // is envelope dynamics, not drive). Probe wall: no single attack TC
+    // threads the gate and the bars (bars need <=~5 ms: 8 ms already fails
+    // the threshold sweep 1.96 dB and the synthetic body 0.84; the gate
+    // needs >=12 ms: 8 ms stays frozen ~5.9x; depth-gating and depth-norm
+    // moves fail the medians or the top). The frozen joint is the pegged
+    // release: loud-body targets hit depth 1.0 (0.179 V peak vs 0.15 norm),
+    // where the TC sits at 120 s, so short dips recover ~0%. releaseMax
+    // caps the deep release at 0.8 s -- surgical to depths above ~0.84,
+    // where no fitted bar operates except the v4 slow-end pair (see the
+    // tension note in the H1 entry): ripple, mild-pip and body windows all
+    // live below it, and the session-8 post-gap path is the separate victim
+    // follower;
+    // fit hook for the hot-start + 60 s take, which does not exist yet) -- a fixed
+    // release is refuted by the session (pips annihilated after hot history, passing
+    // after mild history, across the same gap). The 4a/Q6/Q8 auxiliary chain cannot
+    // substitute: 4a's audio input is an open trace residual.
+    //
+    // SHUTDOWN (v5, session-8 victim dependence, on top of the untouched v4 above):
+    // the depth-only release clears slowly everywhere-post-hot, but hardware clears
+    // in <1 s under tone while holding across a 30 s gap -- so the release from a
+    // post-gap transient crush must be victim-dependent, not just depth-dependent.
+    // A fourth follower holds the shutdown: pumped only by hot peaks while primed
+    // (silence builds prime over ~10 s, signal disarms in fractions of a second),
+    // with an absolute gulp threshold (shutdownEdgeVolts) and quadratic size
+    // (shutdownGain fit: D6 conducting hard into the depleted C8 on the first
+    // post-gap peak, the square the D6 diode exponential over the range; the
+    // absolute threshold is the diode forward drop plus topped-C8 headroom, which
+    // is why sine ripple and mild peaks never pump). Render onsets and continuous
+    // tones never pump (priming starts at zero and signal holds it there): the v4
+    // threshold fit is structurally untouched. The shutdown bleeds
+    // victim-dependently (shutdownFastSeconds under sustained signal through the
+    // signal-driven Q6/Q8 collector plus Q7 transconductance discharge,
+    // shutdownSlowSeconds R-only in silence: holds across takes, finite).
+    // Session-8 fit: post-gap pip 0.007x mild, tone from +1 s at baseline flat,
+    // no creep.
+    //
+    // BINDING. `boss-lm-2`'s `IC1_UPC1252H2` spells its pins with role suffixes
+    // (`pin1_input`, `pin2_gc2`, `pin3_gc1`, `pin4_symmetry`, `pin5_iset`,
+    // `pin6_ground_reference`, `pin7_vcc`, `pin8_output`), which fold to
+    // input/gc2/gc1/symmetry/iset/groundreference/vcc/output -- every group below
+    // resolves onto exactly one of those, so it binds by clean role bijection with no
+    // positional assumption. `boss-cs-3`'s `IC3` names its pins bare `pin1`..`pin8`
+    // (roles all null), so it binds positionally in strict sequential pin order, the
+    // NE570 precedent, cross-checked here: pin1 = node 14 (signal in through R9),
+    // pin2/pin3 = node 70 (GC pair, driven by the R11/Q7 detector network), pin4/pin6 =
+    // node 15 (GC3/GND side, coupled to 70 through R8), pin5 = node 17 (ISET through R7
+    // to ground), pin7 = node 4 (9 V rail), pin8 = node 18 (signal out through R6/C5).
+    // The single section below carries [in, ref, out, control] in the `dbx-vca` law order
+    // as canonical positions [0, 5, 7, 2]: in = pin1, ref = pin6 (GND), out = pin8,
+    // control = pin3 (GC1 -- the detector-driven GC pin on both pedals: on `boss-lm-2`
+    // D8/D9 feed node 6, which is pin3_gc1, while pin2_gc2 sits on node 17).
+    //
+    // `inputSiemens` 0.01 is the current-input impedance convention this file already
+    // uses for a current-input VCA pin (the `linear-vca` entries carry the same 0.01);
+    // the absolute level is then set by the external transimpedance (CS-3's R6 10k into
+    // IC2's inverting stage), not by this number alone.
+    //
+    // KNOWN DEVIATIONS (documented, not hidden):
+    // - SUSTAIN rest span, knee track, and envelope slope are fitted to the session
+    //   threshold curves (worst residual 0.7 dB); a packet re-trace moving the
+    //   SUSTAIN-default bias moves rest with it. LM-2's biasing is unverified:
+    //   the entry's numbers are the CS-3's, and LM-2 calibration belongs
+    //   workbench-side.
+    //
     // `declaredTypes` deliberately empty. It listed `Circuit.IC`, the format's generic "this is a
     // chip", which identifies nothing and could only ever act as a catch-all: measured 2026-09-04,
     // both corpus users (`boss-cs-3`'s `IC3` and `boss-lm-2`'s `IC1_UPC1252H2`) match by exact part
@@ -4342,11 +4506,13 @@ const entries = [
                 "pin6",
                 "gnd",
                 "ref",
-                "ground"
+                "ground",
+                "groundreference"
             ],
             [
                 "pin7",
-                "vc"
+                "vc",
+                "vcc"
             ],
             [
                 "pin8",
@@ -4360,23 +4526,34 @@ const entries = [
             "sections": [
                 {
                     "law": {
-                        "kind": "conductance",
-                        "siemens": 0.01
-                    },
-                    "terminals": [
-                        0,
-                        5
-                    ]
-                },
-                {
-                    "law": {
-                        "kind": "ota",
-                        "transconductance": 0.01
+                        "kind": "dbx-vca",
+                        "inputSiemens": 0.01,
+                        "sustainGain": -4.23,
+                        "sustainRef": 4.6504,
+                        "envelopeSlope": 0.049,
+                        "kneeBaseVolts": -0.069,
+                        "kneeTrack": 4.36,
+                        "attackSeconds": 0.004,
+                        "releaseSeconds": 0.05,
+                        "releaseSlowdown": 2400,
+                        "releaseShape": 6,
+                        "releaseMaxSeconds": 0.8,
+                        "shutdownEdgeVolts": 0.08,
+                        "shutdownGain": 28,
+                        "primeRiseSeconds": 10,
+                        "primeFallSeconds": 0.15,
+                        "shutdownAttackSeconds": 0.00015,
+                        "shutdownFastSeconds": 0.025,
+                        "shutdownSlowSeconds": 300,
+                        "primeRefCurrent": 0.0000005,
+                        "minGainDb": -30,
+                        "maxGainDb": 30
                     },
                     "terminals": [
                         0,
                         5,
-                        7
+                        7,
+                        2
                     ]
                 }
             ],