@typecad/framework-zephyr 1.0.0-alpha.15 → 1.0.0-alpha.18

package/dist/chips/soc/samd21g18a.js

@@ -1,143 +0,0 @@
-// Hand-maintained descriptor table — mechanically migrated from the
-// board-nano-33-iot + mcu-samd21 package data (the exact flatten+reconstruct the build
-// performed). Curated additions: tier/pinNaming/excludedPins. Regenerate
-// only alongside a descriptor-type change (edit this file; the original
-// migration script was never committed).
-export const SAMD21G18A_SOC = {
-    "id": "arduino_nano_33_iot/samd21g18a",
-    "soc": "samd21g18a",
-    "gpioController": "porta",
-    "gpioControllers": [
-        {
-            "nodelabel": "porta",
-            "minPin": 0,
-            "maxPin": 31
-        },
-        {
-            "nodelabel": "portb",
-            "minPin": 32,
-            "maxPin": 55
-        }
-    ],
-    "gpio": {
-        "dtSpecs": [
-            {
-                "pin": 17,
-                "dtSpec": "led0"
-            }
-        ]
-    },
-    "i2c": {
-        "controllers": [
-            {
-                "nodeLabel": "sercom4"
-            }
-        ]
-    },
-    "spi": {
-        "controllers": [
-            {
-                "nodeLabel": "sercom1"
-            }
-        ]
-    },
-    "uart": {
-        "controllers": [
-            {
-                "nodeLabel": "sercom5"
-            }
-        ]
-    },
-    "pwm": {
-        "specs": [
-            {
-                "pin": 17,
-                "dtSpec": "pwm-led0"
-            }
-        ],
-        "maxFrequencyHz": 46875,
-        "resolutionBits": 16
-    },
-    "adc": {
-        "nodeLabel": "adc",
-        "resolution": 12,
-        "vrefMv": 1650,
-        "channels": [
-            {
-                "pin": 2,
-                "channel": 0
-            },
-            {
-                "pin": 40,
-                "channel": 2
-            },
-            {
-                "pin": 41,
-                "channel": 3
-            },
-            {
-                "pin": 34,
-                "channel": 10
-            },
-            {
-                "pin": 9,
-                "channel": 17
-            },
-            {
-                "pin": 10,
-                "channel": 18
-            },
-            {
-                "pin": 11,
-                "channel": 19
-            }
-        ],
-        "gain": "ADC_GAIN_1",
-        "reference": "ADC_REF_VDD_1_2"
-    },
-    "usb": {
-        "controller": "zephyr_udc0",
-        "cdcInstances": 1,
-        "vid": "0x2FE3",
-        "pid": "0x0003",
-        "touchReset": {
-            "flagAddress": 536903676,
-            "magic": 125010229,
-            "bootloaderVid": "0x2341",
-            "bootloaderPid": "0x0057"
-        }
-    },
-    "consoleDescription": "sercom5 on PB22 (TX, D1) / PB23 (RX, D0) at 115200",
-    "probeMethods": [
-        {
-            "id": "bossac",
-            "runner": "bossac",
-            "description": "Built-in USB bootloader: double-tap reset, flash over the USB port (no debug)",
-            "debug": false
-        },
-        {
-            "id": "openocd",
-            "runner": "openocd",
-            "description": "Any CMSIS-DAP-class SWD probe on the underside SWD pads — also debugs",
-            "debug": true,
-            "debugInterface": "swd",
-            "debugCfg": [
-                "reset_config none"
-            ],
-            "debugCfgSource": [
-                "interface/cmsis-dap.cfg",
-                "target/at91samd.cfg"
-            ]
-        },
-        {
-            "id": "jlink",
-            "runner": "jlink",
-            "description": "J-Link probe (SWD) on the underside SWD pads — also debugs",
-            "debug": true,
-            "debugInterface": "swd",
-            "debugDevice": "ATSAMD21G18"
-        }
-    ],
-    "tier": "validated",
-    "pinNaming": "samd-port"
-};

package/dist/chips/soc/stm32f411xe.d.ts

@@ -1,2 +0,0 @@
-import type { ZephyrChipDescriptor } from '../types.js';
-export declare const STM32F411XE_SOC: ZephyrChipDescriptor;

package/dist/chips/soc/stm32f411xe.js

@@ -1,251 +0,0 @@
-// Hand-maintained descriptor table — mechanically migrated from the
-// board-blackpill-f411ce + mcu-stm32f411 package data (the exact flatten+reconstruct the build
-// performed). Curated additions: tier/pinNaming/excludedPins. Regenerate
-// only alongside a descriptor-type change (edit this file; the original
-// migration script was never committed).
-export const STM32F411XE_SOC = {
-    "id": "blackpill_f411ce/stm32f411xe",
-    "soc": "stm32f411xe",
-    "gpioController": "gpioa",
-    "gpioControllers": [
-        {
-            "nodelabel": "gpioa",
-            "minPin": 0,
-            "maxPin": 15
-        },
-        {
-            "nodelabel": "gpiob",
-            "minPin": 16,
-            "maxPin": 31
-        },
-        {
-            "nodelabel": "gpioc",
-            "minPin": 32,
-            "maxPin": 47
-        }
-    ],
-    "gpio": {
-        "dtSpecs": [
-            {
-                "pin": 45,
-                "dtSpec": "led0"
-            },
-            {
-                "pin": 0,
-                "dtSpec": "sw0"
-            }
-        ],
-        "interruptPins": [
-            {
-                "pin": 0,
-                "dtSpec": "sw0"
-            }
-        ]
-    },
-    "i2c": {
-        "controllers": [
-            {
-                "nodeLabel": "i2c1"
-            }
-        ]
-    },
-    "spi": {
-        "controllers": [
-            {
-                "nodeLabel": "spi1"
-            }
-        ]
-    },
-    "uart": {
-        "controllers": [
-            {
-                "nodeLabel": "usart1"
-            }
-        ]
-    },
-    "pwm": {
-        "specs": [
-            {
-                "pin": 22,
-                "controller": "pwm4",
-                "channel": 1,
-                "periodNs": 20000000,
-                "pinctrl": "tim4_ch1_pb6"
-            },
-            {
-                "pin": 23,
-                "controller": "pwm4",
-                "channel": 2,
-                "periodNs": 20000000,
-                "pinctrl": "tim4_ch2_pb7"
-            }
-        ],
-        "clockHz": 96000000,
-        "maxFrequencyHz": 50000000,
-        "resolutionBits": 16
-    },
-    "adc": {
-        "nodeLabel": "adc1",
-        "resolution": 12,
-        "vrefMv": 3300,
-        "channels": [
-            {
-                "pin": 0,
-                "channel": 0,
-                "pinctrl": "adc1_in0_pa0"
-            },
-            {
-                "pin": 1,
-                "channel": 1,
-                "pinctrl": "adc1_in1_pa1"
-            },
-            {
-                "pin": 2,
-                "channel": 2,
-                "pinctrl": "adc1_in2_pa2"
-            },
-            {
-                "pin": 3,
-                "channel": 3,
-                "pinctrl": "adc1_in3_pa3"
-            },
-            {
-                "pin": 4,
-                "channel": 4,
-                "pinctrl": "adc1_in4_pa4"
-            },
-            {
-                "pin": 5,
-                "channel": 5,
-                "pinctrl": "adc1_in5_pa5"
-            },
-            {
-                "pin": 6,
-                "channel": 6,
-                "pinctrl": "adc1_in6_pa6"
-            },
-            {
-                "pin": 7,
-                "channel": 7,
-                "pinctrl": "adc1_in7_pa7"
-            },
-            {
-                "pin": 16,
-                "channel": 8,
-                "pinctrl": "adc1_in8_pb0"
-            },
-            {
-                "pin": 17,
-                "channel": 9,
-                "pinctrl": "adc1_in9_pb1"
-            }
-        ],
-        "gain": "ADC_GAIN_1",
-        "reference": "ADC_REF_INTERNAL"
-    },
-    "wdt": {
-        "nodeLabel": "iwdg"
-    },
-    "storage": {
-        "offset": 262144,
-        "size": 262144
-    },
-    "usb": {
-        "controller": "zephyr_udc0",
-        "cdcInstances": 1,
-        "vid": "0x2FE3",
-        "pid": "0x0002"
-    },
-    "consoleDescription": "usart1 on PA9 (TX) / PA10 (RX)",
-    "probeMethods": [
-        {
-            "id": "stlink",
-            "runner": "openocd",
-            "args": [
-                "--cmd-pre-init=reset_config none"
-            ],
-            "description": "ST-Link or any SWD probe openocd supports (no BOOT0 needed)",
-            "debug": true,
-            "debugInterface": "swd",
-            "debugCfg": [
-                "reset_config none"
-            ],
-            "debugCfgSource": [
-                "interface/stlink.cfg",
-                "target/stm32f4x.cfg"
-            ]
-        },
-        {
-            "id": "stlink-srst",
-            "runner": "openocd",
-            "args": [
-                "--cmd-pre-init=reset_config srst_only srst_nogate connect_assert_srst"
-            ],
-            "description": "ST-Link with the RST/SRST line wired — connect under reset (recovers wedged targets)",
-            "debug": true,
-            "debugInterface": "swd",
-            "debugCfg": [
-                "reset_config srst_only srst_nogate connect_assert_srst"
-            ],
-            "debugCfgSource": [
-                "interface/stlink.cfg",
-                "target/stm32f4x.cfg"
-            ]
-        },
-        {
-            "id": "dfu",
-            "runner": "dfu-util",
-            "description": "Built-in USB bootloader: hold BOOT0, tap reset",
-            "debug": false
-        },
-        {
-            "id": "jlink",
-            "runner": "jlink",
-            "description": "J-Link probe (SWD)",
-            "debug": true,
-            "debugInterface": "swd",
-            "debugDevice": "STM32F411CE"
-        }
-    ],
-    "customBoard": {
-        "socs": [
-            "stm32f411xe"
-        ],
-        "dtsIncludes": [
-            "st/f4/stm32f411Xe.dtsi",
-            "st/f4/stm32f411c(c-e)ux-pinctrl.dtsi"
-        ],
-        "console": {
-            "nodeLabel": "usart1",
-            "tx": "usart1_tx_pa9",
-            "rx": "usart1_rx_pa10",
-            "speed": 115200
-        },
-        "clocks": {
-            "hseMHz": 25,
-            "pll": {
-                "divM": 25,
-                "mulN": 192,
-                "divP": 2,
-                "divQ": 4
-            },
-            "sysMHz": 96,
-            "ahbPrescaler": 1,
-            "apb1Prescaler": 2,
-            "apb2Prescaler": 1
-        },
-        "usbNode": "usbotg_fs",
-        "usbPinctrl": [
-            "usb_otg_fs_dm_pa11",
-            "usb_otg_fs_dp_pa12"
-        ],
-        "adcNode": {
-            "nodeLabel": "adc1",
-            "clockSource": "SYNC",
-            "prescaler": 2,
-            "pinctrl": "adc1_in1_pa1"
-        }
-    },
-    "tier": "validated",
-    "pinNaming": "stm32-port"
-};

package/dist/chips/xiao-ble.d.ts

@@ -1,2 +0,0 @@
-import type { ZephyrChipDescriptor } from './types.js';
-export declare const XIAO_BLE: ZephyrChipDescriptor;

package/dist/chips/xiao-ble.js

@@ -1,100 +0,0 @@
-// ---------------------------------------------------------------------------
-// Seeed Studio XIAO nRF52840 — Zephyr board descriptor
-//
-// Board target: `xiao_ble` (mainline Zephyr, boards/seeed/xiao_ble).
-// The onboard user LED is active-low and exposed as the DT alias `led0`.
-// ---------------------------------------------------------------------------
-export const XIAO_BLE = {
-    id: 'xiao_ble',
-    soc: 'nrf52840',
-    gpioController: 'gpio0',
-    // GPIO is split across two devicetree controllers: gpio0 (P0.00–P0.31)
-    // and gpio1 (P1.00–P1.15, HAL pins 32–47). Declaring the split makes the
-    // raw path emit the port-relative index against gpio1 (P1.11 = raw 11),
-    // which NRF_GPIO_PIN_MAP(1, 11) resolves to absolute pin 43 — the same
-    // physical pin the old single-controller form reached only by accident:
-    // gpio0 + global 43 also maps to 43 (MAP(0, 43) = 43), but that form
-    // trips the generic layer's port_pin_mask __ASSERT ("Unsupported pin",
-    // gpio0's mask covers 0–31) on any assert-enabled build.
-    gpioControllers: [
-        { nodelabel: 'gpio0', minPin: 0, maxPin: 31 },
-        { nodelabel: 'gpio1', minPin: 32, maxPin: 47 },
-    ],
-    gpio: {
-        dtSpecs: [
-            // Onboard RGB LEDs — active-low (GPIO_ACTIVE_LOW in xiao_ble_common.dtsi).
-            // Verified against the board's `aliases { led0 = &led0; led1 = &led1; led2 = &led2; }`.
-            { pin: 26, dtSpec: 'led0' }, // Red   (P0.26)
-            { pin: 30, dtSpec: 'led1' }, // Green (P0.30)
-            { pin: 6, dtSpec: 'led2' }, // Blue  (P0.06)
-        ],
-        // The XIAO nRF52840 has a user button on P0.04, but mainline Zephyr's
-        // xiao_ble board (verified against Zephyr 4.3.99) does NOT expose it as a
-        // DT `sw0` alias — there is no gpio-keys node in xiao_ble.dts. Emitting
-        // GPIO_DT_SPEC_GET(DT_ALIAS(sw0), gpios) therefore fails to compile
-        // ('DT_N_ALIAS_sw0_... was not declared'). Until a button node + alias is
-        // added (via an overlay or an upstream board update), interruptPins stays
-        // empty: attachInterrupt on this board lowers to the no-DT-spec comment
-        // fallback rather than a hard compile error.
-        interruptPins: [],
-    },
-    // The XIAO connector wiring (from seeed_xiao_connector.dtsi + xiao_ble-pinctrl.dtsi):
-    //   xiao_i2c     → i2c1  (SDA P0.04/D4, SCL P0.05/D5)
-    //   xiao_spi     → spi2  (SCK P1.13/D8, MOSI P1.15/D10, MISO P1.14/D9)
-    //   xiao_serial  → uart0 (TX P1.11/D6, RX P1.12/D7)
-    // The board DTS leaves i2c0/spi0/spi1 disabled (shared instances).
-    i2c: {
-        controllers: [{ nodeLabel: 'i2c1' }],
-    },
-    spi: {
-        controllers: [{ nodeLabel: 'spi2' }],
-    },
-    uart: {
-        controllers: [{ nodeLabel: 'uart0' }],
-    },
-    // nRF52840 native USB device (USBD). The board DTS carries `zephyr_udc0`
-    // (the nRF USBD driver node); the overlay enables it + composes one CDC-ACM
-    // instance when a program uses USB0. (The console on this board is already
-    // USB-CDC via the board's own chosen cdc_acm_uart0 — this field exposes the
-    // same peripheral to usb.* HAL ops.)
-    usb: {
-        controller: 'zephyr_udc0',
-        cdcInstances: 1,
-    },
-    pwm: {
-        // pwm-led0 drives the board PWM LED (PWM_OUT0 on P0.17, inverted).
-        specs: [{ pin: 17, dtSpec: 'pwm-led0' }],
-    },
-    adc: {
-        // SAADC node is `adc`; no pre-declared channels. XIAO D0–D3 = AIN0–AIN3
-        // (P0.02/P0.03/P0.28/P0.29). Internal VREF ~0.6V with VDD/4 gain ⇒ 3000mV.
-        nodeLabel: 'adc',
-        resolution: 12,
-        vrefMv: 3000,
-        channels: [
-            { pin: 2, channel: 0 }, // P0.02 / D0 / AIN0
-            { pin: 3, channel: 1 }, // P0.03 / D1 / AIN1
-            { pin: 28, channel: 2 }, // P0.28 / D2 / AIN2
-            { pin: 29, channel: 3 }, // P0.29 / D3 / AIN3
-        ],
-    },
-    wdt: { nodeLabel: 'wdt0' },
-    // Hardware timer: nRF RTC1 is the free counter (RTC0 is kernel-owned by the
-    // softdevice/clock driver). The hwtimer lowering drives it as a Zephyr
-    // counter device (counter_start/stop + a top-value alarm for set_frequency).
-    // Verified against the nRF52840 SoC dtsi (rtc0/rtc1 nodes). The kernel uses
-    // RTC0 for the system tick; RTC1 is available for application use.
-    hwtimer: { controllers: [{ nodeLabel: 'rtc1' }] },
-    // Mirror of board-xiao-nrf52840's probeMethods (registry fallback parity —
-    // the board package's zephyr field wins when board constants are present).
-    probeMethods: [
-        { id: 'jlink', runner: 'jlink', description: 'J-Link probe (SWD)',
-            debug: true, debugInterface: 'swd', debugDevice: 'nRF52840_xxAA' },
-        { id: 'openocd', runner: 'openocd',
-            description: 'Any SWD probe openocd supports (CMSIS-DAP, cheap clones)',
-            debug: true, debugInterface: 'swd',
-            debugCfgSource: ['interface/stlink.cfg', 'target/nrf52.cfg'] },
-        { id: 'uf2', runner: 'uf2', description: 'Bootloader UF2 drag-and-drop: double-tap reset',
-            debug: false },
-    ],
-};

package/dist/lowering/power.d.ts

@@ -1,9 +0,0 @@
-import type { HALOpIR } from '@typecad/cuttlefish/api/shared';
-/**
- * Resolve a HAL power.* op to Zephyr C++.
- * Returns `{ code }` for statement ops, `{ expression }` for value-returning ops.
- */
-export declare function lowerPower(op: HALOpIR): {
-    code?: string;
-    expression?: string;
-};

package/dist/lowering/power.js

@@ -1,60 +0,0 @@
-// ---------------------------------------------------------------------------
-// Power lowering — Zephyr power management
-//
-// Zephyr enters low-power states from the idle thread per policy. The app-facing
-// controls are pm_state_force (override policy to force a state on next idle)
-// and k_sleep (block the calling thread, allowing the system to idle into a
-// low-power state). "Deep sleep" maps to k_sleep (the SoC picks its deepest
-// allowed state); "light sleep" best-effort forces SUSPEND_TO_IDLE.
-//
-// deep_sleep_pin configures the wake GPIO as an interrupt source then k_sleeps
-// (the interrupt wakes the SoC). CPU frequency is SoC-specific (nRF52 has a
-// fixed 64 MHz HFXO with no portable dynamic scaling) and stays a documented
-// no-op. deep_sleep_pin targets gpio0 (single-controller nRF52840 case);
-// multi-controller SoC routing is a documented follow-on.
-// ---------------------------------------------------------------------------
-/**
- * Resolve a HAL power.* op to Zephyr C++.
- * Returns `{ code }` for statement ops, `{ expression }` for value-returning ops.
- */
-export function lowerPower(op) {
-    const o = op;
-    switch (op.operation) {
-        case 'power.deep_sleep':
-            // Block for the requested duration; the idle thread + PM policy will enter
-            // the deepest state the SoC allows during the sleep.
-            return { code: `k_sleep(K_MSEC(${o.ms}));` };
-        case 'power.light_sleep':
-            // Best-effort: force a shallow suspend on the next idle. pm_state_force
-            // requires a pm_state_info; SUSPEND_TO_IDLE is a common shallow state.
-            return { code: `pm_state_force(0, &(const struct pm_state_info){ .state = PM_STATE_SUSPEND_TO_IDLE, .substate_id = 0 });` };
-        case 'power.deep_sleep_pin': {
-            // Configure the pin as a GPIO wake source (level interrupt), then k_sleep
-            // until the interrupt fires. A static gpio_callback + a no-op handler (the
-            // wake just needs the interrupt enabled; the handler does nothing). level:
-            // 1=high, 0=low. Targets gpio0 (single-controller nRF52840); multi-
-            // controller SoC routing is a documented follow-on.
-            const pin = o.pin;
-            const level = o.level;
-            const flags = level ? 'GPIO_INT_LEVEL_HIGH' : 'GPIO_INT_LEVEL_LOW';
-            return {
-                code: [
-                    '{',
-                    `    static struct gpio_callback __tc_wake_cb;`,
-                    `    const struct device* __dev = DEVICE_DT_GET(DT_NODELABEL(gpio0));`,
-                    `    gpio_pin_configure(__dev, ${pin}, GPIO_INPUT);`,
-                    `    gpio_init_callback(&__tc_wake_cb, [](const struct device*, struct gpio_callback*, gpio_port_pins_t) { (void)0; }, BIT(${pin}));`,
-                    `    gpio_add_callback(__dev, &__tc_wake_cb);`,
-                    `    gpio_pin_interrupt_configure(__dev, ${pin}, ${flags});`,
-                    `    k_sleep(K_FOREVER);`,
-                    `    gpio_pin_interrupt_configure(__dev, ${pin}, GPIO_INT_DISABLE);`,
-                    `    gpio_remove_callback(__dev, &__tc_wake_cb);`,
-                    '}',
-                ].join(' '),
-            };
-        }
-        default:
-            throw new Error(`framework-zephyr does not yet support HAL op \`${op.operation}\`. ` +
-                `Open an issue or use rawCpp() to emit it manually.`);
-    }
-}

package/dist/lowering/pulse.d.ts

@@ -1,7 +0,0 @@
-import type { HALOpIR } from '@typecad/cuttlefish/api/shared';
-import type { ZephyrChipDescriptor } from '../chips/types.js';
-/** Resolve a HAL pulse.* or shift.* op to Zephyr C++ (bit-bang). */
-export declare function lowerPulseOrShift(op: HALOpIR, chip: ZephyrChipDescriptor): {
-    code?: string;
-    expression?: string;
-};

package/dist/lowering/pulse.js

@@ -1,51 +0,0 @@
-// ---------------------------------------------------------------------------
-// Pulse + shift lowering — bit-bang via GPIO + timing
-//
-// pulse.in measures the duration of a pulse (HIGH or LOW) on a GPIO pin by
-// edge-polling with k_uptime_get. shift.out/in bit-bang a byte through a data
-// + clock pin pair using gpio_pin_set + k_busy_wait. These are software
-// implementations (no hardware pulse capture on nRF for the HAL surface); they
-// are correct but not high-precision.
-// ---------------------------------------------------------------------------
-import { controllerNodelabelForPin, controllerRawPinForPin } from '../chips/controllers.js';
-/** `DEVICE_DT_GET(DT_NODELABEL(<owning-controller>))` for a HAL pin. */
-function devForPin(chip, pin) {
-    return `DEVICE_DT_GET(DT_NODELABEL(${controllerNodelabelForPin(chip, pin)}))`;
-}
-/** Resolve a HAL pulse.* or shift.* op to Zephyr C++ (bit-bang). */
-export function lowerPulseOrShift(op, chip) {
-    const o = op;
-    switch (op.operation) {
-        case 'pulse.in': {
-            // Wait for the pin to reach `value`, then measure until it changes.
-            // Edge-poll with k_uptime_get() (ms granularity — coarse but correct,
-            // and 64-bit so it cannot wrap mid-measurement over ~49 days). The wait
-            // for the start edge is bounded by the timeout; the measurement of the
-            // pulse itself is intentionally unbounded (that IS the pulse length).
-            // Returns -1 (0) if the start edge never arrives within the timeout.
-            const pin = controllerRawPinForPin(chip, o.pin);
-            const want = o.value;
-            const dev = devForPin(chip, o.pin);
-            const timeout = o.timeout ?? 1_000_000; // default 1s in us
-            return {
-                expression: `({ int64_t __max = static_cast<int64_t>(${timeout} / 1000); int64_t __t0 = k_uptime_get(); bool __ok = true; while (gpio_pin_get_raw(${dev}, ${pin}) != ${want}) { if ((k_uptime_get() - __t0) > __max) { __ok = false; break; } } int32_t __ret = 0; if (__ok) { int64_t __start = k_uptime_get(); while (gpio_pin_get_raw(${dev}, ${pin}) == ${want}) { } __ret = static_cast<int32_t>((k_uptime_get() - __start) * 1000); } __ret; })`,
-            };
-        }
-        case 'pulse.in_long': {
-            // Same as pulse.in but for long pulses. Previously this spun forever
-            // with NO timeout (the comment claimed "no overflow concern" but the
-            // real risk was hanging the thread on a stuck pin). Apply the same
-            // timeout-bounded start-edge wait as pulse.in (bug Q5).
-            const pin = controllerRawPinForPin(chip, o.pin);
-            const want = o.value;
-            const dev = devForPin(chip, o.pin);
-            const timeout = o.timeout ?? 3_000_000; // default 3s in us (long pulses)
-            return {
-                expression: `({ int64_t __max = static_cast<int64_t>(${timeout} / 1000); int64_t __t0 = k_uptime_get(); bool __ok = true; while (gpio_pin_get_raw(${dev}, ${pin}) != ${want}) { if ((k_uptime_get() - __t0) > __max) { __ok = false; break; } } int32_t __ret = 0; if (__ok) { int64_t __start = k_uptime_get(); while (gpio_pin_get_raw(${dev}, ${pin}) == ${want}) { } __ret = static_cast<int32_t>((k_uptime_get() - __start) * 1000); } __ret; })`,
-            };
-        }
-        default:
-            throw new Error(`framework-zephyr does not yet support HAL op \`${op.operation}\`. ` +
-                `Open an issue or use rawCpp() to emit it manually.`);
-    }
-}

package/dist/lowering/tone.d.ts

@@ -1,10 +0,0 @@
-import type { HALOpIR } from '@typecad/cuttlefish/api/shared';
-import type { ZephyrChipDescriptor } from '../chips/types.js';
-/**
- * Resolve a HAL tone.* op to Zephyr C++ via PWM.
- * Returns `{ code }` for statement ops, `{ expression }` for value-returning ops.
- */
-export declare function lowerTone(op: HALOpIR, chip: ZephyrChipDescriptor): {
-    code?: string;
-    expression?: string;
-};