@typecad/expect 1.0.0-alpha.14 → 1.0.0-alpha.16

package/dist/host/runner.js

@@ -7,11 +7,13 @@
 import fs from 'node:fs';
 import path from 'node:path';
 import { findTestFiles } from './finder.js';
-import { preprocess, serialShim, zephyrShim } from './preprocessor.js';
-import { transpileTestFile, compileSketch, uploadSketch } from './compiler.js';
+import { preprocess, zephyrShim } from './preprocessor.js';
+import { transpileTestFile, compileProgram, uploadProgram } from './compiler.js';
 import { readSerialOutput } from './serial.js';
 import { parseProtocolLines } from './parser.js';
 import { reportFileResult, reportSummary } from './reporter.js';
+import { boardTestPins, testPinsRolesOf, buildTestPinsSubstitutions } from './test-pins.js';
+import { resolveUsbPort, waitForUsbPort, formatUsbIdentity, } from './port-discovery.js';
 // ---------------------------------------------------------------------------
 // ANSI codes (for inline progress messages)
 // ---------------------------------------------------------------------------
@@ -19,14 +21,6 @@ const DIM = '\x1b[2m';
 const RESET = '\x1b[0m';
 const CYAN = '\x1b[36m';
 const YELLOW = '\x1b[33m';
-// ---------------------------------------------------------------------------
-// Public API
-// ---------------------------------------------------------------------------
-/**
- * Run all test files matching the configuration.
- *
- * @returns Exit code: 0 = all passed, 1 = failures, 2 = error.
- */
 export async function run(config) {
     const startTime = Date.now();
     // 1. Discover test files
@@ -36,11 +30,53 @@ export async function run(config) {
         return 0;
     }
     console.log(`${DIM}Found ${testFiles.length} test file${testFiles.length !== 1 ? 's' : ''}${RESET}`);
+    // 2. Resolve the board's USB identity and an initial upload port.
+    const ctx = {
+        boardPins: boardTestPins(config.board, config.projectRoot, config.configPath),
+        usbIdentity: config.test.usb ?? ctxBoardUsb(config),
+        uploadPort: config.test.port,
+    };
+    if (ctx.usbIdentity) {
+        console.log(`${DIM}usb identity ${formatUsbIdentity(ctx.usbIdentity)}${RESET}`);
+        const resolved = await resolveUsbPort(ctx.usbIdentity);
+        if (resolved.port) {
+            if (resolved.port !== ctx.uploadPort) {
+                console.log(`${DIM}console port resolved: ${resolved.port}${RESET}`);
+            }
+            ctx.uploadPort = resolved.port;
+        }
+        else if (config.test.port) {
+            // Bootstrap/fallback: the currently-flashed firmware may predate this
+            // board's PID assignment (or a clone bridge may report a different
+            // VID/PID). The post-upload re-resolve will pick the identity up.
+            console.log(`${YELLOW}${resolved.error}${RESET}`);
+            console.log(`${YELLOW}falling back to configured port ${config.test.port}${RESET}`);
+        }
+        // west + CDC boards flash via a debug probe, not the console port — the
+        // port arrives from the post-flash re-enumeration below.
+    }
     console.log();
-    // 2. Process each file sequentially (one compile/upload cycle per file)
+    // 3. Process each file sequentially (one compile/upload cycle per file)
     const fileResults = [];
+    const MAX_FILE_RETRIES = 2;
     for (const filePath of testFiles) {
-        const result = await processTestFile(filePath, config);
+        let result = await processTestFile(filePath, config, ctx);
+        // Nightly-rig hardening: transient hardware glitches fail a file even
+        // though the board is fine — a USB console dropout mid-read loses the
+        // protocol lines, debug-probe flashes occasionally fail target
+        // examination (OpenOCD "Failed to read memory at 0xe000ed04" under
+        // repeated SWD cycles), and a port open right after a failed-flash retry
+        // can hit a briefly held handle ("access denied"). A fresh
+        // compile/upload/read cycle per file recovers all of these without
+        // masking persistent failures (those fail every retry).
+        const transientPattern = /Timeout after|Serial error|did not re-appear|west flash failed|Upload failed|Failed to open|Access denied/;
+        for (let tries = 0; tries < MAX_FILE_RETRIES; tries++) {
+            if (!result.error || !transientPattern.test(result.error) || !ctx.usbIdentity)
+                break;
+            const cause = result.error.split('\n').find((l) => l.trim().length > 0) ?? result.error;
+            console.log(`${YELLOW}transient console loss (${cause.trim()}) — retrying ${path.relative(config.projectRoot, filePath)} (${tries + 1}/${MAX_FILE_RETRIES})${RESET}`);
+            result = await processTestFile(filePath, config, ctx);
+        }
         fileResults.push(result);
         reportFileResult(result, { verbose: config.test.verbose });
         // --bail: stop after the first file that fails to compile/upload or has a
@@ -50,19 +86,24 @@ export async function run(config) {
             break;
         }
     }
-    // 3. Aggregate results
+    // 4. Aggregate results
     const runResult = aggregateResults(fileResults, Date.now() - startTime);
-    // 4. Final summary
+    // 5. Final summary
     reportSummary(runResult, {
         board: config.board,
-        port: config.test.port,
+        port: ctx.uploadPort,
     });
     return (runResult.totalFailed > 0 || runResult.totalErrors > 0) ? 1 : 0;
 }
+/** The board's test-pins.json usb block, when present. */
+function ctxBoardUsb(config) {
+    const usb = boardTestPins(config.board, config.projectRoot, config.configPath)?.usb;
+    return usb ? { ...usb } : undefined;
+}
 // ---------------------------------------------------------------------------
 // Internal — Process a single test file through the full pipeline
 // ---------------------------------------------------------------------------
-async function processTestFile(filePath, config) {
+async function processTestFile(filePath, config, ctx) {
     const startTime = Date.now();
     const relativePath = path.relative(config.projectRoot, filePath);
     // Read source
@@ -77,20 +118,28 @@ async function processTestFile(filePath, config) {
     if (skipReason) {
         return skippedResult(relativePath, skipReason, startTime);
     }
-    // Validate port only for files that will actually compile/upload. This lets
-    // target-incompatible files be skipped without requiring hardware to be
-    // connected, and lets --dry-run run without any port (it stops after compile).
-    if (!config.test.port && !config.dryRun) {
-        return errorResult(filePath, 'No serial port specified. Use --port <port> or set test.port in cuttlefish.config.ts', startTime);
+    // The board's test-pins data: role gating for the skip check,
+    // substitutions for the preprocessor.
+    const testPinsData = ctx.boardPins;
+    const missingRolesReason = checkRequiredRoles(source, config, testPinsData);
+    if (missingRolesReason) {
+        return skippedResult(relativePath, missingRolesReason, startTime);
+    }
+    // Validate port only for files that will actually compile/upload. A USB
+    // identity satisfies this (the port resolves after upload for CDC boards);
+    // target-incompatible files still skip without hardware; --dry-run stops
+    // after compile and needs no port at all.
+    if (!ctx.uploadPort && !ctx.usbIdentity && !config.dryRun) {
+        return errorResult(filePath, 'No serial port specified. Use --port <port>, set test.port, or set test.usb in cuttlefish.config.ts', startTime);
     }
     console.log(`${CYAN}●${RESET} ${relativePath}`);
-    // Step 1: Preprocess
+    // Step 1: Preprocess (with test-pin role substitution for this board)
     console.log(`  ${DIM}preprocessing...${RESET}`);
     let preprocessed;
     try {
         preprocessed = preprocess(source, path.basename(filePath), {
-            isAvr: config.target === 'avr' || config.target === 'megaavr',
-            shim: config.toolchainType === 'west' ? zephyrShim : serialShim,
+            shim: zephyrShim,
+            testPins: testPinsData ? buildTestPinsSubstitutions(testPinsData) : undefined,
         });
     }
     catch (e) {
@@ -98,13 +147,13 @@ async function processTestFile(filePath, config) {
     }
     // Step 2: Transpile to C++
     console.log(`  ${DIM}transpiling...${RESET}`);
-    const transpileResult = transpileTestFile(preprocessed, filePath, config.projectRoot, config.buildTarget, config.toolchainType, config.configPath);
+    const transpileResult = transpileTestFile(preprocessed, filePath, config.projectRoot, config.buildTarget, config.configPath);
     if (!transpileResult.success) {
         return errorResult(filePath, transpileResult.error ?? 'Transpilation failed', startTime);
     }
-    // Step 3: Compile via the configured toolchain (arduino-cli or west)
+    // Step 3: Compile via west (through the Zephyr Toolchain)
     console.log(`  ${DIM}compiling...${RESET}`);
-    const compileResult = compileSketch(transpileResult.sketchDir, config.buildTarget, config.framework, config.toolchainType, config.zephyrConfig);
+    const compileResult = compileProgram(transpileResult.projectDir, config.buildTarget, config.zephyrConfig);
     if (!compileResult.success) {
         return errorResult(filePath, compileResult.error ?? 'Compilation failed', startTime);
     }
@@ -115,15 +164,49 @@ async function processTestFile(filePath, config) {
         console.log(`  ${DIM}compiled (dry-run, skipping upload and tests)${RESET}`);
         return { filePath: relativePath, describes: [], passed: true, durationMs, debugOutput: [], compiled: true };
     }
-    // Step 4: Upload via the configured toolchain
-    console.log(`  ${DIM}uploading to ${config.test.port}...${RESET}`);
-    const uploadResult = uploadSketch(transpileResult.sketchDir, config.buildTarget, config.test.port, config.framework, config.toolchainType, config.zephyrConfig);
+    // Step 4: Upload via the configured toolchain. With a USB identity active,
+    // refresh the resolved port first — a mid-run dropout can leave the
+    // threaded port stale (matters for bridge uploads; probes ignore it).
+    if (ctx.usbIdentity && ctx.uploadPort) {
+        const fresh = await resolveUsbPort(ctx.usbIdentity);
+        if (fresh.port && fresh.port !== ctx.uploadPort) {
+            console.log(`  ${DIM}console port re-resolved: ${fresh.port}${RESET}`);
+            ctx.uploadPort = fresh.port;
+        }
+    }
+    console.log(`  ${DIM}uploading${ctx.uploadPort ? ` to ${ctx.uploadPort}` : ''}...${RESET}`);
+    const uploadResult = uploadProgram(transpileResult.projectDir, config.buildTarget, ctx.uploadPort, config.zephyrConfig);
     if (!uploadResult.success) {
         return errorResult(filePath, uploadResult.error ?? 'Upload failed', startTime);
     }
+    // Step 4b: Re-resolve the console port. CDC consoles re-enumerate after a
+    // flash and may return under a different COM/tty number; bridge boards
+    // (Uno/ESP32 devkits) keep their port. The identity-based lookup settles
+    // after serialOpenDelay and then polls briefly for the re-enumeration.
+    let readPort = ctx.uploadPort;
+    let readOpenDelay = config.test.serialOpenDelay;
+    if (ctx.usbIdentity) {
+        console.log(`  ${DIM}waiting for ${formatUsbIdentity(ctx.usbIdentity)} to re-enumerate...${RESET}`);
+        const settled = await waitForUsbPort(ctx.usbIdentity, config.test.serialOpenDelay ?? 500);
+        if (settled) {
+            if (settled !== readPort) {
+                console.log(`  ${DIM}console port re-resolved: ${settled}${RESET}`);
+            }
+            readPort = settled;
+            ctx.uploadPort = settled;
+            // The settle wait above already covered the open delay.
+            readOpenDelay = 250;
+        }
+        else if (readPort) {
+            console.log(`${YELLOW}USB port for ${formatUsbIdentity(ctx.usbIdentity)} did not re-appear — reading ${readPort}${RESET}`);
+        }
+        else {
+            return errorResult(filePath, `USB port for ${formatUsbIdentity(ctx.usbIdentity)} did not re-appear after upload`, startTime);
+        }
+    }
     // Step 5: Read serial output
     console.log(`  ${DIM}reading serial output...${RESET}`);
-    const serialResult = await readSerialOutput(config.test.port, config.test.baudRate, config.test.timeout, config.test.serialOpenDelay, { resetAfterOpen: config.test.resetAfterOpen ?? config.target === 'esp32' });
+    const serialResult = await readSerialOutput(readPort ?? '', config.test.baudRate, config.test.timeout, readOpenDelay, { resetAfterOpen: config.test.resetAfterOpen ?? config.target === 'esp32' });
     if (serialResult.error && !serialResult.completed) {
         return errorResult(filePath, serialResult.error, startTime);
     }
@@ -197,6 +280,31 @@ function aggregateResults(files, durationMs) {
         durationMs,
     };
 }
+/**
+ * Skip files whose required test-pins roles are not provided by the
+ * configured board. Directive form (roles from test-pins.json schema):
+ *   // @typecad-requires-roles pwm, pwmAlt
+ */
+function checkRequiredRoles(source, config, testPinsData) {
+    const match = source.match(/@typecad-requires-roles\s+([A-Za-z0-9_,\s]+)/);
+    if (!match)
+        return undefined;
+    const required = match[1]
+        .split(/[,\s]+/)
+        .map(r => r.trim())
+        .filter(Boolean);
+    if (required.length === 0)
+        return undefined;
+    if (!testPinsData) {
+        return `${config.board} ships no test-pins.json — cannot provide roles: ${required.join(', ')}`;
+    }
+    const roles = testPinsRolesOf(testPinsData);
+    const missing = required.filter(role => !roles.has(role));
+    if (missing.length > 0) {
+        return `board ${config.board} does not provide test-pins role(s): ${missing.join(', ')}`;
+    }
+    return undefined;
+}
 function getSkipReason(source, relativePath, config) {
     const excludedByConfig = config.test.exclude?.find(pattern => matchesTestPattern(relativePath, pattern));
     if (excludedByConfig) {

package/dist/host/serial.js

@@ -26,7 +26,12 @@ export async function readSerialOutput(port, baudRate, timeoutMs, serialOpenDela
     return new Promise((resolve) => {
         let resolved = false;
         const cleanup = (callback) => {
+            // Strip the data/close listeners, but keep (re-attach) a no-op error
+            // handler: a USB dropout mid-close emits 'error' after the removal,
+            // and an 'error' event with no listener throws and kills the process
+            // — the exact failure a nightly rig must survive.
             sp.removeAllListeners();
+            sp.on('error', () => { });
             if (sp.isOpen) {
                 sp.close(() => callback());
             }
@@ -112,18 +117,34 @@ export async function readSerialOutput(port, baudRate, timeoutMs, serialOpenDela
             finish(completed ? undefined : `Timeout after ${timeoutMs}ms — no [TC:SUITE_END] received`);
         }, timeoutMs);
         sp.on('data', handleChunk);
-        sp.on('error', (err) => {
-            finish(`Serial error: ${err.message}`);
-        });
-        // Give the device time to reset after upload (Arduino resets on serial open)
-        setTimeout(() => {
+        // A CDC console that just re-enumerated after a flash can be LISTED but
+        // not yet OPENABLE for several seconds — Windows usbser returns
+        // SetCommState error 31 while the PDO/driver state from the flash-cycle
+        // detach/attach settles. Retry the open generously (the firmware's boot
+        // DTR-wait holds all protocol output until the host opens, so a long
+        // window loses nothing).
+        const OPEN_RETRIES = 16;
+        const OPEN_RETRY_MS = 750;
+        let openRetriesLeft = OPEN_RETRIES;
+        const tryOpen = () => {
             sp.open((err) => {
-                if (err) {
-                    finish(`Failed to open ${port}: ${err.message}`);
+                if (!err) {
+                    // Only now can open-lifecycle errors surface as events (open
+                    // failures above arrive via the callback, not 'error').
+                    sp.on('error', (err) => {
+                        finish(`Serial error: ${err.message}`);
+                    });
+                    resetBoard();
+                    return;
+                }
+                if (openRetriesLeft-- > 0) {
+                    setTimeout(tryOpen, OPEN_RETRY_MS);
                     return;
                 }
-                resetBoard();
+                finish(`Failed to open ${port}: ${err.message}`);
             });
-        }, serialOpenDelay);
+        };
+        // Give the device time to reset after upload (many boards reset on serial open)
+        setTimeout(tryOpen, serialOpenDelay);
     });
 }

package/dist/host/test-pins.d.ts

@@ -0,0 +1,37 @@
+/** Pin role -> role const name used in test sources. */
+export declare const PIN_ROLE_CONSTS: Record<string, string>;
+/** Fact role -> fact const name used in test sources. */
+export declare const FACT_ROLE_CONSTS: Record<string, string>;
+export interface TestPinsData {
+    pins?: Record<string, string | string[]>;
+    facts?: Record<string, number>;
+    /**
+     * USB identity for port discovery — how a multi-board rig finds this
+     * board's console/upload port without tracking COM/tty numbers. Zephyr
+     * CDC boards carry their per-board PID here (matching zephyr.usb.vid/pid
+     * in the board package); UART-bridge boards carry the bridge chip's ID
+     * (Uno 16U2 2341:0043, ESP32 DevKitC CP2102 10C4:EA60).
+     */
+    usb?: {
+        vid: string;
+        pid: string;
+        serial?: string;
+    };
+}
+/**
+ * Substitution map handed to the preprocessor: role const name -> the
+ * TypeScript text that replaces it (a pin symbol, an array literal of pin
+ * symbols, or a numeric literal).
+ */
+export type TestPinsSubstitutions = Map<string, string>;
+export declare function buildTestPinsSubstitutions(data: TestPinsData): TestPinsSubstitutions;
+/** Roles (pin + fact keys) the data provides, for requires-roles gating. */
+export declare function testPinsRolesOf(data: TestPinsData): Set<string>;
+/**
+ * Load the project's test-pins.json. A file co-located with the chosen
+ * cuttlefish.config.ts wins (boards/<name>/test-pins.json — one pins set per
+ * board config in a multi-board project); the project root is the fallback
+ * (and the location for single-board projects). Returns undefined when
+ * neither exists.
+ */
+export declare function boardTestPins(_board: string, projectRoot: string, configPath?: string): TestPinsData | undefined;

package/dist/host/test-pins.js

@@ -0,0 +1,105 @@
+// ---------------------------------------------------------------------------
+// @typecad/expect — Board test-pins resolution
+//
+// Boards ship a declarative test-pins.json next to their package.json (see
+// @typecad/cuttlefish src/transpile/test-pins.ts for the schema). Suites
+// import stable role names from '@typecad/test-pins' and declare what they
+// need with a `// @typecad-requires-roles pwm, cs` comment:
+//
+//   - The runner skips files whose board cannot provide the required roles.
+//   - The preprocessor substitutes every role identifier in the test source
+//     with the board's real pin symbol (facts become numeric literals) and
+//     rewrites the import to '@typecad/board' — the exact lowering path
+//     hand-written per-board tests use, so the transpiler's HAL metadata
+//     resolution sees the same source it always has.
+// ---------------------------------------------------------------------------
+import fs from 'node:fs';
+import path from 'node:path';
+/** Pin role -> role const name used in test sources. */
+export const PIN_ROLE_CONSTS = {
+    gpioOut: 'GPIO_OUT',
+    gpioIn: 'GPIO_IN',
+    pwm: 'PWM_PIN',
+    pwmAlt: 'PWM_ALT',
+    adcPin: 'ADC_PIN',
+    adcPinAlt: 'ADC_PIN_ALT',
+    cs: 'CS_PIN',
+    interrupt: 'INT_PIN',
+    led: 'LED_PIN',
+    button: 'BUTTON_PIN',
+    i2cBus: 'I2C_BUS',
+};
+/** Fact role -> fact const name used in test sources. */
+export const FACT_ROLE_CONSTS = {
+    adcMax: 'ADC_MAX',
+};
+export function buildTestPinsSubstitutions(data) {
+    const substitutions = new Map();
+    for (const [role, constName] of Object.entries(PIN_ROLE_CONSTS)) {
+        const value = data.pins?.[role];
+        if (value === undefined)
+            continue;
+        if (Array.isArray(value)) {
+            if (value.length > 0)
+                substitutions.set(constName, `[${value.join(', ')}]`);
+        }
+        else if (typeof value === 'string') {
+            substitutions.set(constName, value);
+        }
+    }
+    for (const [role, constName] of Object.entries(FACT_ROLE_CONSTS)) {
+        const value = data.facts?.[role];
+        if (typeof value === 'number' && Number.isFinite(value)) {
+            substitutions.set(constName, String(value));
+        }
+    }
+    return substitutions;
+}
+/** Roles (pin + fact keys) the data provides, for requires-roles gating. */
+export function testPinsRolesOf(data) {
+    const roles = new Set();
+    for (const key of Object.keys(data.pins ?? {}))
+        roles.add(key);
+    for (const key of Object.keys(data.facts ?? {}))
+        roles.add(key);
+    return roles;
+}
+/** Locate a workspace/npm package directory by walking node_modules upward. */
+function findPackageDir(fromDir, packageName) {
+    let searchDir = path.resolve(fromDir);
+    for (let i = 0; i < 8; i++) {
+        const candidate = path.join(searchDir, 'node_modules', ...packageName.split('/'));
+        if (fs.existsSync(path.join(candidate, 'package.json'))) {
+            return candidate;
+        }
+        const parent = path.dirname(searchDir);
+        if (parent === searchDir)
+            break;
+        searchDir = parent;
+    }
+    return undefined;
+}
+/**
+ * Load the project's test-pins.json. A file co-located with the chosen
+ * cuttlefish.config.ts wins (boards/<name>/test-pins.json — one pins set per
+ * board config in a multi-board project); the project root is the fallback
+ * (and the location for single-board projects). Returns undefined when
+ * neither exists.
+ */
+export function boardTestPins(_board, projectRoot, configPath) {
+    void _board;
+    const candidates = configPath
+        ? [path.join(path.dirname(configPath), 'test-pins.json'), path.join(projectRoot, 'test-pins.json')]
+        : [path.join(projectRoot, 'test-pins.json')];
+    for (const jsonPath of candidates) {
+        if (!fs.existsSync(jsonPath))
+            continue;
+        try {
+            return JSON.parse(fs.readFileSync(jsonPath, 'utf8'));
+        }
+        catch {
+            // Malformed JSON — try the next candidate.
+        }
+    }
+    return undefined;
+}

package/dist/host/types.d.ts

@@ -94,6 +94,17 @@ export interface TestConfig {
     exclude?: string[];
     /** Serial port (e.g. `'COM3'`, `'/dev/ttyACM0'`). */
     port: string;
+    /**
+     * USB identity for port discovery — resolves the port by VID/PID (+
+     * optional serial) instead of a hardcoded path. When set, the port is
+     * re-resolved after every upload, surviving CDC re-enumeration. The
+     * board's test-pins.json may carry the same block; the config wins.
+     */
+    usb?: {
+        vid: string;
+        pid: string;
+        serial?: string;
+    };
     /** Serial baud rate. Default: `115200`. */
     baudRate: number;
     /** Timeout in ms waiting for SUITE_END. Default: `30000`. */
@@ -118,10 +129,8 @@ export interface ResolvedConfig {
     buildTarget: string;
     board: string;
     target: string;
-    /** Framework package name, e.g. "@typecad/framework-avr". */
+    /** Framework package name, e.g. "@typecad/framework-zephyr". */
     framework?: string;
-    /** Toolchain type from config: 'arduino-cli' (default) or 'west' (Zephyr). */
-    toolchainType: 'arduino-cli' | 'west';
     /** Zephyr-specific config (kconfig, etc.) from cuttlefish.config.ts. */
     zephyrConfig?: Record<string, unknown>;
     /** Absolute path to project root. */

package/dist/index.d.ts

@@ -1,2 +1,2 @@
-export type { Suite, Expectation, StringExpectation } from './types.js';
+export type { Suite } from './types.js';
 export { describe, done } from './stubs.js';

package/package.json

@@ -1,6 +1,6 @@
 {
   "name": "@typecad/expect",
-  "version": "1.0.0-alpha.14",
+  "version": "1.0.0-alpha.16",
   "description": "Hardware test framework for TypeCAD — vitest-style assertions over serial",
   "type": "module",
   "main": "./dist/index.js",
@@ -40,11 +40,10 @@
   "dependencies": {
     "typescript": "^5.7.3",
     "serialport": "^13.0.0",
-    "@typecad/arduino-cli": "1.0.0-alpha.14",
-    "@typecad/hal": "1.0.0-alpha.14"
+    "@typecad/hal": "1.0.0-alpha.16"
   },
   "optionalDependencies": {
-    "@typecad/framework-zephyr": "1.0.0-alpha.14"
+    "@typecad/framework-zephyr": "1.0.0-alpha.16"
   },
   "devDependencies": {
     "@types/node": "^22.10.7"
@@ -63,7 +62,6 @@
     "url": "https://github.com/justind000/typecode/issues"
   },
   "keywords": [
-    "arduino",
     "cpp",
     "cuttlefish",
     "embedded",
@@ -74,7 +72,8 @@
     "test-framework",
     "testing",
     "typecad",
-    "typescript"
+    "typescript",
+    "zephyr"
   ],
   "engines": {
     "node": ">=22.11.0"