@tscircuit/schematic-trace-solver 0.0.184 → 0.0.186
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/dist/index.d.ts +10 -0
- package/dist/index.js +105 -12
- package/lib/solvers/AvailableNetOrientationSolver/AvailableNetOrientationSolver.ts +129 -10
- package/lib/solvers/UnroutedTraceRecoverySolver/UnroutedTraceRecoverySolver.ts +12 -4
- package/package.json +1 -1
- package/site/bug-reports/bug-report-20260905T041712Z.page.tsx +4 -0
- package/tests/bug-reports/bug-report-20260707T092615Z/__snapshots__/bug-report-20260707T092615Z.snap.svg +524 -533
- package/tests/bug-reports/bug-report-20260901T064117Z/__snapshots__/bug-report-20260901T064117Z.snap.svg +59 -71
- package/tests/bug-reports/bug-report-20260902T092425Z/__snapshots__/bug-report-20260902T092425Z.snap.svg +28 -28
- package/tests/bug-reports/bug-report-20260902T092425Z/bug-report-20260902T092425Z.test.ts +39 -0
- package/tests/bug-reports/bug-report-20260905T041712Z/__snapshots__/bug-report-20260905T041712Z.snap.svg +546 -0
- package/tests/bug-reports/bug-report-20260905T041712Z/bug-report-20260905T041712Z.json +2023 -0
- package/tests/bug-reports/bug-report-20260905T041712Z/bug-report-20260905T041712Z.test.ts +33 -0
- package/tests/repros/__snapshots__/repro-trellis-core-gnd-net-label-overlap.snap.svg +59 -71
- package/tests/repros/repro-trellis-core-gnd-net-label-overlap.test.ts +58 -13
- package/tests/solvers/UnroutedTraceRecoverySolver/local-elbow-obstacles.test.ts +74 -0
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import { expect, test } from "bun:test"
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import { SchematicTracePipelineSolver } from "lib/solvers/SchematicTracePipelineSolver/SchematicTracePipelineSolver"
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import { getPathLength } from "lib/solvers/Example28Solver/geometry"
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import type { InputProblem } from "lib/types/InputProblem"
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import inputProblem from "./bug-report-20260905T041712Z.json"
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import "tests/fixtures/matcher"
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test("bug-report-20260905T041712Z", () => {
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const solver = new SchematicTracePipelineSolver(inputProblem as InputProblem)
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solver.solve()
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expect(solver.solved).toBe(true)
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for (const mspPairId of [
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"schematic_port_98-schematic_port_123",
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"schematic_port_101-schematic_port_125",
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]) {
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const recoveredTrace =
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solver.unroutedTraceRecoverySolver!.solvedUnroutedTraces.find(
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(trace) => trace.mspPairId === mspPairId,
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)
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expect(recoveredTrace).toBeDefined()
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expect(getPathLength(recoveredTrace!.tracePath)).toBeCloseTo(0.8)
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const finalTrace = solver
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.netLabelToTraceSolver!.getOutput()
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.traces.find((trace) => trace.mspPairId === mspPairId)
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expect(finalTrace).toBeDefined()
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expect(getPathLength(finalTrace!.tracePath)).toBeCloseTo(0.8)
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}
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expect(solver).toMatchSolverSnapshot(import.meta.path)
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})
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<svg width="1200" height="2016" viewBox="0 0 1200 2016" xmlns="http://www.w3.org/2000/svg" role="img" aria-label="Solver debug visualization on top and Circuit JSON schematic on the bottom">
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globalConnNetId:
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globalConnNetId:
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globalConnNetId:
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globalConnNetId:
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globalConnNetId: connectivity_net2" data-x="
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globalConnNetId:
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// Calculate real coordinates using inverse transformation
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const matrix = {"a":47.945205479452056,"c":0,"e":131.0958904109589,"b":0,"d":-47.945205479452056,"f":
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const matrix = {"a":47.945205479452056,"c":0,"e":131.0958904109589,"b":0,"d":-47.945205479452056,"f":410.13698630136986};
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" fill="rgba(255, 255, 255, 0.6)" stroke="rgb(132, 0, 0)" stroke-width="1.72972972973px"/><text class="net-label-text sch-net-label-text" data-circuit-json-type="schematic_net_label" data-schematic-net-label-id="schematic_net_label_6__stack1" x="1032.2162162163" y="610.594594594645" fill="rgb(132, 0, 0)" text-anchor="start" dominant-baseline="central" font-family="sans-serif" font-variant-numeric="tabular-nums" font-size="15.567567567569998px" transform="rotate(-90 1032.2162162163 610.594594594645)">XX</text><text class="sch-text" x="160.43243243238" y="748.972972973045" fill="#7e22ce" text-anchor="middle" dominant-baseline="middle" font-family="sans-serif" font-size="15.567567567569998px" transform="rotate(0, 160.43243243238, 748.972972973045)">T113-S3</text><text class="sch-text" x="134.48648648643" y="381.8378378378525" fill="#7e22ce" text-anchor="middle" dominant-baseline="middle" font-family="sans-serif" font-size="15.567567567569998px" transform="rotate(0, 134.48648648643, 381.8378378378525)">U3</text><text class="sch-text" x="444.10810810810005" y="598.486486486535" fill="#047857" text-anchor="middle" dominant-baseline="middle" font-family="sans-serif" font-size="10.378378378379999px" transform="rotate(0, 444.10810810810005, 598.486486486535)">XXXX</text><text class="sch-text" x="936.2162162162849" y="73.51351351348" fill="#047857" text-anchor="middle" dominant-baseline="middle" font-family="sans-serif" font-size="10.378378378379999px" transform="rotate(-90, 936.2162162162849, 73.51351351348)">XXXX</text><rect class="schematic-box sch-box" x="124.10810810805" y="741.1891891892599" width="72.64864864865999" height="15.567567567570109" stroke-width="1.72972972973px" stroke="rgb(132, 0, 0)" fill="transparent" stroke-dasharray="13.83783783784 6.91891891892"/><rect class="schematic-box sch-box" x="118.91891891886002" y="371.02702702703994" width="31.13513513514002" height="21.621621621625025" stroke-width="1.72972972973px" stroke="rgb(132, 0, 0)" fill="transparent" stroke-dasharray="13.83783783784 6.91891891892"/>
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133
121
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</g>
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134
122
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</svg>
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@@ -25,14 +25,10 @@ const getOverlapArea = (
|
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25
25
|
}
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26
26
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|
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27
27
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// Captured from @tscircuit/core repro175. The dense T113 analog-pin column
|
|
28
|
-
//
|
|
29
|
-
//
|
|
30
|
-
//
|
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31
|
-
|
|
32
|
-
//
|
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33
|
-
// This test pins the current buggy output. A fix should change the two positive
|
|
34
|
-
// overlap assertions to expect 0 and update the visual snapshot.
|
|
35
|
-
test("repro Trellis Core GND label overlaps VRA2 and P1V8", () => {
|
|
28
|
+
// initially leaves Net_U3F_VRA2 in the pin-facing x+ orientation. The
|
|
29
|
+
// orientation solver must restore its y+ rail constraint and keep GND clear of
|
|
30
|
+
// VRA2 and P1V8 without widening the horizontal label placement.
|
|
31
|
+
test("keeps Trellis Core GND clear of adjacent analog net labels", () => {
|
|
36
32
|
const solver = new SchematicTracePipelineSolver(inputProblem as InputProblem)
|
|
37
33
|
|
|
38
34
|
solver.solve()
|
|
@@ -59,15 +55,64 @@ test("repro Trellis Core GND label overlaps VRA2 and P1V8", () => {
|
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|
59
55
|
expect(p1v8Label).toBeDefined()
|
|
60
56
|
expect(groundLabel).toBeDefined()
|
|
61
57
|
expect(vra2Label).toMatchObject({
|
|
62
|
-
orientation: "
|
|
63
|
-
width:
|
|
64
|
-
height: 0.
|
|
58
|
+
orientation: "y+",
|
|
59
|
+
width: 1.56,
|
|
60
|
+
height: 0.42,
|
|
65
61
|
})
|
|
62
|
+
expect(groundLabel.orientation).toBe("y-")
|
|
66
63
|
expect(
|
|
67
64
|
getOverlapArea(getLabelBounds(groundLabel), getLabelBounds(vra2Label)),
|
|
68
|
-
).
|
|
65
|
+
).toBe(0)
|
|
69
66
|
expect(
|
|
70
67
|
getOverlapArea(getLabelBounds(groundLabel), getLabelBounds(p1v8Label)),
|
|
71
|
-
).
|
|
68
|
+
).toBe(0)
|
|
72
69
|
expect(solver).toMatchSolverSnapshot(import.meta.path)
|
|
73
70
|
})
|
|
71
|
+
|
|
72
|
+
test("converts both Trellis Core P1V8 endpoints after clearing label collisions", () => {
|
|
73
|
+
const solver = new SchematicTracePipelineSolver(inputProblem as InputProblem)
|
|
74
|
+
|
|
75
|
+
solver.solve()
|
|
76
|
+
|
|
77
|
+
// The U3-side VRA2 label previously overlapped the inline P1V8 text. That
|
|
78
|
+
// blocked conversion of both endpoints, including the distant upward pin.
|
|
79
|
+
const output = solver.netLabelToTraceSolver!.getOutput()
|
|
80
|
+
const inlineP1v8Labels = output.inlineNetLabelPlacements.filter(
|
|
81
|
+
(label) => label.netId === "P1V8",
|
|
82
|
+
)
|
|
83
|
+
expect(inlineP1v8Labels).toHaveLength(2)
|
|
84
|
+
expect(inlineP1v8Labels).toEqual(
|
|
85
|
+
expect.arrayContaining([
|
|
86
|
+
expect.objectContaining({ pinIds: ["schematic_port_0"], axis: "x" }),
|
|
87
|
+
expect.objectContaining({ pinIds: ["schematic_port_10"], axis: "y" }),
|
|
88
|
+
]),
|
|
89
|
+
)
|
|
90
|
+
expect(
|
|
91
|
+
output.netLabelPlacements.some((label) => label.netId === "P1V8"),
|
|
92
|
+
).toBe(false)
|
|
93
|
+
for (const label of inlineP1v8Labels) {
|
|
94
|
+
const pin = inputProblem.chips
|
|
95
|
+
.flatMap((chip) => chip.pins)
|
|
96
|
+
.find((pin) => pin.pinId === label.pinIds[0])!
|
|
97
|
+
expect(label.stubTracePath?.[0]).toEqual({ x: pin.x, y: pin.y })
|
|
98
|
+
}
|
|
99
|
+
})
|
|
100
|
+
|
|
101
|
+
test("keeps Trellis Core P1V8 anchored when inline labels are disabled", () => {
|
|
102
|
+
const problem = structuredClone(inputProblem) as InputProblem
|
|
103
|
+
problem.netConnections.find(
|
|
104
|
+
(connection) => connection.netId === "P1V8",
|
|
105
|
+
)!.allowInlineNetLabel = false
|
|
106
|
+
const solver = new SchematicTracePipelineSolver(problem)
|
|
107
|
+
|
|
108
|
+
solver.solve()
|
|
109
|
+
|
|
110
|
+
const output = solver.netLabelToTraceSolver!.getOutput()
|
|
111
|
+
expect(output.inlineNetLabelPlacements).toHaveLength(0)
|
|
112
|
+
expect(
|
|
113
|
+
output.netLabelPlacements
|
|
114
|
+
.filter((label) => label.netId === "P1V8")
|
|
115
|
+
.flatMap((label) => label.pinIds)
|
|
116
|
+
.sort(),
|
|
117
|
+
).toEqual(["schematic_port_0", "schematic_port_10"])
|
|
118
|
+
})
|