@tscircuit/schematic-trace-solver 0.0.113 → 0.0.115
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/dist/index.d.ts +7 -8
- package/dist/index.js +101 -7
- package/lib/solvers/LongDistancePairSolver/LongDistancePairSolver.ts +55 -1
- package/lib/solvers/MspConnectionPairSolver/MspConnectionPairSolver.ts +13 -4
- package/lib/solvers/MspConnectionPairSolver/isLabeledPeripheralConnection.ts +44 -0
- package/lib/solvers/SchematicTraceLinesSolver/SchematicTraceSingleLineSolver2/SchematicTraceSingleLineSolver2.ts +9 -9
- package/lib/solvers/SchematicTraceLinesSolver/SchematicTraceSingleLineSolver2/rect.ts +25 -9
- package/lib/solvers/SchematicTracePipelineSolver/SchematicTracePipelineSolver.ts +2 -0
- package/package.json +2 -2
- package/site/bug-reports/bug-report-20260728T144234Z.page.tsx +4 -0
- package/site/bug-reports/bug-report-20260728T225606Z.page.tsx +4 -0
- package/tests/bug-reports/bug-report-20260721T221026Z/__snapshots__/bug-report-20260721T221026Z.snap.svg +1 -1
- package/tests/bug-reports/bug-report-20260728T144234Z/__snapshots__/bug-report-20260728T144234Z.snap.svg +108 -0
- package/tests/bug-reports/bug-report-20260728T144234Z/bug-report-20260728T144234Z.json +518 -0
- package/tests/bug-reports/bug-report-20260728T144234Z/bug-report-20260728T144234Z.test.ts +12 -0
- package/tests/bug-reports/bug-report-20260728T225606Z/__snapshots__/bug-report-20260728T225606Z.snap.svg +131 -0
- package/tests/bug-reports/bug-report-20260728T225606Z/bug-report-20260728T225606Z.json +1127 -0
- package/tests/bug-reports/bug-report-20260728T225606Z/bug-report-20260728T225606Z.test.ts +35 -0
- package/tests/repros/__snapshots__/repro-type-c-16pin-self-connection.snap.svg +54 -0
- package/tests/repros/__snapshots__/repro-type-c-16pin-to-resistor.snap.svg +56 -0
- package/tests/repros/__snapshots__/repro48-555-timer-vcc-rail-label.snap.svg +87 -0
- package/tests/repros/assets/repro48-555-timer-vcc-rail-label.input.json +276 -0
- package/tests/repros/repro-type-c-16pin-self-connection.test.ts +97 -0
- package/tests/repros/repro-type-c-16pin-to-resistor.test.ts +120 -0
- package/tests/repros/repro48-555-timer-vcc-rail-label.test.ts +23 -0
- package/tests/solvers/SchematicTraceSingleLineSolver2/text-box-obstacle-gap.test.ts +43 -0
|
@@ -0,0 +1,97 @@
|
|
|
1
|
+
import { expect, test } from "bun:test"
|
|
2
|
+
import { SchematicTracePipelineSolver } from "lib/solvers/SchematicTracePipelineSolver/SchematicTracePipelineSolver"
|
|
3
|
+
import type { InputProblem } from "lib/types/InputProblem"
|
|
4
|
+
import "tests/fixtures/matcher"
|
|
5
|
+
|
|
6
|
+
// Captured from @tscircuit/core for a TYPE_C_16PIN_2MD chip whose pin 4 is
|
|
7
|
+
// connected directly to pin 5 on the same schematic component.
|
|
8
|
+
const inputProblem: InputProblem = {
|
|
9
|
+
chips: [
|
|
10
|
+
{
|
|
11
|
+
chipId: "schematic_component_0",
|
|
12
|
+
center: { x: 0, y: 0 },
|
|
13
|
+
width: 2.6,
|
|
14
|
+
height: 1,
|
|
15
|
+
pins: [
|
|
16
|
+
{
|
|
17
|
+
pinId: "schematic_port_0",
|
|
18
|
+
x: -1.3,
|
|
19
|
+
y: 0.30000000000000004,
|
|
20
|
+
},
|
|
21
|
+
{
|
|
22
|
+
pinId: "schematic_port_1",
|
|
23
|
+
x: -1.3,
|
|
24
|
+
y: 0.10000000000000003,
|
|
25
|
+
},
|
|
26
|
+
{
|
|
27
|
+
pinId: "schematic_port_2",
|
|
28
|
+
x: -1.3,
|
|
29
|
+
y: -0.09999999999999998,
|
|
30
|
+
},
|
|
31
|
+
{
|
|
32
|
+
pinId: "schematic_port_3",
|
|
33
|
+
x: -1.3,
|
|
34
|
+
y: -0.30000000000000004,
|
|
35
|
+
},
|
|
36
|
+
{
|
|
37
|
+
pinId: "schematic_port_4",
|
|
38
|
+
x: 1.3,
|
|
39
|
+
y: -0.30000000000000004,
|
|
40
|
+
},
|
|
41
|
+
{
|
|
42
|
+
pinId: "schematic_port_5",
|
|
43
|
+
x: 1.3,
|
|
44
|
+
y: -0.10000000000000003,
|
|
45
|
+
},
|
|
46
|
+
{
|
|
47
|
+
pinId: "schematic_port_6",
|
|
48
|
+
x: 1.3,
|
|
49
|
+
y: 0.09999999999999998,
|
|
50
|
+
},
|
|
51
|
+
{
|
|
52
|
+
pinId: "schematic_port_7",
|
|
53
|
+
x: 1.3,
|
|
54
|
+
y: 0.30000000000000004,
|
|
55
|
+
},
|
|
56
|
+
],
|
|
57
|
+
},
|
|
58
|
+
],
|
|
59
|
+
directConnections: [
|
|
60
|
+
{
|
|
61
|
+
netId: ".U1 > .pin4 to U1.pin5",
|
|
62
|
+
netLabelWidth: 0.96,
|
|
63
|
+
pinIds: ["schematic_port_3", "schematic_port_4"],
|
|
64
|
+
},
|
|
65
|
+
],
|
|
66
|
+
netConnections: [],
|
|
67
|
+
textBoxes: [
|
|
68
|
+
{
|
|
69
|
+
chipId: "schematic_component_0",
|
|
70
|
+
center: { x: 0.06, y: -0.63 },
|
|
71
|
+
width: 1.92,
|
|
72
|
+
height: 0.17999999999999994,
|
|
73
|
+
text: "TYPE_C_16PIN_2MD",
|
|
74
|
+
},
|
|
75
|
+
{
|
|
76
|
+
chipId: "schematic_component_0",
|
|
77
|
+
center: { x: -0.78, y: 0.615 },
|
|
78
|
+
width: 0.3599999999999999,
|
|
79
|
+
height: 0.25,
|
|
80
|
+
text: "U1",
|
|
81
|
+
},
|
|
82
|
+
],
|
|
83
|
+
availableNetLabelOrientations: {},
|
|
84
|
+
maxMspPairDistance: 2.4,
|
|
85
|
+
_hideRatsNet: false,
|
|
86
|
+
}
|
|
87
|
+
|
|
88
|
+
test("TYPE_C_16PIN_2MD routes pin 4 to pin 5 on the same chip", () => {
|
|
89
|
+
const solver = new SchematicTracePipelineSolver(inputProblem)
|
|
90
|
+
|
|
91
|
+
solver.solve()
|
|
92
|
+
|
|
93
|
+
expect(solver.netLabelTraceCollisionSolver!.getOutput().traces).toHaveLength(
|
|
94
|
+
1,
|
|
95
|
+
)
|
|
96
|
+
expect(solver).toMatchSolverSnapshot(import.meta.path)
|
|
97
|
+
})
|
|
@@ -0,0 +1,120 @@
|
|
|
1
|
+
import { expect, test } from "bun:test"
|
|
2
|
+
import { SchematicTracePipelineSolver } from "lib/solvers/SchematicTracePipelineSolver/SchematicTracePipelineSolver"
|
|
3
|
+
import type { InputProblem } from "lib/types/InputProblem"
|
|
4
|
+
import "tests/fixtures/matcher"
|
|
5
|
+
|
|
6
|
+
// Captured from @tscircuit/core for a TYPE_C_16PIN_2MD chip whose pin 5 is
|
|
7
|
+
// connected directly to a resistor on the opposite side of the chip.
|
|
8
|
+
const inputProblem: InputProblem = {
|
|
9
|
+
chips: [
|
|
10
|
+
{
|
|
11
|
+
chipId: "schematic_component_0",
|
|
12
|
+
center: { x: 0, y: 0 },
|
|
13
|
+
width: 2.6,
|
|
14
|
+
height: 1,
|
|
15
|
+
pins: [
|
|
16
|
+
{
|
|
17
|
+
pinId: "schematic_port_0",
|
|
18
|
+
x: -1.3,
|
|
19
|
+
y: 0.30000000000000004,
|
|
20
|
+
},
|
|
21
|
+
{
|
|
22
|
+
pinId: "schematic_port_1",
|
|
23
|
+
x: -1.3,
|
|
24
|
+
y: 0.10000000000000003,
|
|
25
|
+
},
|
|
26
|
+
{
|
|
27
|
+
pinId: "schematic_port_2",
|
|
28
|
+
x: -1.3,
|
|
29
|
+
y: -0.09999999999999998,
|
|
30
|
+
},
|
|
31
|
+
{
|
|
32
|
+
pinId: "schematic_port_3",
|
|
33
|
+
x: -1.3,
|
|
34
|
+
y: -0.30000000000000004,
|
|
35
|
+
},
|
|
36
|
+
{
|
|
37
|
+
pinId: "schematic_port_4",
|
|
38
|
+
x: 1.3,
|
|
39
|
+
y: -0.30000000000000004,
|
|
40
|
+
},
|
|
41
|
+
{
|
|
42
|
+
pinId: "schematic_port_5",
|
|
43
|
+
x: 1.3,
|
|
44
|
+
y: -0.10000000000000003,
|
|
45
|
+
},
|
|
46
|
+
{
|
|
47
|
+
pinId: "schematic_port_6",
|
|
48
|
+
x: 1.3,
|
|
49
|
+
y: 0.09999999999999998,
|
|
50
|
+
},
|
|
51
|
+
{
|
|
52
|
+
pinId: "schematic_port_7",
|
|
53
|
+
x: 1.3,
|
|
54
|
+
y: 0.30000000000000004,
|
|
55
|
+
},
|
|
56
|
+
],
|
|
57
|
+
},
|
|
58
|
+
{
|
|
59
|
+
chipId: "schematic_component_1",
|
|
60
|
+
center: { x: -2, y: 0 },
|
|
61
|
+
width: 0.6000000000000001,
|
|
62
|
+
height: 0.6799999999999999,
|
|
63
|
+
pins: [
|
|
64
|
+
{
|
|
65
|
+
pinId: "schematic_port_8",
|
|
66
|
+
x: -2.3,
|
|
67
|
+
y: 0,
|
|
68
|
+
},
|
|
69
|
+
{
|
|
70
|
+
pinId: "schematic_port_9",
|
|
71
|
+
x: -1.7,
|
|
72
|
+
y: 0,
|
|
73
|
+
},
|
|
74
|
+
],
|
|
75
|
+
},
|
|
76
|
+
],
|
|
77
|
+
directConnections: [
|
|
78
|
+
{
|
|
79
|
+
netId: ".U1 > .pin5 to R1.pin1",
|
|
80
|
+
netLabelWidth: 0.96,
|
|
81
|
+
pinIds: ["schematic_port_4", "schematic_port_8"],
|
|
82
|
+
},
|
|
83
|
+
],
|
|
84
|
+
netConnections: [],
|
|
85
|
+
textBoxes: [
|
|
86
|
+
{
|
|
87
|
+
chipId: "schematic_component_0",
|
|
88
|
+
center: { x: 0.06, y: -0.63 },
|
|
89
|
+
width: 1.92,
|
|
90
|
+
height: 0.17999999999999994,
|
|
91
|
+
text: "TYPE_C_16PIN_2MD",
|
|
92
|
+
},
|
|
93
|
+
{
|
|
94
|
+
chipId: "schematic_component_0",
|
|
95
|
+
center: { x: -0.78, y: 0.615 },
|
|
96
|
+
width: 0.3599999999999999,
|
|
97
|
+
height: 0.25,
|
|
98
|
+
text: "U1",
|
|
99
|
+
},
|
|
100
|
+
],
|
|
101
|
+
availableNetLabelOrientations: {},
|
|
102
|
+
maxMspPairDistance: 2.4,
|
|
103
|
+
_hideRatsNet: false,
|
|
104
|
+
}
|
|
105
|
+
|
|
106
|
+
test("TYPE_C_16PIN_2MD routes pin 5 to R1 below the MPN text", () => {
|
|
107
|
+
const solver = new SchematicTracePipelineSolver(inputProblem)
|
|
108
|
+
|
|
109
|
+
solver.solve()
|
|
110
|
+
|
|
111
|
+
const traces = solver.netLabelTraceCollisionSolver!.getOutput().traces
|
|
112
|
+
const mpnTextBox = inputProblem.textBoxes![0]!
|
|
113
|
+
const mpnBottom = mpnTextBox.center.y - mpnTextBox.height / 2
|
|
114
|
+
|
|
115
|
+
expect(traces).toHaveLength(1)
|
|
116
|
+
expect(
|
|
117
|
+
Math.min(...traces[0]!.tracePath.map((point) => point.y)),
|
|
118
|
+
).toBeLessThan(mpnBottom)
|
|
119
|
+
expect(solver).toMatchSolverSnapshot(import.meta.path)
|
|
120
|
+
})
|
|
@@ -0,0 +1,23 @@
|
|
|
1
|
+
import { expect, test } from "bun:test"
|
|
2
|
+
import { SchematicTracePipelineSolver } from "lib/solvers/SchematicTracePipelineSolver/SchematicTracePipelineSolver"
|
|
3
|
+
import inputProblem from "./assets/repro48-555-timer-vcc-rail-label.input.json"
|
|
4
|
+
import "tests/fixtures/matcher"
|
|
5
|
+
|
|
6
|
+
// Captured from @tscircuit/core repro48. U1 pin 4 is a port-only member of the
|
|
7
|
+
// VCC net, but its required y+ rail placement falls back to a horizontal label.
|
|
8
|
+
test("core repro48 U1 pin4 VCC rail label falls back horizontally", () => {
|
|
9
|
+
const solver = new SchematicTracePipelineSolver(inputProblem as any)
|
|
10
|
+
|
|
11
|
+
solver.solve()
|
|
12
|
+
|
|
13
|
+
const u1Pin4VccLabel = solver.netLabelNetLabelCollisionSolver
|
|
14
|
+
?.getOutput()
|
|
15
|
+
.netLabelPlacements.find((placement) =>
|
|
16
|
+
placement.pinIds.includes("schematic_port_3"),
|
|
17
|
+
)
|
|
18
|
+
|
|
19
|
+
expect(inputProblem.availableNetLabelOrientations.VCC).toEqual(["y+"])
|
|
20
|
+
expect(u1Pin4VccLabel?.netId).toBe("VCC")
|
|
21
|
+
expect(u1Pin4VccLabel?.orientation).toBe("x-")
|
|
22
|
+
expect(solver).toMatchSolverSnapshot(import.meta.path)
|
|
23
|
+
})
|
|
@@ -0,0 +1,43 @@
|
|
|
1
|
+
import { expect, test } from "bun:test"
|
|
2
|
+
import { getObstacleRects } from "lib/solvers/SchematicTraceLinesSolver/SchematicTraceSingleLineSolver2/rect"
|
|
3
|
+
import type { InputProblem } from "lib/types/InputProblem"
|
|
4
|
+
|
|
5
|
+
test("closes a sub-minimum gap between a chip and its attached text", () => {
|
|
6
|
+
const inputProblem: InputProblem = {
|
|
7
|
+
chips: [
|
|
8
|
+
{
|
|
9
|
+
chipId: "U1",
|
|
10
|
+
center: { x: 0, y: 0 },
|
|
11
|
+
width: 2.6,
|
|
12
|
+
height: 1,
|
|
13
|
+
pins: [],
|
|
14
|
+
},
|
|
15
|
+
],
|
|
16
|
+
directConnections: [],
|
|
17
|
+
netConnections: [],
|
|
18
|
+
textBoxes: [
|
|
19
|
+
{
|
|
20
|
+
chipId: "U1",
|
|
21
|
+
center: { x: 0.06, y: -0.63 },
|
|
22
|
+
width: 1.92,
|
|
23
|
+
height: 0.18,
|
|
24
|
+
text: "TYPE_C_16PIN_2MD",
|
|
25
|
+
},
|
|
26
|
+
{
|
|
27
|
+
chipId: "U1",
|
|
28
|
+
center: { x: 0, y: -0.9 },
|
|
29
|
+
width: 1,
|
|
30
|
+
height: 0.2,
|
|
31
|
+
text: "clear gap",
|
|
32
|
+
},
|
|
33
|
+
],
|
|
34
|
+
availableNetLabelOrientations: {},
|
|
35
|
+
}
|
|
36
|
+
|
|
37
|
+
const textObstacles = getObstacleRects(inputProblem).filter(
|
|
38
|
+
(obstacle) => obstacle.kind === "text_box",
|
|
39
|
+
)
|
|
40
|
+
|
|
41
|
+
expect(textObstacles[0]!.maxY).toBe(-0.5)
|
|
42
|
+
expect(textObstacles[1]!.maxY).toBe(-0.8)
|
|
43
|
+
})
|