@tscircuit/schematic-trace-solver 0.0.103 → 0.0.105

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@@ -0,0 +1,103 @@
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+ {
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+ "chips": [
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+ {
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+ "chipId": "schematic_component_0",
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+ "center": {
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+ "x": -4,
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+ "y": 0
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+ },
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+ "width": 1.9000000000000004,
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+ "height": 0.8,
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+ "pins": [
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+ {
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+ "pinId": "schematic_component_0.1",
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+ "x": -2.65,
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+ "y": 0.2,
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+ "_facingDirection": "x+"
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+ },
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+ {
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+ "pinId": "schematic_component_0.2",
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+ "x": -2.65,
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+ "y": 0,
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+ "_facingDirection": "x+"
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+ },
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+ {
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+ "pinId": "schematic_component_0.3",
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+ "x": -2.65,
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+ "y": -0.2,
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+ "_facingDirection": "x+"
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+ }
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+ ]
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+ },
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+ {
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+ "chipId": "schematic_component_1",
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+ "center": {
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+ "x": 4,
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+ "y": 0
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+ },
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+ "width": 1.6999999999999997,
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+ "height": 0.8,
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+ "pins": [
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+ {
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+ "pinId": "schematic_component_1.1",
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+ "x": 2.75,
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+ "y": 0.2,
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+ "_facingDirection": "x-"
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+ },
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+ {
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+ "pinId": "schematic_component_1.2",
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+ "x": 2.75,
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+ "y": 0,
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+ "_facingDirection": "x-"
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+ },
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+ {
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+ "pinId": "schematic_component_1.3",
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+ "x": 2.75,
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+ "y": -0.2,
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+ "_facingDirection": "x-"
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+ }
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+ ]
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+ }
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+ ],
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+ "directConnections": [
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+ {
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+ "pinIds": [
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+ "schematic_component_0.2",
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+ "schematic_component_1.3"
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+ ],
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+ "netId": ".power > .VOUT_3V3 to .load > .3V3"
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+ },
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+ {
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+ "pinIds": [
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+ "schematic_component_0.3",
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+ "schematic_component_1.2"
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+ ],
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+ "netId": ".power > .SEC_GND to .load > .GND"
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+ }
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+ ],
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+ "netConnections": [],
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+ "textBoxes": [
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+ {
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+ "chipId": "schematic_component_0",
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+ "center": {
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+ "x": -4.65,
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+ "y": 0.53
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+ },
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+ "width": 0.5999999999999996,
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+ "height": 0.17999999999999994,
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+ "text": "power"
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+ },
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+ {
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+ "chipId": "schematic_component_1",
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+ "center": {
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+ "x": 3.3899999999999997,
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+ "y": 0.53
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+ },
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+ "width": 0.48,
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+ "height": 0.17999999999999994,
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+ "text": "load"
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+ }
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+ ],
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+ "availableNetLabelOrientations": {},
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+ "maxMspPairDistance": 2.4
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+ }
@@ -0,0 +1,14 @@
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+ import { expect, test } from "bun:test"
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+ import { SchematicTracePipelineSolver } from "lib/solvers/SchematicTracePipelineSolver/SchematicTracePipelineSolver"
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+ import "tests/fixtures/matcher"
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+ import inputProblem from "./assets/repro-core-subcircuit-missing-ground.input.json"
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+
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+ // Captured from @tscircuit/core main repro154: two crossed connections enter
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+ // the solver, but only the VOUT_3V3-to-3V3 connection is routed.
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+ test("core repro154 omits one of two crossed subcircuit connections", () => {
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+ const solver = new SchematicTracePipelineSolver(inputProblem as any)
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+
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+ solver.solve()
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+
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+ expect(solver).toMatchSolverSnapshot(import.meta.path)
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+ })
@@ -0,0 +1,166 @@
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+ import { expect, test } from "bun:test"
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+ import type { NetLabelPlacement } from "lib/solvers/NetLabelPlacementSolver/NetLabelPlacementSolver"
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+ import type { SolvedTracePath } from "lib/solvers/SchematicTraceLinesSolver/SchematicTraceLinesSolver"
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+ import { TraceCleanupSolver } from "lib/solvers/TraceCleanupSolver/TraceCleanupSolver"
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+ import type { InputPin, InputProblem } from "lib/types/InputProblem"
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+ import "tests/fixtures/matcher"
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+
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+ const inputProblem: InputProblem = {
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+ chips: [
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+ {
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+ chipId: "J1",
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+ center: { x: -1.8, y: 0.5 },
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+ width: 0.6,
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+ height: 0.4,
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+ pins: [
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+ {
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+ pinId: "J1.1",
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+ x: -1.5,
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+ y: 0.5,
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+ _facingDirection: "x+",
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+ },
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+ ],
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+ },
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+ {
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+ chipId: "U1",
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+ center: { x: 0, y: 0.25 },
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+ width: 1,
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+ height: 1.5,
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+ pins: [
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+ {
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+ pinId: "U1.1",
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+ x: -0.5,
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+ y: 0.5,
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+ _facingDirection: "x-",
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+ },
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+ {
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+ pinId: "U1.6",
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+ x: -0.5,
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+ y: 0,
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+ _facingDirection: "x-",
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+ },
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+ ],
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+ },
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+ ],
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+ directConnections: [],
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+ netConnections: [
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+ {
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+ netId: "VCC",
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+ pinIds: ["J1.1", "U1.1", "U1.6"],
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+ netLabelWidth: 0.48,
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+ netLabelHeight: 0.42,
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+ },
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+ ],
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+ textBoxes: [],
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+ availableNetLabelOrientations: { VCC: ["y+"] },
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+ }
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+
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+ const pin = (chipId: "J1" | "U1", pinId: string) => ({
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+ ...inputProblem.chips
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+ .find((chip) => chip.chipId === chipId)!
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+ .pins.find((candidate) => candidate.pinId === pinId)!,
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+ chipId,
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+ })
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+
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+ const createTrace = ({
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+ mspPairId,
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+ pins,
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+ tracePath,
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+ globalConnNetId = "vcc-net",
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+ userNetId = "VCC",
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+ }: {
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+ mspPairId: string
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+ pins: [InputPin & { chipId: string }, InputPin & { chipId: string }]
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+ tracePath: SolvedTracePath["tracePath"]
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+ globalConnNetId?: string
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+ userNetId?: string
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+ }): SolvedTracePath => ({
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+ mspPairId,
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+ dcConnNetId: globalConnNetId,
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+ globalConnNetId,
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+ userNetId,
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+ pins,
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+ tracePath,
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+ mspConnectionPairIds: [mspPairId],
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+ pinIds: pins.map((candidate) => candidate.pinId),
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+ })
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+
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+ const pin1Detour = createTrace({
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+ mspPairId: "U1.1-J1.1",
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+ pins: [pin("U1", "U1.1"), pin("J1", "J1.1")],
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+ tracePath: [
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+ { x: -0.5, y: 0.5 },
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+ { x: -0.7, y: 0.5 },
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+ { x: -0.7, y: 0.9 },
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+ { x: -1.3, y: 0.9 },
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+ { x: -1.3, y: 0.5 },
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+ { x: -1.5, y: 0.5 },
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+ ],
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+ })
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+
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+ const pin6Branch = createTrace({
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+ mspPairId: "U1.6-J1.1",
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+ pins: [pin("U1", "U1.6"), pin("J1", "J1.1")],
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+ tracePath: [
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+ { x: -0.5, y: 0 },
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+ { x: -1.3, y: 0 },
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+ { x: -1.3, y: 0.5 },
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+ { x: -1.5, y: 0.5 },
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+ ],
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+ })
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+
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+ const vccLabel: NetLabelPlacement = {
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+ globalConnNetId: "vcc-net",
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+ dcConnNetId: "vcc-net",
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+ netId: "VCC",
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+ mspConnectionPairIds: [pin1Detour.mspPairId, pin6Branch.mspPairId],
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+ pinIds: ["J1.1", "U1.1", "U1.6"],
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+ orientation: "y+",
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+ anchorPoint: { x: -1.3, y: 0.5 },
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+ center: { x: -1.3, y: 0.74 },
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+ width: 0.42,
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+ height: 0.48,
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+ }
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+
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+ const createSolver = (traces: SolvedTracePath[]) =>
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+ new TraceCleanupSolver({
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+ inputProblem,
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+ allTraces: traces,
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+ allLabelPlacements: [vccLabel],
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+ mergedLabelNetIdMap: {},
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+ paddingBuffer: 0.1,
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+ operations: ["minimizing_turns"],
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+ })
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+
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+ test("VCC pin 1 routes directly left through its same-net branch", () => {
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+ const solver = createSolver([pin1Detour, pin6Branch])
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+
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+ solver.solve()
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+
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+ const pin1Trace = solver
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+ .getOutput()
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+ .traces.find((trace) => trace.mspPairId === pin1Detour.mspPairId)!
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+ expect(pin1Trace.tracePath).toEqual([
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+ { x: -0.5, y: 0.5 },
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+ { x: -1.5, y: 0.5 },
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+ ])
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+ expect(solver).toMatchSolverSnapshot(import.meta.path)
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+ })
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+
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+ test("pin 1 keeps the detour when the blocking branch is another net", () => {
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+ const signalBranch = {
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+ ...pin6Branch,
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+ mspPairId: "signal-branch",
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+ dcConnNetId: "signal-net",
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+ globalConnNetId: "signal-net",
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+ userNetId: "SIGNAL",
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+ }
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+ const solver = createSolver([pin1Detour, signalBranch])
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+
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+ solver.solve()
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+
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+ const pin1Trace = solver
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+ .getOutput()
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+ .traces.find((trace) => trace.mspPairId === pin1Detour.mspPairId)!
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+ expect(pin1Trace.tracePath).toEqual(pin1Detour.tracePath)
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+ })