@tscircuit/runframe 0.0.1199 → 0.0.1200

package/dist/standalone-preview.min.js

@@ -5424,7 +5424,7 @@ ${I.type}: ${O}
                     50% { opacity: 0.2; }
                     100% { opacity: 0.6; }
                   }
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with cached routes using [<subcircuit />](https://docs.tscircuit.com/elements/subcircuit)","Run `tsci dev` on the command line to preview your boards before export",'Use units like mm or mils consistently across your designs (e.g. pcbX="10mm")',"Quickly set footprints with the [footprint prop](https://docs.tscircuit.com/footprints/footprinter-strings)","Check out the guide on [ordering prototypes](https://docs.tscircuit.com/building-electronics/ordering-prototypes)","Use [net labels](https://docs.tscircuit.com/elements/net) and [group elements](https://docs.tscircuit.com/elements/group) to organize complex schematics.","You can manually drag components on the PCB and Schematic using [manual edits](https://docs.tscircuit.com/guides/manual-edits)","Every tscircuit module can export to [Circuit JSON](https://github.com/tscircuit/circuit-json), Gerbers, Pick'n'Place CSV files, Bill of Materials CSV and more","You can import components from [JLCPCB](https://docs.tscircuit.com/guides/importing-modules-and-chips/importing-from-jlcpcb) or [KiCad](https://docs.tscircuit.com/guides/importing-modules-and-chips/importing-from-kicad)","Any module you push to the [registry](https://tscircuit.com/trending) will have [simple image urls](https://docs.tscircuit.com/web-apis/image-generation-api) you can use display images on a website","The default [Parts Engine](https://docs.tscircuit.com/guides/platform-configuration) will automatically find parts from common vendors for your BOM",'[Pin selectors](https://docs.tscircuit.com/guides/using-sel-references) are similar to CSS selectors, ".R1 > .pin1" means "connect to the first pin of the component R1"',"You can use the [sel](https://docs.tscircuit.com/guides/using-sel-references) object to select pins in a type-safe way","Publish modules via the [registry](https://tscircuit.com/trending) for working with a team or sharing your work","[Explore tutorials](https://docs.tscircuit.com/category/tutorials) for real-world circuit design examples.","Upload your Circuit JSON to [circuitjson.com](https://circuitjson.com) for a quick preview.","You can display Circuit JSON in 3D, PCB or Schematic mode with the [<CircuitJsonPreview />](https://docs.tscircuit.com/guides/running-tscircuit/displaying-circuit-json-on-a-webpage#react-display-all-available-previews-with-circuitjsonpreview-) React component","Use a [<group />](https://docs.tscircuit.com/elements/group) element to move multiple components at once in a schematic or PCB layout.","Check out the [GitHub Discussions page](https://github.com/tscircuit/tscircuit/discussions) to upvote features","You can customize the autorouter using the [autorouter prop](https://docs.tscircuit.com/elements/board#setting-the-autorouter)","Use the [<constraint />](https://docs.tscircuit.com/footprints/constraint) element to enforce geometric relationships in PCB designs.","Join the [Discord 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Error("Invalid capacity");return t}return n}).describe("Battery capacity in mAh"),xs=Se({x:di,y:di}),uDn=xs,yL=Se({x:di,y:di,z:di}),dDn=yL,f1e=Se({width:Pe(),height:Pe()}),hDn=n=>{const e="abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789";return Array.from({length:n},()=>e[Math.floor(Math.random()*e.length)]).join("")},Ki=n=>R().optional().default(()=>`${n}_${hDn(10)}`),gL=Xt(["top_left","top_center","top_right","center_left","center","center_right","bottom_left","bottom_center","bottom_right"]),ect=Xt(["jlcpcb","macrofab","pcbway","digikey","mouser","lcsc"]),Zg=Se({type:fe("source_component"),ftype:R().optional(),source_component_id:R(),name:R(),manufacturer_part_number:R().optional(),supplier_part_numbers:rs(ect,ut(R())).optional(),display_value:R().optional(),are_pins_interchangeable:Je().optional(),internally_connected_source_port_ids:ut(ut(R())).optional(),source_group_id:R().optional(),subcircuit_id:R().optional()}),m1e=Zg.extend({ftype:fe("simple_capacitor"),capacitance:p1e,max_voltage_rating:L4.optional(),display_capacitance:R().optional(),max_decoupling_trace_length:di.optional()}),_1e=Zg.extend({ftype:fe("simple_resistor"),resistance:QG,display_resistance:R().optional()}),eY=Zg.extend({ftype:fe("simple_diode")}),y1e=eY.extend({ftype:fe("simple_led"),color:R().optional(),wavelength:R().optional()}),tct=Zg.extend({ftype:fe("simple_ground")}),g1e=Zg.extend({ftype:fe("simple_chip")}),x1e=Zg.extend({ftype:fe("simple_power_source"),voltage:L4}),pDn=Zg.extend({ftype:fe("simple_fuse"),current_rating_amps:Pe().describe("Nominal current in amps the fuse is rated for"),voltage_rating_volts:Pe().describe("Voltage rating in volts, e.g. ±5V would be 5")}),b1e=Zg.extend({ftype:fe("simple_battery"),capacity:Jat}),v1e=Zg.extend({ftype:fe("simple_inductor"),inductance:Zat,max_current_rating:Pe().optional()}),w1e=Zg.extend({ftype:fe("simple_push_button")}),S1e=Zg.extend({ftype:fe("simple_potentiometer"),max_resistance:QG}),nct=Zg.extend({ftype:fe("simple_crystal"),frequency:Pe().describe("Frequency in Hz"),load_capacitance:Pe().optional().describe("Load capacitance in pF")}),E1e=Zg.extend({ftype:fe("simple_pin_header"),pin_count:Pe(),gender:Xt(["male","female"]).optional().default("male")}),T1e=Zg.extend({ftype:fe("simple_pinout")}),M1e=Zg.extend({ftype:fe("simple_resonator"),load_capacitance:p1e,equivalent_series_resistance:QG.optional(),frequency:JG}),C1e=Zg.extend({ftype:fe("simple_transistor"),transistor_type:Xt(["npn","pnp"])}),A1e=Zg.extend({ftype:fe("simple_test_point"),footprint_variant:Xt(["pad","through_hole"]).optional(),pad_shape:Xt(["rect","circle"]).optional(),pad_diameter:Bn([Pe(),R()]).optional(),hole_diameter:Bn([Pe(),R()]).optional(),width:Bn([Pe(),R()]).optional(),height:Bn([Pe(),R()]).optional()}),P1e=Zg.extend({ftype:fe("simple_mosfet"),channel_type:Xt(["n","p"]),mosfet_mode:Xt(["enhancement","depletion"])}),R1e=Zg.extend({ftype:fe("simple_switch")}),I1e=Se({type:fe("source_project_metadata"),name:R().optional(),software_used_string:R().optional(),project_url:R().optional(),created_at:Qat.optional()}),ict=Se({type:fe("source_missing_property_error"),source_missing_property_error_id:Ki("source_missing_property_error"),source_component_id:R(),property_name:R(),subcircuit_id:R().optional(),error_type:fe("source_missing_property_error").default("source_missing_property_error"),message:R()}).describe("The source code is missing a property"),rct=Se({type:fe("source_failed_to_create_component_error"),source_failed_to_create_component_error_id:Ki("source_failed_to_create_component_error"),error_type:fe("source_failed_to_create_component_error").default("source_failed_to_create_component_error"),component_name:R().optional(),subcircuit_id:R().optional(),parent_source_component_id:R().optional(),message:R(),pcb_center:Se({x:Pe().optional(),y:Pe().optional()}).optional(),schematic_center:Se({x:Pe().optional(),y:Pe().optional()}).optional()}).describe("Error emitted when a component fails to be constructed"),N1e=Se({type:fe("source_trace_not_connected_error"),source_trace_not_connected_error_id:Ki("source_trace_not_connected_error"),error_type:fe("source_trace_not_connected_error").default("source_trace_not_connected_error"),message:R(),subcircuit_id:R().optional(),source_group_id:R().optional(),source_trace_id:R().optional(),connected_source_port_ids:ut(R()).optional(),selectors_not_found:ut(R()).optional()}).describe("Occurs when a source trace selector does not match any ports"),oct=Se({type:fe("source_property_ignored_warning"),source_property_ignored_warning_id:Ki("source_property_ignored_warning"),source_component_id:R(),property_name:R(),subcircuit_id:R().optional(),error_type:fe("source_property_ignored_warning").default("source_property_ignored_warning"),message:R()}).describe("The source property was ignored"),k1e=Se({type:fe("source_pin_missing_trace_warning"),source_pin_missing_trace_warning_id:Ki("source_pin_missing_trace_warning"),warning_type:fe("source_pin_missing_trace_warning").default("source_pin_missing_trace_warning"),message:R(),source_component_id:R(),source_port_id:R(),subcircuit_id:R().optional()}).describe("Warning emitted when a source component pin is missing a trace connection"),sct=Bn([_1e,m1e,eY,y1e,tct,g1e,x1e,b1e,v1e,w1e,S1e,nct,E1e,T1e,M1e,R1e,C1e,A1e,P1e,pDn,I1e,ict,rct,N1e,oct,k1e]),act=Se({type:fe("source_port"),pin_number:Pe().optional(),port_hints:ut(R()).optional(),name:R(),source_port_id:R(),source_component_id:R().optional(),source_group_id:R().optional(),subcircuit_id:R().optional(),subcircuit_connectivity_map_key:R().optional()}),cct=Se({type:fe("source_trace"),source_trace_id:R(),connected_source_port_ids:ut(R()),connected_source_net_ids:ut(R()),subcircuit_id:R().optional(),subcircuit_connectivity_map_key:R().optional(),max_length:Pe().optional(),min_trace_thickness:Pe().optional(),display_name:R().optional()}),lct=Se({type:fe("source_group"),source_group_id:R(),subcircuit_id:R().optional(),parent_subcircuit_id:R().optional(),parent_source_group_id:R().optional(),is_subcircuit:Je().optional(),show_as_schematic_box:Je().optional(),name:R().optional(),was_automatically_named:Je().optional()}),uct=Se({type:fe("source_net"),source_net_id:R(),name:R(),member_source_group_ids:ut(R()),is_power:Je().optional(),is_ground:Je().optional(),is_digital_signal:Je().optional(),is_analog_signal:Je().optional(),is_positive_voltage_source:Je().optional(),trace_width:Pe().optional(),subcircuit_id:R().optional(),subcircuit_connectivity_map_key:R().optional()}),dct=Se({type:fe("source_board"),source_board_id:R(),source_group_id:R(),title:R().optional()}).describe("Defines a board in the source domain"),hct=Se({type:fe("source_pcb_ground_plane"),source_pcb_ground_plane_id:R(),source_group_id:R(),source_net_id:R(),subcircuit_id:R().optional()}).describe("Defines a ground plane in the source domain"),pct=["top","bottom","inner1","inner2","inner3","inner4","inner5","inner6"],O1e=Xt(pct),bd=O1e.or(Se({name:O1e})).transform(n=>typeof n=="string"?n:n.name),tE=Xt(["top","bottom"]),fct=Se({type:fe("source_manually_placed_via"),source_manually_placed_via_id:R(),source_group_id:R(),source_net_id:R(),subcircuit_id:R().optional(),source_trace_id:R().optional()}).describe("Defines a via that is manually placed in the source domain"),mct=Se({type:fe("unknown_error_finding_part"),unknown_error_finding_part_id:Ki("unknown_error_finding_part"),error_type:fe("unknown_error_finding_part").default("unknown_error_finding_part"),message:R(),source_component_id:R().optional(),subcircuit_id:R().optional()}).describe("Error emitted when an unexpected error occurs while finding a part"),_ct=Se({type:fe("schematic_box"),schematic_component_id:R().optional(),width:di,height:di,is_dashed:Je().default(!1),x:di,y:di,subcircuit_id:R().optional()}).describe("Draws a box on the schematic"),yct=Se({type:fe("schematic_path"),schematic_component_id:R(),fill_color:Xt(["red","blue"]).optional(),is_filled:Je().optional(),points:ut(xs),subcircuit_id:R().optional()}),gct=rs(Se({left_margin:os.optional(),right_margin:os.optional(),top_margin:os.optional(),bottom_margin:os.optional()})),xct=Se({left_size:Pe(),right_size:Pe(),top_size:Pe().optional(),bottom_size:Pe().optional()}),bct=Se({left_side:Se({pins:ut(Pe()),direction:Xt(["top-to-bottom","bottom-to-top"]).optional()}).optional(),right_side:Se({pins:ut(Pe()),direction:Xt(["top-to-bottom","bottom-to-top"]).optional()}).optional(),top_side:Se({pins:ut(Pe()),direction:Xt(["left-to-right","right-to-left"]).optional()}).optional(),bottom_side:Se({pins:ut(Pe()),direction:Xt(["left-to-right","right-to-left"]).optional()}).optional()}),vct=Bn([xct,bct]),wct=Se({type:fe("schematic_component"),size:f1e,center:xs,source_component_id:R().optional(),schematic_component_id:R(),pin_spacing:os.optional(),pin_styles:gct.optional(),box_width:os.optional(),symbol_name:R().optional(),port_arrangement:vct.optional(),port_labels:rs(R()).optional(),symbol_display_value:R().optional(),subcircuit_id:R().optional(),schematic_group_id:R().optional(),is_schematic_group:Je().optional(),source_group_id:R().optional(),is_box_with_pins:Je().optional().default(!0)}),Sct=Se({type:fe("schematic_line"),schematic_line_id:Ki("schematic_line"),schematic_component_id:R(),x1:di,y1:di,x2:di,y2:di,stroke_width:di.nullable().optional(),color:R().default("#000000"),is_dashed:Je().default(!1),subcircuit_id:R().optional()}).describe("Draws a styled line on the schematic"),Ect=Se({type:fe("schematic_rect"),schematic_rect_id:Ki("schematic_rect"),schematic_component_id:R(),center:xs,width:di,height:di,rotation:fw.default(0),stroke_width:di.nullable().optional(),color:R().default("#000000"),is_filled:Je().default(!1),fill_color:R().optional(),is_dashed:Je().default(!1),subcircuit_id:R().optional()}).describe("Draws a styled rectangle on the schematic"),Tct=Se({type:fe("schematic_circle"),schematic_circle_id:Ki("schematic_circle"),schematic_component_id:R(),center:xs,radius:di,stroke_width:di.nullable().optional(),color:R().default("#000000"),is_filled:Je().default(!1),fill_color:R().optional(),is_dashed:Je().default(!1),subcircuit_id:R().optional()}).describe("Draws a styled circle on the schematic"),Mct=Se({type:fe("schematic_arc"),schematic_arc_id:Ki("schematic_arc"),schematic_component_id:R(),center:xs,radius:di,start_angle_degrees:fw,end_angle_degrees:fw,direction:Xt(["clockwise","counterclockwise"]).default("counterclockwise"),stroke_width:di.nullable().optional(),color:R().default("#000000"),is_dashed:Je().default(!1),subcircuit_id:R().optional()}).describe("Draws a styled arc on the schematic"),Cct=Se({type:fe("schematic_trace"),schematic_trace_id:R(),source_trace_id:R().optional(),junctions:ut(Se({x:Pe(),y:Pe()})),edges:ut(Se({from:Se({x:Pe(),y:Pe()}),to:Se({x:Pe(),y:Pe()}),is_crossing:Je().optional(),from_schematic_port_id:R().optional(),to_schematic_port_id:R().optional()})),subcircuit_id:R().optional(),subcircuit_connectivity_map_key:R().optional()}),fDn=Xt(["center","left","right","top","bottom"]),Act=Se({type:fe("schematic_text"),schematic_component_id:R().optional(),schematic_text_id:R(),text:R(),font_size:Pe().default(.18),position:Se({x:di,y:di}),rotation:Pe().default(0),anchor:Bn([fDn.describe("legacy"),gL]).default("center"),color:R().default("#000000"),subcircuit_id:R().optional()}),Pct=Se({type:fe("schematic_port"),schematic_port_id:R(),source_port_id:R(),schematic_component_id:R().optional(),center:xs,facing_direction:Xt(["up","down","left","right"]).optional(),distance_from_component_edge:Pe().optional(),side_of_component:Xt(["top","bottom","left","right"]).optional(),true_ccw_index:Pe().optional(),pin_number:Pe().optional(),display_pin_label:R().optional(),subcircuit_id:R().optional(),is_connected:Je().optional(),has_input_arrow:Je().optional(),has_output_arrow:Je().optional()}).describe("Defines a port on a schematic component"),Rct=Se({type:fe("schematic_net_label"),schematic_net_label_id:Ki("schematic_net_label"),schematic_trace_id:R().optional(),source_trace_id:R().optional(),source_net_id:R(),center:xs,anchor_position:xs.optional(),anchor_side:Xt(["top","bottom","left","right"]),text:R(),symbol_name:R().optional(),is_movable:Je().optional(),subcircuit_id:R().optional()}),Ict=Se({type:fe("schematic_error"),schematic_error_id:R(),error_type:fe("schematic_port_not_found").default("schematic_port_not_found"),message:R(),subcircuit_id:R().optional()}).describe("Defines a schematic error on the schematic"),Nct=Se({type:fe("schematic_layout_error"),schematic_layout_error_id:Ki("schematic_layout_error"),error_type:fe("schematic_layout_error").default("schematic_layout_error"),message:R(),source_group_id:R(),schematic_group_id:R(),subcircuit_id:R().optional()}).describe("Error emitted when schematic layout fails for a group"),tY=Se({type:fe("schematic_debug_object"),label:R().optional(),subcircuit_id:R().optional()}),kct=tY.extend({shape:fe("rect"),center:xs,size:f1e}),Oct=tY.extend({shape:fe("line"),start:xs,end:xs}),Lct=tY.extend({shape:fe("point"),center:xs}),Dct=_m("shape",[kct,Oct,Lct]),zct=Se({type:fe("schematic_voltage_probe"),schematic_voltage_probe_id:R(),position:xs,schematic_trace_id:R(),voltage:L4.optional(),subcircuit_id:R().optional()}).describe("Defines a voltage probe measurement point on a schematic trace"),$ct=Se({type:fe("schematic_manual_edit_conflict_warning"),schematic_manual_edit_conflict_warning_id:Ki("schematic_manual_edit_conflict_warning"),warning_type:fe("schematic_manual_edit_conflict_warning").default("schematic_manual_edit_conflict_warning"),message:R(),schematic_component_id:R(),schematic_group_id:R().optional(),subcircuit_id:R().optional(),source_component_id:R()}).describe("Warning emitted when a component has both manual placement and explicit schX/schY coordinates"),Fct=Se({type:fe("schematic_group"),schematic_group_id:Ki("schematic_group"),source_group_id:R(),is_subcircuit:Je().optional(),subcircuit_id:R().optional(),width:os,height:os,center:xs,schematic_component_ids:ut(R()),show_as_schematic_box:Je().optional(),name:R().optional(),description:R().optional()}).describe("Defines a group of components on the schematic"),Uct=Se({type:fe("schematic_table"),schematic_table_id:Ki("schematic_table"),anchor_position:xs,column_widths:ut(di),row_heights:ut(di),cell_padding:di.optional(),border_width:di.optional(),subcircuit_id:R().optional(),schematic_component_id:R().optional(),anchor:gL.optional()}).describe("Defines a table on the schematic"),Bct=Se({type:fe("schematic_table_cell"),schematic_table_cell_id:Ki("schematic_table_cell"),schematic_table_id:R(),start_row_index:Pe(),end_row_index:Pe(),start_column_index:Pe(),end_column_index:Pe(),text:R().optional(),center:xs,width:di,height:di,horizontal_align:Xt(["left","center","right"]).optional(),vertical_align:Xt(["top","middle","bottom"]).optional(),font_size:di.optional(),subcircuit_id:R().optional()}).describe("Defines a cell within a schematic_table"),jct=Se({x:di,y:di,bulge:Pe().optional()}),L1e=Se({vertices:ut(jct)}),Hct=Se({outer_ring:L1e,inner_rings:ut(L1e).default([])}),Vct=Se({x:di,y:di,via:Je().optional(),via_to_layer:bd.optional()}),mDn=ut(Vct),Gct=Se({x:di,y:di,via:Je().optional(),to_layer:bd.optional(),trace_width:di.optional()}),Yct=Se({type:fe("pcb_component"),pcb_component_id:Ki("pcb_component"),source_component_id:R(),center:xs,layer:bd,rotation:fw,width:os,height:os,do_not_place:Je().optional(),subcircuit_id:R().optional(),pcb_group_id:R().optional(),obstructs_within_bounds:Je().default(!0).describe("Does this component take up all the space within its bounds on a layer. This is generally true except for when separated pin headers are being represented by a single component (in which case, chips can be placed between the pin headers) or for tall modules where chips fit underneath")}).describe("Defines a component on the PCB"),qct=Se({type:fe("pcb_hole"),pcb_hole_id:Ki("pcb_hole"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),hole_shape:Xt(["circle","square"]),hole_diameter:Pe(),x:di,y:di}),_Dn=qct.describe("Defines a circular or square hole on the PCB"),Xct=Se({type:fe("pcb_hole"),pcb_hole_id:Ki("pcb_hole"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),hole_shape:fe("oval"),hole_width:Pe(),hole_height:Pe(),x:di,y:di}),yDn=Xct.describe("Defines an oval hole on the PCB"),Wct=Se({type:fe("pcb_hole"),pcb_hole_id:Ki("pcb_hole"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),hole_shape:fe("pill"),hole_width:Pe(),hole_height:Pe(),x:di,y:di}),gDn=Wct.describe("Defines a pill-shaped hole on the PCB"),Kct=Se({type:fe("pcb_hole"),pcb_hole_id:Ki("pcb_hole"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),hole_shape:fe("rotated_pill"),hole_width:Pe(),hole_height:Pe(),x:di,y:di,ccw_rotation:fw}),xDn=Kct.describe("Defines a rotated pill-shaped hole on the PCB"),Zct=qct.or(Xct).or(Wct).or(Kct),bDn=Se({type:fe("pcb_plated_hole"),shape:fe("circle"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),outer_diameter:Pe(),hole_diameter:Pe(),x:di,y:di,layers:ut(bd),port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),pcb_plated_hole_id:Ki("pcb_plated_hole")}),vDn=Se({type:fe("pcb_plated_hole"),shape:Xt(["oval","pill"]),pcb_group_id:R().optional(),subcircuit_id:R().optional(),outer_width:Pe(),outer_height:Pe(),hole_width:Pe(),hole_height:Pe(),x:di,y:di,ccw_rotation:fw,layers:ut(bd),port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),pcb_plated_hole_id:Ki("pcb_plated_hole")}),wDn=Se({type:fe("pcb_plated_hole"),shape:fe("circular_hole_with_rect_pad"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),hole_shape:fe("circle"),pad_shape:fe("rect"),hole_diameter:Pe(),rect_pad_width:Pe(),rect_pad_height:Pe(),rect_border_radius:Pe().optional(),hole_offset_x:di.default(0),hole_offset_y:di.default(0),x:di,y:di,layers:ut(bd),port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),pcb_plated_hole_id:Ki("pcb_plated_hole")}),SDn=Se({type:fe("pcb_plated_hole"),shape:fe("pill_hole_with_rect_pad"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),hole_shape:fe("pill"),pad_shape:fe("rect"),hole_width:Pe(),hole_height:Pe(),rect_pad_width:Pe(),rect_pad_height:Pe(),rect_border_radius:Pe().optional(),hole_offset_x:di.default(0),hole_offset_y:di.default(0),x:di,y:di,layers:ut(bd),port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),pcb_plated_hole_id:Ki("pcb_plated_hole")}),EDn=Se({type:fe("pcb_plated_hole"),shape:fe("rotated_pill_hole_with_rect_pad"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),hole_shape:fe("rotated_pill"),pad_shape:fe("rect"),hole_width:Pe(),hole_height:Pe(),hole_ccw_rotation:fw,rect_pad_width:Pe(),rect_pad_height:Pe(),rect_border_radius:Pe().optional(),rect_ccw_rotation:fw,hole_offset_x:di.default(0),hole_offset_y:di.default(0),x:di,y:di,layers:ut(bd),port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),pcb_plated_hole_id:Ki("pcb_plated_hole")}),Qct=Bn([bDn,vDn,wDn,SDn,EDn]),Jct=Se({type:fe("pcb_port"),pcb_port_id:Ki("pcb_port"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),source_port_id:R(),pcb_component_id:R().optional(),x:di,y:di,layers:ut(bd),is_board_pinout:Je().optional()}).describe("Defines a port on the PCB"),TDn=Se({type:fe("pcb_smtpad"),shape:fe("circle"),pcb_smtpad_id:Ki("pcb_smtpad"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,radius:Pe(),layer:bd,port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),is_covered_with_solder_mask:Je().optional()}),MDn=Se({type:fe("pcb_smtpad"),shape:fe("rect"),pcb_smtpad_id:Ki("pcb_smtpad"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,width:Pe(),height:Pe(),rect_border_radius:Pe().optional(),corner_radius:Pe().optional(),layer:bd,port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),is_covered_with_solder_mask:Je().optional()}),CDn=Se({type:fe("pcb_smtpad"),shape:fe("rotated_rect"),pcb_smtpad_id:Ki("pcb_smtpad"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,width:Pe(),height:Pe(),rect_border_radius:Pe().optional(),corner_radius:Pe().optional(),ccw_rotation:fw,layer:bd,port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),is_covered_with_solder_mask:Je().optional()}),elt=Se({type:fe("pcb_smtpad"),shape:fe("pill"),pcb_smtpad_id:Ki("pcb_smtpad"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,width:Pe(),height:Pe(),radius:Pe(),layer:bd,port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),is_covered_with_solder_mask:Je().optional()}),ADn=Se({type:fe("pcb_smtpad"),shape:fe("rotated_pill"),pcb_smtpad_id:Ki("pcb_smtpad"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,width:Pe(),height:Pe(),radius:Pe(),ccw_rotation:fw,layer:bd,port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),is_covered_with_solder_mask:Je().optional()}),PDn=Se({type:fe("pcb_smtpad"),shape:fe("polygon"),pcb_smtpad_id:Ki("pcb_smtpad"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),points:ut(xs),layer:bd,port_hints:ut(R()).optional(),pcb_component_id:R().optional(),pcb_port_id:R().optional(),is_covered_with_solder_mask:Je().optional()}),tlt=_m("shape",[TDn,MDn,CDn,ADn,elt,PDn]).describe("Defines an SMT pad on the PCB"),RDn=Se({type:fe("pcb_solder_paste"),shape:fe("circle"),pcb_solder_paste_id:Ki("pcb_solder_paste"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,radius:Pe(),layer:bd,pcb_component_id:R().optional(),pcb_smtpad_id:R().optional()}),IDn=Se({type:fe("pcb_solder_paste"),shape:fe("rect"),pcb_solder_paste_id:Ki("pcb_solder_paste"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,width:Pe(),height:Pe(),layer:bd,pcb_component_id:R().optional(),pcb_smtpad_id:R().optional()}),NDn=Se({type:fe("pcb_solder_paste"),shape:fe("pill"),pcb_solder_paste_id:Ki("pcb_solder_paste"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,width:Pe(),height:Pe(),radius:Pe(),layer:bd,pcb_component_id:R().optional(),pcb_smtpad_id:R().optional()}),kDn=Se({type:fe("pcb_solder_paste"),shape:fe("rotated_rect"),pcb_solder_paste_id:Ki("pcb_solder_paste"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,width:Pe(),height:Pe(),ccw_rotation:di,layer:bd,pcb_component_id:R().optional(),pcb_smtpad_id:R().optional()}),ODn=Se({type:fe("pcb_solder_paste"),shape:fe("oval"),pcb_solder_paste_id:Ki("pcb_solder_paste"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,width:Pe(),height:Pe(),layer:bd,pcb_component_id:R().optional(),pcb_smtpad_id:R().optional()}),nlt=Bn([RDn,IDn,NDn,kDn,ODn]).describe("Defines solderpaste on the PCB"),ilt=Se({type:fe("pcb_text"),pcb_text_id:Ki("pcb_text"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),text:R(),center:xs,layer:bd,width:os,height:os,lines:Pe(),align:Xt(["bottom-left"])}).describe("Defines text on the PCB"),rlt=Se({route_type:fe("wire"),x:di,y:di,width:di,start_pcb_port_id:R().optional(),end_pcb_port_id:R().optional(),layer:bd}),olt=Se({route_type:fe("via"),x:di,y:di,hole_diameter:di.optional(),outer_diameter:di.optional(),from_layer:R(),to_layer:R()}),slt=Bn([rlt,olt]),alt=Se({type:fe("pcb_trace"),source_trace_id:R().optional(),pcb_component_id:R().optional(),pcb_trace_id:Ki("pcb_trace"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),route_thickness_mode:Xt(["constant","interpolated"]).default("constant").optional(),route_order_index:Pe().optional(),should_round_corners:Je().optional(),trace_length:Pe().optional(),highlight_color:R().optional(),route:ut(slt)}).describe("Defines a trace on the PCB"),clt=Se({type:fe("pcb_trace_error"),pcb_trace_error_id:Ki("pcb_trace_error"),error_type:fe("pcb_trace_error").default("pcb_trace_error"),message:R(),center:xs.optional(),pcb_trace_id:R(),source_trace_id:R(),pcb_component_ids:ut(R()),pcb_port_ids:ut(R()),subcircuit_id:R().optional()}).describe("Defines a trace error on the PCB"),llt=Se({type:fe("pcb_trace_missing_error"),pcb_trace_missing_error_id:Ki("pcb_trace_missing_error"),error_type:fe("pcb_trace_missing_error").default("pcb_trace_missing_error"),message:R(),center:xs.optional(),source_trace_id:R(),pcb_component_ids:ut(R()),pcb_port_ids:ut(R()),subcircuit_id:R().optional()}).describe("Defines an error when a source trace has no corresponding PCB trace"),ult=Se({type:fe("pcb_port_not_matched_error"),pcb_error_id:Ki("pcb_error"),error_type:fe("pcb_port_not_matched_error").default("pcb_port_not_matched_error"),message:R(),pcb_component_ids:ut(R()),subcircuit_id:R().optional()}).describe("Defines a trace error on the PCB where a port is not matched"),dlt=Se({type:fe("pcb_port_not_connected_error"),pcb_port_not_connected_error_id:Ki("pcb_port_not_connected_error"),error_type:fe("pcb_port_not_connected_error").default("pcb_port_not_connected_error"),message:R(),pcb_port_ids:ut(R()),pcb_component_ids:ut(R()),subcircuit_id:R().optional()}).describe("Defines an error when a pcb port is not connected to any trace"),hlt=Se({type:fe("pcb_net"),pcb_net_id:Ki("pcb_net"),source_net_id:R().optional(),highlight_color:R().optional()}).describe("Defines a net on the PCB"),plt=Se({type:fe("pcb_via"),pcb_via_id:Ki("pcb_via"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),x:di,y:di,outer_diameter:di.default("0.6mm"),hole_diameter:di.default("0.25mm"),from_layer:bd.optional(),to_layer:bd.optional(),layers:ut(bd),pcb_trace_id:R().optional()}).describe("Defines a via on the PCB"),flt=Se({type:fe("pcb_board"),pcb_board_id:Ki("pcb_board"),pcb_panel_id:R().optional(),is_subcircuit:Je().optional(),subcircuit_id:R().optional(),width:os,height:os,center:xs,thickness:os.optional().default(1.4),num_layers:Pe().optional().default(4),outline:ut(xs).optional(),material:Xt(["fr4","fr1"]).default("fr4")}).describe("Defines the board outline of the PCB"),mlt=Se({type:fe("pcb_panel"),pcb_panel_id:Ki("pcb_panel"),width:os,height:os,covered_with_solder_mask:Je().optional().default(!0)}).describe("Defines a PCB panel that can contain multiple boards"),_lt=Se({type:fe("pcb_placement_error"),pcb_placement_error_id:Ki("pcb_placement_error"),error_type:fe("pcb_placement_error").default("pcb_placement_error"),message:R(),subcircuit_id:R().optional()}).describe("Defines a placement error on the PCB"),ylt=Se({type:fe("pcb_trace_hint"),pcb_trace_hint_id:Ki("pcb_trace_hint"),pcb_port_id:R(),pcb_component_id:R(),route:ut(Gct),subcircuit_id:R().optional()}).describe("A hint that can be used during generation of a PCB trace"),glt=Se({type:fe("pcb_silkscreen_line"),pcb_silkscreen_line_id:Ki("pcb_silkscreen_line"),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),stroke_width:di.default("0.1mm"),x1:di,y1:di,x2:di,y2:di,layer:tE}).describe("Defines a silkscreen line on the PCB"),xlt=Se({type:fe("pcb_silkscreen_path"),pcb_silkscreen_path_id:Ki("pcb_silkscreen_path"),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),layer:tE,route:ut(xs),stroke_width:os}).describe("Defines a silkscreen path on the PCB"),blt=Se({type:fe("pcb_silkscreen_text"),pcb_silkscreen_text_id:Ki("pcb_silkscreen_text"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),font:fe("tscircuit2024").default("tscircuit2024"),font_size:di.default("0.2mm"),pcb_component_id:R(),text:R(),is_knockout:Je().default(!1).optional(),knockout_padding:Se({left:os,top:os,bottom:os,right:os}).default({left:"0.2mm",top:"0.2mm",bottom:"0.2mm",right:"0.2mm"}).optional(),ccw_rotation:Pe().optional(),layer:bd,is_mirrored:Je().default(!1).optional(),anchor_position:xs.default({x:0,y:0}),anchor_alignment:gL.default("center")}).describe("Defines silkscreen text on the PCB"),vlt=Se({type:fe("pcb_copper_text"),pcb_copper_text_id:Ki("pcb_copper_text"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),font:fe("tscircuit2024").default("tscircuit2024"),font_size:di.default("0.2mm"),pcb_component_id:R(),text:R(),is_knockout:Je().default(!1).optional(),knockout_padding:Se({left:os,top:os,bottom:os,right:os}).default({left:"0.2mm",top:"0.2mm",bottom:"0.2mm",right:"0.2mm"}).optional(),ccw_rotation:Pe().optional(),layer:bd,is_mirrored:Je().default(!1).optional(),anchor_position:xs.default({x:0,y:0}),anchor_alignment:gL.default("center")}).describe("Defines copper text on the PCB"),wlt=Se({type:fe("pcb_silkscreen_rect"),pcb_silkscreen_rect_id:Ki("pcb_silkscreen_rect"),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),center:xs,width:os,height:os,layer:bd,stroke_width:os.default("1mm"),is_filled:Je().default(!0).optional(),has_stroke:Je().optional(),is_stroke_dashed:Je().optional()}).describe("Defines a silkscreen rect on the PCB"),Slt=Se({type:fe("pcb_silkscreen_circle"),pcb_silkscreen_circle_id:Ki("pcb_silkscreen_circle"),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),center:xs,radius:os,layer:tE,stroke_width:os.default("1mm")}).describe("Defines a silkscreen circle on the PCB"),Elt=Se({type:fe("pcb_silkscreen_oval"),pcb_silkscreen_oval_id:Ki("pcb_silkscreen_oval"),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),center:xs,radius_x:di,radius_y:di,layer:tE}).describe("Defines a silkscreen oval on the PCB"),Tlt=Se({type:fe("pcb_fabrication_note_text"),pcb_fabrication_note_text_id:Ki("pcb_fabrication_note_text"),subcircuit_id:R().optional(),pcb_group_id:R().optional(),font:fe("tscircuit2024").default("tscircuit2024"),font_size:di.default("1mm"),pcb_component_id:R(),text:R(),layer:tE,anchor_position:xs.default({x:0,y:0}),anchor_alignment:Xt(["center","top_left","top_right","bottom_left","bottom_right"]).default("center"),color:R().optional()}).describe("Defines a fabrication note in text on the PCB, useful for leaving notes for assemblers or fabricators"),Mlt=Se({type:fe("pcb_fabrication_note_path"),pcb_fabrication_note_path_id:Ki("pcb_fabrication_note_path"),pcb_component_id:R(),subcircuit_id:R().optional(),layer:bd,route:ut(xs),stroke_width:os,color:R().optional()}).describe("Defines a fabrication path on the PCB for fabricators or assemblers"),Clt=Se({type:fe("pcb_fabrication_note_rect"),pcb_fabrication_note_rect_id:Ki("pcb_fabrication_note_rect"),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),center:xs,width:os,height:os,layer:tE,stroke_width:os.default("0.1mm"),is_filled:Je().optional(),has_stroke:Je().optional(),is_stroke_dashed:Je().optional(),color:R().optional()}).describe("Defines a fabrication note rectangle on the PCB"),Alt=Se({type:fe("pcb_fabrication_note_dimension"),pcb_fabrication_note_dimension_id:Ki("pcb_fabrication_note_dimension"),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),layer:tE,from:xs,to:xs,text:R().optional(),text_ccw_rotation:Pe().optional(),offset:os.optional(),offset_distance:os.optional(),offset_direction:Se({x:Pe(),y:Pe()}).optional(),font:fe("tscircuit2024").default("tscircuit2024"),font_size:os.default("1mm"),color:R().optional(),arrow_size:os.default("1mm")}).describe("Defines a measurement annotation within PCB fabrication notes"),Plt=Se({type:fe("pcb_note_text"),pcb_note_text_id:Ki("pcb_note_text"),pcb_component_id:R().optional(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),name:R().optional(),font:fe("tscircuit2024").default("tscircuit2024"),font_size:di.default("1mm"),text:R().optional(),anchor_position:xs.default({x:0,y:0}),anchor_alignment:Xt(["center","top_left","top_right","bottom_left","bottom_right"]).default("center"),color:R().optional()}).describe("Defines a documentation note in text on the PCB"),Rlt=Se({type:fe("pcb_note_rect"),pcb_note_rect_id:Ki("pcb_note_rect"),pcb_component_id:R().optional(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),name:R().optional(),text:R().optional(),center:xs,width:os,height:os,stroke_width:os.default("0.1mm"),is_filled:Je().optional(),has_stroke:Je().optional(),is_stroke_dashed:Je().optional(),color:R().optional()}).describe("Defines a rectangular documentation note on the PCB"),Ilt=Se({type:fe("pcb_note_path"),pcb_note_path_id:Ki("pcb_note_path"),pcb_component_id:R().optional(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),name:R().optional(),text:R().optional(),route:ut(xs),stroke_width:os.default("0.1mm"),color:R().optional()}).describe("Defines a polyline documentation note on the PCB"),Nlt=Se({type:fe("pcb_note_line"),pcb_note_line_id:Ki("pcb_note_line"),pcb_component_id:R().optional(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),name:R().optional(),text:R().optional(),x1:di,y1:di,x2:di,y2:di,stroke_width:di.default("0.1mm"),color:R().optional(),is_dashed:Je().optional()}).describe("Defines a straight documentation note line on the PCB"),klt=Se({type:fe("pcb_note_dimension"),pcb_note_dimension_id:Ki("pcb_note_dimension"),pcb_component_id:R().optional(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),name:R().optional(),from:xs,to:xs,text:R().optional(),text_ccw_rotation:Pe().optional(),offset_distance:os.optional(),offset_direction:Se({x:Pe(),y:Pe()}).optional(),font:fe("tscircuit2024").default("tscircuit2024"),font_size:os.default("1mm"),color:R().optional(),arrow_size:os.default("1mm")}).describe("Defines a measurement annotation within PCB documentation notes"),Olt=Se({type:fe("pcb_footprint_overlap_error"),pcb_error_id:Ki("pcb_error"),error_type:fe("pcb_footprint_overlap_error").default("pcb_footprint_overlap_error"),message:R(),pcb_smtpad_ids:ut(R()).optional(),pcb_plated_hole_ids:ut(R()).optional(),pcb_hole_ids:ut(R()).optional(),pcb_keepout_ids:ut(R()).optional()}).describe("Error emitted when a pcb footprint overlaps with another element"),Llt=Se({type:fe("pcb_keepout"),shape:fe("rect"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),center:xs,width:di,height:di,pcb_keepout_id:R(),layers:ut(R()),description:R().optional()}).or(Se({type:fe("pcb_keepout"),shape:fe("circle"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),center:xs,radius:di,pcb_keepout_id:R(),layers:ut(R()),description:R().optional()})),D1e=Se({type:fe("pcb_cutout"),pcb_cutout_id:Ki("pcb_cutout"),pcb_group_id:R().optional(),subcircuit_id:R().optional()}),Dlt=D1e.extend({shape:fe("rect"),center:xs,width:os,height:os,rotation:fw.optional()}),zlt=D1e.extend({shape:fe("circle"),center:xs,radius:os}),$lt=D1e.extend({shape:fe("polygon"),points:ut(xs)}),Flt=_m("shape",[Dlt,zlt,$lt]).describe("Defines a cutout on the PCB, removing board material."),Ult=Se({type:fe("pcb_missing_footprint_error"),pcb_missing_footprint_error_id:Ki("pcb_missing_footprint_error"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),error_type:fe("pcb_missing_footprint_error").default("pcb_missing_footprint_error"),source_component_id:R(),message:R()}).describe("Defines a missing footprint error on the PCB"),Blt=Se({type:fe("external_footprint_load_error"),external_footprint_load_error_id:Ki("external_footprint_load_error"),pcb_component_id:R(),source_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),footprinter_string:R().optional(),error_type:fe("external_footprint_load_error").default("external_footprint_load_error"),message:R()}).describe("Defines an error when an external footprint fails to load"),jlt=Se({type:fe("circuit_json_footprint_load_error"),circuit_json_footprint_load_error_id:Ki("circuit_json_footprint_load_error"),pcb_component_id:R(),source_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),error_type:fe("circuit_json_footprint_load_error").default("circuit_json_footprint_load_error"),message:R(),circuit_json:ut(fl()).optional()}).describe("Defines an error when a circuit JSON footprint fails to load"),Hlt=Se({type:fe("pcb_group"),pcb_group_id:Ki("pcb_group"),source_group_id:R(),is_subcircuit:Je().optional(),subcircuit_id:R().optional(),width:os.optional(),height:os.optional(),center:xs,outline:ut(xs).optional(),anchor_position:xs.optional(),anchor_alignment:Xt(["center","top_left","top_right","bottom_left","bottom_right"]).optional(),pcb_component_ids:ut(R()),name:R().optional(),description:R().optional(),layout_mode:R().optional(),autorouter_configuration:Se({trace_clearance:os}).optional(),autorouter_used_string:R().optional()}).describe("Defines a group of components on the PCB"),Vlt=Se({type:fe("pcb_autorouting_error"),pcb_error_id:Ki("pcb_autorouting_error"),error_type:fe("pcb_autorouting_error").default("pcb_autorouting_error"),message:R(),subcircuit_id:R().optional()}).describe("The autorouting has failed to route a portion of the board"),Glt=Se({type:fe("pcb_manual_edit_conflict_warning"),pcb_manual_edit_conflict_warning_id:Ki("pcb_manual_edit_conflict_warning"),warning_type:fe("pcb_manual_edit_conflict_warning").default("pcb_manual_edit_conflict_warning"),message:R(),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),source_component_id:R()}).describe("Warning emitted when a component has both manual placement and explicit pcbX/pcbY coordinates"),Ylt=Se({type:fe("pcb_breakout_point"),pcb_breakout_point_id:Ki("pcb_breakout_point"),pcb_group_id:R(),subcircuit_id:R().optional(),source_trace_id:R().optional(),source_port_id:R().optional(),source_net_id:R().optional(),x:di,y:di}).describe("Defines a routing target within a pcb_group for a source_trace or source_net"),qlt=Se({type:fe("pcb_ground_plane"),pcb_ground_plane_id:Ki("pcb_ground_plane"),source_pcb_ground_plane_id:R(),source_net_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional()}).describe("Defines a ground plane on the PCB"),Xlt=Se({type:fe("pcb_ground_plane_region"),pcb_ground_plane_region_id:Ki("pcb_ground_plane_region"),pcb_ground_plane_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),layer:bd,points:ut(xs)}).describe("Defines a polygon region of a ground plane"),Wlt=Se({type:fe("pcb_thermal_spoke"),pcb_thermal_spoke_id:Ki("pcb_thermal_spoke"),pcb_ground_plane_id:R(),shape:R(),spoke_count:Pe(),spoke_thickness:di,spoke_inner_diameter:di,spoke_outer_diameter:di,pcb_plated_hole_id:R().optional(),subcircuit_id:R().optional()}).describe("Pattern for connecting a ground plane to a plated hole"),z1e=Se({type:fe("pcb_copper_pour"),pcb_copper_pour_id:Ki("pcb_copper_pour"),pcb_group_id:R().optional(),subcircuit_id:R().optional(),layer:bd,source_net_id:R().optional()}),Klt=z1e.extend({shape:fe("rect"),center:xs,width:os,height:os,rotation:fw.optional()}),Zlt=z1e.extend({shape:fe("brep"),brep_shape:Hct}),Qlt=z1e.extend({shape:fe("polygon"),points:ut(xs)}),Jlt=_m("shape",[Klt,Zlt,Qlt]).describe("Defines a copper pour on the PCB."),eut=Se({type:fe("pcb_component_outside_board_error"),pcb_component_outside_board_error_id:Ki("pcb_component_outside_board_error"),error_type:fe("pcb_component_outside_board_error").default("pcb_component_outside_board_error"),message:R(),pcb_component_id:R(),pcb_board_id:R(),component_center:xs,component_bounds:Se({min_x:Pe(),max_x:Pe(),min_y:Pe(),max_y:Pe()}),subcircuit_id:R().optional(),source_component_id:R().optional()}).describe("Error emitted when a PCB component is placed outside the board boundaries"),tut=Se({type:fe("pcb_component_invalid_layer_error"),pcb_component_invalid_layer_error_id:Ki("pcb_component_invalid_layer_error"),error_type:fe("pcb_component_invalid_layer_error").default("pcb_component_invalid_layer_error"),message:R(),pcb_component_id:R().optional(),source_component_id:R(),layer:bd,subcircuit_id:R().optional()}).describe("Error emitted when a component is placed on an invalid layer (components can only be on 'top' or 'bottom' layers)"),nut=Se({type:fe("pcb_via_clearance_error"),pcb_error_id:Ki("pcb_error"),error_type:fe("pcb_via_clearance_error").default("pcb_via_clearance_error"),message:R(),pcb_via_ids:ut(R()).min(2),minimum_clearance:di.optional(),actual_clearance:di.optional(),pcb_center:Se({x:Pe().optional(),y:Pe().optional()}).optional(),subcircuit_id:R().optional()}).describe("Error emitted when vias are closer than the allowed clearance"),iut=Se({type:fe("pcb_courtyard_rect"),pcb_courtyard_rect_id:Ki("pcb_courtyard_rect"),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),center:xs,width:os,height:os,layer:tE,color:R().optional()}).describe("Defines a courtyard rectangle on the PCB"),rut=Se({type:fe("pcb_courtyard_outline"),pcb_courtyard_outline_id:Ki("pcb_courtyard_outline"),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),layer:tE,outline:ut(xs).min(2),stroke_width:os.default("0.1mm"),is_closed:Je().optional(),is_stroke_dashed:Je().optional(),color:R().optional()}).describe("Defines a courtyard outline on the PCB"),out=Se({type:fe("pcb_courtyard_polygon"),pcb_courtyard_polygon_id:Ki("pcb_courtyard_polygon"),pcb_component_id:R(),pcb_group_id:R().optional(),subcircuit_id:R().optional(),layer:tE,points:ut(xs).min(3),color:R().optional()}).describe("Defines a courtyard polygon on the PCB"),sut=Se({type:fe("cad_component"),cad_component_id:R(),pcb_component_id:R(),source_component_id:R(),position:yL,rotation:yL.optional(),size:yL.optional(),layer:bd.optional(),subcircuit_id:R().optional(),footprinter_string:R().optional(),model_obj_url:R().optional(),model_stl_url:R().optional(),model_3mf_url:R().optional(),model_gltf_url:R().optional(),model_glb_url:R().optional(),model_step_url:R().optional(),model_wrl_url:R().optional(),model_unit_to_mm_scale_factor:Pe().optional(),model_jscad:fl().optional()}).describe("Defines a component on the PCB"),aut=Xt(["sinewave","square","triangle","sawtooth"]),LDn=Bn([R(),Pe()]).transform(n=>typeof n=="string"?n.endsWith("%")?parseFloat(n.slice(0,-1))/100:parseFloat(n):n).pipe(Pe().min(0,"Duty cycle must be non-negative").max(1,"Duty cycle cannot be greater than 100%")),cut=Se({type:fe("simulation_voltage_source"),simulation_voltage_source_id:Ki("simulation_voltage_source"),is_dc_source:fe(!0).optional().default(!0),positive_source_port_id:R().optional(),negative_source_port_id:R().optional(),positive_source_net_id:R().optional(),negative_source_net_id:R().optional(),voltage:L4}).describe("Defines a DC voltage source for simulation"),lut=Se({type:fe("simulation_voltage_source"),simulation_voltage_source_id:Ki("simulation_voltage_source"),is_dc_source:fe(!1),terminal1_source_port_id:R().optional(),terminal2_source_port_id:R().optional(),terminal1_source_net_id:R().optional(),terminal2_source_net_id:R().optional(),voltage:L4.optional(),frequency:JG.optional(),peak_to_peak_voltage:L4.optional(),wave_shape:aut.optional(),phase:fw.optional(),duty_cycle:LDn.optional()}).describe("Defines an AC voltage source for simulation"),uut=Bn([cut,lut]).describe("Defines a voltage source for simulation"),dut=Bn([fe("spice_dc_sweep"),fe("spice_dc_operating_point"),fe("spice_transient_analysis"),fe("spice_ac_analysis")]),hut=Se({type:fe("simulation_experiment"),simulation_experiment_id:Ki("simulation_experiment"),name:R(),experiment_type:dut,time_per_step:_L.optional(),start_time_ms:D4.optional(),end_time_ms:D4.optional()}).describe("Defines a simulation experiment configuration"),put=Se({type:fe("simulation_transient_voltage_graph"),simulation_transient_voltage_graph_id:Ki("simulation_transient_voltage_graph"),simulation_experiment_id:R(),timestamps_ms:ut(Pe()).optional(),voltage_levels:ut(Pe()),schematic_voltage_probe_id:R().optional(),simulation_voltage_probe_id:R().optional(),subcircuit_connectivity_map_key:R().optional(),time_per_step:_L,start_time_ms:D4,end_time_ms:D4,name:R().optional()}).describe("Stores voltage measurements over time for a simulation"),fut=Se({type:fe("simulation_switch"),simulation_switch_id:Ki("simulation_switch"),source_component_id:R().optional(),closes_at:D4.optional(),opens_at:D4.optional(),starts_closed:Je().optional(),switching_frequency:JG.optional()}).describe("Defines a switch for simulation timing control"),mut=Se({type:fe("simulation_voltage_probe"),simulation_voltage_probe_id:Ki("simulation_voltage_probe"),source_port_id:R().optional(),source_net_id:R().optional(),name:R().optional(),subcircuit_id:R().optional()}).describe("Defines a voltage probe for simulation, connected to a port or a net").refine(n=>!!n.source_port_id!=!!n.source_net_id,{message:"Exactly one of source_port_id or source_net_id must be provided to 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yut=Object.freeze(Object.defineProperty({__proto__:null,all_layers:pct,any_circuit_element:_ut,any_soup_element:$1e,any_source_component:sct,battery_capacity:Jat,brep_shape:Hct,cad_component:sut,capacitance:p1e,circuit_json_footprint_load_error:jlt,current:cDn,distance:di,duration_ms:_L,experiment_type:dut,external_footprint_load_error:Blt,frequency:JG,getZodPrefixedIdWithDefault:Ki,inductance:Zat,layer_ref:bd,layer_string:O1e,length:os,ms:D4,ninePointAnchor:gL,pcb_autorouting_error:Vlt,pcb_board:flt,pcb_breakout_point:Ylt,pcb_component:Yct,pcb_component_invalid_layer_error:tut,pcb_component_outside_board_error:eut,pcb_copper_pour:Jlt,pcb_copper_pour_brep:Zlt,pcb_copper_pour_polygon:Qlt,pcb_copper_pour_rect:Klt,pcb_copper_text:vlt,pcb_courtyard_outline:rut,pcb_courtyard_polygon:out,pcb_courtyard_rect:iut,pcb_cutout:Flt,pcb_cutout_circle:zlt,pcb_cutout_polygon:$lt,pcb_cutout_rect:Dlt,pcb_fabrication_note_dimension:Alt,pcb_fabrication_note_path:Mlt,pcb_fabrication_note_rect:Clt,pcb_fabrication_note_text:Tlt,pcb_footprint_overlap_error:Olt,pcb_ground_plane:qlt,pcb_ground_plane_region:Xlt,pcb_group:Hlt,pcb_hole:Zct,pcb_hole_circle_or_square_shape:_Dn,pcb_hole_oval_shape:yDn,pcb_hole_pill_shape:gDn,pcb_hole_rotated_pill_shape:xDn,pcb_keepout:Llt,pcb_manual_edit_conflict_warning:Glt,pcb_missing_footprint_error:Ult,pcb_net:hlt,pcb_note_dimension:klt,pcb_note_line:Nlt,pcb_note_path:Ilt,pcb_note_rect:Rlt,pcb_note_text:Plt,pcb_panel:mlt,pcb_placement_error:_lt,pcb_plated_hole:Qct,pcb_port:Jct,pcb_port_not_connected_error:dlt,pcb_port_not_matched_error:ult,pcb_route_hint:Vct,pcb_route_hints:mDn,pcb_silkscreen_circle:Slt,pcb_silkscreen_line:glt,pcb_silkscreen_oval:Elt,pcb_silkscreen_path:xlt,pcb_silkscreen_rect:wlt,pcb_silkscreen_text:blt,pcb_smtpad:tlt,pcb_smtpad_pill:elt,pcb_solder_paste:nlt,pcb_text:ilt,pcb_thermal_spoke:Wlt,pcb_trace:alt,pcb_trace_error:clt,pcb_trace_hint:ylt,pcb_trace_missing_error:llt,pcb_trace_route_point:slt,pcb_trace_route_point_via:olt,pcb_trace_route_point_wire:rlt,pcb_via:plt,pcb_via_clearance_error:nut,point:xs,point3:yL,point_with_bulge:jct,port_arrangement:vct,position:uDn,position3:dDn,resistance:QG,ring:L1e,rotation:fw,route_hint_point:Gct,schematic_arc:Mct,schematic_box:_ct,schematic_circle:Tct,schematic_component:wct,schematic_component_port_arrangement_by_sides:bct,schematic_component_port_arrangement_by_size:xct,schematic_debug_line:Oct,schematic_debug_object:Dct,schematic_debug_object_base:tY,schematic_debug_point:Lct,schematic_debug_rect:kct,schematic_error:Ict,schematic_group:Fct,schematic_layout_error:Nct,schematic_line:Sct,schematic_manual_edit_conflict_warning:$ct,schematic_net_label:Rct,schematic_path:yct,schematic_pin_styles:gct,schematic_port:Pct,schematic_rect:Ect,schematic_table:Uct,schematic_table_cell:Bct,schematic_text:Act,schematic_trace:Cct,schematic_voltage_probe:zct,simulation_ac_voltage_source:lut,simulation_dc_voltage_source:cut,simulation_experiment:hut,simulation_switch:fut,simulation_transient_voltage_graph:put,simulation_voltage_probe:mut,simulation_voltage_source:uut,size:f1e,source_board:dct,source_component_base:Zg,source_failed_to_create_component_error:rct,source_group:lct,source_manually_placed_via:fct,source_missing_property_error:ict,source_net:uct,source_pcb_ground_plane:hct,source_pin_missing_trace_warning:k1e,source_port:act,source_project_metadata:I1e,source_property_ignored_warning:oct,source_simple_battery:b1e,source_simple_capacitor:m1e,source_simple_chip:g1e,source_simple_crystal:nct,source_simple_diode:eY,source_simple_ground:tct,source_simple_inductor:v1e,source_simple_led:y1e,source_simple_mosfet:P1e,source_simple_pin_header:E1e,source_simple_pinout:T1e,source_simple_potentiometer:S1e,source_simple_power_source:x1e,source_simple_push_button:w1e,source_simple_resistor:_1e,source_simple_resonator:M1e,source_simple_switch:R1e,source_simple_test_point:A1e,source_simple_transistor:C1e,source_trace:cct,source_trace_not_connected_error:N1e,supplier_name:ect,time:lDn,timestamp:Qat,unknown_error_finding_part:mct,visible_layer:tE,voltage:L4,wave_shape:aut},Symbol.toStringTag,{value:"Module"})),DDn={},gut=n=>{let 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