npm - @tscircuit/rectdiff - Versions diffs - 0.0.20 → 0.0.21 - Mend

@tscircuit/rectdiff 0.0.20 → 0.0.21

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.

Files changed (107) hide show

package/tests/solver/bugreport02-bc4361/bugreport02-bc4361.json ADDED Viewed

@@ -0,0 +1,1276 @@
+{
+  "autorouting_bug_report_id": "bc436135-963b-4878-9af3-1c3e41b15dd9",
+  "reporter_account_id": "147e6e80-ff7a-4ae4-8f8f-5edc4869f313",
+  "package_id": null,
+  "title": "<board#109 />",
+  "simple_route_json": {
+    "bounds": {
+      "maxX": 6.35,
+      "maxY": 8.89,
+      "minX": -6.35,
+      "minY": -8.89
+    },
+    "obstacles": [
+      {
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+        "width": 1.2,
+        "center": {
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+          "y": 3.8100000000000005
+        },
+        "height": 0.6,
+        "layers": ["top"],
+        "connectedTo": [
+          "pcb_smtpad_0",
+          "connectivity_net63",
+          "source_trace_27",
+          "source_trace_25",
+          "source_port_31",
+          "source_trace_23",
+          "source_trace_21",
+          "source_port_29",
+          "source_trace_2",
+          "source_port_13",
+          "source_trace_1",
+          "source_port_20",
+          "source_trace_0",
+          "source_port_0",
+          "source_net_0",
+          "pcb_smtpad_0",
+          "pcb_port_0",
+          "pcb_plated_hole_1",
+          "pcb_port_13",
+          "pcb_smtpad_15",
+          "pcb_port_20",
+          "pcb_smtpad_17",
+          "pcb_port_29",
+          "pcb_smtpad_19",
+          "pcb_port_31"
+        ]
+      },
+      {
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+        "width": 1.2,
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+          "y": 2.5400000000000005
+        },
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+        "layers": ["top"],
+        "connectedTo": [
+          "pcb_smtpad_1",
+          "connectivity_net22",
+          "source_trace_8",
+          "source_port_17",
+          "source_port_1",
+          "pcb_smtpad_1",
+          "pcb_port_1",
+          "pcb_plated_hole_5",
+          "pcb_port_17"
+        ]
+      },
+      {
+        "type": "rect",
+        "width": 1.2,
+        "center": {
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+          "y": 1.2700000000000005
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+        "layers": ["top"],
+        "connectedTo": [
+          "pcb_smtpad_2",
+          "connectivity_net19",
+          "source_trace_7",
+          "source_port_16",
+          "source_port_2",
+          "pcb_smtpad_2",
+          "pcb_port_2",
+          "pcb_plated_hole_4",
+          "pcb_port_16"
+        ]
+      },
+      {
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+        "center": {
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+          "y": 5.143516556418883e-16
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+        "layers": ["top"],
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+          "connectivity_net16",
+          "source_trace_6",
+          "source_port_15",
+          "source_port_3",
+          "pcb_smtpad_3",
+          "pcb_port_3",
+          "pcb_plated_hole_3",
+          "pcb_port_15"
+        ]
+      },
+      {
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+        "width": 1.2,
+        "center": {
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+          "y": -1.2699999999999996
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+        "layers": ["top"],
+        "connectedTo": [
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+          "connectivity_net13",
+          "source_trace_5",
+          "source_port_14",
+          "source_port_4",
+          "pcb_smtpad_4",
+          "pcb_port_4",
+          "pcb_plated_hole_2",
+          "pcb_port_14"
+        ]
+      },
+      {
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+        "layers": ["top"],
+        "connectedTo": ["pcb_smtpad_5"]
+      },
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+        "layers": ["top"],
+        "connectedTo": [
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+          "connectivity_net64",
+          "source_trace_28",
+          "source_trace_26",
+          "source_port_30",
+          "source_trace_24",
+          "source_trace_22",
+          "source_port_28",
+          "source_trace_20",
+          "source_trace_4",
+          "source_port_12",
+          "source_port_5",
+          "source_trace_19",
+          "source_trace_11",
+          "source_port_21",
+          "source_net_2",
+          "pcb_smtpad_6",
+          "pcb_port_5",
+          "pcb_plated_hole_0",
+          "pcb_port_12",
+          "pcb_plated_hole_7",
+          "pcb_port_21",
+          "pcb_smtpad_16",
+          "pcb_port_28",
+          "pcb_smtpad_18",
+          "pcb_port_30"
+        ]
+      },
+      {
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+        "layers": ["top"],
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+          "connectivity_net28",
+          "source_trace_10",
+          "source_trace_9",
+          "source_port_18",
+          "source_port_19",
+          "source_port_6",
+          "pcb_smtpad_7",
+          "pcb_port_6",
+          "pcb_plated_hole_6",
+          "pcb_port_18",
+          "pcb_smtpad_14",
+          "pcb_port_19"
+        ]
+      },
+      {
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+        },
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+        "layers": ["top"],
+        "connectedTo": ["pcb_smtpad_8"]
+      },
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+        "layers": ["top"],
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+          "connectivity_net35",
+          "source_trace_13",
+          "source_port_23",
+          "source_port_7",
+          "pcb_smtpad_9",
+          "pcb_port_7",
+          "pcb_plated_hole_9",
+          "pcb_port_23"
+        ]
+      },
+      {
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+          "connectivity_net38",
+          "source_trace_14",
+          "source_port_24",
+          "source_port_8",
+          "pcb_smtpad_10",
+          "pcb_port_8",
+          "pcb_plated_hole_10",
+          "pcb_port_24"
+        ]
+      },
+      {
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+          "source_trace_15",
+          "source_port_25",
+          "source_port_9",
+          "pcb_smtpad_11",
+          "pcb_port_9",
+          "pcb_plated_hole_11",
+          "pcb_port_25"
+        ]
+      },
+      {
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+          "source_trace_16",
+          "source_port_26",
+          "source_port_10",
+          "pcb_smtpad_12",
+          "pcb_port_10",
+          "pcb_plated_hole_12",
+          "pcb_port_26"
+        ]
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+          "source_trace_12",
+          "source_port_22",
+          "source_trace_3",
+          "source_port_11",
+          "source_net_1",
+          "pcb_smtpad_13",
+          "pcb_port_11",
+          "pcb_plated_hole_8",
+          "pcb_port_22"
+        ]
+      },
+      {
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+          "source_trace_9",
+          "source_port_18",
+          "source_port_19",
+          "source_port_6",
+          "pcb_smtpad_7",
+          "pcb_port_6",
+          "pcb_plated_hole_6",
+          "pcb_port_18",
+          "pcb_smtpad_14",
+          "pcb_port_19"
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+        "layers": ["top"],
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+          "source_trace_27",
+          "source_trace_25",
+          "source_port_31",
+          "source_trace_23",
+          "source_trace_21",
+          "source_port_29",
+          "source_trace_2",
+          "source_port_13",
+          "source_trace_1",
+          "source_port_20",
+          "source_trace_0",
+          "source_port_0",
+          "source_net_0",
+          "pcb_smtpad_0",
+          "pcb_port_0",
+          "pcb_plated_hole_1",
+          "pcb_port_13",
+          "pcb_smtpad_15",
+          "pcb_port_20",
+          "pcb_smtpad_17",
+          "pcb_port_29",
+          "pcb_smtpad_19",
+          "pcb_port_31"
+        ]
+      },
+      {
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+        "layers": ["top"],
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+          "source_port_30",
+          "source_trace_24",
+          "source_trace_22",
+          "source_port_28",
+          "source_trace_20",
+          "source_trace_4",
+          "source_port_12",
+          "source_port_5",
+          "source_trace_19",
+          "source_trace_11",
+          "source_port_21",
+          "source_net_2",
+          "pcb_smtpad_6",
+          "pcb_port_5",
+          "pcb_plated_hole_0",
+          "pcb_port_12",
+          "pcb_plated_hole_7",
+          "pcb_port_21",
+          "pcb_smtpad_16",
+          "pcb_port_28",
+          "pcb_smtpad_18",
+          "pcb_port_30"
+        ]
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+          "source_port_31",
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+          "source_trace_21",
+          "source_port_29",
+          "source_trace_2",
+          "source_port_13",
+          "source_trace_1",
+          "source_port_20",
+          "source_trace_0",
+          "source_port_0",
+          "source_net_0",
+          "pcb_smtpad_0",
+          "pcb_port_0",
+          "pcb_plated_hole_1",
+          "pcb_port_13",
+          "pcb_smtpad_15",
+          "pcb_port_20",
+          "pcb_smtpad_17",
+          "pcb_port_29",
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+          "source_port_5",
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+          "source_port_21",
+          "source_net_2",
+          "pcb_smtpad_6",
+          "pcb_port_5",
+          "pcb_plated_hole_0",
+          "pcb_port_12",
+          "pcb_plated_hole_7",
+          "pcb_port_21",
+          "pcb_smtpad_16",
+          "pcb_port_28",
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+          "source_net_0",
+          "pcb_smtpad_0",
+          "pcb_port_0",
+          "pcb_plated_hole_1",
+          "pcb_port_13",
+          "pcb_smtpad_15",
+          "pcb_port_20",
+          "pcb_smtpad_17",
+          "pcb_port_29",
+          "pcb_smtpad_19",
+          "pcb_port_31"
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+          "source_trace_22",
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+          "source_port_21",
+          "source_net_2",
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+          "pcb_port_5",
+          "pcb_plated_hole_0",
+          "pcb_port_12",
+          "pcb_plated_hole_7",
+          "pcb_port_21",
+          "pcb_smtpad_16",
+          "pcb_port_28",
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+          "source_trace_25",
+          "source_port_31",
+          "source_trace_23",
+          "source_trace_21",
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+          "source_trace_2",
+          "source_port_13",
+          "source_trace_1",
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+          "source_trace_0",
+          "source_port_0",
+          "source_net_0",
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+          "pcb_port_0",
+          "pcb_plated_hole_1",
+          "pcb_port_13",
+          "pcb_smtpad_15",
+          "pcb_port_20",
+          "pcb_smtpad_17",
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+          "source_port_3",
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+          "connectivity_net22",
+          "source_trace_8",
+          "source_port_17",
+          "source_port_1",
+          "pcb_smtpad_1",
+          "pcb_port_1",
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+          "pcb_port_6",
+          "pcb_plated_hole_6",
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+}