@tscircuit/eval 0.0.366 → 0.0.368

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
@@ -406,12 +406,12 @@ declare function runTscircuitCode(filesystemOrCodeString: Record<string, string>
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  error_type: "source_failed_to_create_component_error";
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  source_failed_to_create_component_error_id: string;
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  subcircuit_id?: string | undefined;
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- component_name?: string | undefined;
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- parent_source_component_id?: string | undefined;
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  pcb_center?: {
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  x?: number | undefined;
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  y?: number | undefined;
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  } | undefined;
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+ component_name?: string | undefined;
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+ parent_source_component_id?: string | undefined;
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  schematic_center?: {
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  x?: number | undefined;
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  y?: number | undefined;
@@ -464,6 +464,7 @@ declare function runTscircuitCode(filesystemOrCodeString: Record<string, string>
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  show_as_schematic_box?: boolean | undefined;
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  parent_subcircuit_id?: string | undefined;
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  parent_source_group_id?: string | undefined;
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+ was_automatically_named?: boolean | undefined;
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  } | {
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  type: "source_component";
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  name: string;
@@ -1350,6 +1351,19 @@ declare function runTscircuitCode(filesystemOrCodeString: Record<string, string>
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  pcb_port_ids: string[];
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  pcb_port_not_connected_error_id: string;
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  subcircuit_id?: string | undefined;
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+ } | {
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+ message: string;
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+ type: "pcb_via_clearance_error";
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+ error_type: "pcb_via_clearance_error";
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+ pcb_error_id: string;
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+ pcb_via_ids: string[];
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+ subcircuit_id?: string | undefined;
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+ minimum_clearance?: number | undefined;
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+ actual_clearance?: number | undefined;
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+ pcb_center?: {
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+ x?: number | undefined;
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+ y?: number | undefined;
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+ } | undefined;
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  } | {
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  type: "pcb_fabrication_note_path";
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  pcb_component_id: string;
@@ -1546,8 +1560,8 @@ declare function runTscircuitCode(filesystemOrCodeString: Record<string, string>
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  subcircuit_id?: string | undefined;
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  schematic_component_id?: string | undefined;
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  } | {
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- anchor: "top" | "bottom" | "center" | "top_left" | "top_center" | "top_right" | "center_left" | "center_right" | "bottom_left" | "bottom_center" | "bottom_right" | "left" | "right";
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  type: "schematic_text";
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+ anchor: "top" | "bottom" | "center" | "top_left" | "top_center" | "top_right" | "center_left" | "center_right" | "bottom_left" | "bottom_center" | "bottom_right" | "left" | "right";
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  rotation: number;
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  text: string;
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  font_size: number;
@@ -1918,18 +1932,35 @@ declare function runTscircuitCode(filesystemOrCodeString: Record<string, string>
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  name: string;
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  simulation_experiment_id: string;
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  experiment_type: "spice_dc_sweep" | "spice_dc_operating_point" | "spice_transient_analysis" | "spice_ac_analysis";
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+ time_per_step?: number | undefined;
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+ start_time_ms?: number | undefined;
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+ end_time_ms?: number | undefined;
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  } | {
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  type: "simulation_transient_voltage_graph";
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  simulation_experiment_id: string;
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- simulation_transient_voltage_graph_id: string;
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- voltage_levels: number[];
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  time_per_step: number;
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  start_time_ms: number;
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  end_time_ms: number;
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+ simulation_transient_voltage_graph_id: string;
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+ voltage_levels: number[];
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  name?: string | undefined;
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+ subcircuit_connectivity_map_key?: string | undefined;
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  schematic_voltage_probe_id?: string | undefined;
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  timestamps_ms?: number[] | undefined;
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- subcircuit_connecivity_map_key?: string | undefined;
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+ } | {
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+ type: "simulation_switch";
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+ simulation_switch_id: string;
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+ closes_at?: number | undefined;
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+ opens_at?: number | undefined;
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+ starts_closed?: boolean | undefined;
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+ switching_frequency?: number | undefined;
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+ } | {
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+ type: "simulation_voltage_probe";
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+ simulation_voltage_probe_id: string;
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+ name?: string | undefined;
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+ subcircuit_id?: string | undefined;
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+ source_port_id?: string | undefined;
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+ source_net_id?: string | undefined;
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  })[]>;
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  declare const runTscircuitModule: (module: string, opts?: {
@@ -2245,12 +2276,12 @@ declare const runTscircuitModule: (module: string, opts?: {
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  error_type: "source_failed_to_create_component_error";
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  source_failed_to_create_component_error_id: string;
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  subcircuit_id?: string | undefined;
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- component_name?: string | undefined;
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- parent_source_component_id?: string | undefined;
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  pcb_center?: {
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  x?: number | undefined;
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  y?: number | undefined;
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  } | undefined;
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+ component_name?: string | undefined;
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+ parent_source_component_id?: string | undefined;
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  schematic_center?: {
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  x?: number | undefined;
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  y?: number | undefined;
@@ -2303,6 +2334,7 @@ declare const runTscircuitModule: (module: string, opts?: {
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  show_as_schematic_box?: boolean | undefined;
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  parent_subcircuit_id?: string | undefined;
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  parent_source_group_id?: string | undefined;
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+ was_automatically_named?: boolean | undefined;
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  } | {
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  type: "source_component";
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  name: string;
@@ -3189,6 +3221,19 @@ declare const runTscircuitModule: (module: string, opts?: {
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  pcb_port_ids: string[];
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  pcb_port_not_connected_error_id: string;
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  subcircuit_id?: string | undefined;
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+ } | {
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+ message: string;
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+ type: "pcb_via_clearance_error";
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+ error_type: "pcb_via_clearance_error";
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+ pcb_error_id: string;
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+ pcb_via_ids: string[];
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+ subcircuit_id?: string | undefined;
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+ minimum_clearance?: number | undefined;
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+ actual_clearance?: number | undefined;
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+ pcb_center?: {
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+ x?: number | undefined;
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+ y?: number | undefined;
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+ } | undefined;
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  } | {
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  type: "pcb_fabrication_note_path";
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  pcb_component_id: string;
@@ -3385,8 +3430,8 @@ declare const runTscircuitModule: (module: string, opts?: {
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  subcircuit_id?: string | undefined;
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  schematic_component_id?: string | undefined;
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  } | {
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- anchor: "top" | "bottom" | "center" | "top_left" | "top_center" | "top_right" | "center_left" | "center_right" | "bottom_left" | "bottom_center" | "bottom_right" | "left" | "right";
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  type: "schematic_text";
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+ anchor: "top" | "bottom" | "center" | "top_left" | "top_center" | "top_right" | "center_left" | "center_right" | "bottom_left" | "bottom_center" | "bottom_right" | "left" | "right";
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  rotation: number;
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  text: string;
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  font_size: number;
@@ -3757,18 +3802,35 @@ declare const runTscircuitModule: (module: string, opts?: {
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  name: string;
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  simulation_experiment_id: string;
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  experiment_type: "spice_dc_sweep" | "spice_dc_operating_point" | "spice_transient_analysis" | "spice_ac_analysis";
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+ time_per_step?: number | undefined;
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+ start_time_ms?: number | undefined;
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+ end_time_ms?: number | undefined;
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  } | {
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  type: "simulation_transient_voltage_graph";
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  simulation_experiment_id: string;
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- simulation_transient_voltage_graph_id: string;
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- voltage_levels: number[];
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  time_per_step: number;
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  start_time_ms: number;
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  end_time_ms: number;
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+ simulation_transient_voltage_graph_id: string;
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+ voltage_levels: number[];
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  name?: string | undefined;
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+ subcircuit_connectivity_map_key?: string | undefined;
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  schematic_voltage_probe_id?: string | undefined;
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  timestamps_ms?: number[] | undefined;
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- subcircuit_connecivity_map_key?: string | undefined;
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+ } | {
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+ type: "simulation_switch";
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+ simulation_switch_id: string;
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+ closes_at?: number | undefined;
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+ opens_at?: number | undefined;
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+ starts_closed?: boolean | undefined;
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+ switching_frequency?: number | undefined;
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+ } | {
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+ type: "simulation_voltage_probe";
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+ simulation_voltage_probe_id: string;
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+ name?: string | undefined;
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+ subcircuit_id?: string | undefined;
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+ source_port_id?: string | undefined;
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+ source_net_id?: string | undefined;
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  })[]>;
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  declare const STATIC_ASSET_EXTENSIONS: string[];
@@ -422,12 +422,12 @@ declare function runTscircuitCode(filesystemOrCodeString: Record<string, string>
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  error_type: "source_failed_to_create_component_error";
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  source_failed_to_create_component_error_id: string;
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  subcircuit_id?: string | undefined;
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- component_name?: string | undefined;
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- parent_source_component_id?: string | undefined;
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  pcb_center?: {
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  x?: number | undefined;
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  y?: number | undefined;
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  } | undefined;
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+ component_name?: string | undefined;
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+ parent_source_component_id?: string | undefined;
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  schematic_center?: {
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  x?: number | undefined;
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  y?: number | undefined;
@@ -480,6 +480,7 @@ declare function runTscircuitCode(filesystemOrCodeString: Record<string, string>
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  show_as_schematic_box?: boolean | undefined;
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  parent_subcircuit_id?: string | undefined;
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  parent_source_group_id?: string | undefined;
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+ was_automatically_named?: boolean | undefined;
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  } | {
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  type: "source_component";
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  name: string;
@@ -1366,6 +1367,19 @@ declare function runTscircuitCode(filesystemOrCodeString: Record<string, string>
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  pcb_port_ids: string[];
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  pcb_port_not_connected_error_id: string;
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  subcircuit_id?: string | undefined;
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+ } | {
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+ message: string;
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+ type: "pcb_via_clearance_error";
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+ error_type: "pcb_via_clearance_error";
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+ pcb_error_id: string;
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+ pcb_via_ids: string[];
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+ subcircuit_id?: string | undefined;
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+ minimum_clearance?: number | undefined;
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+ actual_clearance?: number | undefined;
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+ pcb_center?: {
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+ x?: number | undefined;
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+ y?: number | undefined;
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+ } | undefined;
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  } | {
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  type: "pcb_fabrication_note_path";
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  pcb_component_id: string;
@@ -1562,8 +1576,8 @@ declare function runTscircuitCode(filesystemOrCodeString: Record<string, string>
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  subcircuit_id?: string | undefined;
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  schematic_component_id?: string | undefined;
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  } | {
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- anchor: "top" | "bottom" | "center" | "top_left" | "top_center" | "top_right" | "center_left" | "center_right" | "bottom_left" | "bottom_center" | "bottom_right" | "left" | "right";
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  type: "schematic_text";
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+ anchor: "top" | "bottom" | "center" | "top_left" | "top_center" | "top_right" | "center_left" | "center_right" | "bottom_left" | "bottom_center" | "bottom_right" | "left" | "right";
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  rotation: number;
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  text: string;
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  font_size: number;
@@ -1934,18 +1948,35 @@ declare function runTscircuitCode(filesystemOrCodeString: Record<string, string>
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  name: string;
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  simulation_experiment_id: string;
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  experiment_type: "spice_dc_sweep" | "spice_dc_operating_point" | "spice_transient_analysis" | "spice_ac_analysis";
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+ time_per_step?: number | undefined;
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+ start_time_ms?: number | undefined;
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+ end_time_ms?: number | undefined;
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  } | {
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  type: "simulation_transient_voltage_graph";
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  simulation_experiment_id: string;
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- simulation_transient_voltage_graph_id: string;
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- voltage_levels: number[];
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  time_per_step: number;
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  start_time_ms: number;
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  end_time_ms: number;
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+ simulation_transient_voltage_graph_id: string;
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+ voltage_levels: number[];
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  name?: string | undefined;
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+ subcircuit_connectivity_map_key?: string | undefined;
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  schematic_voltage_probe_id?: string | undefined;
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  timestamps_ms?: number[] | undefined;
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- subcircuit_connecivity_map_key?: string | undefined;
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+ } | {
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+ type: "simulation_switch";
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+ simulation_switch_id: string;
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+ closes_at?: number | undefined;
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+ opens_at?: number | undefined;
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+ starts_closed?: boolean | undefined;
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+ switching_frequency?: number | undefined;
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+ } | {
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+ type: "simulation_voltage_probe";
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+ simulation_voltage_probe_id: string;
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+ name?: string | undefined;
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+ subcircuit_id?: string | undefined;
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+ source_port_id?: string | undefined;
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+ source_net_id?: string | undefined;
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  })[]>;
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  declare const runTscircuitModule: (module: string, opts?: {
@@ -2261,12 +2292,12 @@ declare const runTscircuitModule: (module: string, opts?: {
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  error_type: "source_failed_to_create_component_error";
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  source_failed_to_create_component_error_id: string;
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  subcircuit_id?: string | undefined;
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- component_name?: string | undefined;
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- parent_source_component_id?: string | undefined;
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  pcb_center?: {
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  x?: number | undefined;
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  y?: number | undefined;
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  } | undefined;
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+ component_name?: string | undefined;
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+ parent_source_component_id?: string | undefined;
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  schematic_center?: {
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  x?: number | undefined;
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  y?: number | undefined;
@@ -2319,6 +2350,7 @@ declare const runTscircuitModule: (module: string, opts?: {
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  show_as_schematic_box?: boolean | undefined;
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  parent_subcircuit_id?: string | undefined;
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  parent_source_group_id?: string | undefined;
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+ was_automatically_named?: boolean | undefined;
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  } | {
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  type: "source_component";
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  name: string;
@@ -3205,6 +3237,19 @@ declare const runTscircuitModule: (module: string, opts?: {
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  pcb_port_ids: string[];
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  pcb_port_not_connected_error_id: string;
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  subcircuit_id?: string | undefined;
3240
+ } | {
3241
+ message: string;
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+ type: "pcb_via_clearance_error";
3243
+ error_type: "pcb_via_clearance_error";
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+ pcb_error_id: string;
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+ pcb_via_ids: string[];
3246
+ subcircuit_id?: string | undefined;
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+ minimum_clearance?: number | undefined;
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+ actual_clearance?: number | undefined;
3249
+ pcb_center?: {
3250
+ x?: number | undefined;
3251
+ y?: number | undefined;
3252
+ } | undefined;
3208
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  } | {
3209
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  type: "pcb_fabrication_note_path";
3210
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  pcb_component_id: string;
@@ -3401,8 +3446,8 @@ declare const runTscircuitModule: (module: string, opts?: {
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  subcircuit_id?: string | undefined;
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  schematic_component_id?: string | undefined;
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  } | {
3404
- anchor: "top" | "bottom" | "center" | "top_left" | "top_center" | "top_right" | "center_left" | "center_right" | "bottom_left" | "bottom_center" | "bottom_right" | "left" | "right";
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  type: "schematic_text";
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+ anchor: "top" | "bottom" | "center" | "top_left" | "top_center" | "top_right" | "center_left" | "center_right" | "bottom_left" | "bottom_center" | "bottom_right" | "left" | "right";
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  rotation: number;
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  text: string;
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  font_size: number;
@@ -3773,18 +3818,35 @@ declare const runTscircuitModule: (module: string, opts?: {
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  name: string;
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  simulation_experiment_id: string;
3775
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  experiment_type: "spice_dc_sweep" | "spice_dc_operating_point" | "spice_transient_analysis" | "spice_ac_analysis";
3821
+ time_per_step?: number | undefined;
3822
+ start_time_ms?: number | undefined;
3823
+ end_time_ms?: number | undefined;
3776
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  } | {
3777
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  type: "simulation_transient_voltage_graph";
3778
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  simulation_experiment_id: string;
3779
- simulation_transient_voltage_graph_id: string;
3780
- voltage_levels: number[];
3781
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  time_per_step: number;
3782
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  start_time_ms: number;
3783
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  end_time_ms: number;
3830
+ simulation_transient_voltage_graph_id: string;
3831
+ voltage_levels: number[];
3784
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  name?: string | undefined;
3833
+ subcircuit_connectivity_map_key?: string | undefined;
3785
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  schematic_voltage_probe_id?: string | undefined;
3786
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  timestamps_ms?: number[] | undefined;
3787
- subcircuit_connecivity_map_key?: string | undefined;
3836
+ } | {
3837
+ type: "simulation_switch";
3838
+ simulation_switch_id: string;
3839
+ closes_at?: number | undefined;
3840
+ opens_at?: number | undefined;
3841
+ starts_closed?: boolean | undefined;
3842
+ switching_frequency?: number | undefined;
3843
+ } | {
3844
+ type: "simulation_voltage_probe";
3845
+ simulation_voltage_probe_id: string;
3846
+ name?: string | undefined;
3847
+ subcircuit_id?: string | undefined;
3848
+ source_port_id?: string | undefined;
3849
+ source_net_id?: string | undefined;
3788
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  })[]>;
3789
3851
 
3790
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  declare const STATIC_ASSET_EXTENSIONS: string[];