@tscircuit/core 0.0.62 → 0.0.64
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
package/dist/index.d.ts
CHANGED
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@@ -3773,7 +3773,7 @@ declare class PlatedHole extends PrimitiveComponent<typeof platedHoleProps> {
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}>]>, "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6", "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | {
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name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6";
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}>>;
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-
}, "
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3776
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+
}, "layer" | "pcbRotation">, {
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name: zod.ZodOptional<zod.ZodString>;
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shape: zod.ZodLiteral<"circle">;
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holeDiameter: zod.ZodEffects<zod.ZodUnion<[zod.ZodString, zod.ZodNumber]>, number, string | number>;
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@@ -3808,7 +3808,7 @@ declare class PlatedHole extends PrimitiveComponent<typeof platedHoleProps> {
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}>]>, "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6", "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6" | {
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name: "top" | "bottom" | "inner1" | "inner2" | "inner3" | "inner4" | "inner5" | "inner6";
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}>>;
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-
}, "
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}, "layer" | "pcbRotation">, {
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name: zod.ZodOptional<zod.ZodString>;
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shape: zod.ZodLiteral<"oval">;
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outerWidth: zod.ZodEffects<zod.ZodUnion<[zod.ZodString, zod.ZodNumber]>, number, string | number>;
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package/dist/index.js
CHANGED
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@@ -2521,23 +2521,31 @@ searched component ${targetComponent.getString()}, which has ports: ${targetComp
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return { ...t, layers: [candidateLayerSelections[idx]] };
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});
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}
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;
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orderedRoutePoints[0].pcb_port_id = ports[0].pcb_port_id;
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orderedRoutePoints[orderedRoutePoints.length - 1].pcb_port_id = ports[1].pcb_port_id;
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const routes = [];
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for (const [a, b] of pairs(orderedRoutePoints)) {
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const dominantLayer = "via_to_layer" in a ? a.via_to_layer : null;
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const BOUNDS_MARGIN = 2;
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const aLayer = "layers" in a && a.layers.length === 1 ? a.layers[0] : dominantLayer ?? "top";
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const bLayer = "layers" in b && b.layers.length === 1 ? b.layers[0] : dominantLayer ?? "top";
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const pcbPortA = "pcb_port_id" in a ? a.pcb_port_id : null;
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const pcbPortB = "pcb_port_id" in b ? b.pcb_port_id : null;
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const ijump = new MultilayerIjump({
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OBSTACLE_MARGIN: 0.3,
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-
isRemovePathLoopsEnabled: true,
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// isRemovePathLoopsEnabled: true,
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optimizeWithGoalBoxes: false,
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// Boolean(pcbPortA && pcbPortB),
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connMap,
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input: {
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obstacles,
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connections: [
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{
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name:
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+
name: this.source_trace_id,
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pointsToConnect: [
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-
{ ...a, layer: aLayer },
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-
{ ...b, layer: bLayer }
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{ ...a, layer: aLayer, pcb_port_id: pcbPortA },
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{ ...b, layer: bLayer, pcb_port_id: pcbPortB }
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]
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}
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],
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@@ -2582,7 +2590,7 @@ searched component ${targetComponent.getString()}, which has ports: ${targetComp
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const [trace] = traces;
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if (dominantLayer) {
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trace.route = trace.route.map((p) => {
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-
if (p.route_type === "wire") {
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if (p.route_type === "wire" && !p.layer) {
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p.layer = dominantLayer;
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}
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return p;
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@@ -3437,10 +3445,9 @@ var FabricationNotePath = class extends PrimitiveComponent {
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y: transformedPosition.y
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};
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}),
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-
stroke_width: props.strokeWidth ?? 0.1
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fabrication_note_path_id: `fabrication_note_${Math.random().toString()}`
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stroke_width: props.strokeWidth ?? 0.1
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});
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-
this.fabrication_note_path_id = fabrication_note_path.
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this.fabrication_note_path_id = fabrication_note_path.pcb_fabrication_note_path_id;
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}
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};
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@@ -3516,7 +3523,7 @@ var Circuit = class {
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"${e.message}"`
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);
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});
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-
return circuitToSvg.circuitJsonToPcbSvg(this.
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return circuitToSvg.circuitJsonToPcbSvg(this.getCircuitJson());
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}
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async preview(previewNameOrOpts) {
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const previewOpts = typeof previewNameOrOpts === "object" ? previewNameOrOpts : { previewName: previewNameOrOpts };
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package/lib/Project.ts
CHANGED
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@@ -42,10 +42,9 @@ export class FabricationNotePath extends PrimitiveComponent<
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}
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}),
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stroke_width: props.strokeWidth ?? 0.1,
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-
fabrication_note_path_id: `fabrication_note_${Math.random().toString()}`,
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})
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this.fabrication_note_path_id =
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fabrication_note_path.
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fabrication_note_path.pcb_fabrication_note_path_id
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}
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}
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@@ -44,7 +44,13 @@ import { getFullConnectivityMapFromCircuitJson } from "circuit-json-to-connectiv
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type PcbRouteObjective =
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| RouteHintPoint
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-
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| {
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layers: string[]
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x: number
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y: number
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via?: boolean
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pcb_port_id?: string
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}
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const portToObjective = (port: Port): PcbRouteObjective => {
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const portPosition = port._getGlobalPcbPositionAfterLayout()
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@@ -422,6 +428,9 @@ export class Trace extends PrimitiveComponent<typeof traceProps> {
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return { ...t, layers: [candidateLayerSelections[idx]] }
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})
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}
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;(orderedRoutePoints[0] as any).pcb_port_id = ports[0].pcb_port_id
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;(orderedRoutePoints[orderedRoutePoints.length - 1] as any).pcb_port_id =
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ports[1].pcb_port_id
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const routes: PCBTrace["route"][] = []
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for (const [a, b] of pairs(orderedRoutePoints)) {
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@@ -432,23 +441,28 @@ export class Trace extends PrimitiveComponent<typeof traceProps> {
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const aLayer =
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"layers" in a && a.layers.length === 1
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? a.layers[0]
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-
: dominantLayer ?? "top"
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: (dominantLayer ?? "top")
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const bLayer =
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"layers" in b && b.layers.length === 1
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? b.layers[0]
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-
: dominantLayer ?? "top"
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: (dominantLayer ?? "top")
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const pcbPortA = "pcb_port_id" in a ? a.pcb_port_id : null
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const pcbPortB = "pcb_port_id" in b ? b.pcb_port_id : null
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const ijump = new MultilayerIjump({
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OBSTACLE_MARGIN: 0.3,
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-
isRemovePathLoopsEnabled: true,
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// isRemovePathLoopsEnabled: true,
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optimizeWithGoalBoxes: false, // Boolean(pcbPortA && pcbPortB),
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connMap,
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input: {
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obstacles,
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connections: [
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{
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name:
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name: this.source_trace_id!,
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pointsToConnect: [
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{ ...a, layer: aLayer },
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{ ...b, layer: bLayer },
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{ ...a, layer: aLayer, pcb_port_id: pcbPortA! },
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{ ...b, layer: bLayer, pcb_port_id: pcbPortB! },
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],
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},
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],
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@@ -490,15 +504,13 @@ export class Trace extends PrimitiveComponent<typeof traceProps> {
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})
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return
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}
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-
// TODO ijump returns multiple traces for some reason
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const [trace] = traces as PCBTrace[]
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-
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//
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//
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// specifies we should have "via'd" to
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+
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// If the autorouter didn't specify a layer, use the dominant layer
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// Some of the single-layer autorouters don't add the layer property
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if (dominantLayer) {
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trace.route = trace.route.map((p) => {
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-
if (p.route_type === "wire") {
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if (p.route_type === "wire" && !p.layer) {
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p.layer = dominantLayer
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}
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return p
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package/package.json
CHANGED
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@@ -2,7 +2,7 @@
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2
2
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"name": "@tscircuit/core",
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3
3
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"module": "index.ts",
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4
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"type": "module",
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5
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-
"version": "0.0.
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"version": "0.0.64",
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"types": "dist/index.d.ts",
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"main": "dist/index.js",
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"files": [
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@@ -23,10 +23,11 @@
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"@types/react": "^18.3.3",
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"@types/react-reconciler": "^0.28.8",
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"bun-match-svg": "0.0.2",
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"circuit-to-svg": "^0.0.
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"circuit-to-svg": "^0.0.32",
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"debug": "^4.3.6",
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"howfat": "^0.3.8",
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"looks-same": "^9.0.1",
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"performance-now": "^2.1.0",
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"tsup": "^8.2.4"
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},
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"peerDependencies": {
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@@ -34,12 +35,14 @@
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},
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"dependencies": {
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"@lume/kiwi": "^0.4.3",
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37
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-
"@tscircuit/infgrid-ijump-astar": "^0.0.
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+
"@tscircuit/infgrid-ijump-astar": "^0.0.18",
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"@tscircuit/math-utils": "^0.0.4",
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"@tscircuit/props": "^0.0.63",
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39
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-
"@tscircuit/soup": "^0.0.
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40
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"@tscircuit/soup-util": "^0.0.
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41
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-
"circuit-json-to-connectivity-map": "^0.0.
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+
"@tscircuit/soup": "^0.0.71",
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"@tscircuit/soup-util": "^0.0.27",
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"circuit-json-to-connectivity-map": "^0.0.15",
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"footprinter": "^0.0.44",
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+
"nanoid": "^5.0.7",
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"react": "^18.3.1",
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"react-reconciler": "^0.29.2",
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"schematic-symbols": "0.0.17",
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